From 516be6933bce4a8dbba9176507e55da40235761f Mon Sep 17 00:00:00 2001 From: hejie <2963848435@qq.com> Date: Tue, 21 Jan 2025 14:05:04 +0800 Subject: [PATCH] =?UTF-8?q?[=E5=88=9D=E7=89=88=EF=BC=8C=E7=AD=89=E5=BE=85?= =?UTF-8?q?=E9=80=86=E5=8F=98=E5=99=A8=E8=BF=9B=E8=A1=8C=E9=9B=86=E6=88=90?= =?UTF-8?q?=E8=B0=83=E8=AF=95]?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- .mxproject | Bin 20480 -> 20480 bytes Core/Inc/FreeRTOSConfig.h | Bin 12288 -> 12288 bytes Core/Inc/adc.h | Bin 8192 -> 8192 bytes Core/Inc/stm32f1xx_hal_conf.h | Bin 20480 -> 20480 bytes Core/Inc/usart.h | Bin 8192 -> 8192 bytes Core/Src/freertos.c | Bin 16384 -> 16384 bytes Core/Src/main.c | Bin 12288 -> 12288 bytes Core/Src/stm32f1xx_it.c | Bin 16384 -> 16384 bytes Core/Src/usart.c | Bin 24576 -> 24576 bytes HardWare/APP/APP_State.c | Bin 8192 -> 12288 bytes HardWare/APP/APP_State.h | Bin 8192 -> 8192 bytes HardWare/FreeModbus/bsd.txt | 26 + HardWare/FreeModbus/gpl.txt | 340 + HardWare/FreeModbus/lgpl.txt | 504 + HardWare/FreeModbus/modbus/ascii/mbascii.c | 486 + HardWare/FreeModbus/modbus/ascii/mbascii.h | 56 + .../FreeModbus/modbus/functions/mbfunccoils.c | 269 + .../modbus/functions/mbfunccoils_m.c | 390 + .../FreeModbus/modbus/functions/mbfuncdiag.c | 29 + .../FreeModbus/modbus/functions/mbfuncdisc.c | 133 + .../modbus/functions/mbfuncdisc_m.c | 162 + .../modbus/functions/mbfuncholding.c | 308 + .../modbus/functions/mbfuncholding_m.c | Bin 0 -> 24576 bytes .../FreeModbus/modbus/functions/mbfuncinput.c | 122 + .../modbus/functions/mbfuncinput_m.c | Bin 0 -> 12288 bytes .../FreeModbus/modbus/functions/mbfuncother.c | 88 + .../FreeModbus/modbus/functions/mbutils.c | 141 + HardWare/FreeModbus/modbus/include/mb.h | 417 + HardWare/FreeModbus/modbus/include/mb_m.h | 414 + HardWare/FreeModbus/modbus/include/mbconfig.h | 124 + HardWare/FreeModbus/modbus/include/mbframe.h | 87 + HardWare/FreeModbus/modbus/include/mbfunc.h | 80 + HardWare/FreeModbus/modbus/include/mbport.h | 204 + HardWare/FreeModbus/modbus/include/mbproto.h | 83 + HardWare/FreeModbus/modbus/include/mbutils.h | 108 + HardWare/FreeModbus/modbus/mb.c | 412 + HardWare/FreeModbus/modbus/mb_m.c | 375 + HardWare/FreeModbus/modbus/rtu/mbcrc.c | 98 + HardWare/FreeModbus/modbus/rtu/mbcrc.h | 36 + HardWare/FreeModbus/modbus/rtu/mbrtu.c | 313 + HardWare/FreeModbus/modbus/rtu/mbrtu.h | 64 + HardWare/FreeModbus/modbus/rtu/mbrtu_m.c | 446 + HardWare/FreeModbus/modbus/tcp/mbtcp.c | 158 + HardWare/FreeModbus/modbus/tcp/mbtcp.h | 53 + HardWare/FreeModbus/port/FreeRTOS/port.c | 86 + HardWare/FreeModbus/port/FreeRTOS/portevent.c | 79 + .../FreeModbus/port/FreeRTOS/portevent_m.c | Bin 0 -> 16384 bytes .../FreeModbus/port/FreeRTOS/portserial.c | 244 + .../FreeModbus/port/FreeRTOS/portserial_m.c | Bin 0 -> 16384 bytes HardWare/FreeModbus/port/FreeRTOS/porttimer.c | 66 + .../FreeModbus/port/FreeRTOS/porttimer_m.c | 117 + HardWare/FreeModbus/port/port.h | Bin 0 -> 8192 bytes HardWare/FreeModbus/port/user_mb_app.c | 289 + HardWare/FreeModbus/port/user_mb_app.h | Bin 0 -> 8192 bytes HardWare/FreeModbus/port/user_mb_app_m.c | Bin 0 -> 16384 bytes HardWare/STM32MB/port/MB_port.h | Bin 8192 -> 8192 bytes HardWare/STM32MB/port/portevent_m.c | Bin 16384 -> 16384 bytes HardWare/STM32MB/port/portserial_m.c | Bin 16384 -> 16384 bytes HardWare/STM32MB/port/user_mb_app.h | Bin 8192 -> 8192 bytes HardWare/SYS/sys.c | Bin 8192 -> 8192 bytes HardWare/SYS/sys.h | Bin 8192 -> 8192 bytes HardWare/USART/uart_device.c | Bin 8192 -> 8192 bytes MDK-ARM/JLinkLog.txt | Bin 258048 -> 8192 bytes MDK-ARM/NBQlaohua.uvguix.深圳笔记本 | 584 +- MDK-ARM/NBQlaohua.uvoptx | 353 +- MDK-ARM/NBQlaohua.uvprojx | Bin 77824 -> 77824 bytes MDK-ARM/NBQlaohua/NBQlaohua.axf | Bin 1110948 -> 1239292 bytes MDK-ARM/NBQlaohua/NBQlaohua.bin | Bin 0 -> 42980 bytes MDK-ARM/NBQlaohua/NBQlaohua.build_log.htm | 40 +- MDK-ARM/NBQlaohua/NBQlaohua.dis | 19340 ++++++++++++++++ MDK-ARM/NBQlaohua/NBQlaohua.hex | 4694 ++-- MDK-ARM/NBQlaohua/NBQlaohua.htm | 3738 +-- MDK-ARM/NBQlaohua/NBQlaohua.lnp | 17 +- MDK-ARM/NBQlaohua/NBQlaohua.map | Bin 425984 -> 475136 bytes MDK-ARM/NBQlaohua/NBQlaohua_NBQlaohua.dep | 1198 +- MDK-ARM/NBQlaohua/adc.crf | Bin 765621 -> 770984 bytes MDK-ARM/NBQlaohua/adc.o | Bin 850776 -> 854840 bytes MDK-ARM/NBQlaohua/ads1115_device.o | Bin 16556 -> 16704 bytes MDK-ARM/NBQlaohua/ads1115_drive.crf | Bin 769810 -> 818509 bytes MDK-ARM/NBQlaohua/ads1115_drive.d | 19 +- MDK-ARM/NBQlaohua/ads1115_drive.o | Bin 869872 -> 912072 bytes MDK-ARM/NBQlaohua/app_state.crf | Bin 17631 -> 827753 bytes MDK-ARM/NBQlaohua/app_state.d | 47 + MDK-ARM/NBQlaohua/app_state.o | Bin 40060 -> 923880 bytes MDK-ARM/NBQlaohua/can.crf | Bin 764032 -> 769194 bytes MDK-ARM/NBQlaohua/can.o | Bin 846896 -> 850876 bytes MDK-ARM/NBQlaohua/cmsis_os2.crf | Bin 89554 -> 89554 bytes MDK-ARM/NBQlaohua/cmsis_os2.o | Bin 189564 -> 189712 bytes MDK-ARM/NBQlaohua/croutine.crf | Bin 38450 -> 38450 bytes MDK-ARM/NBQlaohua/croutine.o | Bin 41700 -> 41848 bytes MDK-ARM/NBQlaohua/delay.crf | Bin 763300 -> 811816 bytes MDK-ARM/NBQlaohua/delay.d | 16 +- MDK-ARM/NBQlaohua/delay.o | Bin 844700 -> 886040 bytes MDK-ARM/NBQlaohua/dma.crf | Bin 763402 -> 768564 bytes MDK-ARM/NBQlaohua/dma.o | Bin 843320 -> 847300 bytes MDK-ARM/NBQlaohua/event_groups.crf | Bin 52684 -> 52684 bytes MDK-ARM/NBQlaohua/event_groups.o | Bin 74972 -> 75120 bytes MDK-ARM/NBQlaohua/freertos.crf | Bin 864106 -> 871243 bytes MDK-ARM/NBQlaohua/freertos.d | 6 +- MDK-ARM/NBQlaohua/freertos.o | Bin 939980 -> 947256 bytes MDK-ARM/NBQlaohua/gpio.crf | Bin 764417 -> 769579 bytes MDK-ARM/NBQlaohua/gpio.o | Bin 843756 -> 847736 bytes MDK-ARM/NBQlaohua/heap_4.crf | Bin 43762 -> 43762 bytes MDK-ARM/NBQlaohua/heap_4.o | Bin 54444 -> 54592 bytes MDK-ARM/NBQlaohua/iic.crf | Bin 788854 -> 814839 bytes MDK-ARM/NBQlaohua/iic.d | 7 + MDK-ARM/NBQlaohua/iic.o | Bin 888968 -> 908856 bytes MDK-ARM/NBQlaohua/led.crf | Bin 763219 -> 811908 bytes MDK-ARM/NBQlaohua/led.d | 17 +- MDK-ARM/NBQlaohua/led.o | Bin 845644 -> 887844 bytes MDK-ARM/NBQlaohua/list.crf | Bin 33098 -> 33098 bytes MDK-ARM/NBQlaohua/list.o | Bin 44636 -> 44784 bytes MDK-ARM/NBQlaohua/main.crf | Bin 806870 -> 812287 bytes MDK-ARM/NBQlaohua/main.o | Bin 886000 -> 890044 bytes MDK-ARM/NBQlaohua/mb_m.crf | Bin 870168 -> 874143 bytes MDK-ARM/NBQlaohua/mb_m.d | 9 +- MDK-ARM/NBQlaohua/mb_m.o | Bin 940980 -> 941356 bytes MDK-ARM/NBQlaohua/mb_port.crf | Bin 843344 -> 843372 bytes MDK-ARM/NBQlaohua/mb_port.o | Bin 909564 -> 909588 bytes MDK-ARM/NBQlaohua/mbcrc.crf | Bin 843555 -> 847469 bytes MDK-ARM/NBQlaohua/mbcrc.d | 8 +- MDK-ARM/NBQlaohua/mbcrc.o | Bin 908020 -> 908304 bytes MDK-ARM/NBQlaohua/mbfunccoils_m.crf | Bin 868924 -> 872892 bytes MDK-ARM/NBQlaohua/mbfunccoils_m.d | 9 +- MDK-ARM/NBQlaohua/mbfunccoils_m.o | Bin 930148 -> 930464 bytes MDK-ARM/NBQlaohua/mbfuncdiag.d | 2 +- MDK-ARM/NBQlaohua/mbfuncdiag.o | Bin 5304 -> 5456 bytes MDK-ARM/NBQlaohua/mbfuncdisc_m.crf | Bin 865884 -> 869852 bytes MDK-ARM/NBQlaohua/mbfuncdisc_m.d | 9 +- MDK-ARM/NBQlaohua/mbfuncdisc_m.o | Bin 921152 -> 921444 bytes MDK-ARM/NBQlaohua/mbfuncholding_m.crf | Bin 870735 -> 874748 bytes MDK-ARM/NBQlaohua/mbfuncholding_m.d | 9 +- MDK-ARM/NBQlaohua/mbfuncholding_m.o | Bin 935120 -> 935756 bytes MDK-ARM/NBQlaohua/mbfuncinput_m.crf | Bin 865849 -> 869817 bytes MDK-ARM/NBQlaohua/mbfuncinput_m.d | 9 +- MDK-ARM/NBQlaohua/mbfuncinput_m.o | Bin 921072 -> 921368 bytes MDK-ARM/NBQlaohua/mbfuncother.crf | Bin 858823 -> 862791 bytes MDK-ARM/NBQlaohua/mbfuncother.d | 9 +- MDK-ARM/NBQlaohua/mbfuncother.o | Bin 919472 -> 919776 bytes MDK-ARM/NBQlaohua/mbrtu_m.crf | Bin 869200 -> 873265 bytes MDK-ARM/NBQlaohua/mbrtu_m.d | 13 +- MDK-ARM/NBQlaohua/mbrtu_m.o | Bin 942456 -> 943072 bytes MDK-ARM/NBQlaohua/mbutils.crf | Bin 858951 -> 862919 bytes MDK-ARM/NBQlaohua/mbutils.d | 9 +- MDK-ARM/NBQlaohua/mbutils.o | Bin 918824 -> 919116 bytes MDK-ARM/NBQlaohua/modbus_master_test.crf | Bin 860478 -> 860506 bytes MDK-ARM/NBQlaohua/modbus_master_test.o | Bin 919108 -> 919132 bytes MDK-ARM/NBQlaohua/port.crf | Bin 40109 -> 40109 bytes MDK-ARM/NBQlaohua/port.o | Bin 59444 -> 59592 bytes MDK-ARM/NBQlaohua/port_1.crf | Bin 734207 -> 847713 bytes MDK-ARM/NBQlaohua/port_1.d | 45 +- MDK-ARM/NBQlaohua/port_1.o | Bin 808336 -> 913856 bytes MDK-ARM/NBQlaohua/portevent_m.crf | Bin 859459 -> 863349 bytes MDK-ARM/NBQlaohua/portevent_m.d | 11 +- MDK-ARM/NBQlaohua/portevent_m.o | Bin 930320 -> 931252 bytes MDK-ARM/NBQlaohua/portserial_m.crf | Bin 855376 -> 858513 bytes MDK-ARM/NBQlaohua/portserial_m.d | 9 +- MDK-ARM/NBQlaohua/portserial_m.o | Bin 926388 -> 930412 bytes MDK-ARM/NBQlaohua/porttimer_m.crf | Bin 859005 -> 862899 bytes MDK-ARM/NBQlaohua/porttimer_m.d | 10 +- MDK-ARM/NBQlaohua/porttimer_m.o | Bin 925252 -> 924264 bytes MDK-ARM/NBQlaohua/queue.crf | Bin 67382 -> 67382 bytes MDK-ARM/NBQlaohua/queue.o | Bin 125300 -> 125448 bytes MDK-ARM/NBQlaohua/relay.o | Bin 9968 -> 10116 bytes MDK-ARM/NBQlaohua/stm32f1xx_hal.crf | Bin 764088 -> 769256 bytes MDK-ARM/NBQlaohua/stm32f1xx_hal.o | Bin 875656 -> 879636 bytes MDK-ARM/NBQlaohua/stm32f1xx_hal_adc.crf | Bin 777111 -> 782279 bytes MDK-ARM/NBQlaohua/stm32f1xx_hal_adc.o | Bin 887048 -> 891028 bytes MDK-ARM/NBQlaohua/stm32f1xx_hal_adc_ex.crf | Bin 772043 -> 777205 bytes MDK-ARM/NBQlaohua/stm32f1xx_hal_adc_ex.o | Bin 866392 -> 870372 bytes MDK-ARM/NBQlaohua/stm32f1xx_hal_can.crf | Bin 773526 -> 778688 bytes MDK-ARM/NBQlaohua/stm32f1xx_hal_can.o | Bin 898732 -> 902712 bytes MDK-ARM/NBQlaohua/stm32f1xx_hal_cortex.crf | Bin 763497 -> 768659 bytes MDK-ARM/NBQlaohua/stm32f1xx_hal_cortex.o | Bin 867412 -> 871392 bytes MDK-ARM/NBQlaohua/stm32f1xx_hal_dma.crf | Bin 775160 -> 780322 bytes MDK-ARM/NBQlaohua/stm32f1xx_hal_dma.o | Bin 866216 -> 870196 bytes MDK-ARM/NBQlaohua/stm32f1xx_hal_exti.crf | Bin 765634 -> 770802 bytes MDK-ARM/NBQlaohua/stm32f1xx_hal_exti.o | Bin 855372 -> 859352 bytes MDK-ARM/NBQlaohua/stm32f1xx_hal_flash.crf | Bin 767450 -> 772618 bytes MDK-ARM/NBQlaohua/stm32f1xx_hal_flash.o | Bin 863020 -> 867000 bytes MDK-ARM/NBQlaohua/stm32f1xx_hal_flash_ex.crf | Bin 768728 -> 773896 bytes MDK-ARM/NBQlaohua/stm32f1xx_hal_flash_ex.o | Bin 866192 -> 870172 bytes MDK-ARM/NBQlaohua/stm32f1xx_hal_gpio.crf | Bin 766446 -> 771608 bytes MDK-ARM/NBQlaohua/stm32f1xx_hal_gpio.o | Bin 854656 -> 858636 bytes MDK-ARM/NBQlaohua/stm32f1xx_hal_gpio_ex.crf | Bin 762659 -> 767821 bytes MDK-ARM/NBQlaohua/stm32f1xx_hal_gpio_ex.o | Bin 844488 -> 848468 bytes MDK-ARM/NBQlaohua/stm32f1xx_hal_msp.crf | Bin 763446 -> 768608 bytes MDK-ARM/NBQlaohua/stm32f1xx_hal_msp.o | Bin 842804 -> 846784 bytes MDK-ARM/NBQlaohua/stm32f1xx_hal_pwr.crf | Bin 765498 -> 770660 bytes MDK-ARM/NBQlaohua/stm32f1xx_hal_pwr.o | Bin 865908 -> 869888 bytes MDK-ARM/NBQlaohua/stm32f1xx_hal_rcc.crf | Bin 777375 -> 782537 bytes MDK-ARM/NBQlaohua/stm32f1xx_hal_rcc.o | Bin 867864 -> 871844 bytes MDK-ARM/NBQlaohua/stm32f1xx_hal_rcc_ex.crf | Bin 770752 -> 775920 bytes MDK-ARM/NBQlaohua/stm32f1xx_hal_rcc_ex.o | Bin 854712 -> 858696 bytes MDK-ARM/NBQlaohua/stm32f1xx_hal_tim.crf | Bin 827470 -> 835300 bytes MDK-ARM/NBQlaohua/stm32f1xx_hal_tim.o | Bin 1046392 -> 1057128 bytes MDK-ARM/NBQlaohua/stm32f1xx_hal_tim_ex.crf | Bin 789384 -> 794623 bytes MDK-ARM/NBQlaohua/stm32f1xx_hal_tim_ex.o | Bin 916760 -> 920564 bytes .../NBQlaohua/stm32f1xx_hal_timebase_tim.crf | Bin 763156 -> 768319 bytes .../NBQlaohua/stm32f1xx_hal_timebase_tim.o | Bin 845788 -> 849768 bytes MDK-ARM/NBQlaohua/stm32f1xx_hal_uart.crf | Bin 784820 -> 792032 bytes MDK-ARM/NBQlaohua/stm32f1xx_hal_uart.o | Bin 940352 -> 953072 bytes MDK-ARM/NBQlaohua/stm32f1xx_it.crf | Bin 764611 -> 770171 bytes MDK-ARM/NBQlaohua/stm32f1xx_it.o | Bin 866756 -> 872416 bytes MDK-ARM/NBQlaohua/stream_buffer.crf | Bin 53808 -> 53808 bytes MDK-ARM/NBQlaohua/stream_buffer.o | Bin 93444 -> 93592 bytes MDK-ARM/NBQlaohua/sys.crf | Bin 819456 -> 833538 bytes MDK-ARM/NBQlaohua/sys.d | 25 +- MDK-ARM/NBQlaohua/sys.o | Bin 884868 -> 898180 bytes MDK-ARM/NBQlaohua/system_stm32f1xx.crf | Bin 763130 -> 768292 bytes MDK-ARM/NBQlaohua/system_stm32f1xx.o | Bin 843680 -> 847664 bytes MDK-ARM/NBQlaohua/tasks.crf | Bin 72257 -> 72257 bytes MDK-ARM/NBQlaohua/tasks.o | Bin 164132 -> 164280 bytes MDK-ARM/NBQlaohua/tim.crf | Bin 763798 -> 768961 bytes MDK-ARM/NBQlaohua/tim.o | Bin 847092 -> 851056 bytes MDK-ARM/NBQlaohua/timers.crf | Bin 61485 -> 61485 bytes MDK-ARM/NBQlaohua/timers.o | Bin 93900 -> 94048 bytes MDK-ARM/NBQlaohua/uart_device.crf | Bin 10586 -> 10546 bytes MDK-ARM/NBQlaohua/uart_device.o | Bin 16724 -> 16788 bytes MDK-ARM/NBQlaohua/usart.crf | Bin 822692 -> 828476 bytes MDK-ARM/NBQlaohua/usart.o | Bin 915612 -> 921508 bytes MDK-ARM/NBQlaohua/user_mb_app_m.crf | Bin 862378 -> 868837 bytes MDK-ARM/NBQlaohua/user_mb_app_m.d | 4 +- MDK-ARM/NBQlaohua/user_mb_app_m.o | Bin 925740 -> 931376 bytes NBQlaohua.ioc | Bin 20480 -> 20480 bytes 流程图.eddx | Bin 15259 -> 16135 bytes 226 files changed, 32997 insertions(+), 4676 deletions(-) create mode 100644 HardWare/FreeModbus/bsd.txt create mode 100644 HardWare/FreeModbus/gpl.txt create mode 100644 HardWare/FreeModbus/lgpl.txt create mode 100644 HardWare/FreeModbus/modbus/ascii/mbascii.c create mode 100644 HardWare/FreeModbus/modbus/ascii/mbascii.h create mode 100644 HardWare/FreeModbus/modbus/functions/mbfunccoils.c create mode 100644 HardWare/FreeModbus/modbus/functions/mbfunccoils_m.c create mode 100644 HardWare/FreeModbus/modbus/functions/mbfuncdiag.c create mode 100644 HardWare/FreeModbus/modbus/functions/mbfuncdisc.c create mode 100644 HardWare/FreeModbus/modbus/functions/mbfuncdisc_m.c create mode 100644 HardWare/FreeModbus/modbus/functions/mbfuncholding.c create mode 100644 HardWare/FreeModbus/modbus/functions/mbfuncholding_m.c create mode 100644 HardWare/FreeModbus/modbus/functions/mbfuncinput.c create mode 100644 HardWare/FreeModbus/modbus/functions/mbfuncinput_m.c create mode 100644 HardWare/FreeModbus/modbus/functions/mbfuncother.c create mode 100644 HardWare/FreeModbus/modbus/functions/mbutils.c create mode 100644 HardWare/FreeModbus/modbus/include/mb.h create mode 100644 HardWare/FreeModbus/modbus/include/mb_m.h create mode 100644 HardWare/FreeModbus/modbus/include/mbconfig.h create mode 100644 HardWare/FreeModbus/modbus/include/mbframe.h create mode 100644 HardWare/FreeModbus/modbus/include/mbfunc.h create mode 100644 HardWare/FreeModbus/modbus/include/mbport.h create mode 100644 HardWare/FreeModbus/modbus/include/mbproto.h create mode 100644 HardWare/FreeModbus/modbus/include/mbutils.h create mode 100644 HardWare/FreeModbus/modbus/mb.c create mode 100644 HardWare/FreeModbus/modbus/mb_m.c create mode 100644 HardWare/FreeModbus/modbus/rtu/mbcrc.c create mode 100644 HardWare/FreeModbus/modbus/rtu/mbcrc.h create mode 100644 HardWare/FreeModbus/modbus/rtu/mbrtu.c create mode 100644 HardWare/FreeModbus/modbus/rtu/mbrtu.h create mode 100644 HardWare/FreeModbus/modbus/rtu/mbrtu_m.c create mode 100644 HardWare/FreeModbus/modbus/tcp/mbtcp.c create mode 100644 HardWare/FreeModbus/modbus/tcp/mbtcp.h create mode 100644 HardWare/FreeModbus/port/FreeRTOS/port.c create mode 100644 HardWare/FreeModbus/port/FreeRTOS/portevent.c create mode 100644 HardWare/FreeModbus/port/FreeRTOS/portevent_m.c create mode 100644 HardWare/FreeModbus/port/FreeRTOS/portserial.c create mode 100644 HardWare/FreeModbus/port/FreeRTOS/portserial_m.c create mode 100644 HardWare/FreeModbus/port/FreeRTOS/porttimer.c create mode 100644 HardWare/FreeModbus/port/FreeRTOS/porttimer_m.c create mode 100644 HardWare/FreeModbus/port/port.h create mode 100644 HardWare/FreeModbus/port/user_mb_app.c create mode 100644 HardWare/FreeModbus/port/user_mb_app.h create mode 100644 HardWare/FreeModbus/port/user_mb_app_m.c create mode 100644 MDK-ARM/NBQlaohua/NBQlaohua.bin create mode 100644 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z4)AaLvrZDYe~fd$RY?tsugvHrBdN&KvW%GUp>wZ@6N*hi9NvcwaWc28k=nk;@~?Y>|{FdGBSy z^42oNXKKoQ+S!3)@xHe6eubz?siaM@D#|q7+ z0`i@m>lzgT`9k-4@)Ppj=dX7*srxqOg~pt7M{FGsdj{B1k)dk!14B?LqDwe_F@nk? zg#v#V0#Hsy@KDgs+Y$)zi1gzqhpVlmD!b_%&K9&#UQf|OxG&3Or3h%f>v}lCFg@g+ zCrcyZB5>-XVf%yXK&gV;;_i|sA(e>lCC61iWu(-OA%5_yl5<%bXw><*r*ys5R4u!*+)|nt^d1e)l ej}$q|sxDd009wpT!j-hzLhCw3vY-nf5>dH=EqA>D diff --git a/HardWare/FreeModbus/bsd.txt b/HardWare/FreeModbus/bsd.txt new file mode 100644 index 0000000..4e61209 --- /dev/null +++ b/HardWare/FreeModbus/bsd.txt @@ -0,0 +1,26 @@ +Copyright (c) 2006 Christian Walter +Copyright (c) 2013-2019 Armink +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions +are met: +1. Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. +2. Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. +3. 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Here is a sample; alter the names: + + Yoyodyne, Inc., hereby disclaims all copyright interest in the + library `Frob' (a library for tweaking knobs) written by James Random Hacker. + + , 1 April 1990 + Ty Coon, President of Vice + +That's all there is to it! + + diff --git a/HardWare/FreeModbus/modbus/ascii/mbascii.c b/HardWare/FreeModbus/modbus/ascii/mbascii.c new file mode 100644 index 0000000..5ed4a26 --- /dev/null +++ b/HardWare/FreeModbus/modbus/ascii/mbascii.c @@ -0,0 +1,486 @@ +/* + * FreeModbus Libary: A portable Modbus implementation for Modbus ASCII/RTU. + * Copyright (c) 2006-2018 Christian Walter + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * File: $Id: mbascii.c,v 1.15 2007/02/18 23:46:48 wolti Exp $ + */ + +/* ----------------------- System includes ----------------------------------*/ +#include "stdlib.h" +#include "string.h" + +/* ----------------------- Platform includes --------------------------------*/ +#include "port.h" + +/* ----------------------- Modbus includes ----------------------------------*/ +#include "mb.h" +#include "mbconfig.h" +#include "mbascii.h" +#include "mbframe.h" + +#include "mbcrc.h" +#include "mbport.h" + +#if MB_SLAVE_ASCII_ENABLED > 0 + +/* ----------------------- Defines ------------------------------------------*/ +#define MB_ASCII_DEFAULT_CR '\r' /*!< Default CR character for Modbus ASCII. */ +#define MB_ASCII_DEFAULT_LF '\n' /*!< Default LF character for Modbus ASCII. */ +#define MB_SER_PDU_SIZE_MIN 3 /*!< Minimum size of a Modbus ASCII frame. */ +#define MB_SER_PDU_SIZE_MAX 256 /*!< Maximum size of a Modbus ASCII frame. */ +#define MB_SER_PDU_SIZE_LRC 1 /*!< Size of LRC field in PDU. */ +#define MB_SER_PDU_ADDR_OFF 0 /*!< Offset of slave address in Ser-PDU. */ +#define MB_SER_PDU_PDU_OFF 1 /*!< Offset of Modbus-PDU in Ser-PDU. */ + +/* ----------------------- Type definitions ---------------------------------*/ +typedef enum +{ + STATE_RX_IDLE, /*!< Receiver is in idle state. */ + STATE_RX_RCV, /*!< Frame is beeing received. */ + STATE_RX_WAIT_EOF /*!< Wait for End of Frame. */ +} eMBRcvState; + +typedef enum +{ + STATE_TX_IDLE, /*!< Transmitter is in idle state. */ + STATE_TX_START, /*!< Starting transmission (':' sent). */ + STATE_TX_DATA, /*!< Sending of data (Address, Data, LRC). */ + STATE_TX_END, /*!< End of transmission. */ + STATE_TX_NOTIFY /*!< Notify sender that the frame has been sent. */ +} eMBSndState; + +typedef enum +{ + BYTE_HIGH_NIBBLE, /*!< Character for high nibble of byte. */ + BYTE_LOW_NIBBLE /*!< Character for low nibble of byte. */ +} eMBBytePos; + +/* ----------------------- Static functions ---------------------------------*/ +static UCHAR prvucMBCHAR2BIN( UCHAR ucCharacter ); + +static UCHAR prvucMBBIN2CHAR( UCHAR ucByte ); + +static UCHAR prvucMBLRC( UCHAR * pucFrame, USHORT usLen ); + +/* ----------------------- Static variables ---------------------------------*/ +static volatile eMBSndState eSndState; +static volatile eMBRcvState eRcvState; + +/* We reuse the Modbus RTU buffer because only one buffer is needed and the + * RTU buffer is bigger. */ +extern volatile UCHAR ucRTUBuf[]; +static volatile UCHAR *ucASCIIBuf = ucRTUBuf; + +static volatile USHORT usRcvBufferPos; +static volatile eMBBytePos eBytePos; + +static volatile UCHAR *pucSndBufferCur; +static volatile USHORT usSndBufferCount; + +static volatile UCHAR ucLRC; +static volatile UCHAR ucMBLFCharacter; + +/* ----------------------- Start implementation -----------------------------*/ +eMBErrorCode +eMBASCIIInit( UCHAR ucSlaveAddress, UCHAR ucPort, ULONG ulBaudRate, eMBParity eParity ) +{ + eMBErrorCode eStatus = MB_ENOERR; + ( void )ucSlaveAddress; + + ENTER_CRITICAL_SECTION( ); + ucMBLFCharacter = MB_ASCII_DEFAULT_LF; + + if( xMBPortSerialInit( ucPort, ulBaudRate, 7, eParity ) != TRUE ) + { + eStatus = MB_EPORTERR; + } + else if( xMBPortTimersInit( MB_ASCII_TIMEOUT_SEC * 20000UL ) != TRUE ) + { + eStatus = MB_EPORTERR; + } + + EXIT_CRITICAL_SECTION( ); + + return eStatus; +} + +void +eMBASCIIStart( void ) +{ + ENTER_CRITICAL_SECTION( ); + vMBPortSerialEnable( TRUE, FALSE ); + eRcvState = STATE_RX_IDLE; + EXIT_CRITICAL_SECTION( ); + + /* No special startup required for ASCII. */ + ( void )xMBPortEventPost( EV_READY ); +} + +void +eMBASCIIStop( void ) +{ + ENTER_CRITICAL_SECTION( ); + vMBPortSerialEnable( FALSE, FALSE ); + vMBPortTimersDisable( ); + EXIT_CRITICAL_SECTION( ); +} + +eMBErrorCode +eMBASCIIReceive( UCHAR * pucRcvAddress, UCHAR ** pucFrame, USHORT * pusLength ) +{ + eMBErrorCode eStatus = MB_ENOERR; + + ENTER_CRITICAL_SECTION( ); + assert( usRcvBufferPos < MB_SER_PDU_SIZE_MAX ); + + /* Length and CRC check */ + if( ( usRcvBufferPos >= MB_SER_PDU_SIZE_MIN ) + && ( prvucMBLRC( ( UCHAR * ) ucASCIIBuf, usRcvBufferPos ) == 0 ) ) + { + /* Save the address field. All frames are passed to the upper layed + * and the decision if a frame is used is done there. + */ + *pucRcvAddress = ucASCIIBuf[MB_SER_PDU_ADDR_OFF]; + + /* Total length of Modbus-PDU is Modbus-Serial-Line-PDU minus + * size of address field and CRC checksum. + */ + *pusLength = ( USHORT )( usRcvBufferPos - MB_SER_PDU_PDU_OFF - MB_SER_PDU_SIZE_LRC ); + + /* Return the start of the Modbus PDU to the caller. */ + *pucFrame = ( UCHAR * ) & ucASCIIBuf[MB_SER_PDU_PDU_OFF]; + } + else + { + eStatus = MB_EIO; + } + EXIT_CRITICAL_SECTION( ); + return eStatus; +} + +eMBErrorCode +eMBASCIISend( UCHAR ucSlaveAddress, const UCHAR * pucFrame, USHORT usLength ) +{ + eMBErrorCode eStatus = MB_ENOERR; + UCHAR usLRC; + + ENTER_CRITICAL_SECTION( ); + /* Check if the receiver is still in idle state. If not we where too + * slow with processing the received frame and the master sent another + * frame on the network. We have to abort sending the frame. + */ + if( eRcvState == STATE_RX_IDLE ) + { + /* First byte before the Modbus-PDU is the slave address. */ + pucSndBufferCur = ( UCHAR * ) pucFrame - 1; + usSndBufferCount = 1; + + /* Now copy the Modbus-PDU into the Modbus-Serial-Line-PDU. */ + pucSndBufferCur[MB_SER_PDU_ADDR_OFF] = ucSlaveAddress; + usSndBufferCount += usLength; + + /* Calculate LRC checksum for Modbus-Serial-Line-PDU. */ + usLRC = prvucMBLRC( ( UCHAR * ) pucSndBufferCur, usSndBufferCount ); + ucASCIIBuf[usSndBufferCount++] = usLRC; + + /* Activate the transmitter. */ + eSndState = STATE_TX_START; + vMBPortSerialEnable( FALSE, TRUE ); + } + else + { + eStatus = MB_EIO; + } + EXIT_CRITICAL_SECTION( ); + return eStatus; +} + +BOOL +xMBASCIIReceiveFSM( void ) +{ + BOOL xNeedPoll = FALSE; + UCHAR ucByte; + UCHAR ucResult; + + assert( eSndState == STATE_TX_IDLE ); + + ( void )xMBPortSerialGetByte( ( CHAR * ) & ucByte ); + switch ( eRcvState ) + { + /* A new character is received. If the character is a ':' the input + * buffer is cleared. A CR-character signals the end of the data + * block. Other characters are part of the data block and their + * ASCII value is converted back to a binary representation. + */ + case STATE_RX_RCV: + /* Enable timer for character timeout. */ + vMBPortTimersEnable( ); + if( ucByte == ':' ) + { + /* Empty receive buffer. */ + eBytePos = BYTE_HIGH_NIBBLE; + usRcvBufferPos = 0; + } + else if( ucByte == MB_ASCII_DEFAULT_CR ) + { + eRcvState = STATE_RX_WAIT_EOF; + } + else + { + ucResult = prvucMBCHAR2BIN( ucByte ); + switch ( eBytePos ) + { + /* High nibble of the byte comes first. We check for + * a buffer overflow here. */ + case BYTE_HIGH_NIBBLE: + if( usRcvBufferPos < MB_SER_PDU_SIZE_MAX ) + { + ucASCIIBuf[usRcvBufferPos] = ( UCHAR )( ucResult << 4 ); + eBytePos = BYTE_LOW_NIBBLE; + break; + } + else + { + /* not handled in Modbus specification but seems + * a resonable implementation. */ + eRcvState = STATE_RX_IDLE; + /* Disable previously activated timer because of error state. */ + vMBPortTimersDisable( ); + } + break; + + case BYTE_LOW_NIBBLE: + ucASCIIBuf[usRcvBufferPos] |= ucResult; + usRcvBufferPos++; + eBytePos = BYTE_HIGH_NIBBLE; + break; + } + } + break; + + case STATE_RX_WAIT_EOF: + if( ucByte == ucMBLFCharacter ) + { + /* Disable character timeout timer because all characters are + * received. */ + vMBPortTimersDisable( ); + /* Receiver is again in idle state. */ + eRcvState = STATE_RX_IDLE; + + /* Notify the caller of eMBASCIIReceive that a new frame + * was received. */ + xNeedPoll = xMBPortEventPost( EV_FRAME_RECEIVED ); + } + else if( ucByte == ':' ) + { + /* Empty receive buffer and back to receive state. */ + eBytePos = BYTE_HIGH_NIBBLE; + usRcvBufferPos = 0; + eRcvState = STATE_RX_RCV; + + /* Enable timer for character timeout. */ + vMBPortTimersEnable( ); + } + else + { + /* Frame is not okay. Delete entire frame. */ + eRcvState = STATE_RX_IDLE; + } + break; + + case STATE_RX_IDLE: + if( ucByte == ':' ) + { + /* Enable timer for character timeout. */ + vMBPortTimersEnable( ); + /* Reset the input buffers to store the frame. */ + usRcvBufferPos = 0;; + eBytePos = BYTE_HIGH_NIBBLE; + eRcvState = STATE_RX_RCV; + } + break; + } + + return xNeedPoll; +} + +BOOL +xMBASCIITransmitFSM( void ) +{ + BOOL xNeedPoll = FALSE; + UCHAR ucByte; + + assert( eRcvState == STATE_RX_IDLE ); + switch ( eSndState ) + { + /* Start of transmission. The start of a frame is defined by sending + * the character ':'. */ + case STATE_TX_START: + ucByte = ':'; + xMBPortSerialPutByte( ( CHAR )ucByte ); + eSndState = STATE_TX_DATA; + eBytePos = BYTE_HIGH_NIBBLE; + break; + + /* Send the data block. Each data byte is encoded as a character hex + * stream with the high nibble sent first and the low nibble sent + * last. If all data bytes are exhausted we send a '\r' character + * to end the transmission. */ + case STATE_TX_DATA: + if( usSndBufferCount > 0 ) + { + switch ( eBytePos ) + { + case BYTE_HIGH_NIBBLE: + ucByte = prvucMBBIN2CHAR( ( UCHAR )( *pucSndBufferCur >> 4 ) ); + xMBPortSerialPutByte( ( CHAR ) ucByte ); + eBytePos = BYTE_LOW_NIBBLE; + break; + + case BYTE_LOW_NIBBLE: + ucByte = prvucMBBIN2CHAR( ( UCHAR )( *pucSndBufferCur & 0x0F ) ); + xMBPortSerialPutByte( ( CHAR )ucByte ); + pucSndBufferCur++; + eBytePos = BYTE_HIGH_NIBBLE; + usSndBufferCount--; + break; + } + } + else + { + xMBPortSerialPutByte( MB_ASCII_DEFAULT_CR ); + eSndState = STATE_TX_END; + } + break; + + /* Finish the frame by sending a LF character. */ + case STATE_TX_END: + xMBPortSerialPutByte( ( CHAR )ucMBLFCharacter ); + /* We need another state to make sure that the CR character has + * been sent. */ + eSndState = STATE_TX_NOTIFY; + break; + + /* Notify the task which called eMBASCIISend that the frame has + * been sent. */ + case STATE_TX_NOTIFY: + eSndState = STATE_TX_IDLE; + xNeedPoll = xMBPortEventPost( EV_FRAME_SENT ); + + /* Disable transmitter. This prevents another transmit buffer + * empty interrupt. */ + vMBPortSerialEnable( TRUE, FALSE ); + eSndState = STATE_TX_IDLE; + break; + + /* We should not get a transmitter event if the transmitter is in + * idle state. */ + case STATE_TX_IDLE: + /* enable receiver/disable transmitter. */ + vMBPortSerialEnable( TRUE, FALSE ); + break; + } + + return xNeedPoll; +} + +BOOL +xMBASCIITimerT1SExpired( void ) +{ + switch ( eRcvState ) + { + /* If we have a timeout we go back to the idle state and wait for + * the next frame. + */ + case STATE_RX_RCV: + case STATE_RX_WAIT_EOF: + eRcvState = STATE_RX_IDLE; + break; + + default: + assert( ( eRcvState == STATE_RX_RCV ) || ( eRcvState == STATE_RX_WAIT_EOF ) ); + break; + } + vMBPortTimersDisable( ); + + /* no context switch required. */ + return FALSE; +} + + +static UCHAR +prvucMBCHAR2BIN( UCHAR ucCharacter ) +{ + if( ( ucCharacter >= '0' ) && ( ucCharacter <= '9' ) ) + { + return ( UCHAR )( ucCharacter - '0' ); + } + else if( ( ucCharacter >= 'A' ) && ( ucCharacter <= 'F' ) ) + { + return ( UCHAR )( ucCharacter - 'A' + 0x0A ); + } + else + { + return 0xFF; + } +} + +static UCHAR +prvucMBBIN2CHAR( UCHAR ucByte ) +{ + if( ucByte <= 0x09 ) + { + return ( UCHAR )( '0' + ucByte ); + } + else if( ( ucByte >= 0x0A ) && ( ucByte <= 0x0F ) ) + { + return ( UCHAR )( ucByte - 0x0A + 'A' ); + } + else + { + /* Programming error. */ + assert( 0 ); + } + return '0'; +} + + +static UCHAR +prvucMBLRC( UCHAR * pucFrame, USHORT usLen ) +{ + UCHAR ucLRC = 0; /* LRC char initialized */ + + while( usLen-- ) + { + ucLRC += *pucFrame++; /* Add buffer byte without carry */ + } + + /* Return twos complement */ + ucLRC = ( UCHAR ) ( -( ( CHAR ) ucLRC ) ); + return ucLRC; +} + +#endif diff --git a/HardWare/FreeModbus/modbus/ascii/mbascii.h b/HardWare/FreeModbus/modbus/ascii/mbascii.h new file mode 100644 index 0000000..d4607a9 --- /dev/null +++ b/HardWare/FreeModbus/modbus/ascii/mbascii.h @@ -0,0 +1,56 @@ +/* + * FreeModbus Libary: A portable Modbus implementation for Modbus ASCII/RTU. + * Copyright (c) 2006-2018 Christian Walter + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * File: $Id: mbascii.h,v 1.8 2006/12/07 22:10:34 wolti Exp $ + */ + +#ifndef _MB_ASCII_H +#define _MB_ASCII_H + +#ifdef __cplusplus +PR_BEGIN_EXTERN_C +#endif + +#if MB_SLAVE_ASCII_ENABLED > 0 +eMBErrorCode eMBASCIIInit( UCHAR slaveAddress, UCHAR ucPort, + ULONG ulBaudRate, eMBParity eParity ); +void eMBASCIIStart( void ); +void eMBASCIIStop( void ); + +eMBErrorCode eMBASCIIReceive( UCHAR * pucRcvAddress, UCHAR ** pucFrame, + USHORT * pusLength ); +eMBErrorCode eMBASCIISend( UCHAR slaveAddress, const UCHAR * pucFrame, + USHORT usLength ); +BOOL xMBASCIIReceiveFSM( void ); +BOOL xMBASCIITransmitFSM( void ); +BOOL xMBASCIITimerT1SExpired( void ); +#endif + +#ifdef __cplusplus +PR_END_EXTERN_C +#endif +#endif diff --git a/HardWare/FreeModbus/modbus/functions/mbfunccoils.c b/HardWare/FreeModbus/modbus/functions/mbfunccoils.c new file mode 100644 index 0000000..6aac666 --- /dev/null +++ b/HardWare/FreeModbus/modbus/functions/mbfunccoils.c @@ -0,0 +1,269 @@ +/* + * FreeModbus Libary: A portable Modbus implementation for Modbus ASCII/RTU. + * Copyright (c) 2006-2018 Christian Walter + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * File: $Id: mbfunccoils.c,v 1.8 2007/02/18 23:47:16 wolti Exp $ + */ + +/* ----------------------- System includes ----------------------------------*/ +#include "stdlib.h" +#include "string.h" + +/* ----------------------- Platform includes --------------------------------*/ +#include "port.h" + +/* ----------------------- Modbus includes ----------------------------------*/ +#include "mb.h" +#include "mbframe.h" +#include "mbproto.h" +#include "mbconfig.h" + +/* ----------------------- Defines ------------------------------------------*/ +#define MB_PDU_FUNC_READ_ADDR_OFF ( MB_PDU_DATA_OFF ) +#define MB_PDU_FUNC_READ_COILCNT_OFF ( MB_PDU_DATA_OFF + 2 ) +#define MB_PDU_FUNC_READ_SIZE ( 4 ) +#define MB_PDU_FUNC_READ_COILCNT_MAX ( 0x07D0 ) + +#define MB_PDU_FUNC_WRITE_ADDR_OFF ( MB_PDU_DATA_OFF ) +#define MB_PDU_FUNC_WRITE_VALUE_OFF ( MB_PDU_DATA_OFF + 2 ) +#define MB_PDU_FUNC_WRITE_SIZE ( 4 ) + +#define MB_PDU_FUNC_WRITE_MUL_ADDR_OFF ( MB_PDU_DATA_OFF ) +#define MB_PDU_FUNC_WRITE_MUL_COILCNT_OFF ( MB_PDU_DATA_OFF + 2 ) +#define MB_PDU_FUNC_WRITE_MUL_BYTECNT_OFF ( MB_PDU_DATA_OFF + 4 ) +#define MB_PDU_FUNC_WRITE_MUL_VALUES_OFF ( MB_PDU_DATA_OFF + 5 ) +#define MB_PDU_FUNC_WRITE_MUL_SIZE_MIN ( 5 ) +#define MB_PDU_FUNC_WRITE_MUL_COILCNT_MAX ( 0x07B0 ) + +/* ----------------------- Static functions ---------------------------------*/ +eMBException prveMBError2Exception( eMBErrorCode eErrorCode ); + +/* ----------------------- Start implementation -----------------------------*/ + +#if MB_FUNC_READ_COILS_ENABLED > 0 + +eMBException +eMBFuncReadCoils( UCHAR * pucFrame, USHORT * usLen ) +{ + USHORT usRegAddress; + USHORT usCoilCount; + UCHAR ucNBytes; + UCHAR *pucFrameCur; + + eMBException eStatus = MB_EX_NONE; + eMBErrorCode eRegStatus; + + if( *usLen == ( MB_PDU_FUNC_READ_SIZE + MB_PDU_SIZE_MIN ) ) + { + usRegAddress = ( USHORT )( pucFrame[MB_PDU_FUNC_READ_ADDR_OFF] << 8 ); + usRegAddress |= ( USHORT )( pucFrame[MB_PDU_FUNC_READ_ADDR_OFF + 1] ); + usRegAddress++; + + usCoilCount = ( USHORT )( pucFrame[MB_PDU_FUNC_READ_COILCNT_OFF] << 8 ); + usCoilCount |= ( USHORT )( pucFrame[MB_PDU_FUNC_READ_COILCNT_OFF + 1] ); + + /* Check if the number of registers to read is valid. If not + * return Modbus illegal data value exception. + */ + if( ( usCoilCount >= 1 ) && + ( usCoilCount < MB_PDU_FUNC_READ_COILCNT_MAX ) ) + { + /* Set the current PDU data pointer to the beginning. */ + pucFrameCur = &pucFrame[MB_PDU_FUNC_OFF]; + *usLen = MB_PDU_FUNC_OFF; + + /* First byte contains the function code. */ + *pucFrameCur++ = MB_FUNC_READ_COILS; + *usLen += 1; + + /* Test if the quantity of coils is a multiple of 8. If not last + * byte is only partially field with unused coils set to zero. */ + if( ( usCoilCount & 0x0007 ) != 0 ) + { + ucNBytes = ( UCHAR )( usCoilCount / 8 + 1 ); + } + else + { + ucNBytes = ( UCHAR )( usCoilCount / 8 ); + } + *pucFrameCur++ = ucNBytes; + *usLen += 1; + + eRegStatus = + eMBRegCoilsCB( pucFrameCur, usRegAddress, usCoilCount, + MB_REG_READ ); + + /* If an error occured convert it into a Modbus exception. */ + if( eRegStatus != MB_ENOERR ) + { + eStatus = prveMBError2Exception( eRegStatus ); + } + else + { + /* The response contains the function code, the starting address + * and the quantity of registers. We reuse the old values in the + * buffer because they are still valid. */ + *usLen += ucNBytes;; + } + } + else + { + eStatus = MB_EX_ILLEGAL_DATA_VALUE; + } + } + else + { + /* Can't be a valid read coil register request because the length + * is incorrect. */ + eStatus = MB_EX_ILLEGAL_DATA_VALUE; + } + return eStatus; +} +#endif + +#if MB_FUNC_WRITE_COIL_ENABLED > 0 +eMBException +eMBFuncWriteCoil( UCHAR * pucFrame, USHORT * usLen ) +{ + USHORT usRegAddress; + UCHAR ucBuf[2]; + + eMBException eStatus = MB_EX_NONE; + eMBErrorCode eRegStatus; + + if( *usLen == ( MB_PDU_FUNC_WRITE_SIZE + MB_PDU_SIZE_MIN ) ) + { + usRegAddress = ( USHORT )( pucFrame[MB_PDU_FUNC_WRITE_ADDR_OFF] << 8 ); + usRegAddress |= ( USHORT )( pucFrame[MB_PDU_FUNC_WRITE_ADDR_OFF + 1] ); + usRegAddress++; + + if( ( pucFrame[MB_PDU_FUNC_WRITE_VALUE_OFF + 1] == 0x00 ) && + ( ( pucFrame[MB_PDU_FUNC_WRITE_VALUE_OFF] == 0xFF ) || + ( pucFrame[MB_PDU_FUNC_WRITE_VALUE_OFF] == 0x00 ) ) ) + { + ucBuf[1] = 0; + if( pucFrame[MB_PDU_FUNC_WRITE_VALUE_OFF] == 0xFF ) + { + ucBuf[0] = 1; + } + else + { + ucBuf[0] = 0; + } + eRegStatus = + eMBRegCoilsCB( &ucBuf[0], usRegAddress, 1, MB_REG_WRITE ); + + /* If an error occured convert it into a Modbus exception. */ + if( eRegStatus != MB_ENOERR ) + { + eStatus = prveMBError2Exception( eRegStatus ); + } + } + else + { + eStatus = MB_EX_ILLEGAL_DATA_VALUE; + } + } + else + { + /* Can't be a valid write coil register request because the length + * is incorrect. */ + eStatus = MB_EX_ILLEGAL_DATA_VALUE; + } + return eStatus; +} + +#endif + +#if MB_FUNC_WRITE_MULTIPLE_COILS_ENABLED > 0 +eMBException +eMBFuncWriteMultipleCoils( UCHAR * pucFrame, USHORT * usLen ) +{ + USHORT usRegAddress; + USHORT usCoilCnt; + UCHAR ucByteCount; + UCHAR ucByteCountVerify; + + eMBException eStatus = MB_EX_NONE; + eMBErrorCode eRegStatus; + + if( *usLen > ( MB_PDU_FUNC_WRITE_SIZE + MB_PDU_SIZE_MIN ) ) + { + usRegAddress = ( USHORT )( pucFrame[MB_PDU_FUNC_WRITE_MUL_ADDR_OFF] << 8 ); + usRegAddress |= ( USHORT )( pucFrame[MB_PDU_FUNC_WRITE_MUL_ADDR_OFF + 1] ); + usRegAddress++; + + usCoilCnt = ( USHORT )( pucFrame[MB_PDU_FUNC_WRITE_MUL_COILCNT_OFF] << 8 ); + usCoilCnt |= ( USHORT )( pucFrame[MB_PDU_FUNC_WRITE_MUL_COILCNT_OFF + 1] ); + + ucByteCount = pucFrame[MB_PDU_FUNC_WRITE_MUL_BYTECNT_OFF]; + + /* Compute the number of expected bytes in the request. */ + if( ( usCoilCnt & 0x0007 ) != 0 ) + { + ucByteCountVerify = ( UCHAR )( usCoilCnt / 8 + 1 ); + } + else + { + ucByteCountVerify = ( UCHAR )( usCoilCnt / 8 ); + } + + if( ( usCoilCnt >= 1 ) && + ( usCoilCnt <= MB_PDU_FUNC_WRITE_MUL_COILCNT_MAX ) && + ( ucByteCountVerify == ucByteCount ) ) + { + eRegStatus = + eMBRegCoilsCB( &pucFrame[MB_PDU_FUNC_WRITE_MUL_VALUES_OFF], + usRegAddress, usCoilCnt, MB_REG_WRITE ); + + /* If an error occured convert it into a Modbus exception. */ + if( eRegStatus != MB_ENOERR ) + { + eStatus = prveMBError2Exception( eRegStatus ); + } + else + { + /* The response contains the function code, the starting address + * and the quantity of registers. We reuse the old values in the + * buffer because they are still valid. */ + *usLen = MB_PDU_FUNC_WRITE_MUL_BYTECNT_OFF; + } + } + else + { + eStatus = MB_EX_ILLEGAL_DATA_VALUE; + } + } + else + { + /* Can't be a valid write coil register request because the length + * is incorrect. */ + eStatus = MB_EX_ILLEGAL_DATA_VALUE; + } + return eStatus; +} + +#endif diff --git a/HardWare/FreeModbus/modbus/functions/mbfunccoils_m.c b/HardWare/FreeModbus/modbus/functions/mbfunccoils_m.c new file mode 100644 index 0000000..4366b49 --- /dev/null +++ b/HardWare/FreeModbus/modbus/functions/mbfunccoils_m.c @@ -0,0 +1,390 @@ +/* + * FreeModbus Libary: A portable Modbus implementation for Modbus ASCII/RTU. + * Copyright (C) 2013 Armink + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * File: $Id: mbfunccoils_m.c,v 1.60 2013/10/12 15:10:12 Armink Add Master Functions + */ + +/* ----------------------- System includes ----------------------------------*/ +#include "stdlib.h" +#include "string.h" + +/* ----------------------- Platform includes --------------------------------*/ +#include "port.h" + +/* ----------------------- Modbus includes ----------------------------------*/ +#include "mb.h" +#include "mb_m.h" +#include "mbframe.h" +#include "mbproto.h" +#include "mbconfig.h" + +/* ----------------------- Defines ------------------------------------------*/ +#define MB_PDU_REQ_READ_ADDR_OFF ( MB_PDU_DATA_OFF + 0 ) +#define MB_PDU_REQ_READ_COILCNT_OFF ( MB_PDU_DATA_OFF + 2 ) +#define MB_PDU_REQ_READ_SIZE ( 4 ) +#define MB_PDU_FUNC_READ_COILCNT_OFF ( MB_PDU_DATA_OFF + 0 ) +#define MB_PDU_FUNC_READ_VALUES_OFF ( MB_PDU_DATA_OFF + 1 ) +#define MB_PDU_FUNC_READ_SIZE_MIN ( 1 ) + +#define MB_PDU_REQ_WRITE_ADDR_OFF ( MB_PDU_DATA_OFF ) +#define MB_PDU_REQ_WRITE_VALUE_OFF ( MB_PDU_DATA_OFF + 2 ) +#define MB_PDU_REQ_WRITE_SIZE ( 4 ) +#define MB_PDU_FUNC_WRITE_ADDR_OFF ( MB_PDU_DATA_OFF ) +#define MB_PDU_FUNC_WRITE_VALUE_OFF ( MB_PDU_DATA_OFF + 2 ) +#define MB_PDU_FUNC_WRITE_SIZE ( 4 ) + +#define MB_PDU_REQ_WRITE_MUL_ADDR_OFF ( MB_PDU_DATA_OFF ) +#define MB_PDU_REQ_WRITE_MUL_COILCNT_OFF ( MB_PDU_DATA_OFF + 2 ) +#define MB_PDU_REQ_WRITE_MUL_BYTECNT_OFF ( MB_PDU_DATA_OFF + 4 ) +#define MB_PDU_REQ_WRITE_MUL_VALUES_OFF ( MB_PDU_DATA_OFF + 5 ) +#define MB_PDU_REQ_WRITE_MUL_SIZE_MIN ( 5 ) +#define MB_PDU_REQ_WRITE_MUL_COILCNT_MAX ( 0x07B0 ) +#define MB_PDU_FUNC_WRITE_MUL_ADDR_OFF ( MB_PDU_DATA_OFF ) +#define MB_PDU_FUNC_WRITE_MUL_COILCNT_OFF ( MB_PDU_DATA_OFF + 2 ) +#define MB_PDU_FUNC_WRITE_MUL_SIZE ( 5 ) + +/* ----------------------- Static functions ---------------------------------*/ +eMBException prveMBError2Exception( eMBErrorCode eErrorCode ); + +/* ----------------------- Start implementation -----------------------------*/ +#if MB_MASTER_RTU_ENABLED > 0 || MB_MASTER_ASCII_ENABLED > 0 +#if MB_FUNC_READ_COILS_ENABLED > 0 + +/** + * This function will request read coil. + * + * @param ucSndAddr salve address + * @param usCoilAddr coil start address + * @param usNCoils coil total number + * @param lTimeOut timeout (-1 will waiting forever) + * + * @return error code + */ +eMBMasterReqErrCode +eMBMasterReqReadCoils( UCHAR ucSndAddr, USHORT usCoilAddr, USHORT usNCoils ,LONG lTimeOut ) +{ + UCHAR *ucMBFrame; + eMBMasterReqErrCode eErrStatus = MB_MRE_NO_ERR; + + if ( ucSndAddr > MB_MASTER_TOTAL_SLAVE_NUM ) eErrStatus = MB_MRE_ILL_ARG; + else if ( xMBMasterRunResTake( lTimeOut ) == FALSE ) eErrStatus = MB_MRE_MASTER_BUSY; + else + { + vMBMasterGetPDUSndBuf(&ucMBFrame); + vMBMasterSetDestAddress(ucSndAddr); + ucMBFrame[MB_PDU_FUNC_OFF] = MB_FUNC_READ_COILS; + ucMBFrame[MB_PDU_REQ_READ_ADDR_OFF] = usCoilAddr >> 8; + ucMBFrame[MB_PDU_REQ_READ_ADDR_OFF + 1] = usCoilAddr; + ucMBFrame[MB_PDU_REQ_READ_COILCNT_OFF ] = usNCoils >> 8; + ucMBFrame[MB_PDU_REQ_READ_COILCNT_OFF + 1] = usNCoils; + vMBMasterSetPDUSndLength( MB_PDU_SIZE_MIN + MB_PDU_REQ_READ_SIZE ); + ( void ) xMBMasterPortEventPost( EV_MASTER_FRAME_SENT ); + eErrStatus = eMBMasterWaitRequestFinish( ); + + } + return eErrStatus; +} + +eMBException +eMBMasterFuncReadCoils( UCHAR * pucFrame, USHORT * usLen ) +{ + UCHAR *ucMBFrame; + USHORT usRegAddress; + USHORT usCoilCount; + UCHAR ucByteCount; + + eMBException eStatus = MB_EX_NONE; + eMBErrorCode eRegStatus; + + /* If this request is broadcast, and it's read mode. This request don't need execute. */ + if ( xMBMasterRequestIsBroadcast() ) + { + eStatus = MB_EX_NONE; + } + else if ( *usLen >= MB_PDU_SIZE_MIN + MB_PDU_FUNC_READ_SIZE_MIN ) + { + vMBMasterGetPDUSndBuf(&ucMBFrame); + usRegAddress = ( USHORT )( ucMBFrame[MB_PDU_REQ_READ_ADDR_OFF] << 8 ); + usRegAddress |= ( USHORT )( ucMBFrame[MB_PDU_REQ_READ_ADDR_OFF + 1] ); + usRegAddress++; + + usCoilCount = ( USHORT )( ucMBFrame[MB_PDU_REQ_READ_COILCNT_OFF] << 8 ); + usCoilCount |= ( USHORT )( ucMBFrame[MB_PDU_REQ_READ_COILCNT_OFF + 1] ); + + /* Test if the quantity of coils is a multiple of 8. If not last + * byte is only partially field with unused coils set to zero. */ + if( ( usCoilCount & 0x0007 ) != 0 ) + { + ucByteCount = ( UCHAR )( usCoilCount / 8 + 1 ); + } + else + { + ucByteCount = ( UCHAR )( usCoilCount / 8 ); + } + + /* Check if the number of registers to read is valid. If not + * return Modbus illegal data value exception. + */ + if( ( usCoilCount >= 1 ) && + ( ucByteCount == pucFrame[MB_PDU_FUNC_READ_COILCNT_OFF] ) ) + { + /* Make callback to fill the buffer. */ + eRegStatus = eMBMasterRegCoilsCB( &pucFrame[MB_PDU_FUNC_READ_VALUES_OFF], usRegAddress, usCoilCount, MB_REG_READ ); + + /* If an error occured convert it into a Modbus exception. */ + if( eRegStatus != MB_ENOERR ) + { + eStatus = prveMBError2Exception( eRegStatus ); + } + } + else + { + eStatus = MB_EX_ILLEGAL_DATA_VALUE; + } + } + else + { + /* Can't be a valid read coil register request because the length + * is incorrect. */ + eStatus = MB_EX_ILLEGAL_DATA_VALUE; + } + return eStatus; +} +#endif + +#if MB_FUNC_WRITE_COIL_ENABLED > 0 + +/** + * This function will request write one coil. + * + * @param ucSndAddr salve address + * @param usCoilAddr coil start address + * @param usCoilData data to be written + * @param lTimeOut timeout (-1 will waiting forever) + * + * @return error code + * + * @see eMBMasterReqWriteMultipleCoils + */ +eMBMasterReqErrCode +eMBMasterReqWriteCoil( UCHAR ucSndAddr, USHORT usCoilAddr, USHORT usCoilData, LONG lTimeOut ) +{ + UCHAR *ucMBFrame; + eMBMasterReqErrCode eErrStatus = MB_MRE_NO_ERR; + + if ( ucSndAddr > MB_MASTER_TOTAL_SLAVE_NUM ) eErrStatus = MB_MRE_ILL_ARG; + else if ( ( usCoilData != 0xFF00 ) && ( usCoilData != 0x0000 ) ) eErrStatus = MB_MRE_ILL_ARG; + else if ( xMBMasterRunResTake( lTimeOut ) == FALSE ) eErrStatus = MB_MRE_MASTER_BUSY; + else + { + vMBMasterGetPDUSndBuf(&ucMBFrame); + vMBMasterSetDestAddress(ucSndAddr); + ucMBFrame[MB_PDU_FUNC_OFF] = MB_FUNC_WRITE_SINGLE_COIL; + ucMBFrame[MB_PDU_REQ_WRITE_ADDR_OFF] = usCoilAddr >> 8; + ucMBFrame[MB_PDU_REQ_WRITE_ADDR_OFF + 1] = usCoilAddr; + ucMBFrame[MB_PDU_REQ_WRITE_VALUE_OFF ] = usCoilData >> 8; + ucMBFrame[MB_PDU_REQ_WRITE_VALUE_OFF + 1] = usCoilData; + vMBMasterSetPDUSndLength( MB_PDU_SIZE_MIN + MB_PDU_REQ_WRITE_SIZE ); + ( void ) xMBMasterPortEventPost( EV_MASTER_FRAME_SENT ); + eErrStatus = eMBMasterWaitRequestFinish( ); + } + return eErrStatus; +} + +eMBException +eMBMasterFuncWriteCoil( UCHAR * pucFrame, USHORT * usLen ) +{ + USHORT usRegAddress; + UCHAR ucBuf[2]; + + eMBException eStatus = MB_EX_NONE; + eMBErrorCode eRegStatus; + + if( *usLen == ( MB_PDU_FUNC_WRITE_SIZE + MB_PDU_SIZE_MIN ) ) + { + usRegAddress = ( USHORT )( pucFrame[MB_PDU_FUNC_WRITE_ADDR_OFF] << 8 ); + usRegAddress |= ( USHORT )( pucFrame[MB_PDU_FUNC_WRITE_ADDR_OFF + 1] ); + usRegAddress++; + + if( ( pucFrame[MB_PDU_FUNC_WRITE_VALUE_OFF + 1] == 0x00 ) && + ( ( pucFrame[MB_PDU_FUNC_WRITE_VALUE_OFF] == 0xFF ) || + ( pucFrame[MB_PDU_FUNC_WRITE_VALUE_OFF] == 0x00 ) ) ) + { + ucBuf[1] = 0; + if( pucFrame[MB_PDU_FUNC_WRITE_VALUE_OFF] == 0xFF ) + { + ucBuf[0] = 1; + } + else + { + ucBuf[0] = 0; + } + eRegStatus = + eMBMasterRegCoilsCB( &ucBuf[0], usRegAddress, 1, MB_REG_WRITE ); + + /* If an error occured convert it into a Modbus exception. */ + if( eRegStatus != MB_ENOERR ) + { + eStatus = prveMBError2Exception( eRegStatus ); + } + } + else + { + eStatus = MB_EX_ILLEGAL_DATA_VALUE; + } + } + else + { + /* Can't be a valid write coil register request because the length + * is incorrect. */ + eStatus = MB_EX_ILLEGAL_DATA_VALUE; + } + return eStatus; +} + +#endif + +#if MB_FUNC_WRITE_MULTIPLE_COILS_ENABLED > 0 + +/** + * This function will request write multiple coils. + * + * @param ucSndAddr salve address + * @param usCoilAddr coil start address + * @param usNCoils coil total number + * @param usCoilData data to be written + * @param lTimeOut timeout (-1 will waiting forever) + * + * @return error code + * + * @see eMBMasterReqWriteCoil + */ +eMBMasterReqErrCode +eMBMasterReqWriteMultipleCoils( UCHAR ucSndAddr, + USHORT usCoilAddr, USHORT usNCoils, UCHAR * pucDataBuffer, LONG lTimeOut) +{ + UCHAR *ucMBFrame; + USHORT usRegIndex = 0; + UCHAR ucByteCount; + eMBMasterReqErrCode eErrStatus = MB_MRE_NO_ERR; + + if ( ucSndAddr > MB_MASTER_TOTAL_SLAVE_NUM ) eErrStatus = MB_MRE_ILL_ARG; + else if ( usNCoils > MB_PDU_REQ_WRITE_MUL_COILCNT_MAX ) eErrStatus = MB_MRE_ILL_ARG; + else if ( xMBMasterRunResTake( lTimeOut ) == FALSE ) eErrStatus = MB_MRE_MASTER_BUSY; + else + { + vMBMasterGetPDUSndBuf(&ucMBFrame); + vMBMasterSetDestAddress(ucSndAddr); + ucMBFrame[MB_PDU_FUNC_OFF] = MB_FUNC_WRITE_MULTIPLE_COILS; + ucMBFrame[MB_PDU_REQ_WRITE_MUL_ADDR_OFF] = usCoilAddr >> 8; + ucMBFrame[MB_PDU_REQ_WRITE_MUL_ADDR_OFF + 1] = usCoilAddr; + ucMBFrame[MB_PDU_REQ_WRITE_MUL_COILCNT_OFF] = usNCoils >> 8; + ucMBFrame[MB_PDU_REQ_WRITE_MUL_COILCNT_OFF + 1] = usNCoils ; + if( ( usNCoils & 0x0007 ) != 0 ) + { + ucByteCount = ( UCHAR )( usNCoils / 8 + 1 ); + } + else + { + ucByteCount = ( UCHAR )( usNCoils / 8 ); + } + ucMBFrame[MB_PDU_REQ_WRITE_MUL_BYTECNT_OFF] = ucByteCount; + ucMBFrame += MB_PDU_REQ_WRITE_MUL_VALUES_OFF; + while( ucByteCount > usRegIndex) + { + *ucMBFrame++ = pucDataBuffer[usRegIndex++]; + } + vMBMasterSetPDUSndLength( MB_PDU_SIZE_MIN + MB_PDU_REQ_WRITE_MUL_SIZE_MIN + ucByteCount ); + ( void ) xMBMasterPortEventPost( EV_MASTER_FRAME_SENT ); + eErrStatus = eMBMasterWaitRequestFinish( ); + } + return eErrStatus; +} + +eMBException +eMBMasterFuncWriteMultipleCoils( UCHAR * pucFrame, USHORT * usLen ) +{ + USHORT usRegAddress; + USHORT usCoilCnt; + UCHAR ucByteCount; + UCHAR ucByteCountVerify; + UCHAR *ucMBFrame; + + eMBException eStatus = MB_EX_NONE; + eMBErrorCode eRegStatus; + + /* If this request is broadcast, the *usLen is not need check. */ + if( ( *usLen == MB_PDU_FUNC_WRITE_MUL_SIZE ) || xMBMasterRequestIsBroadcast() ) + { + vMBMasterGetPDUSndBuf(&ucMBFrame); + usRegAddress = ( USHORT )( pucFrame[MB_PDU_FUNC_WRITE_MUL_ADDR_OFF] << 8 ); + usRegAddress |= ( USHORT )( pucFrame[MB_PDU_FUNC_WRITE_MUL_ADDR_OFF + 1] ); + usRegAddress++; + + usCoilCnt = ( USHORT )( pucFrame[MB_PDU_FUNC_WRITE_MUL_COILCNT_OFF] << 8 ); + usCoilCnt |= ( USHORT )( pucFrame[MB_PDU_FUNC_WRITE_MUL_COILCNT_OFF + 1] ); + + ucByteCount = ucMBFrame[MB_PDU_REQ_WRITE_MUL_BYTECNT_OFF]; + + /* Compute the number of expected bytes in the request. */ + if( ( usCoilCnt & 0x0007 ) != 0 ) + { + ucByteCountVerify = ( UCHAR )( usCoilCnt / 8 + 1 ); + } + else + { + ucByteCountVerify = ( UCHAR )( usCoilCnt / 8 ); + } + + if( ( usCoilCnt >= 1 ) && ( ucByteCountVerify == ucByteCount ) ) + { + eRegStatus = + eMBMasterRegCoilsCB( &ucMBFrame[MB_PDU_REQ_WRITE_MUL_VALUES_OFF], + usRegAddress, usCoilCnt, MB_REG_WRITE ); + + /* If an error occured convert it into a Modbus exception. */ + if( eRegStatus != MB_ENOERR ) + { + eStatus = prveMBError2Exception( eRegStatus ); + } + } + else + { + eStatus = MB_EX_ILLEGAL_DATA_VALUE; + } + } + else + { + /* Can't be a valid write coil register request because the length + * is incorrect. */ + eStatus = MB_EX_ILLEGAL_DATA_VALUE; + } + return eStatus; +} + +#endif +#endif diff --git a/HardWare/FreeModbus/modbus/functions/mbfuncdiag.c b/HardWare/FreeModbus/modbus/functions/mbfuncdiag.c new file mode 100644 index 0000000..20be3fc --- /dev/null +++ b/HardWare/FreeModbus/modbus/functions/mbfuncdiag.c @@ -0,0 +1,29 @@ +/* + * FreeModbus Libary: A portable Modbus implementation for Modbus ASCII/RTU. + * Copyright (c) 2006-2018 Christian Walter + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * File: $Id: mbfuncdiag.c,v 1.3 2006/12/07 22:10:34 wolti Exp $ + */ diff --git a/HardWare/FreeModbus/modbus/functions/mbfuncdisc.c b/HardWare/FreeModbus/modbus/functions/mbfuncdisc.c new file mode 100644 index 0000000..faa0524 --- /dev/null +++ b/HardWare/FreeModbus/modbus/functions/mbfuncdisc.c @@ -0,0 +1,133 @@ +/* + * FreeModbus Libary: A portable Modbus implementation for Modbus ASCII/RTU. + * Copyright (c) 2006-2018 Christian Walter + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +/* ----------------------- System includes ----------------------------------*/ +#include "stdlib.h" +#include "string.h" + +/* ----------------------- Platform includes --------------------------------*/ +#include "port.h" + +/* ----------------------- Modbus includes ----------------------------------*/ +#include "mb.h" +#include "mbframe.h" +#include "mbproto.h" +#include "mbconfig.h" + +/* ----------------------- Defines ------------------------------------------*/ +#define MB_PDU_FUNC_READ_ADDR_OFF ( MB_PDU_DATA_OFF ) +#define MB_PDU_FUNC_READ_DISCCNT_OFF ( MB_PDU_DATA_OFF + 2 ) +#define MB_PDU_FUNC_READ_SIZE ( 4 ) +#define MB_PDU_FUNC_READ_DISCCNT_MAX ( 0x07D0 ) + +/* ----------------------- Static functions ---------------------------------*/ +eMBException prveMBError2Exception( eMBErrorCode eErrorCode ); + +/* ----------------------- Start implementation -----------------------------*/ + +#if MB_FUNC_READ_DISCRETE_INPUTS_ENABLED > 0 + +eMBException +eMBFuncReadDiscreteInputs( UCHAR * pucFrame, USHORT * usLen ) +{ + USHORT usRegAddress; + USHORT usDiscreteCnt; + UCHAR ucNBytes; + UCHAR *pucFrameCur; + + eMBException eStatus = MB_EX_NONE; + eMBErrorCode eRegStatus; + + if( *usLen == ( MB_PDU_FUNC_READ_SIZE + MB_PDU_SIZE_MIN ) ) + { + usRegAddress = ( USHORT )( pucFrame[MB_PDU_FUNC_READ_ADDR_OFF] << 8 ); + usRegAddress |= ( USHORT )( pucFrame[MB_PDU_FUNC_READ_ADDR_OFF + 1] ); + usRegAddress++; + + usDiscreteCnt = ( USHORT )( pucFrame[MB_PDU_FUNC_READ_DISCCNT_OFF] << 8 ); + usDiscreteCnt |= ( USHORT )( pucFrame[MB_PDU_FUNC_READ_DISCCNT_OFF + 1] ); + + /* Check if the number of registers to read is valid. If not + * return Modbus illegal data value exception. + */ + if( ( usDiscreteCnt >= 1 ) && + ( usDiscreteCnt < MB_PDU_FUNC_READ_DISCCNT_MAX ) ) + { + /* Set the current PDU data pointer to the beginning. */ + pucFrameCur = &pucFrame[MB_PDU_FUNC_OFF]; + *usLen = MB_PDU_FUNC_OFF; + + /* First byte contains the function code. */ + *pucFrameCur++ = MB_FUNC_READ_DISCRETE_INPUTS; + *usLen += 1; + + /* Test if the quantity of coils is a multiple of 8. If not last + * byte is only partially field with unused coils set to zero. */ + if( ( usDiscreteCnt & 0x0007 ) != 0 ) + { + ucNBytes = ( UCHAR ) ( usDiscreteCnt / 8 + 1 ); + } + else + { + ucNBytes = ( UCHAR ) ( usDiscreteCnt / 8 ); + } + *pucFrameCur++ = ucNBytes; + *usLen += 1; + + eRegStatus = + eMBRegDiscreteCB( pucFrameCur, usRegAddress, usDiscreteCnt ); + + /* If an error occured convert it into a Modbus exception. */ + if( eRegStatus != MB_ENOERR ) + { + eStatus = prveMBError2Exception( eRegStatus ); + } + else + { + /* The response contains the function code, the starting address + * and the quantity of registers. We reuse the old values in the + * buffer because they are still valid. */ + *usLen += ucNBytes;; + } + } + else + { + eStatus = MB_EX_ILLEGAL_DATA_VALUE; + } + } + else + { + /* Can't be a valid read coil register request because the length + * is incorrect. */ + eStatus = MB_EX_ILLEGAL_DATA_VALUE; + } + return eStatus; +} + +#endif diff --git a/HardWare/FreeModbus/modbus/functions/mbfuncdisc_m.c b/HardWare/FreeModbus/modbus/functions/mbfuncdisc_m.c new file mode 100644 index 0000000..ca666bb --- /dev/null +++ b/HardWare/FreeModbus/modbus/functions/mbfuncdisc_m.c @@ -0,0 +1,162 @@ +/* + * FreeModbus Libary: A portable Modbus implementation for Modbus ASCII/RTU. + * Copyright (C) 2013 Armink + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * File: $Id: mbfuncdisc_m.c,v 1.60 2013/10/15 8:48:20 Armink Add Master Functions Exp $ + */ + + + +/* ----------------------- System includes ----------------------------------*/ +#include "stdlib.h" +#include "string.h" + +/* ----------------------- Platform includes --------------------------------*/ +#include "port.h" + +/* ----------------------- Modbus includes ----------------------------------*/ +#include "mb.h" +#include "mb_m.h" +#include "mbframe.h" +#include "mbproto.h" +#include "mbconfig.h" + +/* ----------------------- Defines ------------------------------------------*/ +#define MB_PDU_REQ_READ_ADDR_OFF ( MB_PDU_DATA_OFF + 0 ) +#define MB_PDU_REQ_READ_DISCCNT_OFF ( MB_PDU_DATA_OFF + 2 ) +#define MB_PDU_REQ_READ_SIZE ( 4 ) +#define MB_PDU_FUNC_READ_DISCCNT_OFF ( MB_PDU_DATA_OFF + 0 ) +#define MB_PDU_FUNC_READ_VALUES_OFF ( MB_PDU_DATA_OFF + 1 ) +#define MB_PDU_FUNC_READ_SIZE_MIN ( 1 ) + +/* ----------------------- Static functions ---------------------------------*/ +eMBException prveMBError2Exception( eMBErrorCode eErrorCode ); + +/* ----------------------- Start implementation -----------------------------*/ +#if MB_MASTER_RTU_ENABLED > 0 || MB_MASTER_ASCII_ENABLED > 0 +#if MB_FUNC_READ_DISCRETE_INPUTS_ENABLED > 0 + +/** + * This function will request read discrete inputs. + * + * @param ucSndAddr salve address + * @param usDiscreteAddr discrete start address + * @param usNDiscreteIn discrete total number + * @param lTimeOut timeout (-1 will waiting forever) + * + * @return error code + */ +eMBMasterReqErrCode +eMBMasterReqReadDiscreteInputs( UCHAR ucSndAddr, USHORT usDiscreteAddr, USHORT usNDiscreteIn, LONG lTimeOut ) +{ + UCHAR *ucMBFrame; + eMBMasterReqErrCode eErrStatus = MB_MRE_NO_ERR; + + if ( ucSndAddr > MB_MASTER_TOTAL_SLAVE_NUM ) eErrStatus = MB_MRE_ILL_ARG; + else if ( xMBMasterRunResTake( lTimeOut ) == FALSE ) eErrStatus = MB_MRE_MASTER_BUSY; + else + { + vMBMasterGetPDUSndBuf(&ucMBFrame); + vMBMasterSetDestAddress(ucSndAddr); + ucMBFrame[MB_PDU_FUNC_OFF] = MB_FUNC_READ_DISCRETE_INPUTS; + ucMBFrame[MB_PDU_REQ_READ_ADDR_OFF] = usDiscreteAddr >> 8; + ucMBFrame[MB_PDU_REQ_READ_ADDR_OFF + 1] = usDiscreteAddr; + ucMBFrame[MB_PDU_REQ_READ_DISCCNT_OFF ] = usNDiscreteIn >> 8; + ucMBFrame[MB_PDU_REQ_READ_DISCCNT_OFF + 1] = usNDiscreteIn; + vMBMasterSetPDUSndLength( MB_PDU_SIZE_MIN + MB_PDU_REQ_READ_SIZE ); + ( void ) xMBMasterPortEventPost( EV_MASTER_FRAME_SENT ); + eErrStatus = eMBMasterWaitRequestFinish( ); + } + return eErrStatus; +} + +eMBException +eMBMasterFuncReadDiscreteInputs( UCHAR * pucFrame, USHORT * usLen ) +{ + USHORT usRegAddress; + USHORT usDiscreteCnt; + UCHAR ucNBytes; + UCHAR *ucMBFrame; + + eMBException eStatus = MB_EX_NONE; + eMBErrorCode eRegStatus; + + /* If this request is broadcast, and it's read mode. This request don't need execute. */ + if ( xMBMasterRequestIsBroadcast() ) + { + eStatus = MB_EX_NONE; + } + else if( *usLen >= MB_PDU_SIZE_MIN + MB_PDU_FUNC_READ_SIZE_MIN ) + { + vMBMasterGetPDUSndBuf(&ucMBFrame); + usRegAddress = ( USHORT )( ucMBFrame[MB_PDU_REQ_READ_ADDR_OFF] << 8 ); + usRegAddress |= ( USHORT )( ucMBFrame[MB_PDU_REQ_READ_ADDR_OFF + 1] ); + usRegAddress++; + + usDiscreteCnt = ( USHORT )( ucMBFrame[MB_PDU_REQ_READ_DISCCNT_OFF] << 8 ); + usDiscreteCnt |= ( USHORT )( ucMBFrame[MB_PDU_REQ_READ_DISCCNT_OFF + 1] ); + + /* Test if the quantity of coils is a multiple of 8. If not last + * byte is only partially field with unused coils set to zero. */ + if( ( usDiscreteCnt & 0x0007 ) != 0 ) + { + ucNBytes = ( UCHAR )( usDiscreteCnt / 8 + 1 ); + } + else + { + ucNBytes = ( UCHAR )( usDiscreteCnt / 8 ); + } + + /* Check if the number of registers to read is valid. If not + * return Modbus illegal data value exception. + */ + if ((usDiscreteCnt >= 1) && ucNBytes == pucFrame[MB_PDU_FUNC_READ_DISCCNT_OFF]) + { + /* Make callback to fill the buffer. */ + eRegStatus = eMBMasterRegDiscreteCB( &pucFrame[MB_PDU_FUNC_READ_VALUES_OFF], usRegAddress, usDiscreteCnt ); + + /* If an error occured convert it into a Modbus exception. */ + if( eRegStatus != MB_ENOERR ) + { + eStatus = prveMBError2Exception( eRegStatus ); + } + } + else + { + eStatus = MB_EX_ILLEGAL_DATA_VALUE; + } + } + else + { + /* Can't be a valid read coil register request because the length + * is incorrect. */ + eStatus = MB_EX_ILLEGAL_DATA_VALUE; + } + return eStatus; +} + +#endif +#endif diff --git a/HardWare/FreeModbus/modbus/functions/mbfuncholding.c b/HardWare/FreeModbus/modbus/functions/mbfuncholding.c new file mode 100644 index 0000000..717a914 --- /dev/null +++ b/HardWare/FreeModbus/modbus/functions/mbfuncholding.c @@ -0,0 +1,308 @@ +/* + * FreeModbus Libary: A portable Modbus implementation for Modbus ASCII/RTU. + * Copyright (c) 2006-2018 Christian Walter + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * File: $Id: mbfuncholding.c,v 1.12 2007/02/18 23:48:22 wolti Exp $ + */ + +/* ----------------------- System includes ----------------------------------*/ +#include "stdlib.h" +#include "string.h" + +/* ----------------------- Platform includes --------------------------------*/ +#include "port.h" + +/* ----------------------- Modbus includes ----------------------------------*/ +#include "mb.h" +#include "mbframe.h" +#include "mbproto.h" +#include "mbconfig.h" + +/* ----------------------- Defines ------------------------------------------*/ +#define MB_PDU_FUNC_READ_ADDR_OFF ( MB_PDU_DATA_OFF + 0) +#define MB_PDU_FUNC_READ_REGCNT_OFF ( MB_PDU_DATA_OFF + 2 ) +#define MB_PDU_FUNC_READ_SIZE ( 4 ) +#define MB_PDU_FUNC_READ_REGCNT_MAX ( 0x007D ) + +#define MB_PDU_FUNC_WRITE_ADDR_OFF ( MB_PDU_DATA_OFF + 0) +#define MB_PDU_FUNC_WRITE_VALUE_OFF ( MB_PDU_DATA_OFF + 2 ) +#define MB_PDU_FUNC_WRITE_SIZE ( 4 ) + +#define MB_PDU_FUNC_WRITE_MUL_ADDR_OFF ( MB_PDU_DATA_OFF + 0 ) +#define MB_PDU_FUNC_WRITE_MUL_REGCNT_OFF ( MB_PDU_DATA_OFF + 2 ) +#define MB_PDU_FUNC_WRITE_MUL_BYTECNT_OFF ( MB_PDU_DATA_OFF + 4 ) +#define MB_PDU_FUNC_WRITE_MUL_VALUES_OFF ( MB_PDU_DATA_OFF + 5 ) +#define MB_PDU_FUNC_WRITE_MUL_SIZE_MIN ( 5 ) +#define MB_PDU_FUNC_WRITE_MUL_REGCNT_MAX ( 0x0078 ) + +#define MB_PDU_FUNC_READWRITE_READ_ADDR_OFF ( MB_PDU_DATA_OFF + 0 ) +#define MB_PDU_FUNC_READWRITE_READ_REGCNT_OFF ( MB_PDU_DATA_OFF + 2 ) +#define MB_PDU_FUNC_READWRITE_WRITE_ADDR_OFF ( MB_PDU_DATA_OFF + 4 ) +#define MB_PDU_FUNC_READWRITE_WRITE_REGCNT_OFF ( MB_PDU_DATA_OFF + 6 ) +#define MB_PDU_FUNC_READWRITE_BYTECNT_OFF ( MB_PDU_DATA_OFF + 8 ) +#define MB_PDU_FUNC_READWRITE_WRITE_VALUES_OFF ( MB_PDU_DATA_OFF + 9 ) +#define MB_PDU_FUNC_READWRITE_SIZE_MIN ( 9 ) + +/* ----------------------- Static functions ---------------------------------*/ +eMBException prveMBError2Exception( eMBErrorCode eErrorCode ); + +/* ----------------------- Start implementation -----------------------------*/ + +#if MB_FUNC_WRITE_HOLDING_ENABLED > 0 + +eMBException +eMBFuncWriteHoldingRegister( UCHAR * pucFrame, USHORT * usLen ) +{ + USHORT usRegAddress; + eMBException eStatus = MB_EX_NONE; + eMBErrorCode eRegStatus; + + if( *usLen == ( MB_PDU_FUNC_WRITE_SIZE + MB_PDU_SIZE_MIN ) ) + { + usRegAddress = ( USHORT )( pucFrame[MB_PDU_FUNC_WRITE_ADDR_OFF] << 8 ); + usRegAddress |= ( USHORT )( pucFrame[MB_PDU_FUNC_WRITE_ADDR_OFF + 1] ); + usRegAddress++; + + /* Make callback to update the value. */ + eRegStatus = eMBRegHoldingCB( &pucFrame[MB_PDU_FUNC_WRITE_VALUE_OFF], + usRegAddress, 1, MB_REG_WRITE ); + + /* If an error occured convert it into a Modbus exception. */ + if( eRegStatus != MB_ENOERR ) + { + eStatus = prveMBError2Exception( eRegStatus ); + } + } + else + { + /* Can't be a valid request because the length is incorrect. */ + eStatus = MB_EX_ILLEGAL_DATA_VALUE; + } + return eStatus; +} +#endif + +#if MB_FUNC_WRITE_MULTIPLE_HOLDING_ENABLED > 0 +eMBException +eMBFuncWriteMultipleHoldingRegister( UCHAR * pucFrame, USHORT * usLen ) +{ + USHORT usRegAddress; + USHORT usRegCount; + UCHAR ucRegByteCount; + + eMBException eStatus = MB_EX_NONE; + eMBErrorCode eRegStatus; + + if( *usLen >= ( MB_PDU_FUNC_WRITE_MUL_SIZE_MIN + MB_PDU_SIZE_MIN ) ) + { + usRegAddress = ( USHORT )( pucFrame[MB_PDU_FUNC_WRITE_MUL_ADDR_OFF] << 8 ); + usRegAddress |= ( USHORT )( pucFrame[MB_PDU_FUNC_WRITE_MUL_ADDR_OFF + 1] ); + usRegAddress++; + + usRegCount = ( USHORT )( pucFrame[MB_PDU_FUNC_WRITE_MUL_REGCNT_OFF] << 8 ); + usRegCount |= ( USHORT )( pucFrame[MB_PDU_FUNC_WRITE_MUL_REGCNT_OFF + 1] ); + + ucRegByteCount = pucFrame[MB_PDU_FUNC_WRITE_MUL_BYTECNT_OFF]; + + if( ( usRegCount >= 1 ) && + ( usRegCount <= MB_PDU_FUNC_WRITE_MUL_REGCNT_MAX ) && + ( ucRegByteCount == ( UCHAR ) ( 2 * usRegCount ) ) ) + { + /* Make callback to update the register values. */ + eRegStatus = + eMBRegHoldingCB( &pucFrame[MB_PDU_FUNC_WRITE_MUL_VALUES_OFF], + usRegAddress, usRegCount, MB_REG_WRITE ); + + /* If an error occured convert it into a Modbus exception. */ + if( eRegStatus != MB_ENOERR ) + { + eStatus = prveMBError2Exception( eRegStatus ); + } + else + { + /* The response contains the function code, the starting + * address and the quantity of registers. We reuse the + * old values in the buffer because they are still valid. + */ + *usLen = MB_PDU_FUNC_WRITE_MUL_BYTECNT_OFF; + } + } + else + { + eStatus = MB_EX_ILLEGAL_DATA_VALUE; + } + } + else + { + /* Can't be a valid request because the length is incorrect. */ + eStatus = MB_EX_ILLEGAL_DATA_VALUE; + } + return eStatus; +} +#endif + +#if MB_FUNC_READ_HOLDING_ENABLED > 0 + +eMBException +eMBFuncReadHoldingRegister( UCHAR * pucFrame, USHORT * usLen ) +{ + USHORT usRegAddress; + USHORT usRegCount; + UCHAR *pucFrameCur; + + eMBException eStatus = MB_EX_NONE; + eMBErrorCode eRegStatus; + + if( *usLen == ( MB_PDU_FUNC_READ_SIZE + MB_PDU_SIZE_MIN ) ) + { + usRegAddress = ( USHORT )( pucFrame[MB_PDU_FUNC_READ_ADDR_OFF] << 8 ); + usRegAddress |= ( USHORT )( pucFrame[MB_PDU_FUNC_READ_ADDR_OFF + 1] ); + usRegAddress++; + + usRegCount = ( USHORT )( pucFrame[MB_PDU_FUNC_READ_REGCNT_OFF] << 8 ); + usRegCount |= ( USHORT )( pucFrame[MB_PDU_FUNC_READ_REGCNT_OFF + 1] ); + + /* Check if the number of registers to read is valid. If not + * return Modbus illegal data value exception. + */ + if( ( usRegCount >= 1 ) && ( usRegCount <= MB_PDU_FUNC_READ_REGCNT_MAX ) ) + { + /* Set the current PDU data pointer to the beginning. */ + pucFrameCur = &pucFrame[MB_PDU_FUNC_OFF]; + *usLen = MB_PDU_FUNC_OFF; + + /* First byte contains the function code. */ + *pucFrameCur++ = MB_FUNC_READ_HOLDING_REGISTER; + *usLen += 1; + + /* Second byte in the response contain the number of bytes. */ + *pucFrameCur++ = ( UCHAR ) ( usRegCount * 2 ); + *usLen += 1; + + /* Make callback to fill the buffer. */ + eRegStatus = eMBRegHoldingCB( pucFrameCur, usRegAddress, usRegCount, MB_REG_READ ); + /* If an error occured convert it into a Modbus exception. */ + if( eRegStatus != MB_ENOERR ) + { + eStatus = prveMBError2Exception( eRegStatus ); + } + else + { + *usLen += usRegCount * 2; + } + } + else + { + eStatus = MB_EX_ILLEGAL_DATA_VALUE; + } + } + else + { + /* Can't be a valid request because the length is incorrect. */ + eStatus = MB_EX_ILLEGAL_DATA_VALUE; + } + return eStatus; +} + +#endif + +#if MB_FUNC_READWRITE_HOLDING_ENABLED > 0 + +eMBException +eMBFuncReadWriteMultipleHoldingRegister( UCHAR * pucFrame, USHORT * usLen ) +{ + USHORT usRegReadAddress; + USHORT usRegReadCount; + USHORT usRegWriteAddress; + USHORT usRegWriteCount; + UCHAR ucRegWriteByteCount; + UCHAR *pucFrameCur; + + eMBException eStatus = MB_EX_NONE; + eMBErrorCode eRegStatus; + + if( *usLen >= ( MB_PDU_FUNC_READWRITE_SIZE_MIN + MB_PDU_SIZE_MIN ) ) + { + usRegReadAddress = ( USHORT )( pucFrame[MB_PDU_FUNC_READWRITE_READ_ADDR_OFF] << 8U ); + usRegReadAddress |= ( USHORT )( pucFrame[MB_PDU_FUNC_READWRITE_READ_ADDR_OFF + 1] ); + usRegReadAddress++; + + usRegReadCount = ( USHORT )( pucFrame[MB_PDU_FUNC_READWRITE_READ_REGCNT_OFF] << 8U ); + usRegReadCount |= ( USHORT )( pucFrame[MB_PDU_FUNC_READWRITE_READ_REGCNT_OFF + 1] ); + + usRegWriteAddress = ( USHORT )( pucFrame[MB_PDU_FUNC_READWRITE_WRITE_ADDR_OFF] << 8U ); + usRegWriteAddress |= ( USHORT )( pucFrame[MB_PDU_FUNC_READWRITE_WRITE_ADDR_OFF + 1] ); + usRegWriteAddress++; + + usRegWriteCount = ( USHORT )( pucFrame[MB_PDU_FUNC_READWRITE_WRITE_REGCNT_OFF] << 8U ); + usRegWriteCount |= ( USHORT )( pucFrame[MB_PDU_FUNC_READWRITE_WRITE_REGCNT_OFF + 1] ); + + ucRegWriteByteCount = pucFrame[MB_PDU_FUNC_READWRITE_BYTECNT_OFF]; + + if( ( usRegReadCount >= 1 ) && ( usRegReadCount <= 0x7D ) && + ( usRegWriteCount >= 1 ) && ( usRegWriteCount <= 0x79 ) && + ( ( 2 * usRegWriteCount ) == ucRegWriteByteCount ) ) + { + /* Make callback to update the register values. */ + eRegStatus = eMBRegHoldingCB( &pucFrame[MB_PDU_FUNC_READWRITE_WRITE_VALUES_OFF], + usRegWriteAddress, usRegWriteCount, MB_REG_WRITE ); + + if( eRegStatus == MB_ENOERR ) + { + /* Set the current PDU data pointer to the beginning. */ + pucFrameCur = &pucFrame[MB_PDU_FUNC_OFF]; + *usLen = MB_PDU_FUNC_OFF; + + /* First byte contains the function code. */ + *pucFrameCur++ = MB_FUNC_READWRITE_MULTIPLE_REGISTERS; + *usLen += 1; + + /* Second byte in the response contain the number of bytes. */ + *pucFrameCur++ = ( UCHAR ) ( usRegReadCount * 2 ); + *usLen += 1; + + /* Make the read callback. */ + eRegStatus = + eMBRegHoldingCB( pucFrameCur, usRegReadAddress, usRegReadCount, MB_REG_READ ); + if( eRegStatus == MB_ENOERR ) + { + *usLen += 2 * usRegReadCount; + } + } + if( eRegStatus != MB_ENOERR ) + { + eStatus = prveMBError2Exception( eRegStatus ); + } + } + else + { + eStatus = MB_EX_ILLEGAL_DATA_VALUE; + } + } + return eStatus; +} + +#endif diff --git a/HardWare/FreeModbus/modbus/functions/mbfuncholding_m.c b/HardWare/FreeModbus/modbus/functions/mbfuncholding_m.c new file mode 100644 index 0000000000000000000000000000000000000000..32975e18c8705a48361ef67ba840110a8c437813 GIT binary patch literal 24576 zcmeF&Lzgf-6DHucZQHi(e%iKe+qP}nwr$(C?fGUk^CRA@YLolqT&t?&gj88cgjT}D zz}Uo*mYA5BG=R&=%VgpXvFUf7Qw_ks7!Uviz#riMEdc;PfRf^7?dvuGfJ}0E0Fjb< zjZBlkE*j&%Z1I^7_Wn7~qFq|Ykl#X$5Y&y?_0*4>ZjEf~Y{Y-SWUNB7{n6o>E~_M) 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index 0000000..9260550 --- /dev/null +++ b/HardWare/FreeModbus/modbus/functions/mbfuncinput.c @@ -0,0 +1,122 @@ +/* + * FreeModbus Libary: A portable Modbus implementation for Modbus ASCII/RTU. + * Copyright (c) 2006-2018 Christian Walter + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * File: $Id: mbfuncinput.c,v 1.10 2007/09/12 10:15:56 wolti Exp $ + */ + +/* ----------------------- System includes ----------------------------------*/ +#include "stdlib.h" +#include "string.h" + +/* ----------------------- Platform includes --------------------------------*/ +#include "port.h" + +/* ----------------------- Modbus includes ----------------------------------*/ +#include "mb.h" +#include "mbframe.h" +#include "mbproto.h" +#include "mbconfig.h" + +/* ----------------------- Defines ------------------------------------------*/ +#define MB_PDU_FUNC_READ_ADDR_OFF ( MB_PDU_DATA_OFF ) +#define MB_PDU_FUNC_READ_REGCNT_OFF ( MB_PDU_DATA_OFF + 2 ) +#define MB_PDU_FUNC_READ_SIZE ( 4 ) +#define MB_PDU_FUNC_READ_REGCNT_MAX ( 0x007D ) + +#define MB_PDU_FUNC_READ_RSP_BYTECNT_OFF ( MB_PDU_DATA_OFF ) + +/* ----------------------- Static functions ---------------------------------*/ +eMBException prveMBError2Exception( eMBErrorCode eErrorCode ); + +/* ----------------------- Start implementation -----------------------------*/ +#if MB_FUNC_READ_INPUT_ENABLED > 0 + +eMBException +eMBFuncReadInputRegister( UCHAR * pucFrame, USHORT * usLen ) +{ + USHORT usRegAddress; + USHORT usRegCount; + UCHAR *pucFrameCur; + + eMBException eStatus = MB_EX_NONE; + eMBErrorCode eRegStatus; + + if( *usLen == ( MB_PDU_FUNC_READ_SIZE + MB_PDU_SIZE_MIN ) ) + { + usRegAddress = ( USHORT )( pucFrame[MB_PDU_FUNC_READ_ADDR_OFF] << 8 ); + usRegAddress |= ( USHORT )( pucFrame[MB_PDU_FUNC_READ_ADDR_OFF + 1] ); + usRegAddress++; + + usRegCount = ( USHORT )( pucFrame[MB_PDU_FUNC_READ_REGCNT_OFF] << 8 ); + usRegCount |= ( USHORT )( pucFrame[MB_PDU_FUNC_READ_REGCNT_OFF + 1] ); + + /* Check if the number of registers to read is valid. If not + * return Modbus illegal data value exception. + */ + if( ( usRegCount >= 1 ) + && ( usRegCount < MB_PDU_FUNC_READ_REGCNT_MAX ) ) + { + /* Set the current PDU data pointer to the beginning. */ + pucFrameCur = &pucFrame[MB_PDU_FUNC_OFF]; + *usLen = MB_PDU_FUNC_OFF; + + /* First byte contains the function code. */ + *pucFrameCur++ = MB_FUNC_READ_INPUT_REGISTER; + *usLen += 1; + + /* Second byte in the response contain the number of bytes. */ + *pucFrameCur++ = ( UCHAR )( usRegCount * 2 ); + *usLen += 1; + + eRegStatus = + eMBRegInputCB( pucFrameCur, usRegAddress, usRegCount ); + + /* If an error occured convert it into a Modbus exception. */ + if( eRegStatus != MB_ENOERR ) + { + eStatus = prveMBError2Exception( eRegStatus ); + } + else + { + *usLen += usRegCount * 2; + } + } + else + { + eStatus = MB_EX_ILLEGAL_DATA_VALUE; + } + } + else + { + /* Can't be a valid read input register request because the length + * is incorrect. */ + eStatus = MB_EX_ILLEGAL_DATA_VALUE; + } + return eStatus; +} + +#endif diff --git a/HardWare/FreeModbus/modbus/functions/mbfuncinput_m.c b/HardWare/FreeModbus/modbus/functions/mbfuncinput_m.c new file mode 100644 index 0000000000000000000000000000000000000000..aaf3fab73c8c6c0be68f646f428aa37d592fd7ee GIT binary patch literal 12288 zcmeI#RaYELkOtrx+}+(7+&y@3cXtU6!F7NjAtAU2g1ZKHcXt@v-JL)f_S>u7ACbQ5 zn|e>5=c1~bUR&!Uo4k#MwT(L)EiEm5D!)g7&FB?&J#Q`wXsKz;E;YJWO&-Smv; zj=CMfBZ3j@5*RSTWcKX^6v0|FaCG? zC-6_;pTIwXe**sm{t5gO_$TmB;Ge)hfqw%31h_LBAo6-4GhgmK)!f2uc{P3?oBLC= zS)KY{eUpVII1}2Dd93D=QN(vJ^w8DA^OdH5udQ4oEDty_D<(|-Di~pI$PTOS=EJpj zYEtl3UVi=zW{wY~_QfwoNc(na#sGN!v%2=lA6p}gG^(< z4mYjbZQw+u#zp{1FgcMgJ*qzS4lAS@lLx-APZrkQTBK$Dnnm2S!%E7e7uZ^y2f1U_ zBoml^M-uN(@=`KsLhxVYMqfM}q-a-R*(_rgz#kEjQO{0#eZXPZvK8{eeNZ2o%uti` z=dOKUh5Ujdv9;ZT$l)OA~6+B<%_nJUU&69|oVCVQ{b z$*n#;#fptx%kW(Q96D8rRNnm8A+&9B9N%+`t!cwW=Z+_}+QEPIvDHys|3}Bb0 zT5~SPB3rSnJ<1MtBVuOgG8I6%RL4JVMDF<|z9;EqjIOdjo-+mMt5T43$Rwv)q7@&j zJQ#_;dkNTienZLS3rI@O53)s68*`Cb8%K%w^PK?N+tKPrQ%KtPgS9N2qF%YI3j zkD!_%^lg2PFL0dZWo$Ux52iK>yJ#9tu3~d59b8ypn%-JiUfHQ;2sy-ICXH}9_A-ba z8g^fPFk)>Bld(fm63f{ehU zb1OnZE)!vRU_Fp`&ylYqCiwkC+$cwfWZgEje@l?k!8xrR#Ly6yu|+l@#$X;+#?w!` zR@U6)zqO7+U4nplSIp|_0;qu}pwxtxwLk15(W#`^qI<{Yr z=dtIZo*VqcAh7&Bbi#1VgI3zpSMQKMktgfa!wCS+*-^jt&E^0{WUW_-W#Uc%CG`0I zc7Pba%E{65+KQmU)&xc}Fw%U3Uo*H*^@iu%@8mW>ENg*ETNngI>+kh%yYdT93)JBY zC)xMHc)?WAMXEY8wS}5(rF%x{HDu8jJ6~Lq6Z*arNXq&=%4Bob1IT%f`)8#F zMJb>7G5ER~vI;j&h2bnU=QTc=qv&^YOy4yy8SyMVUheGV&*FSuK_Oa%9{=239*gJl zdAw8U+f@LC>9dURnYJD|)8ZR(A>P}k#Qg|bBW2^1I&!5~V#Xch$;(VnbmExlz1N5> z!G()oz4)}~HuiTGT=X(yxyN%g#v|9GI~~;zoIt0H^tqPF)KOzMk0Z@i1$n1@`9;_1 z*2gts2-#(qEDZ7ohSiyY$BVk=@0Fn0nobgqI~L9{MXLqmj;caGx|Q#I%sP;Yq=#>e z{&eDwLu|9_(#2C}?#r=MG<+uiV?Y*?#gy-I!4KM%((>*Pc`Gl5s z!SQURjOX6IWyg!Z7Aj;vg9im)nPH>IJL3QAx_ptW;6SG#mH~^423-o)x)C$C`Hayr z*SUPGl!6qmbl=Un+Q0}Jcq`Pm!$bxeR0lY%B>Hj{TLRL%A%t;lHf5eSO>8~-A4Xlw zdWx`=dR=SgZ6#x%v|Bp!9b8AgPCw2EYCM?>SMiBqc2dXp?auh@blo3+fB9B?DBtBt zfo3u_9}=-ed6RIx5j(e|yH&<66=wfbu78%{e)(>XRyIFdLz}-*&}yoI@M@x=WXd-b zmzN!Y8?=7f6sT0ppRuk(Lt~sz&fkbSeZX-Sv3vljV|)VLSnu{Xa^>%_zXNApuKc7( z!6HLx+!30D8)Uzp@(W^{u(BRllvpmxvGb{dU7Q)u5wJR^>2LJ`n1elqv}WK zy~PcUxOAIMghL}%b4*ZQ(*MTqS_#x;#2fY-p44F}BQvn2k0u>>UBZ3j;t%c&oi_!# zY(_h{q&}SLYh^Ef118mql*!x8h%RAxAW-oul230&%Jz5OZ!|TwAv8O*@T`68cCCad ziyes$U;M+MSZs)7e>gm>rlE03H;8tOTIH-aS{ zTRZj_`aEZ1MH8PU%if^*inF%RfIi2?`$u63U2=CK#FbT>wE#w1E4b!?aGLmE4H7RNz$V5 z!@zLi4Hq2`RL!YUWY+t^9WA!DB|;`(N)Q8iz_29|qBS%5+X{3(>WU*Z(xtjvoz$f+ z*El=0tu(13A0@5-}CViOMuq@;>ZJQDo49(E?^ft_e(Rog!-43r!t5$Jr z4PmM(Kg@tHB8f__GLO*VB_44ENeO|2?c|a)QQX5N&eFcoKp;C}^FeR4(u;+`+@YXZ zq_+_>c*Qezw>!zyKJ!6!@J>^5kz)%PgYd;VcP(VDP7SJmaeMU`+Y@F^Z@~L`wZZ2l zD5kASRl_Q!Gv9mM&AahaaE0$#vYlQ@FXOtdKIQ(L$6ScCX#Y)HN`QuEOutMZEFTs+ zUDMK#adft+r__AATnrj+A${43&ORe;CN&67W6y5bBDola5kE}H%j;=pE*tytOFrS)w{l=8F__T_-H|!?QB|B(-M`4ltPdxPJ5;YM_Q|B zM5=wmtnYze{Hk4U^Rr>@jiK$*=iAq_x8K0V>Ss&H&*}^m=>?|5DZ8@e_!|-Zs>=SwjJAxdVHEebFvDv?LzN1-Z4=5+ohX_!KQL@W%{I) zNnwZ5^7TL+ZZfI`Kt|`U0%9eEErYMVl37e9`gWN@_nRwQOTC4~s~??cobjD(%AVyH z*E-x9p8H*{@+vt{RSCV*2Un`?2(jVskhI|86r&>`nNm3YIX0O}TdpGwV^*O$))r)K zE~h!?JEgS5DRq2p?V}sp=MG@t%Ey1PdenDDq23dxE+^l9*kX@BTaZBK$aoN>_^9+i zAFUf)mUoW@`RljVOA^b%@0ljr^z)GROm6V9S9_qhq_Da3EX_+aE z_Z9>mHb8f-*x(Gn3`hP|&YuxYCRlzKpFAII!a+{JYs7|mv++{HrOO2dWHKAa9J{5G zE%?bod$n+rRY@q4YhwIxggNEmN>BM|5Kp`lGalCfbrR#AFP_%`{o9irErWTN4ilxo zv>x2W=5d@Njsi#bLUQ-yKQ=ccyE@YR2>am1IafdTrVZse|1X1wR)JN~&J=pHGZrLU zocZ-W=BSENUu8D48R;NZEYF$GcsfNMOb3ZN2rZfr@=2iA(JBM0(Q3Xw+&mB&AsQ6V8dW%zjA z)JZu9iqa}-rxh1)v-fp#GO#G{W-lMM0##yfT8Grb2x=YBW^($HS_j&woGwKZCDVDT zB1FOoxVkw-eDeNbBP@L7{N5oXVT~eOlV8Sp?gpqK3@F>r-+h@gu2lg_S~W5f><~a) z{AL|@jg~O-6%xQN$U$qp{1FEXL*R@ep#XL75#?@pTt4ThxIVT&nn!E%n9F9{jiGz{ z977jytkeiqE)!ev-+LUKW9#w*ilq(ILTVF6NL=twA7z$E^WqvK>6nlYb}-P-G1cHZ zAqF(jVH64XAZyNHd674j8xzk})$=ckv_#I|V!cqd4~z|&!WxKOkU%V7hW(tiT9nd1 zg<;YUfNz)Ie{!{an062C72#8)GFH~3x2{S5u4Cp*;C29jbJq7bnoiRl*w3vO{U|%j zT-jZhdHO1<7GYL5kCzIk-uBL~^XrS%f6D^hLOQc4u0OmdHe;I2`u-LP)VR9%r}s); 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Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * File: $Id: mbfuncother.c,v 1.8 2006/12/07 22:10:34 wolti Exp $ + */ + +/* ----------------------- System includes ----------------------------------*/ +#include "stdlib.h" +#include "string.h" + +/* ----------------------- Platform includes --------------------------------*/ +#include "port.h" + +/* ----------------------- Modbus includes ----------------------------------*/ +#include "mb.h" +#include "mbframe.h" +#include "mbproto.h" +#include "mbconfig.h" + +#if MB_FUNC_OTHER_REP_SLAVEID_ENABLED > 0 + +/* ----------------------- Static variables ---------------------------------*/ +static UCHAR ucMBSlaveID[MB_FUNC_OTHER_REP_SLAVEID_BUF]; +static USHORT usMBSlaveIDLen; + +/* ----------------------- Start implementation -----------------------------*/ + +eMBErrorCode +eMBSetSlaveID( UCHAR ucSlaveID, BOOL xIsRunning, + UCHAR const *pucAdditional, USHORT usAdditionalLen ) +{ + eMBErrorCode eStatus = MB_ENOERR; + + /* the first byte and second byte in the buffer is reserved for + * the parameter ucSlaveID and the running flag. The rest of + * the buffer is available for additional data. */ + if( usAdditionalLen + 2 < MB_FUNC_OTHER_REP_SLAVEID_BUF ) + { + usMBSlaveIDLen = 0; + ucMBSlaveID[usMBSlaveIDLen++] = ucSlaveID; + ucMBSlaveID[usMBSlaveIDLen++] = ( UCHAR )( xIsRunning ? 0xFF : 0x00 ); + if( usAdditionalLen > 0 ) + { + memcpy( &ucMBSlaveID[usMBSlaveIDLen], pucAdditional, + ( size_t )usAdditionalLen ); + usMBSlaveIDLen += usAdditionalLen; + } + } + else + { + eStatus = MB_ENORES; + } + return eStatus; +} + +eMBException +eMBFuncReportSlaveID( UCHAR * pucFrame, USHORT * usLen ) +{ + memcpy( &pucFrame[MB_PDU_DATA_OFF], &ucMBSlaveID[0], ( size_t )usMBSlaveIDLen ); + *usLen = ( USHORT )( MB_PDU_DATA_OFF + usMBSlaveIDLen ); + return MB_EX_NONE; +} + +#endif diff --git a/HardWare/FreeModbus/modbus/functions/mbutils.c b/HardWare/FreeModbus/modbus/functions/mbutils.c new file mode 100644 index 0000000..ac0eb34 --- /dev/null +++ b/HardWare/FreeModbus/modbus/functions/mbutils.c @@ -0,0 +1,141 @@ +/* + * FreeModbus Libary: A portable Modbus implementation for Modbus ASCII/RTU. + * Copyright (c) 2006-2018 Christian Walter + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * File: $Id: mbutils.c,v 1.6 2007/02/18 23:49:07 wolti Exp $ + */ + +/* ----------------------- System includes ----------------------------------*/ +#include "stdlib.h" +#include "string.h" + +/* ----------------------- Platform includes --------------------------------*/ +#include "port.h" + +/* ----------------------- Modbus includes ----------------------------------*/ +#include "mb.h" +#include "mbproto.h" + +/* ----------------------- Defines ------------------------------------------*/ +#define BITS_UCHAR 8U + +/* ----------------------- Start implementation -----------------------------*/ +void +xMBUtilSetBits( UCHAR * ucByteBuf, USHORT usBitOffset, UCHAR ucNBits, + UCHAR ucValue ) +{ + USHORT usWordBuf; + USHORT usMask; + USHORT usByteOffset; + USHORT usNPreBits; + USHORT usValue = ucValue; + + assert_param( ucNBits <= 8 ); + assert_param( ( size_t )BITS_UCHAR == sizeof( UCHAR ) * 8 ); + + /* Calculate byte offset for first byte containing the bit values starting + * at usBitOffset. */ + usByteOffset = ( USHORT )( ( usBitOffset ) / BITS_UCHAR ); + + /* How many bits precede our bits to set. */ + usNPreBits = ( USHORT )( usBitOffset - usByteOffset * BITS_UCHAR ); + + /* Move bit field into position over bits to set */ + usValue <<= usNPreBits; + + /* Prepare a mask for setting the new bits. */ + usMask = ( USHORT )( ( 1 << ( USHORT ) ucNBits ) - 1 ); + usMask <<= usBitOffset - usByteOffset * BITS_UCHAR; + + /* copy bits into temporary storage. */ + usWordBuf = ucByteBuf[usByteOffset]; + usWordBuf |= ucByteBuf[usByteOffset + 1] << BITS_UCHAR; + + /* Zero out bit field bits and then or value bits into them. */ + usWordBuf = ( USHORT )( ( usWordBuf & ( ~usMask ) ) | usValue ); + + /* move bits back into storage */ + ucByteBuf[usByteOffset] = ( UCHAR )( usWordBuf & 0xFF ); + ucByteBuf[usByteOffset + 1] = ( UCHAR )( usWordBuf >> BITS_UCHAR ); +} + +UCHAR +xMBUtilGetBits( UCHAR * ucByteBuf, USHORT usBitOffset, UCHAR ucNBits ) +{ + USHORT usWordBuf; + USHORT usMask; + USHORT usByteOffset; + USHORT usNPreBits; + + /* Calculate byte offset for first byte containing the bit values starting + * at usBitOffset. */ + usByteOffset = ( USHORT )( ( usBitOffset ) / BITS_UCHAR ); + + /* How many bits precede our bits to set. */ + usNPreBits = ( USHORT )( usBitOffset - usByteOffset * BITS_UCHAR ); + + /* Prepare a mask for setting the new bits. */ + usMask = ( USHORT )( ( 1 << ( USHORT ) ucNBits ) - 1 ); + + /* copy bits into temporary storage. */ + usWordBuf = ucByteBuf[usByteOffset]; + usWordBuf |= ucByteBuf[usByteOffset + 1] << BITS_UCHAR; + + /* throw away unneeded bits. */ + usWordBuf >>= usNPreBits; + + /* mask away bits above the requested bitfield. */ + usWordBuf &= usMask; + + return ( UCHAR ) usWordBuf; +} + +eMBException +prveMBError2Exception( eMBErrorCode eErrorCode ) +{ + eMBException eStatus; + + switch ( eErrorCode ) + { + case MB_ENOERR: + eStatus = MB_EX_NONE; + break; + + case MB_ENOREG: + eStatus = MB_EX_ILLEGAL_DATA_ADDRESS; + break; + + case MB_ETIMEDOUT: + eStatus = MB_EX_SLAVE_BUSY; + break; + + default: + eStatus = MB_EX_SLAVE_DEVICE_FAILURE; + break; + } + + return eStatus; +} diff --git a/HardWare/FreeModbus/modbus/include/mb.h b/HardWare/FreeModbus/modbus/include/mb.h new file mode 100644 index 0000000..f451d65 --- /dev/null +++ b/HardWare/FreeModbus/modbus/include/mb.h @@ -0,0 +1,417 @@ +/* + * FreeModbus Libary: A portable Modbus implementation for Modbus ASCII/RTU. + * Copyright (c) 2006-2018 Christian Walter + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * File: $Id: mb.h,v 1.17 2006/12/07 22:10:34 wolti Exp $ + */ + +#ifndef _MB_H +#define _MB_H + +#include "port.h" + +#ifdef __cplusplus +PR_BEGIN_EXTERN_C +#endif + +#include "mbport.h" +#include "mbproto.h" + +/*! \defgroup modbus Modbus + * \code #include "mb.h" \endcode + * + * This module defines the interface for the application. It contains + * the basic functions and types required to use the Modbus protocol stack. + * A typical application will want to call eMBInit() first. If the device + * is ready to answer network requests it must then call eMBEnable() to activate + * the protocol stack. In the main loop the function eMBPoll() must be called + * periodically. The time interval between pooling depends on the configured + * Modbus timeout. If an RTOS is available a separate task should be created + * and the task should always call the function eMBPoll(). + * + * \code + * // Initialize protocol stack in RTU mode for a slave with address 10 = 0x0A + * eMBInit( MB_RTU, 0x0A, 38400, MB_PAR_EVEN ); + * // Enable the Modbus Protocol Stack. + * eMBEnable( ); + * for( ;; ) + * { + * // Call the main polling loop of the Modbus protocol stack. + * eMBPoll( ); + * ... + * } + * \endcode + */ + +/* ----------------------- Defines ------------------------------------------*/ + +/*! \ingroup modbus + * \brief Use the default Modbus TCP port (502) + */ +#define MB_TCP_PORT_USE_DEFAULT 0 + +/* ----------------------- Type definitions ---------------------------------*/ + +/*! \ingroup modbus + * \brief Modbus serial transmission modes (RTU/ASCII). + * + * Modbus serial supports two transmission modes. Either ASCII or RTU. RTU + * is faster but has more hardware requirements and requires a network with + * a low jitter. ASCII is slower and more reliable on slower links (E.g. modems) + */ + typedef enum +{ + MB_RTU, /*!< RTU transmission mode. */ + MB_ASCII, /*!< ASCII transmission mode. */ + MB_TCP /*!< TCP mode. */ +} eMBMode; + +/*! \ingroup modbus + * \brief If register should be written or read. + * + * This value is passed to the callback functions which support either + * reading or writing register values. Writing means that the application + * registers should be updated and reading means that the modbus protocol + * stack needs to know the current register values. + * + * \see eMBRegHoldingCB( ), eMBRegCoilsCB( ), eMBRegDiscreteCB( ) and + * eMBRegInputCB( ). + */ +typedef enum +{ + MB_REG_READ, /*!< Read register values and pass to protocol stack. */ + MB_REG_WRITE /*!< Update register values. */ +} eMBRegisterMode; + +/*! \ingroup modbus + * \brief Errorcodes used by all function in the protocol stack. + */ +typedef enum +{ + MB_ENOERR, /*!< no error. */ + MB_ENOREG, /*!< illegal register address. */ + MB_EINVAL, /*!< illegal argument. */ + MB_EPORTERR, /*!< porting layer error. */ + MB_ENORES, /*!< insufficient resources. */ + MB_EIO, /*!< I/O error. */ + MB_EILLSTATE, /*!< protocol stack in illegal state. */ + MB_ETIMEDOUT /*!< timeout error occurred. */ +} eMBErrorCode; + + +/* ----------------------- Function prototypes ------------------------------*/ +/*! \ingroup modbus + * \brief Initialize the Modbus protocol stack. + * + * This functions initializes the ASCII or RTU module and calls the + * init functions of the porting layer to prepare the hardware. Please + * note that the receiver is still disabled and no Modbus frames are + * processed until eMBEnable( ) has been called. + * + * \param eMode If ASCII or RTU mode should be used. + * \param ucSlaveAddress The slave address. Only frames sent to this + * address or to the broadcast address are processed. + * \param ucPort The port to use. E.g. 1 for COM1 on windows. This value + * is platform dependent and some ports simply choose to ignore it. + * \param ulBaudRate The baudrate. E.g. 19200. Supported baudrates depend + * on the porting layer. + * \param eParity Parity used for serial transmission. + * + * \return If no error occurs the function returns eMBErrorCode::MB_ENOERR. + * The protocol is then in the disabled state and ready for activation + * by calling eMBEnable( ). Otherwise one of the following error codes + * is returned: + * - eMBErrorCode::MB_EINVAL If the slave address was not valid. Valid + * slave addresses are in the range 1 - 247. + * - eMBErrorCode::MB_EPORTERR IF the porting layer returned an error. + */ +eMBErrorCode eMBInit( eMBMode eMode, UCHAR ucSlaveAddress, + UCHAR ucPort, ULONG ulBaudRate, eMBParity eParity ); + +/*! \ingroup modbus + * \brief Initialize the Modbus protocol stack for Modbus TCP. + * + * This function initializes the Modbus TCP Module. Please note that + * frame processing is still disabled until eMBEnable( ) is called. + * + * \param usTCPPort The TCP port to listen on. + * \return If the protocol stack has been initialized correctly the function + * returns eMBErrorCode::MB_ENOERR. Otherwise one of the following error + * codes is returned: + * - eMBErrorCode::MB_EINVAL If the slave address was not valid. Valid + * slave addresses are in the range 1 - 247. + * - eMBErrorCode::MB_EPORTERR IF the porting layer returned an error. + */ +eMBErrorCode eMBTCPInit( USHORT usTCPPort ); + +/*! \ingroup modbus + * \brief Release resources used by the protocol stack. + * + * This function disables the Modbus protocol stack and release all + * hardware resources. It must only be called when the protocol stack + * is disabled. + * + * \note Note all ports implement this function. A port which wants to + * get an callback must define the macro MB_PORT_HAS_CLOSE to 1. + * + * \return If the resources where released it return eMBErrorCode::MB_ENOERR. + * If the protocol stack is not in the disabled state it returns + * eMBErrorCode::MB_EILLSTATE. + */ +eMBErrorCode eMBClose( void ); + +/*! \ingroup modbus + * \brief Enable the Modbus protocol stack. + * + * This function enables processing of Modbus frames. Enabling the protocol + * stack is only possible if it is in the disabled state. + * + * \return If the protocol stack is now in the state enabled it returns + * eMBErrorCode::MB_ENOERR. If it was not in the disabled state it + * return eMBErrorCode::MB_EILLSTATE. + */ +eMBErrorCode eMBEnable( void ); + +/*! \ingroup modbus + * \brief Disable the Modbus protocol stack. + * + * This function disables processing of Modbus frames. + * + * \return If the protocol stack has been disabled it returns + * eMBErrorCode::MB_ENOERR. If it was not in the enabled state it returns + * eMBErrorCode::MB_EILLSTATE. + */ +eMBErrorCode eMBDisable( void ); + +/*! \ingroup modbus + * \brief The main pooling loop of the Modbus protocol stack. + * + * This function must be called periodically. The timer interval required + * is given by the application dependent Modbus slave timeout. Internally the + * function calls xMBPortEventGet() and waits for an event from the receiver or + * transmitter state machines. + * + * \return If the protocol stack is not in the enabled state the function + * returns eMBErrorCode::MB_EILLSTATE. Otherwise it returns + * eMBErrorCode::MB_ENOERR. + */ +eMBErrorCode eMBPoll( void ); + +/*! \ingroup modbus + * \brief Configure the slave id of the device. + * + * This function should be called when the Modbus function Report Slave ID + * is enabled ( By defining MB_FUNC_OTHER_REP_SLAVEID_ENABLED in mbconfig.h ). + * + * \param ucSlaveID Values is returned in the Slave ID byte of the + * Report Slave ID response. + * \param xIsRunning If TRUE the Run Indicator Status byte is set to 0xFF. + * otherwise the Run Indicator Status is 0x00. + * \param pucAdditional Values which should be returned in the Additional + * bytes of the Report Slave ID response. + * \param usAdditionalLen Length of the buffer pucAdditonal. + * + * \return If the static buffer defined by MB_FUNC_OTHER_REP_SLAVEID_BUF in + * mbconfig.h is to small it returns eMBErrorCode::MB_ENORES. Otherwise + * it returns eMBErrorCode::MB_ENOERR. + */ +eMBErrorCode eMBSetSlaveID( UCHAR ucSlaveID, BOOL xIsRunning, + UCHAR const *pucAdditional, + USHORT usAdditionalLen ); + +/*! \ingroup modbus + * \brief Registers a callback handler for a given function code. + * + * This function registers a new callback handler for a given function code. + * The callback handler supplied is responsible for interpreting the Modbus PDU and + * the creation of an appropriate response. In case of an error it should return + * one of the possible Modbus exceptions which results in a Modbus exception frame + * sent by the protocol stack. + * + * \param ucFunctionCode The Modbus function code for which this handler should + * be registers. Valid function codes are in the range 1 to 127. + * \param pxHandler The function handler which should be called in case + * such a frame is received. If \c NULL a previously registered function handler + * for this function code is removed. + * + * \return eMBErrorCode::MB_ENOERR if the handler has been installed. If no + * more resources are available it returns eMBErrorCode::MB_ENORES. In this + * case the values in mbconfig.h should be adjusted. If the argument was not + * valid it returns eMBErrorCode::MB_EINVAL. + */ +eMBErrorCode eMBRegisterCB( UCHAR ucFunctionCode, + pxMBFunctionHandler pxHandler ); + +/* ----------------------- Callback -----------------------------------------*/ + +/*! \defgroup modbus_registers Modbus Registers + * \code #include "mb.h" \endcode + * The protocol stack does not internally allocate any memory for the + * registers. This makes the protocol stack very small and also usable on + * low end targets. In addition the values don't have to be in the memory + * and could for example be stored in a flash.
+ * Whenever the protocol stack requires a value it calls one of the callback + * function with the register address and the number of registers to read + * as an argument. The application should then read the actual register values + * (for example the ADC voltage) and should store the result in the supplied + * buffer.
+ * If the protocol stack wants to update a register value because a write + * register function was received a buffer with the new register values is + * passed to the callback function. The function should then use these values + * to update the application register values. + */ + +/*! \ingroup modbus_registers + * \brief Callback function used if the value of a Input Register + * is required by the protocol stack. The starting register address is given + * by \c usAddress and the last register is given by usAddress + + * usNRegs - 1. + * + * \param pucRegBuffer A buffer where the callback function should write + * the current value of the modbus registers to. + * \param usAddress The starting address of the register. Input registers + * are in the range 1 - 65535. + * \param usNRegs Number of registers the callback function must supply. + * + * \return The function must return one of the following error codes: + * - eMBErrorCode::MB_ENOERR If no error occurred. In this case a normal + * Modbus response is sent. + * - eMBErrorCode::MB_ENOREG If the application can not supply values + * for registers within this range. In this case a + * ILLEGAL DATA ADDRESS exception frame is sent as a response. + * - eMBErrorCode::MB_ETIMEDOUT If the requested register block is + * currently not available and the application dependent response + * timeout would be violated. In this case a SLAVE DEVICE BUSY + * exception is sent as a response. + * - eMBErrorCode::MB_EIO If an unrecoverable error occurred. In this case + * a SLAVE DEVICE FAILURE exception is sent as a response. + */ +eMBErrorCode eMBRegInputCB( UCHAR * pucRegBuffer, USHORT usAddress, + USHORT usNRegs ); + +/*! \ingroup modbus_registers + * \brief Callback function used if a Holding Register value is + * read or written by the protocol stack. The starting register address + * is given by \c usAddress and the last register is given by + * usAddress + usNRegs - 1. + * + * \param pucRegBuffer If the application registers values should be updated the + * buffer points to the new registers values. If the protocol stack needs + * to now the current values the callback function should write them into + * this buffer. + * \param usAddress The starting address of the register. + * \param usNRegs Number of registers to read or write. + * \param eMode If eMBRegisterMode::MB_REG_WRITE the application register + * values should be updated from the values in the buffer. For example + * this would be the case when the Modbus master has issued an + * WRITE SINGLE REGISTER command. + * If the value eMBRegisterMode::MB_REG_READ the application should copy + * the current values into the buffer \c pucRegBuffer. + * + * \return The function must return one of the following error codes: + * - eMBErrorCode::MB_ENOERR If no error occurred. In this case a normal + * Modbus response is sent. + * - eMBErrorCode::MB_ENOREG If the application can not supply values + * for registers within this range. In this case a + * ILLEGAL DATA ADDRESS exception frame is sent as a response. + * - eMBErrorCode::MB_ETIMEDOUT If the requested register block is + * currently not available and the application dependent response + * timeout would be violated. In this case a SLAVE DEVICE BUSY + * exception is sent as a response. + * - eMBErrorCode::MB_EIO If an unrecoverable error occurred. In this case + * a SLAVE DEVICE FAILURE exception is sent as a response. + */ +eMBErrorCode eMBRegHoldingCB( UCHAR * pucRegBuffer, USHORT usAddress, + USHORT usNRegs, eMBRegisterMode eMode ); + +/*! \ingroup modbus_registers + * \brief Callback function used if a Coil Register value is + * read or written by the protocol stack. If you are going to use + * this function you might use the functions xMBUtilSetBits( ) and + * xMBUtilGetBits( ) for working with bitfields. + * + * \param pucRegBuffer The bits are packed in bytes where the first coil + * starting at address \c usAddress is stored in the LSB of the + * first byte in the buffer pucRegBuffer. + * If the buffer should be written by the callback function unused + * coil values (I.e. if not a multiple of eight coils is used) should be set + * to zero. + * \param usAddress The first coil number. + * \param usNCoils Number of coil values requested. + * \param eMode If eMBRegisterMode::MB_REG_WRITE the application values should + * be updated from the values supplied in the buffer \c pucRegBuffer. + * If eMBRegisterMode::MB_REG_READ the application should store the current + * values in the buffer \c pucRegBuffer. + * + * \return The function must return one of the following error codes: + * - eMBErrorCode::MB_ENOERR If no error occurred. In this case a normal + * Modbus response is sent. + * - eMBErrorCode::MB_ENOREG If the application does not map an coils + * within the requested address range. In this case a + * ILLEGAL DATA ADDRESS is sent as a response. + * - eMBErrorCode::MB_ETIMEDOUT If the requested register block is + * currently not available and the application dependent response + * timeout would be violated. In this case a SLAVE DEVICE BUSY + * exception is sent as a response. + * - eMBErrorCode::MB_EIO If an unrecoverable error occurred. In this case + * a SLAVE DEVICE FAILURE exception is sent as a response. + */ +eMBErrorCode eMBRegCoilsCB( UCHAR * pucRegBuffer, USHORT usAddress, + USHORT usNCoils, eMBRegisterMode eMode ); + +/*! \ingroup modbus_registers + * \brief Callback function used if a Input Discrete Register value is + * read by the protocol stack. + * + * If you are going to use his function you might use the functions + * xMBUtilSetBits( ) and xMBUtilGetBits( ) for working with bitfields. + * + * \param pucRegBuffer The buffer should be updated with the current + * coil values. The first discrete input starting at \c usAddress must be + * stored at the LSB of the first byte in the buffer. If the requested number + * is not a multiple of eight the remaining bits should be set to zero. + * \param usAddress The starting address of the first discrete input. + * \param usNDiscrete Number of discrete input values. + * \return The function must return one of the following error codes: + * - eMBErrorCode::MB_ENOERR If no error occurred. In this case a normal + * Modbus response is sent. + * - eMBErrorCode::MB_ENOREG If no such discrete inputs exists. + * In this case a ILLEGAL DATA ADDRESS exception frame is sent + * as a response. + * - eMBErrorCode::MB_ETIMEDOUT If the requested register block is + * currently not available and the application dependent response + * timeout would be violated. In this case a SLAVE DEVICE BUSY + * exception is sent as a response. + * - eMBErrorCode::MB_EIO If an unrecoverable error occurred. In this case + * a SLAVE DEVICE FAILURE exception is sent as a response. + */ +eMBErrorCode eMBRegDiscreteCB( UCHAR * pucRegBuffer, USHORT usAddress, + USHORT usNDiscrete ); + +#ifdef __cplusplus +PR_END_EXTERN_C +#endif +#endif diff --git a/HardWare/FreeModbus/modbus/include/mb_m.h b/HardWare/FreeModbus/modbus/include/mb_m.h new file mode 100644 index 0000000..0806eed --- /dev/null +++ b/HardWare/FreeModbus/modbus/include/mb_m.h @@ -0,0 +1,414 @@ +/* + * FreeModbus Libary: A portable Modbus implementation for Modbus ASCII/RTU. + * Copyright (C) 2013 Armink + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * File: $Id: mb_m.h,v 1.60 2013/09/03 10:20:05 Armink Add Master Functions $ + */ + +#ifndef _MB_M_H +#define _MB_M_H + +#ifdef __cplusplus +PR_BEGIN_EXTERN_C +#endif + +/*! \defgroup modbus Modbus + * \code #include "mb_m.h" \endcode + * + * This module defines the interface for the application. It contains + * the basic functions and types required to use the Modbus Master protocol stack. + * A typical application will want to call eMBMasterInit() first. If the device + * is ready to answer network requests it must then call eMBEnable() to activate + * the protocol stack. In the main loop the function eMBMasterPoll() must be called + * periodically. The time interval between pooling depends on the configured + * Modbus timeout. If an RTOS is available a separate task should be created + * and the task should always call the function eMBMasterPoll(). + * + * \code + * // Initialize protocol stack in RTU mode for a Master + * eMBMasterInit( MB_RTU, 38400, MB_PAR_EVEN ); + * // Enable the Modbus Protocol Stack. + * eMBMasterEnable( ); + * for( ;; ) + * { + * // Call the main polling loop of the Modbus Master protocol stack. + * eMBMasterPoll( ); + * ... + * } + * \endcode + */ + +/* ----------------------- Defines ------------------------------------------*/ + +/*! \ingroup modbus + * \brief Use the default Modbus Master TCP port (502) + */ +#define MB_MASTER_TCP_PORT_USE_DEFAULT 0 + +/* ----------------------- Type definitions ---------------------------------*/ +/*! \ingroup modbus + * \brief Errorcodes used by all function in the Master request. + */ +typedef enum +{ + MB_MRE_NO_ERR, /*!< no error. */ + MB_MRE_NO_REG, /*!< illegal register address. */ + MB_MRE_ILL_ARG, /*!< illegal argument. */ + MB_MRE_REV_DATA, /*!< receive data error. */ + MB_MRE_TIMEDOUT, /*!< timeout error occurred. */ + MB_MRE_MASTER_BUSY, /*!< master is busy now. */ + MB_MRE_EXE_FUN /*!< execute function error. */ +} eMBMasterReqErrCode; +/*! \ingroup modbus + * \brief TimerMode is Master 3 kind of Timer modes. + */ +typedef enum +{ + MB_TMODE_T35, /*!< Master receive frame T3.5 timeout. */ + MB_TMODE_RESPOND_TIMEOUT, /*!< Master wait respond for slave. */ + MB_TMODE_CONVERT_DELAY /*!< Master sent broadcast ,then delay sometime.*/ +}eMBMasterTimerMode; + +/* ----------------------- Function prototypes ------------------------------*/ +/*! \ingroup modbus + * \brief Initialize the Modbus Master protocol stack. + * + * This functions initializes the ASCII or RTU module and calls the + * init functions of the porting layer to prepare the hardware. Please + * note that the receiver is still disabled and no Modbus frames are + * processed until eMBMasterEnable( ) has been called. + * + * \param eMode If ASCII or RTU mode should be used. + * \param ucPort The port to use. E.g. 1 for COM1 on windows. This value + * is platform dependent and some ports simply choose to ignore it. + * \param ulBaudRate The baudrate. E.g. 19200. Supported baudrates depend + * on the porting layer. + * \param eParity Parity used for serial transmission. + * + * \return If no error occurs the function returns eMBErrorCode::MB_ENOERR. + * The protocol is then in the disabled state and ready for activation + * by calling eMBMasterEnable( ). Otherwise one of the following error codes + * is returned: + * - eMBErrorCode::MB_EPORTERR IF the porting layer returned an error. + */ +eMBErrorCode eMBMasterInit( eMBMode eMode, UCHAR ucPort, + ULONG ulBaudRate, eMBParity eParity ); + +/*! \ingroup modbus + * \brief Initialize the Modbus Master protocol stack for Modbus TCP. + * + * This function initializes the Modbus TCP Module. Please note that + * frame processing is still disabled until eMBEnable( ) is called. + * + * \param usTCPPort The TCP port to listen on. + * \return If the protocol stack has been initialized correctly the function + * returns eMBErrorCode::MB_ENOERR. Otherwise one of the following error + * codes is returned: + * - eMBErrorCode::MB_EINVAL If the slave address was not valid. Valid + * slave addresses are in the range 1 - 247. + * - eMBErrorCode::MB_EPORTERR IF the porting layer returned an error. + */ +eMBErrorCode eMBMasterTCPInit( USHORT usTCPPort ); + +/*! \ingroup modbus + * \brief Release resources used by the protocol stack. + * + * This function disables the Modbus Master protocol stack and release all + * hardware resources. It must only be called when the protocol stack + * is disabled. + * + * \note Note all ports implement this function. A port which wants to + * get an callback must define the macro MB_PORT_HAS_CLOSE to 1. + * + * \return If the resources where released it return eMBErrorCode::MB_ENOERR. + * If the protocol stack is not in the disabled state it returns + * eMBErrorCode::MB_EILLSTATE. + */ +eMBErrorCode eMBMasterClose( void ); + +/*! \ingroup modbus + * \brief Enable the Modbus Master protocol stack. + * + * This function enables processing of Modbus Master frames. Enabling the protocol + * stack is only possible if it is in the disabled state. + * + * \return If the protocol stack is now in the state enabled it returns + * eMBErrorCode::MB_ENOERR. If it was not in the disabled state it + * return eMBErrorCode::MB_EILLSTATE. + */ +eMBErrorCode eMBMasterEnable( void ); + +/*! \ingroup modbus + * \brief Disable the Modbus Master protocol stack. + * + * This function disables processing of Modbus frames. + * + * \return If the protocol stack has been disabled it returns + * eMBErrorCode::MB_ENOERR. If it was not in the enabled state it returns + * eMBErrorCode::MB_EILLSTATE. + */ +eMBErrorCode eMBMasterDisable( void ); + +/*! \ingroup modbus + * \brief Check the Modbus Master protocol stack has established or not. + * + * This function must be called and check the return value before calling + * any other functions. + * + * \return If the protocol stack has been established or not + * TRUE. the protocol stack has established + * FALSE. the protocol stack hasn't established + */ +BOOL eMBMasterIsEstablished( void ); + +/*! \ingroup modbus + * \brief The main pooling loop of the Modbus Master protocol stack. + * + * This function must be called periodically. The timer interval required + * is given by the application dependent Modbus slave timeout. Internally the + * function calls xMBMasterPortEventGet() and waits for an event from the receiver or + * transmitter state machines. + * + * \return If the protocol stack is not in the enabled state the function + * returns eMBErrorCode::MB_EILLSTATE. Otherwise it returns + * eMBErrorCode::MB_ENOERR. + */ +eMBErrorCode eMBMasterPoll( void ); + +/*! \ingroup modbus + * \brief Registers a callback handler for a given function code. + * + * This function registers a new callback handler for a given function code. + * The callback handler supplied is responsible for interpreting the Modbus PDU and + * the creation of an appropriate response. In case of an error it should return + * one of the possible Modbus exceptions which results in a Modbus exception frame + * sent by the protocol stack. + * + * \param ucFunctionCode The Modbus function code for which this handler should + * be registers. Valid function codes are in the range 1 to 127. + * \param pxHandler The function handler which should be called in case + * such a frame is received. If \c NULL a previously registered function handler + * for this function code is removed. + * + * \return eMBErrorCode::MB_ENOERR if the handler has been installed. If no + * more resources are available it returns eMBErrorCode::MB_ENORES. In this + * case the values in mbconfig.h should be adjusted. If the argument was not + * valid it returns eMBErrorCode::MB_EINVAL. + */ +eMBErrorCode eMBMasterRegisterCB( UCHAR ucFunctionCode, + pxMBFunctionHandler pxHandler ); + +/* ----------------------- Callback -----------------------------------------*/ + +/*! \defgroup modbus_master registers Modbus Registers + * \code #include "mb_m.h" \endcode + * The protocol stack does not internally allocate any memory for the + * registers. This makes the protocol stack very small and also usable on + * low end targets. In addition the values don't have to be in the memory + * and could for example be stored in a flash.
+ * Whenever the protocol stack requires a value it calls one of the callback + * function with the register address and the number of registers to read + * as an argument. The application should then read the actual register values + * (for example the ADC voltage) and should store the result in the supplied + * buffer.
+ * If the protocol stack wants to update a register value because a write + * register function was received a buffer with the new register values is + * passed to the callback function. The function should then use these values + * to update the application register values. + */ + +/*! \ingroup modbus_registers + * \brief Callback function used if the value of a Input Register + * is required by the protocol stack. The starting register address is given + * by \c usAddress and the last register is given by usAddress + + * usNRegs - 1. + * + * \param pucRegBuffer A buffer where the callback function should write + * the current value of the modbus registers to. + * \param usAddress The starting address of the register. Input registers + * are in the range 1 - 65535. + * \param usNRegs Number of registers the callback function must supply. + * + * \return The function must return one of the following error codes: + * - eMBErrorCode::MB_ENOERR If no error occurred. In this case a normal + * Modbus response is sent. + * - eMBErrorCode::MB_ENOREG If the application does not map an coils + * within the requested address range. In this case a + * ILLEGAL DATA ADDRESS is sent as a response. + */ +eMBErrorCode eMBMasterRegInputCB( UCHAR * pucRegBuffer, USHORT usAddress, + USHORT usNRegs ); + +/*! \ingroup modbus_registers + * \brief Callback function used if a Holding Register value is + * read or written by the protocol stack. The starting register address + * is given by \c usAddress and the last register is given by + * usAddress + usNRegs - 1. + * + * \param pucRegBuffer If the application registers values should be updated the + * buffer points to the new registers values. If the protocol stack needs + * to now the current values the callback function should write them into + * this buffer. + * \param usAddress The starting address of the register. + * \param usNRegs Number of registers to read or write. + * \param eMode If eMBRegisterMode::MB_REG_WRITE the application register + * values should be updated from the values in the buffer. For example + * this would be the case when the Modbus master has issued an + * WRITE SINGLE REGISTER command. + * If the value eMBRegisterMode::MB_REG_READ the application should copy + * the current values into the buffer \c pucRegBuffer. + * + * \return The function must return one of the following error codes: + * - eMBErrorCode::MB_ENOERR If no error occurred. In this case a normal + * Modbus response is sent. + * - eMBErrorCode::MB_ENOREG If the application does not map an coils + * within the requested address range. In this case a + * ILLEGAL DATA ADDRESS is sent as a response. + */ +eMBErrorCode eMBMasterRegHoldingCB( UCHAR * pucRegBuffer, USHORT usAddress, + USHORT usNRegs, eMBRegisterMode eMode ); + +/*! \ingroup modbus_registers + * \brief Callback function used if a Coil Register value is + * read or written by the protocol stack. If you are going to use + * this function you might use the functions xMBUtilSetBits( ) and + * xMBUtilGetBits( ) for working with bitfields. + * + * \param pucRegBuffer The bits are packed in bytes where the first coil + * starting at address \c usAddress is stored in the LSB of the + * first byte in the buffer pucRegBuffer. + * If the buffer should be written by the callback function unused + * coil values (I.e. if not a multiple of eight coils is used) should be set + * to zero. + * \param usAddress The first coil number. + * \param usNCoils Number of coil values requested. + * \param eMode If eMBRegisterMode::MB_REG_WRITE the application values should + * be updated from the values supplied in the buffer \c pucRegBuffer. + * If eMBRegisterMode::MB_REG_READ the application should store the current + * values in the buffer \c pucRegBuffer. + * + * \return The function must return one of the following error codes: + * - eMBErrorCode::MB_ENOERR If no error occurred. In this case a normal + * Modbus response is sent. + * - eMBErrorCode::MB_ENOREG If the application does not map an coils + * within the requested address range. In this case a + * ILLEGAL DATA ADDRESS is sent as a response. + */ +eMBErrorCode eMBMasterRegCoilsCB( UCHAR * pucRegBuffer, USHORT usAddress, + USHORT usNCoils, eMBRegisterMode eMode ); + +/*! \ingroup modbus_registers + * \brief Callback function used if a Input Discrete Register value is + * read by the protocol stack. + * + * If you are going to use his function you might use the functions + * xMBUtilSetBits( ) and xMBUtilGetBits( ) for working with bitfields. + * + * \param pucRegBuffer The buffer should be updated with the current + * coil values. The first discrete input starting at \c usAddress must be + * stored at the LSB of the first byte in the buffer. If the requested number + * is not a multiple of eight the remaining bits should be set to zero. + * \param usAddress The starting address of the first discrete input. + * \param usNDiscrete Number of discrete input values. + * \return The function must return one of the following error codes: + * - eMBErrorCode::MB_ENOERR If no error occurred. In this case a normal + * Modbus response is sent. + * - eMBErrorCode::MB_ENOREG If the application does not map an coils + * within the requested address range. In this case a + * ILLEGAL DATA ADDRESS is sent as a response. + */ +eMBErrorCode eMBMasterRegDiscreteCB( UCHAR * pucRegBuffer, USHORT usAddress, + USHORT usNDiscrete ); + +/*! \ingroup modbus + *\brief These Modbus functions are called for user when Modbus run in Master Mode. + */ +eMBMasterReqErrCode +eMBMasterReqReadInputRegister( UCHAR ucSndAddr, USHORT usRegAddr, USHORT usNRegs, LONG lTimeOut ); +eMBMasterReqErrCode +eMBMasterReqWriteHoldingRegister( UCHAR ucSndAddr, USHORT usRegAddr, USHORT usRegData, LONG lTimeOut ); +eMBMasterReqErrCode +eMBMasterReqWriteMultipleHoldingRegister( UCHAR ucSndAddr, USHORT usRegAddr, + USHORT usNRegs, USHORT * pusDataBuffer, LONG lTimeOut ); +eMBMasterReqErrCode +eMBMasterReqReadHoldingRegister( UCHAR ucSndAddr, USHORT usRegAddr, USHORT usNRegs, LONG lTimeOut ); +eMBMasterReqErrCode +eMBMasterReqReadWriteMultipleHoldingRegister( UCHAR ucSndAddr, + USHORT usReadRegAddr, USHORT usNReadRegs, USHORT * pusDataBuffer, + USHORT usWriteRegAddr, USHORT usNWriteRegs, LONG lTimeOut ); +eMBMasterReqErrCode +eMBMasterReqReadCoils( UCHAR ucSndAddr, USHORT usCoilAddr, USHORT usNCoils, LONG lTimeOut ); +eMBMasterReqErrCode +eMBMasterReqWriteCoil( UCHAR ucSndAddr, USHORT usCoilAddr, USHORT usCoilData, LONG lTimeOut ); +eMBMasterReqErrCode +eMBMasterReqWriteMultipleCoils( UCHAR ucSndAddr, + USHORT usCoilAddr, USHORT usNCoils, UCHAR * pucDataBuffer, LONG lTimeOut ); +eMBMasterReqErrCode +eMBMasterReqReadDiscreteInputs( UCHAR ucSndAddr, USHORT usDiscreteAddr, USHORT usNDiscreteIn, LONG lTimeOut ); + +eMBException +eMBMasterFuncReportSlaveID( UCHAR * pucFrame, USHORT * usLen ); +eMBException +eMBMasterFuncReadInputRegister( UCHAR * pucFrame, USHORT * usLen ); +eMBException +eMBMasterFuncReadHoldingRegister( UCHAR * pucFrame, USHORT * usLen ); +eMBException +eMBMasterFuncWriteHoldingRegister( UCHAR * pucFrame, USHORT * usLen ); +eMBException +eMBMasterFuncWriteMultipleHoldingRegister( UCHAR * pucFrame, USHORT * usLen ); +eMBException +eMBMasterFuncReadCoils( UCHAR * pucFrame, USHORT * usLen ); +eMBException +eMBMasterFuncWriteCoil( UCHAR * pucFrame, USHORT * usLen ); +eMBException +eMBMasterFuncWriteMultipleCoils( UCHAR * pucFrame, USHORT * usLen ); +eMBException +eMBMasterFuncReadDiscreteInputs( UCHAR * pucFrame, USHORT * usLen ); +eMBException +eMBMasterFuncReadWriteMultipleHoldingRegister( UCHAR * pucFrame, USHORT * usLen ); + +/*! \ingroup modbus + *\brief These functions are interface for Modbus Master + */ +void vMBMasterGetPDUSndBuf( UCHAR ** pucFrame ); +UCHAR ucMBMasterGetDestAddress( void ); +void vMBMasterSetDestAddress( UCHAR Address ); +BOOL xMBMasterGetCBRunInMasterMode( void ); +void vMBMasterSetCBRunInMasterMode( BOOL IsMasterMode ); +USHORT usMBMasterGetPDUSndLength( void ); +void vMBMasterSetPDUSndLength( USHORT SendPDULength ); +void vMBMasterSetCurTimerMode( eMBMasterTimerMode eMBTimerMode ); +BOOL xMBMasterRequestIsBroadcast( void ); +eMBMasterErrorEventType eMBMasterGetErrorType( void ); +void vMBMasterSetErrorType( eMBMasterErrorEventType errorType ); +eMBMasterReqErrCode eMBMasterWaitRequestFinish( void ); + +/* ----------------------- Callback -----------------------------------------*/ + +#ifdef __cplusplus +PR_END_EXTERN_C +#endif +#endif diff --git a/HardWare/FreeModbus/modbus/include/mbconfig.h b/HardWare/FreeModbus/modbus/include/mbconfig.h new file mode 100644 index 0000000..10a8c25 --- /dev/null +++ b/HardWare/FreeModbus/modbus/include/mbconfig.h @@ -0,0 +1,124 @@ +/* + * FreeModbus Libary: A portable Modbus implementation for Modbus ASCII/RTU. + * Copyright (c) 2006-2018 Christian Walter + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * File: $Id: mbconfig.h,v 1.14 2006/12/07 22:10:34 wolti Exp $ + * $Id: mbconfig.h,v 1.60 2013/08/13 21:19:55 Armink Add Master Functions $ + */ + +#ifndef _MB_CONFIG_H +#define _MB_CONFIG_H + +#ifdef __cplusplus +PR_BEGIN_EXTERN_C +#endif +/* ----------------------- Defines ------------------------------------------*/ +/*! \defgroup modbus_cfg Modbus Configuration + * + * Most modules in the protocol stack are completly optional and can be + * excluded. This is specially important if target resources are very small + * and program memory space should be saved.
+ * + * All of these settings are available in the file mbconfig.h + */ +/*! \addtogroup modbus_cfg + * @{ + */ +/*! \brief If Modbus Master ASCII support is enabled. */ +#define MB_MASTER_ASCII_ENABLED (0) +/*! \brief If Modbus Master RTU support is enabled. */ +#define MB_MASTER_RTU_ENABLED (1) +/*! \brief If Modbus Master TCP support is enabled. */ +#define MB_MASTER_TCP_ENABLED (0) +/*! \brief If Modbus Slave ASCII support is enabled. */ +#define MB_SLAVE_ASCII_ENABLED (0) +/*! \brief If Modbus Slave RTU support is enabled. */ +#define MB_SLAVE_RTU_ENABLED (1) +/*! \brief If Modbus Slave TCP support is enabled. */ +#define MB_SLAVE_TCP_ENABLED (0) +/*! \brief The character timeout value for Modbus ASCII. + * + * The character timeout value is not fixed for Modbus ASCII and is therefore + * a configuration option. It should be set to the maximum expected delay + * time of the network. + */ +#define MB_ASCII_TIMEOUT_SEC (1) +/*! \brief Maximum number of Modbus functions codes the protocol stack + * should support. + * + * The maximum number of supported Modbus functions must be greater than + * the sum of all enabled functions in this file and custom function + * handlers. If set to small adding more functions will fail. + */ +#define MB_FUNC_HANDLERS_MAX (16) +/*! \brief Number of bytes which should be allocated for the Report Slave ID + * command. + * + * This number limits the maximum size of the additional segment in the + * report slave id function. See eMBSetSlaveID( ) for more information on + * how to set this value. It is only used if MB_FUNC_OTHER_REP_SLAVEID_ENABLED + * is set to 1. + */ +#define MB_FUNC_OTHER_REP_SLAVEID_BUF (32) +/*! \brief If the Report Slave ID function should be enabled. */ +#define MB_FUNC_OTHER_REP_SLAVEID_ENABLED (1) +/*! \brief If the Read Input Registers function should be enabled. */ +#define MB_FUNC_READ_INPUT_ENABLED (1) +/*! \brief If the Read Holding Registers function should be enabled. */ +#define MB_FUNC_READ_HOLDING_ENABLED (1) +/*! \brief If the Write Single Register function should be enabled. */ +#define MB_FUNC_WRITE_HOLDING_ENABLED (1) +/*! \brief If the Write Multiple registers function should be enabled. */ +#define MB_FUNC_WRITE_MULTIPLE_HOLDING_ENABLED (1) +/*! \brief If the Read Coils function should be enabled. */ +#define MB_FUNC_READ_COILS_ENABLED (1) +/*! \brief If the Write Coils function should be enabled. */ +#define MB_FUNC_WRITE_COIL_ENABLED (1) +/*! \brief If the Write Multiple Coils function should be enabled. */ +#define MB_FUNC_WRITE_MULTIPLE_COILS_ENABLED (1) +/*! \brief If the Read Discrete Inputs function should be enabled. */ +#define MB_FUNC_READ_DISCRETE_INPUTS_ENABLED (1) +/*! \brief If the Read/Write Multiple Registers function should be enabled. */ +#define MB_FUNC_READWRITE_HOLDING_ENABLED (1) +/*! @} */ +#ifdef __cplusplus +PR_END_EXTERN_C +#endif + +#if MB_MASTER_RTU_ENABLED > 0 || MB_MASTER_ASCII_ENABLED > 0 +/*! \brief If master send a broadcast frame,the master will wait time of convert to delay, + * then master can send other frame */ +#define MB_MASTER_DELAY_MS_CONVERT (200) +/*! \brief If master send a frame which is not broadcast,the master will wait sometime for slave. + * And if slave is not respond in this time,the master will process this timeout error. + * Then master can send other frame */ +#define MB_MASTER_TIMEOUT_MS_RESPOND (100) +/*! \brief The total slaves in Modbus Master system. Default 16. + * \note : The slave ID must be continuous from 1.*/ +#define MB_MASTER_TOTAL_SLAVE_NUM (16) +#endif + +#endif diff --git a/HardWare/FreeModbus/modbus/include/mbframe.h b/HardWare/FreeModbus/modbus/include/mbframe.h new file mode 100644 index 0000000..e20c573 --- /dev/null +++ b/HardWare/FreeModbus/modbus/include/mbframe.h @@ -0,0 +1,87 @@ +/* + * FreeModbus Libary: A portable Modbus implementation for Modbus ASCII/RTU. + * Copyright (c) 2006-2018 Christian Walter + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * File: $Id: mbframe.h,v 1.9 2006/12/07 22:10:34 wolti Exp $ + */ + +#ifndef _MB_FRAME_H +#define _MB_FRAME_H + +#ifdef __cplusplus +PR_BEGIN_EXTERN_C +#endif + +/*! + * Constants which defines the format of a modbus frame. The example is + * shown for a Modbus RTU/ASCII frame. Note that the Modbus PDU is not + * dependent on the underlying transport. + * + * + * <------------------------ MODBUS SERIAL LINE PDU (1) -------------------> + * <----------- MODBUS PDU (1') ----------------> + * +-----------+---------------+----------------------------+-------------+ + * | Address | Function Code | Data | CRC/LRC | + * +-----------+---------------+----------------------------+-------------+ + * | | | | + * (2) (3/2') (3') (4) + * + * (1) ... MB_SER_PDU_SIZE_MAX = 256 + * (2) ... MB_SER_PDU_ADDR_OFF = 0 + * (3) ... MB_SER_PDU_PDU_OFF = 1 + * (4) ... MB_SER_PDU_SIZE_CRC = 2 + * + * (1') ... MB_PDU_SIZE_MAX = 253 + * (2') ... MB_PDU_FUNC_OFF = 0 + * (3') ... MB_PDU_DATA_OFF = 1 + * + */ + +/* ----------------------- Defines ------------------------------------------*/ +#define MB_PDU_SIZE_MAX 253 /*!< Maximum size of a PDU. */ +#define MB_PDU_SIZE_MIN 1 /*!< Function Code */ +#define MB_PDU_FUNC_OFF 0 /*!< Offset of function code in PDU. */ +#define MB_PDU_DATA_OFF 1 /*!< Offset for response data in PDU. */ + +/* ----------------------- Prototypes 0-------------------------------------*/ +typedef void ( *pvMBFrameStart ) ( void ); + +typedef void ( *pvMBFrameStop ) ( void ); + +typedef eMBErrorCode( *peMBFrameReceive ) ( UCHAR * pucRcvAddress, + UCHAR ** pucFrame, + USHORT * pusLength ); + +typedef eMBErrorCode( *peMBFrameSend ) ( UCHAR slaveAddress, + const UCHAR * pucFrame, + USHORT usLength ); + +typedef void( *pvMBFrameClose ) ( void ); + +#ifdef __cplusplus +PR_END_EXTERN_C +#endif +#endif diff --git a/HardWare/FreeModbus/modbus/include/mbfunc.h b/HardWare/FreeModbus/modbus/include/mbfunc.h new file mode 100644 index 0000000..f252413 --- /dev/null +++ b/HardWare/FreeModbus/modbus/include/mbfunc.h @@ -0,0 +1,80 @@ +/* + * FreeModbus Libary: A portable Modbus implementation for Modbus ASCII/RTU. + * Copyright (c) 2006-2018 Christian Walter + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * File: $Id: mbfunc.h,v 1.12 2006/12/07 22:10:34 wolti Exp $ + */ + +#ifndef _MB_FUNC_H +#define _MB_FUNC_H + +#ifdef __cplusplus +PR_BEGIN_EXTERN_C +#endif +#if MB_FUNC_OTHER_REP_SLAVEID_BUF > 0 +eMBException eMBFuncReportSlaveID( UCHAR * pucFrame, USHORT * usLen ); +#endif + +#if MB_FUNC_READ_INPUT_ENABLED > 0 +eMBException eMBFuncReadInputRegister( UCHAR * pucFrame, USHORT * usLen ); +#endif + +#if MB_FUNC_READ_HOLDING_ENABLED > 0 +eMBException eMBFuncReadHoldingRegister( UCHAR * pucFrame, USHORT * usLen ); +#endif + +#if MB_FUNC_WRITE_HOLDING_ENABLED > 0 +eMBException eMBFuncWriteHoldingRegister( UCHAR * pucFrame, USHORT * usLen ); +#endif + +#if MB_FUNC_WRITE_MULTIPLE_HOLDING_ENABLED > 0 +eMBException eMBFuncWriteMultipleHoldingRegister( UCHAR * pucFrame, USHORT * usLen ); +#endif + +#if MB_FUNC_READ_COILS_ENABLED > 0 +eMBException eMBFuncReadCoils( UCHAR * pucFrame, USHORT * usLen ); +#endif + +#if MB_FUNC_WRITE_COIL_ENABLED > 0 +eMBException eMBFuncWriteCoil( UCHAR * pucFrame, USHORT * usLen ); +#endif + +#if MB_FUNC_WRITE_MULTIPLE_COILS_ENABLED > 0 +eMBException eMBFuncWriteMultipleCoils( UCHAR * pucFrame, USHORT * usLen ); +#endif + +#if MB_FUNC_READ_DISCRETE_INPUTS_ENABLED > 0 +eMBException eMBFuncReadDiscreteInputs( UCHAR * pucFrame, USHORT * usLen ); +#endif + +#if MB_FUNC_READWRITE_HOLDING_ENABLED > 0 +eMBException eMBFuncReadWriteMultipleHoldingRegister( UCHAR * pucFrame, USHORT * usLen ); +#endif + +#ifdef __cplusplus +PR_END_EXTERN_C +#endif +#endif diff --git a/HardWare/FreeModbus/modbus/include/mbport.h b/HardWare/FreeModbus/modbus/include/mbport.h new file mode 100644 index 0000000..84de683 --- /dev/null +++ b/HardWare/FreeModbus/modbus/include/mbport.h @@ -0,0 +1,204 @@ +/* + * FreeModbus Libary: A portable Modbus implementation for Modbus ASCII/RTU. + * Copyright (c) 2006-2018 Christian Walter + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * File: $Id: mbport.h,v 1.17 2006/12/07 22:10:34 wolti Exp $ + * mbport.h,v 1.60 2013/08/17 11:42:56 Armink Add Master Functions $ + */ + +#ifndef _MB_PORT_H +#define _MB_PORT_H + +#ifdef __cplusplus +PR_BEGIN_EXTERN_C +#endif + +/* ----------------------- Defines ------------------------------------------*/ + +/* ----------------------- Type definitions ---------------------------------*/ + +typedef enum +{ + EV_READY = 1<<0, /*!< Startup finished. */ + EV_FRAME_RECEIVED = 1<<1, /*!< Frame received. */ + EV_EXECUTE = 1<<2, /*!< Execute function. */ + EV_FRAME_SENT = 1<<3 /*!< Frame sent. */ +} eMBEventType; +typedef enum +{ + EV_MASTER_READY = 1<<0, /*!< Startup finished. */ + EV_MASTER_FRAME_RECEIVED = 1<<1, /*!< Frame received. */ + EV_MASTER_EXECUTE = 1<<2, /*!< Execute function. */ + EV_MASTER_FRAME_SENT = 1<<3, /*!< Frame sent. */ + EV_MASTER_ERROR_PROCESS = 1<<4, /*!< Frame error process. */ + EV_MASTER_PROCESS_SUCESS = 1<<5, /*!< Request process success. */ + EV_MASTER_ERROR_RESPOND_TIMEOUT = 1<<6, /*!< Request respond timeout. */ + EV_MASTER_ERROR_RECEIVE_DATA = 1<<7, /*!< Request receive data error. */ + EV_MASTER_ERROR_EXECUTE_FUNCTION = 1<<8, /*!< Request execute function error. */ +} eMBMasterEventType; + +typedef enum +{ + EV_ERROR_RESPOND_TIMEOUT, /*!< Slave respond timeout. */ + EV_ERROR_RECEIVE_DATA, /*!< Receive frame data erroe. */ + EV_ERROR_EXECUTE_FUNCTION, /*!< Execute function error. */ +} eMBMasterErrorEventType; + +/*! \ingroup modbus + * \brief Parity used for characters in serial mode. + * + * The parity which should be applied to the characters sent over the serial + * link. Please note that this values are actually passed to the porting + * layer and therefore not all parity modes might be available. + */ +typedef enum +{ + MB_PAR_NONE, /*!< No parity. */ + MB_PAR_ODD, /*!< Odd parity. */ + MB_PAR_EVEN /*!< Even parity. */ +} eMBParity; + +/* ----------------------- Supporting functions -----------------------------*/ +BOOL xMBPortEventInit( void ); + +BOOL xMBPortEventPost( eMBEventType eEvent ); + +BOOL xMBPortEventGet( /*@out@ */ eMBEventType * eEvent ); + +BOOL xMBMasterPortEventInit( void ); + +BOOL xMBMasterPortEventPost( eMBMasterEventType eEvent ); + +BOOL xMBMasterPortEventGet( /*@out@ */ eMBMasterEventType * eEvent ); + +void vMBMasterOsResInit( void ); + +BOOL xMBMasterRunResTake( int32_t time ); + +void vMBMasterRunResRelease( void ); + +/* ----------------------- Serial port functions ----------------------------*/ + +BOOL xMBPortSerialInit( UCHAR ucPort, ULONG ulBaudRate, + UCHAR ucDataBits, eMBParity eParity ); + +void vMBPortClose( void ); + +void xMBPortSerialClose( void ); + +void vMBPortSerialEnable( BOOL xRxEnable, BOOL xTxEnable ); + +INLINE BOOL xMBPortSerialGetByte( CHAR * pucByte ); + +INLINE BOOL xMBPortSerialPutByte( CHAR ucByte ); + +BOOL xMBMasterPortSerialInit( UCHAR ucPort, ULONG ulBaudRate, + UCHAR ucDataBits, eMBParity eParity ); + +void vMBMasterPortClose( void ); + +void xMBMasterPortSerialClose( void ); + +void vMBMasterPortSerialEnable( BOOL xRxEnable, BOOL xTxEnable ); + +INLINE BOOL xMBMasterPortSerialGetByte( CHAR * pucByte ); + +INLINE BOOL xMBMasterPortSerialPutByte( CHAR ucByte ); + +/* ----------------------- Timers functions ---------------------------------*/ +BOOL xMBPortTimersInit( USHORT usTimeOut50us ); + +void xMBPortTimersClose( void ); + +INLINE void vMBPortTimersEnable( void ); + +INLINE void vMBPortTimersDisable( void ); + +BOOL xMBMasterPortTimersInit( USHORT usTimeOut50us ); + +void xMBMasterPortTimersClose( void ); + +INLINE void vMBMasterPortTimersT35Enable( void ); + +INLINE void vMBMasterPortTimersConvertDelayEnable( void ); + +INLINE void vMBMasterPortTimersRespondTimeoutEnable( void ); + +INLINE void vMBMasterPortTimersDisable( void ); + +/* ----------------- Callback for the master error process ------------------*/ +void vMBMasterErrorCBRespondTimeout( UCHAR ucDestAddress, const UCHAR* pucPDUData, + USHORT ucPDULength ); + +void vMBMasterErrorCBReceiveData( UCHAR ucDestAddress, const UCHAR* pucPDUData, + USHORT ucPDULength ); + +void vMBMasterErrorCBExecuteFunction( UCHAR ucDestAddress, const UCHAR* pucPDUData, + USHORT ucPDULength ); + +void vMBMasterCBRequestScuuess( void ); + +/* ----------------------- Callback for the protocol stack ------------------*/ + +/*! + * \brief Callback function for the porting layer when a new byte is + * available. + * + * Depending upon the mode this callback function is used by the RTU or + * ASCII transmission layers. In any case a call to xMBPortSerialGetByte() + * must immediately return a new character. + * + * \return TRUE if a event was posted to the queue because + * a new byte was received. The port implementation should wake up the + * tasks which are currently blocked on the eventqueue. + */ +extern BOOL( *pxMBFrameCBByteReceived ) ( void ); + +extern BOOL( *pxMBFrameCBTransmitterEmpty ) ( void ); + +extern BOOL( *pxMBPortCBTimerExpired ) ( void ); + +extern BOOL( *pxMBMasterFrameCBByteReceived ) ( void ); + +extern BOOL( *pxMBMasterFrameCBTransmitterEmpty ) ( void ); + +extern BOOL( *pxMBMasterPortCBTimerExpired ) ( void ); + +/* ----------------------- TCP port functions -------------------------------*/ +BOOL xMBTCPPortInit( USHORT usTCPPort ); + +void vMBTCPPortClose( void ); + +void vMBTCPPortDisable( void ); + +BOOL xMBTCPPortGetRequest( UCHAR **ppucMBTCPFrame, USHORT * usTCPLength ); + +BOOL xMBTCPPortSendResponse( const UCHAR *pucMBTCPFrame, USHORT usTCPLength ); + +#ifdef __cplusplus +PR_END_EXTERN_C +#endif +#endif diff --git a/HardWare/FreeModbus/modbus/include/mbproto.h b/HardWare/FreeModbus/modbus/include/mbproto.h new file mode 100644 index 0000000..aef3198 --- /dev/null +++ b/HardWare/FreeModbus/modbus/include/mbproto.h @@ -0,0 +1,83 @@ +/* + * FreeModbus Libary: A portable Modbus implementation for Modbus ASCII/RTU. + * Copyright (c) 2006-2018 Christian Walter + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * File: $Id: mbproto.h,v 1.14 2006/12/07 22:10:34 wolti Exp $ + */ + +#ifndef _MB_PROTO_H +#define _MB_PROTO_H + +#ifdef __cplusplus +PR_BEGIN_EXTERN_C +#endif +/* ----------------------- Defines ------------------------------------------*/ +#define MB_ADDRESS_BROADCAST ( 0 ) /*! Modbus broadcast address. */ +#define MB_ADDRESS_MIN ( 1 ) /*! Smallest possible slave address. */ +#define MB_ADDRESS_MAX ( 247 ) /*! Biggest possible slave address. */ +#define MB_FUNC_NONE ( 0 ) +#define MB_FUNC_READ_COILS ( 1 ) +#define MB_FUNC_READ_DISCRETE_INPUTS ( 2 ) +#define MB_FUNC_WRITE_SINGLE_COIL ( 5 ) +#define MB_FUNC_WRITE_MULTIPLE_COILS ( 15 ) +#define MB_FUNC_READ_HOLDING_REGISTER ( 3 ) +#define MB_FUNC_READ_INPUT_REGISTER ( 4 ) +#define MB_FUNC_WRITE_REGISTER ( 6 ) +#define MB_FUNC_WRITE_MULTIPLE_REGISTERS ( 16 ) +#define MB_FUNC_READWRITE_MULTIPLE_REGISTERS ( 23 ) +#define MB_FUNC_DIAG_READ_EXCEPTION ( 7 ) +#define MB_FUNC_DIAG_DIAGNOSTIC ( 8 ) +#define MB_FUNC_DIAG_GET_COM_EVENT_CNT ( 11 ) +#define MB_FUNC_DIAG_GET_COM_EVENT_LOG ( 12 ) +#define MB_FUNC_OTHER_REPORT_SLAVEID ( 17 ) +#define MB_FUNC_ERROR ( 128 ) +/* ----------------------- Type definitions ---------------------------------*/ + typedef enum +{ + MB_EX_NONE = 0x00, + MB_EX_ILLEGAL_FUNCTION = 0x01, + MB_EX_ILLEGAL_DATA_ADDRESS = 0x02, + MB_EX_ILLEGAL_DATA_VALUE = 0x03, + MB_EX_SLAVE_DEVICE_FAILURE = 0x04, + MB_EX_ACKNOWLEDGE = 0x05, + MB_EX_SLAVE_BUSY = 0x06, + MB_EX_MEMORY_PARITY_ERROR = 0x08, + MB_EX_GATEWAY_PATH_FAILED = 0x0A, + MB_EX_GATEWAY_TGT_FAILED = 0x0B +} eMBException; + +typedef eMBException( *pxMBFunctionHandler ) ( UCHAR * pucFrame, USHORT * pusLength ); + +typedef struct +{ + UCHAR ucFunctionCode; + pxMBFunctionHandler pxHandler; +} xMBFunctionHandler; + +#ifdef __cplusplus +PR_END_EXTERN_C +#endif +#endif diff --git a/HardWare/FreeModbus/modbus/include/mbutils.h b/HardWare/FreeModbus/modbus/include/mbutils.h new file mode 100644 index 0000000..a504303 --- /dev/null +++ b/HardWare/FreeModbus/modbus/include/mbutils.h @@ -0,0 +1,108 @@ +/* + * FreeModbus Libary: A portable Modbus implementation for Modbus ASCII/RTU. + * Copyright (c) 2006-2018 Christian Walter + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * File: $Id: mbutils.h,v 1.5 2006/12/07 22:10:34 wolti Exp $ + */ + +#ifndef _MB_UTILS_H +#define _MB_UTILS_H + +#ifdef __cplusplus +PR_BEGIN_EXTERN_C +#endif +/*! \defgroup modbus_utils Utilities + * + * This module contains some utility functions which can be used by + * the application. It includes some special functions for working with + * bitfields backed by a character array buffer. + * + */ +/*! \addtogroup modbus_utils + * @{ + */ +/*! \brief Function to set bits in a byte buffer. + * + * This function allows the efficient use of an array to implement bitfields. + * The array used for storing the bits must always be a multiple of two + * bytes. Up to eight bits can be set or cleared in one operation. + * + * \param ucByteBuf A buffer where the bit values are stored. Must be a + * multiple of 2 bytes. No length checking is performed and if + * usBitOffset / 8 is greater than the size of the buffer memory contents + * is overwritten. + * \param usBitOffset The starting address of the bits to set. The first + * bit has the offset 0. + * \param ucNBits Number of bits to modify. The value must always be smaller + * than 8. + * \param ucValues Thew new values for the bits. The value for the first bit + * starting at usBitOffset is the LSB of the value + * ucValues + * + * \code + * ucBits[2] = {0, 0}; + * + * // Set bit 4 to 1 (read: set 1 bit starting at bit offset 4 to value 1) + * xMBUtilSetBits( ucBits, 4, 1, 1 ); + * + * // Set bit 7 to 1 and bit 8 to 0. + * xMBUtilSetBits( ucBits, 7, 2, 0x01 ); + * + * // Set bits 8 - 11 to 0x05 and bits 12 - 15 to 0x0A; + * xMBUtilSetBits( ucBits, 8, 8, 0x5A); + * \endcode + */ +void xMBUtilSetBits( UCHAR * ucByteBuf, USHORT usBitOffset, + UCHAR ucNBits, UCHAR ucValues ); + +/*! \brief Function to read bits in a byte buffer. + * + * This function is used to extract up bit values from an array. Up to eight + * bit values can be extracted in one step. + * + * \param ucByteBuf A buffer where the bit values are stored. + * \param usBitOffset The starting address of the bits to set. The first + * bit has the offset 0. + * \param ucNBits Number of bits to modify. The value must always be smaller + * than 8. + * + * \code + * UCHAR ucBits[2] = {0, 0}; + * UCHAR ucResult; + * + * // Extract the bits 3 - 10. + * ucResult = xMBUtilGetBits( ucBits, 3, 8 ); + * \endcode + */ +UCHAR xMBUtilGetBits( UCHAR * ucByteBuf, USHORT usBitOffset, + UCHAR ucNBits ); + +/*! @} */ + +#ifdef __cplusplus +PR_END_EXTERN_C +#endif +#endif diff --git a/HardWare/FreeModbus/modbus/mb.c b/HardWare/FreeModbus/modbus/mb.c new file mode 100644 index 0000000..a2c5e81 --- /dev/null +++ b/HardWare/FreeModbus/modbus/mb.c @@ -0,0 +1,412 @@ +/* + * FreeModbus Libary: A portable Modbus implementation for Modbus ASCII/RTU. + * Copyright (c) 2006-2018 Christian Walter + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * File: $Id: mb.c,v 1.27 2007/02/18 23:45:41 wolti Exp $ + */ + +/* ----------------------- System includes ----------------------------------*/ +#include "stdlib.h" +#include "string.h" + +/* ----------------------- Platform includes --------------------------------*/ +#include "port.h" + +/* ----------------------- Modbus includes ----------------------------------*/ + +#include "mb.h" +#include "mbconfig.h" +#include "mbframe.h" +#include "mbproto.h" +#include "mbfunc.h" + +#include "mbport.h" +#if MB_SLAVE_RTU_ENABLED == 1 +#include "mbrtu.h" +#endif +#if MB_SLAVE_ASCII_ENABLED == 1 +#include "mbascii.h" +#endif +#if MB_SLAVE_TCP_ENABLED == 1 +#include "mbtcp.h" +#endif + +#ifndef MB_PORT_HAS_CLOSE +#define MB_PORT_HAS_CLOSE 0 +#endif + +/* ----------------------- Static variables ---------------------------------*/ + +static UCHAR ucMBAddress; +static eMBMode eMBCurrentMode; + +static enum +{ + STATE_ENABLED, + STATE_DISABLED, + STATE_NOT_INITIALIZED +} eMBState = STATE_NOT_INITIALIZED; + +/* Functions pointer which are initialized in eMBInit( ). Depending on the + * mode (RTU or ASCII) the are set to the correct implementations. + * Using for Modbus Slave + */ +static peMBFrameSend peMBFrameSendCur; +static pvMBFrameStart pvMBFrameStartCur; +static pvMBFrameStop pvMBFrameStopCur; +static peMBFrameReceive peMBFrameReceiveCur; +static pvMBFrameClose pvMBFrameCloseCur; + +/* Callback functions required by the porting layer. They are called when + * an external event has happend which includes a timeout or the reception + * or transmission of a character. + * Using for Modbus Slave + */ +BOOL( *pxMBFrameCBByteReceived ) ( void ); +BOOL( *pxMBFrameCBTransmitterEmpty ) ( void ); +BOOL( *pxMBPortCBTimerExpired ) ( void ); + +BOOL( *pxMBFrameCBReceiveFSMCur ) ( void ); +BOOL( *pxMBFrameCBTransmitFSMCur ) ( void ); + +/* An array of Modbus functions handlers which associates Modbus function + * codes with implementing functions. + */ +static xMBFunctionHandler xFuncHandlers[MB_FUNC_HANDLERS_MAX] = { +#if MB_FUNC_OTHER_REP_SLAVEID_ENABLED > 0 + {MB_FUNC_OTHER_REPORT_SLAVEID, eMBFuncReportSlaveID}, +#endif +#if MB_FUNC_READ_INPUT_ENABLED > 0 + {MB_FUNC_READ_INPUT_REGISTER, eMBFuncReadInputRegister}, +#endif +#if MB_FUNC_READ_HOLDING_ENABLED > 0 + {MB_FUNC_READ_HOLDING_REGISTER, eMBFuncReadHoldingRegister}, +#endif +#if MB_FUNC_WRITE_MULTIPLE_HOLDING_ENABLED > 0 + {MB_FUNC_WRITE_MULTIPLE_REGISTERS, eMBFuncWriteMultipleHoldingRegister}, +#endif +#if MB_FUNC_WRITE_HOLDING_ENABLED > 0 + {MB_FUNC_WRITE_REGISTER, eMBFuncWriteHoldingRegister}, +#endif +#if MB_FUNC_READWRITE_HOLDING_ENABLED > 0 + {MB_FUNC_READWRITE_MULTIPLE_REGISTERS, eMBFuncReadWriteMultipleHoldingRegister}, +#endif +#if MB_FUNC_READ_COILS_ENABLED > 0 + {MB_FUNC_READ_COILS, eMBFuncReadCoils}, +#endif +#if MB_FUNC_WRITE_COIL_ENABLED > 0 + {MB_FUNC_WRITE_SINGLE_COIL, eMBFuncWriteCoil}, +#endif +#if MB_FUNC_WRITE_MULTIPLE_COILS_ENABLED > 0 + {MB_FUNC_WRITE_MULTIPLE_COILS, eMBFuncWriteMultipleCoils}, +#endif +#if MB_FUNC_READ_DISCRETE_INPUTS_ENABLED > 0 + {MB_FUNC_READ_DISCRETE_INPUTS, eMBFuncReadDiscreteInputs}, +#endif +}; + +/* ----------------------- Start implementation -----------------------------*/ +eMBErrorCode +eMBInit( eMBMode eMode, UCHAR ucSlaveAddress, UCHAR ucPort, ULONG ulBaudRate, eMBParity eParity ) +{ + eMBErrorCode eStatus = MB_ENOERR; + + /* check preconditions */ + if( ( ucSlaveAddress == MB_ADDRESS_BROADCAST ) || + ( ucSlaveAddress < MB_ADDRESS_MIN ) || ( ucSlaveAddress > MB_ADDRESS_MAX ) ) + { + eStatus = MB_EINVAL; + } + else + { + ucMBAddress = ucSlaveAddress; + + switch ( eMode ) + { +#if MB_SLAVE_RTU_ENABLED > 0 + case MB_RTU: + pvMBFrameStartCur = eMBRTUStart; + pvMBFrameStopCur = eMBRTUStop; + peMBFrameSendCur = eMBRTUSend; + peMBFrameReceiveCur = eMBRTUReceive; + pvMBFrameCloseCur = MB_PORT_HAS_CLOSE ? vMBPortClose : NULL; + pxMBFrameCBByteReceived = xMBRTUReceiveFSM; + pxMBFrameCBTransmitterEmpty = xMBRTUTransmitFSM; + pxMBPortCBTimerExpired = xMBRTUTimerT35Expired; + + eStatus = eMBRTUInit( ucMBAddress, ucPort, ulBaudRate, eParity ); + break; +#endif +#if MB_SLAVE_ASCII_ENABLED > 0 + case MB_ASCII: + pvMBFrameStartCur = eMBASCIIStart; + pvMBFrameStopCur = eMBASCIIStop; + peMBFrameSendCur = eMBASCIISend; + peMBFrameReceiveCur = eMBASCIIReceive; + pvMBFrameCloseCur = MB_PORT_HAS_CLOSE ? vMBPortClose : NULL; + pxMBFrameCBByteReceived = xMBASCIIReceiveFSM; + pxMBFrameCBTransmitterEmpty = xMBASCIITransmitFSM; + pxMBPortCBTimerExpired = xMBASCIITimerT1SExpired; + + eStatus = eMBASCIIInit( ucMBAddress, ucPort, ulBaudRate, eParity ); + break; +#endif + default: + eStatus = MB_EINVAL; + break; + } + + if( eStatus == MB_ENOERR ) + { + if( !xMBPortEventInit( ) ) + { + /* port dependent event module initalization failed. */ + eStatus = MB_EPORTERR; + } + else + { + eMBCurrentMode = eMode; + eMBState = STATE_DISABLED; + } + } + } + return eStatus; +} + +#if MB_SLAVE_TCP_ENABLED > 0 +eMBErrorCode +eMBTCPInit( USHORT ucTCPPort ) +{ + eMBErrorCode eStatus = MB_ENOERR; + + if( ( eStatus = eMBTCPDoInit( ucTCPPort ) ) != MB_ENOERR ) + { + eMBState = STATE_DISABLED; + } + else if( !xMBPortEventInit( ) ) + { + /* Port dependent event module initalization failed. */ + eStatus = MB_EPORTERR; + } + else + { + pvMBFrameStartCur = eMBTCPStart; + pvMBFrameStopCur = eMBTCPStop; + peMBFrameReceiveCur = eMBTCPReceive; + peMBFrameSendCur = eMBTCPSend; + pvMBFrameCloseCur = MB_PORT_HAS_CLOSE ? vMBTCPPortClose : NULL; + ucMBAddress = MB_TCP_PSEUDO_ADDRESS; + eMBCurrentMode = MB_TCP; + eMBState = STATE_DISABLED; + } + return eStatus; +} +#endif + +eMBErrorCode +eMBRegisterCB( UCHAR ucFunctionCode, pxMBFunctionHandler pxHandler ) +{ + int i; + eMBErrorCode eStatus; + + if( ( 0 < ucFunctionCode ) && ( ucFunctionCode <= 127 ) ) + { + ENTER_CRITICAL_SECTION( ); + if( pxHandler != NULL ) + { + for( i = 0; i < MB_FUNC_HANDLERS_MAX; i++ ) + { + if( ( xFuncHandlers[i].pxHandler == NULL ) || + ( xFuncHandlers[i].pxHandler == pxHandler ) ) + { + xFuncHandlers[i].ucFunctionCode = ucFunctionCode; + xFuncHandlers[i].pxHandler = pxHandler; + break; + } + } + eStatus = ( i != MB_FUNC_HANDLERS_MAX ) ? MB_ENOERR : MB_ENORES; + } + else + { + for( i = 0; i < MB_FUNC_HANDLERS_MAX; i++ ) + { + if( xFuncHandlers[i].ucFunctionCode == ucFunctionCode ) + { + xFuncHandlers[i].ucFunctionCode = 0; + xFuncHandlers[i].pxHandler = NULL; + break; + } + } + /* Remove can't fail. */ + eStatus = MB_ENOERR; + } + EXIT_CRITICAL_SECTION( ); + } + else + { + eStatus = MB_EINVAL; + } + return eStatus; +} + + +eMBErrorCode +eMBClose( void ) +{ + eMBErrorCode eStatus = MB_ENOERR; + + if( eMBState == STATE_DISABLED ) + { + if( pvMBFrameCloseCur != NULL ) + { + pvMBFrameCloseCur( ); + } + } + else + { + eStatus = MB_EILLSTATE; + } + return eStatus; +} + + +eMBErrorCode +eMBEnable( void ) +{ + eMBErrorCode eStatus = MB_ENOERR; + + if( eMBState == STATE_DISABLED ) + { + /* Activate the protocol stack. */ + pvMBFrameStartCur( ); + eMBState = STATE_ENABLED; + } + else + { + eStatus = MB_EILLSTATE; + } + return eStatus; +} + +eMBErrorCode +eMBDisable( void ) +{ + eMBErrorCode eStatus; + + if( eMBState == STATE_ENABLED ) + { + pvMBFrameStopCur( ); + eMBState = STATE_DISABLED; + eStatus = MB_ENOERR; + } + else if( eMBState == STATE_DISABLED ) + { + eStatus = MB_ENOERR; + } + else + { + eStatus = MB_EILLSTATE; + } + return eStatus; +} + +eMBErrorCode eMBPoll( void ) +{ + static UCHAR *ucMBFrame; + static UCHAR ucRcvAddress; + static UCHAR ucFunctionCode; + static USHORT usLength; + static eMBException eException; + + int i; + eMBErrorCode eStatus = MB_ENOERR; + eMBEventType eEvent; + + /* Check if the protocol stack is ready. */ + if( eMBState != STATE_ENABLED ) + { + return MB_EILLSTATE; + } + + /* Check if there is a event available. If not return control to caller. + * Otherwise we will handle the event. */ + if( xMBPortEventGet( &eEvent ) == TRUE ) + { + switch ( eEvent ) + { + case EV_READY: + break; + + case EV_FRAME_RECEIVED: + eStatus = peMBFrameReceiveCur( &ucRcvAddress, &ucMBFrame, &usLength ); + if( eStatus == MB_ENOERR ) + { + /* Check if the frame is for us. If not ignore the frame. */ + if( ( ucRcvAddress == ucMBAddress ) || ( ucRcvAddress == MB_ADDRESS_BROADCAST ) ) + { + ( void )xMBPortEventPost( EV_EXECUTE ); + } + } + break; + + case EV_EXECUTE: + ucFunctionCode = ucMBFrame[MB_PDU_FUNC_OFF]; + eException = MB_EX_ILLEGAL_FUNCTION; + for( i = 0; i < MB_FUNC_HANDLERS_MAX; i++ ) + { + /* No more function handlers registered. Abort. */ + if( xFuncHandlers[i].ucFunctionCode == 0 ) + { + break; + } + else if( xFuncHandlers[i].ucFunctionCode == ucFunctionCode ) + { + eException = xFuncHandlers[i].pxHandler( ucMBFrame, &usLength ); + break; + } + } + + /* If the request was not sent to the broadcast address we + * return a reply. */ + if( ucRcvAddress != MB_ADDRESS_BROADCAST ) + { + if( eException != MB_EX_NONE ) + { + /* An exception occured. Build an error frame. */ + usLength = 0; + ucMBFrame[usLength++] = ( UCHAR )( ucFunctionCode | MB_FUNC_ERROR ); + ucMBFrame[usLength++] = eException; + } + eStatus = peMBFrameSendCur( ucMBAddress, ucMBFrame, usLength ); + } + break; + + case EV_FRAME_SENT: + break; + } + } + return MB_ENOERR; +} diff --git a/HardWare/FreeModbus/modbus/mb_m.c b/HardWare/FreeModbus/modbus/mb_m.c new file mode 100644 index 0000000..b95b5b5 --- /dev/null +++ b/HardWare/FreeModbus/modbus/mb_m.c @@ -0,0 +1,375 @@ +/* + * FreeModbus Libary: A portable Modbus implementation for Modbus ASCII/RTU. + * Copyright (C) 2013 Armink + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * File: $Id: mbrtu_m.c,v 1.60 2013/08/20 11:18:10 Armink Add Master Functions $ + */ + +/* ----------------------- System includes ----------------------------------*/ +#include "stdlib.h" +#include "string.h" + +/* ----------------------- Platform includes --------------------------------*/ +#include "port.h" + +/* ----------------------- Modbus includes ----------------------------------*/ + +#include "mb.h" +#include "mb_m.h" +#include "mbconfig.h" +#include "mbframe.h" +#include "mbfunc.h" +#include "mbproto.h" + +#include "mbport.h" +#if MB_MASTER_RTU_ENABLED == 1 +#include "mbrtu.h" +#endif +#if MB_MASTER_ASCII_ENABLED == 1 +#include "mbascii.h" +#endif +#if MB_MASTER_TCP_ENABLED == 1 +#include "mbtcp.h" +#endif + +#if MB_MASTER_RTU_ENABLED > 0 || MB_MASTER_ASCII_ENABLED > 0 + +#ifndef MB_PORT_HAS_CLOSE +#define MB_PORT_HAS_CLOSE 0 +#endif + +/* ----------------------- Static variables ---------------------------------*/ + +static UCHAR ucMBMasterDestAddress; +static BOOL xMBRunInMasterMode = FALSE; +static eMBMasterErrorEventType eMBMasterCurErrorType; + +static enum { + STATE_ENABLED, + STATE_DISABLED, + STATE_NOT_INITIALIZED, + STATE_ESTABLISHED, +} eMBState = STATE_NOT_INITIALIZED; + +/* Functions pointer which are initialized in eMBInit( ). Depending on the + * mode (RTU or ASCII) the are set to the correct implementations. + * Using for Modbus Master,Add by Armink 20130813 + */ +static peMBFrameSend peMBMasterFrameSendCur; +static pvMBFrameStart pvMBMasterFrameStartCur; +static pvMBFrameStop pvMBMasterFrameStopCur; +static peMBFrameReceive peMBMasterFrameReceiveCur; +static pvMBFrameClose pvMBMasterFrameCloseCur; + +/* Callback functions required by the porting layer. They are called when + * an external event has happend which includes a timeout or the reception + * or transmission of a character. + * Using for Modbus Master,Add by Armink 20130813 + */ +BOOL (*pxMBMasterFrameCBByteReceived)(void); +BOOL (*pxMBMasterFrameCBTransmitterEmpty)(void); +BOOL (*pxMBMasterPortCBTimerExpired)(void); + +BOOL (*pxMBMasterFrameCBReceiveFSMCur)(void); +BOOL (*pxMBMasterFrameCBTransmitFSMCur)(void); + +/* An array of Modbus functions handlers which associates Modbus function + * codes with implementing functions. + */ +static xMBFunctionHandler xMasterFuncHandlers[MB_FUNC_HANDLERS_MAX] = { +#if MB_FUNC_OTHER_REP_SLAVEID_ENABLED > 0 + // TODO Add Master function define + {MB_FUNC_OTHER_REPORT_SLAVEID, eMBFuncReportSlaveID}, +#endif +#if MB_FUNC_READ_INPUT_ENABLED > 0 + {MB_FUNC_READ_INPUT_REGISTER, eMBMasterFuncReadInputRegister}, +#endif +#if MB_FUNC_READ_HOLDING_ENABLED > 0 + {MB_FUNC_READ_HOLDING_REGISTER, eMBMasterFuncReadHoldingRegister}, +#endif +#if MB_FUNC_WRITE_MULTIPLE_HOLDING_ENABLED > 0 + {MB_FUNC_WRITE_MULTIPLE_REGISTERS, + eMBMasterFuncWriteMultipleHoldingRegister}, +#endif +#if MB_FUNC_WRITE_HOLDING_ENABLED > 0 + {MB_FUNC_WRITE_REGISTER, eMBMasterFuncWriteHoldingRegister}, +#endif +#if MB_FUNC_READWRITE_HOLDING_ENABLED > 0 + {MB_FUNC_READWRITE_MULTIPLE_REGISTERS, + eMBMasterFuncReadWriteMultipleHoldingRegister}, +#endif +#if MB_FUNC_READ_COILS_ENABLED > 0 + {MB_FUNC_READ_COILS, eMBMasterFuncReadCoils}, +#endif +#if MB_FUNC_WRITE_COIL_ENABLED > 0 + {MB_FUNC_WRITE_SINGLE_COIL, eMBMasterFuncWriteCoil}, +#endif +#if MB_FUNC_WRITE_MULTIPLE_COILS_ENABLED > 0 + {MB_FUNC_WRITE_MULTIPLE_COILS, eMBMasterFuncWriteMultipleCoils}, +#endif +#if MB_FUNC_READ_DISCRETE_INPUTS_ENABLED > 0 + {MB_FUNC_READ_DISCRETE_INPUTS, eMBMasterFuncReadDiscreteInputs}, +#endif +}; + +/* ----------------------- Start implementation -----------------------------*/ +eMBErrorCode eMBMasterInit(eMBMode eMode, UCHAR ucPort, ULONG ulBaudRate, + eMBParity eParity) { + eMBErrorCode eStatus = MB_ENOERR; + + switch (eMode) { +#if MB_MASTER_RTU_ENABLED > 0 + case MB_RTU: + pvMBMasterFrameStartCur = eMBMasterRTUStart; + pvMBMasterFrameStopCur = eMBMasterRTUStop; + peMBMasterFrameSendCur = eMBMasterRTUSend; + peMBMasterFrameReceiveCur = eMBMasterRTUReceive; + pvMBMasterFrameCloseCur = MB_PORT_HAS_CLOSE ? vMBMasterPortClose : NULL; + pxMBMasterFrameCBByteReceived = xMBMasterRTUReceiveFSM; + pxMBMasterFrameCBTransmitterEmpty = xMBMasterRTUTransmitFSM; + pxMBMasterPortCBTimerExpired = xMBMasterRTUTimerExpired; + + eStatus = eMBMasterRTUInit(ucPort, ulBaudRate, eParity); + break; +#endif +#if MB_MASTER_ASCII_ENABLED > 0 + case MB_ASCII: + pvMBMasterFrameStartCur = eMBMasterASCIIStart; + pvMBMasterFrameStopCur = eMBMasterASCIIStop; + peMBMasterFrameSendCur = eMBMasterASCIISend; + peMBMasterFrameReceiveCur = eMBMasterASCIIReceive; + pvMBMasterFrameCloseCur = MB_PORT_HAS_CLOSE ? vMBMasterPortClose : NULL; + pxMBMasterFrameCBByteReceived = xMBMasterASCIIReceiveFSM; + pxMBMasterFrameCBTransmitterEmpty = xMBMasterASCIITransmitFSM; + pxMBMasterPortCBTimerExpired = xMBMasterASCIITimerT1SExpired; + + eStatus = eMBMasterASCIIInit(ucPort, ulBaudRate, eParity); + break; +#endif + default: + eStatus = MB_EINVAL; + break; + } + + if (eStatus == MB_ENOERR) { + if (!xMBMasterPortEventInit()) { + /* port dependent event module initalization failed. */ + eStatus = MB_EPORTERR; + } else { + eMBState = STATE_DISABLED; + } + /* initialize the OS resource for modbus master. */ + vMBMasterOsResInit(); + } + return eStatus; +} + +eMBErrorCode eMBMasterClose(void) { + eMBErrorCode eStatus = MB_ENOERR; + + if (eMBState == STATE_DISABLED) { + if (pvMBMasterFrameCloseCur != NULL) { + pvMBMasterFrameCloseCur(); + } + } else { + eStatus = MB_EILLSTATE; + } + return eStatus; +} + +eMBErrorCode eMBMasterEnable(void) { + eMBErrorCode eStatus = MB_ENOERR; + + if (eMBState == STATE_DISABLED) { + /* Activate the protocol stack. */ + pvMBMasterFrameStartCur(); + eMBState = STATE_ENABLED; + } else { + eStatus = MB_EILLSTATE; + } + return eStatus; +} + +eMBErrorCode eMBMasterDisable(void) { + eMBErrorCode eStatus; + + if ((eMBState == STATE_ENABLED) || (eMBState == STATE_ESTABLISHED)) { + pvMBMasterFrameStopCur(); + eMBState = STATE_DISABLED; + eStatus = MB_ENOERR; + } else if (eMBState == STATE_DISABLED) { + eStatus = MB_ENOERR; + } else { + eStatus = MB_EILLSTATE; + } + return eStatus; +} + +BOOL eMBMasterIsEstablished(void) { + if (eMBState == STATE_ESTABLISHED) { + return TRUE; + } else { + return FALSE; + } +} + +eMBErrorCode eMBMasterPoll(void) { + static UCHAR *ucMBFrame; + static UCHAR ucRcvAddress; + static UCHAR ucFunctionCode; + static USHORT usLength; + static eMBException eException; + + int i, j; + eMBErrorCode eStatus = MB_ENOERR; + eMBMasterEventType eEvent; + eMBMasterErrorEventType errorType; + + /* Check if the protocol stack is ready. */ + if ((eMBState != STATE_ENABLED) && (eMBState != STATE_ESTABLISHED)) { + return MB_EILLSTATE; + } + + /* Check if there is a event available. If not return control to caller. + * Otherwise we will handle the event. */ + if (xMBMasterPortEventGet(&eEvent) == TRUE) { + switch (eEvent) { + case EV_MASTER_READY: + eMBState = STATE_ESTABLISHED; + vMBMasterRunResRelease(); + break; + + case EV_MASTER_FRAME_RECEIVED: + eStatus = peMBMasterFrameReceiveCur(&ucRcvAddress, &ucMBFrame, &usLength); + /* Check if the frame is for us. If not ,send an error process event. */ + if ((eStatus == MB_ENOERR) && + (ucRcvAddress == ucMBMasterGetDestAddress())) { + (void)xMBMasterPortEventPost(EV_MASTER_EXECUTE); + } else { + vMBMasterSetErrorType(EV_ERROR_RECEIVE_DATA); + (void)xMBMasterPortEventPost(EV_MASTER_ERROR_PROCESS); + } + break; + + case EV_MASTER_EXECUTE: + ucFunctionCode = ucMBFrame[MB_PDU_FUNC_OFF]; + eException = MB_EX_ILLEGAL_FUNCTION; + /* If receive frame has exception .The receive function code highest bit + * is 1.*/ + if (ucFunctionCode >> 7) { + eException = (eMBException)ucMBFrame[MB_PDU_DATA_OFF]; + } else { + for (i = 0; i < MB_FUNC_HANDLERS_MAX; i++) { + /* No more function handlers registered. Abort. */ + if (xMasterFuncHandlers[i].ucFunctionCode == 0) { + break; + } else if (xMasterFuncHandlers[i].ucFunctionCode == ucFunctionCode) { + vMBMasterSetCBRunInMasterMode(TRUE); + /* If master request is broadcast, + * the master need execute function for all slave. + */ + if (xMBMasterRequestIsBroadcast()) { + usLength = usMBMasterGetPDUSndLength(); + for (j = 1; j <= MB_MASTER_TOTAL_SLAVE_NUM; j++) { + vMBMasterSetDestAddress(j); + eException = + xMasterFuncHandlers[i].pxHandler(ucMBFrame, &usLength); + } + } else { + eException = + xMasterFuncHandlers[i].pxHandler(ucMBFrame, &usLength); + } + vMBMasterSetCBRunInMasterMode(FALSE); + break; + } + } + } + /* If master has exception ,Master will send error process.Otherwise the + * Master is idle.*/ + if (eException != MB_EX_NONE) { + vMBMasterSetErrorType(EV_ERROR_EXECUTE_FUNCTION); + (void)xMBMasterPortEventPost(EV_MASTER_ERROR_PROCESS); + } else { + vMBMasterCBRequestScuuess(); + vMBMasterRunResRelease(); + } + break; + + case EV_MASTER_FRAME_SENT: + /* Master is busy now. */ + vMBMasterGetPDUSndBuf(&ucMBFrame); + eStatus = peMBMasterFrameSendCur(ucMBMasterGetDestAddress(), ucMBFrame, + usMBMasterGetPDUSndLength()); + break; + + case EV_MASTER_ERROR_PROCESS: + /* Execute specified error process callback function. */ + errorType = eMBMasterGetErrorType(); + vMBMasterGetPDUSndBuf(&ucMBFrame); + switch (errorType) { + case EV_ERROR_RESPOND_TIMEOUT: + vMBMasterErrorCBRespondTimeout(ucMBMasterGetDestAddress(), ucMBFrame, + usMBMasterGetPDUSndLength()); + break; + case EV_ERROR_RECEIVE_DATA: + vMBMasterErrorCBReceiveData(ucMBMasterGetDestAddress(), ucMBFrame, + usMBMasterGetPDUSndLength()); + break; + case EV_ERROR_EXECUTE_FUNCTION: + vMBMasterErrorCBExecuteFunction(ucMBMasterGetDestAddress(), ucMBFrame, + usMBMasterGetPDUSndLength()); + break; + } + vMBMasterRunResRelease(); + break; + + default: + break; + } + } + return MB_ENOERR; +} + +/* Get whether the Modbus Master is run in master mode.*/ +BOOL xMBMasterGetCBRunInMasterMode(void) { return xMBRunInMasterMode; } +/* Set whether the Modbus Master is run in master mode.*/ +void vMBMasterSetCBRunInMasterMode(BOOL IsMasterMode) { + xMBRunInMasterMode = IsMasterMode; +} +/* Get Modbus Master send destination address. */ +UCHAR ucMBMasterGetDestAddress(void) { return ucMBMasterDestAddress; } +/* Set Modbus Master send destination address. */ +void vMBMasterSetDestAddress(UCHAR Address) { ucMBMasterDestAddress = Address; } +/* Get Modbus Master current error event type. */ +eMBMasterErrorEventType eMBMasterGetErrorType(void) { + return eMBMasterCurErrorType; +} +/* Set Modbus Master current error event type. */ +void vMBMasterSetErrorType(eMBMasterErrorEventType errorType) { + eMBMasterCurErrorType = errorType; +} + +#endif diff --git a/HardWare/FreeModbus/modbus/rtu/mbcrc.c b/HardWare/FreeModbus/modbus/rtu/mbcrc.c new file mode 100644 index 0000000..5ed2a80 --- /dev/null +++ b/HardWare/FreeModbus/modbus/rtu/mbcrc.c @@ -0,0 +1,98 @@ +/* + * FreeModbus Libary: A portable Modbus implementation for Modbus ASCII/RTU. + * Copyright (c) 2006-2018 Christian Walter + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * File: $Id: mbcrc.c,v 1.7 2007/02/18 23:50:27 wolti Exp $ + */ + +/* ----------------------- Platform includes --------------------------------*/ +#include "port.h" + +static const UCHAR aucCRCHi[] = { + 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, + 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, + 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, + 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, + 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, + 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, + 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, + 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, + 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, + 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, + 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, + 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, + 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, + 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, + 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, + 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, + 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, + 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, + 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, + 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, + 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, + 0x00, 0xC1, 0x81, 0x40 +}; + +static const UCHAR aucCRCLo[] = { + 0x00, 0xC0, 0xC1, 0x01, 0xC3, 0x03, 0x02, 0xC2, 0xC6, 0x06, 0x07, 0xC7, + 0x05, 0xC5, 0xC4, 0x04, 0xCC, 0x0C, 0x0D, 0xCD, 0x0F, 0xCF, 0xCE, 0x0E, + 0x0A, 0xCA, 0xCB, 0x0B, 0xC9, 0x09, 0x08, 0xC8, 0xD8, 0x18, 0x19, 0xD9, + 0x1B, 0xDB, 0xDA, 0x1A, 0x1E, 0xDE, 0xDF, 0x1F, 0xDD, 0x1D, 0x1C, 0xDC, + 0x14, 0xD4, 0xD5, 0x15, 0xD7, 0x17, 0x16, 0xD6, 0xD2, 0x12, 0x13, 0xD3, + 0x11, 0xD1, 0xD0, 0x10, 0xF0, 0x30, 0x31, 0xF1, 0x33, 0xF3, 0xF2, 0x32, + 0x36, 0xF6, 0xF7, 0x37, 0xF5, 0x35, 0x34, 0xF4, 0x3C, 0xFC, 0xFD, 0x3D, + 0xFF, 0x3F, 0x3E, 0xFE, 0xFA, 0x3A, 0x3B, 0xFB, 0x39, 0xF9, 0xF8, 0x38, + 0x28, 0xE8, 0xE9, 0x29, 0xEB, 0x2B, 0x2A, 0xEA, 0xEE, 0x2E, 0x2F, 0xEF, + 0x2D, 0xED, 0xEC, 0x2C, 0xE4, 0x24, 0x25, 0xE5, 0x27, 0xE7, 0xE6, 0x26, + 0x22, 0xE2, 0xE3, 0x23, 0xE1, 0x21, 0x20, 0xE0, 0xA0, 0x60, 0x61, 0xA1, + 0x63, 0xA3, 0xA2, 0x62, 0x66, 0xA6, 0xA7, 0x67, 0xA5, 0x65, 0x64, 0xA4, + 0x6C, 0xAC, 0xAD, 0x6D, 0xAF, 0x6F, 0x6E, 0xAE, 0xAA, 0x6A, 0x6B, 0xAB, + 0x69, 0xA9, 0xA8, 0x68, 0x78, 0xB8, 0xB9, 0x79, 0xBB, 0x7B, 0x7A, 0xBA, + 0xBE, 0x7E, 0x7F, 0xBF, 0x7D, 0xBD, 0xBC, 0x7C, 0xB4, 0x74, 0x75, 0xB5, + 0x77, 0xB7, 0xB6, 0x76, 0x72, 0xB2, 0xB3, 0x73, 0xB1, 0x71, 0x70, 0xB0, + 0x50, 0x90, 0x91, 0x51, 0x93, 0x53, 0x52, 0x92, 0x96, 0x56, 0x57, 0x97, + 0x55, 0x95, 0x94, 0x54, 0x9C, 0x5C, 0x5D, 0x9D, 0x5F, 0x9F, 0x9E, 0x5E, + 0x5A, 0x9A, 0x9B, 0x5B, 0x99, 0x59, 0x58, 0x98, 0x88, 0x48, 0x49, 0x89, + 0x4B, 0x8B, 0x8A, 0x4A, 0x4E, 0x8E, 0x8F, 0x4F, 0x8D, 0x4D, 0x4C, 0x8C, + 0x44, 0x84, 0x85, 0x45, 0x87, 0x47, 0x46, 0x86, 0x82, 0x42, 0x43, 0x83, + 0x41, 0x81, 0x80, 0x40 +}; + +USHORT +usMBCRC16( UCHAR * pucFrame, USHORT usLen ) +{ + UCHAR ucCRCHi = 0xFF; + UCHAR ucCRCLo = 0xFF; + int iIndex; + + while( usLen-- ) + { + iIndex = ucCRCLo ^ *( pucFrame++ ); + ucCRCLo = ( UCHAR )( ucCRCHi ^ aucCRCHi[iIndex] ); + ucCRCHi = aucCRCLo[iIndex]; + } + return ( USHORT )( ucCRCHi << 8 | ucCRCLo ); +} diff --git a/HardWare/FreeModbus/modbus/rtu/mbcrc.h b/HardWare/FreeModbus/modbus/rtu/mbcrc.h new file mode 100644 index 0000000..92168c2 --- /dev/null +++ b/HardWare/FreeModbus/modbus/rtu/mbcrc.h @@ -0,0 +1,36 @@ +/* + * FreeModbus Libary: A portable Modbus implementation for Modbus ASCII/RTU. + * Copyright (c) 2006-2018 Christian Walter + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * File: $Id: mbcrc.h,v 1.5 2006/12/07 22:10:34 wolti Exp $ + */ + +#ifndef _MB_CRC_H +#define _MB_CRC_H + +USHORT usMBCRC16( UCHAR * pucFrame, USHORT usLen ); + +#endif diff --git a/HardWare/FreeModbus/modbus/rtu/mbrtu.c b/HardWare/FreeModbus/modbus/rtu/mbrtu.c new file mode 100644 index 0000000..85bf187 --- /dev/null +++ b/HardWare/FreeModbus/modbus/rtu/mbrtu.c @@ -0,0 +1,313 @@ +/* + * FreeModbus Libary: A portable Modbus implementation for Modbus ASCII/RTU. + * Copyright (c) 2006-2018 Christian Walter + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * File: $Id: mbrtu.c,v 1.18 2007/09/12 10:15:56 wolti Exp $ + */ + +/* ----------------------- System includes ----------------------------------*/ +#include "stdlib.h" +#include "string.h" + +/* ----------------------- Platform includes --------------------------------*/ +#include "port.h" + +/* ----------------------- Modbus includes ----------------------------------*/ +#include "mb.h" +#include "mbframe.h" +#include "mbrtu.h" + +#include "mbcrc.h" +#include "mbport.h" + +/* ----------------------- Defines ------------------------------------------*/ +#define MB_SER_PDU_SIZE_MIN 4 /*!< Minimum size of a Modbus RTU frame. */ +#define MB_SER_PDU_SIZE_MAX 256 /*!< Maximum size of a Modbus RTU frame. */ +#define MB_SER_PDU_SIZE_CRC 2 /*!< Size of CRC field in PDU. */ +#define MB_SER_PDU_ADDR_OFF 0 /*!< Offset of slave address in Ser-PDU. */ +#define MB_SER_PDU_PDU_OFF 1 /*!< Offset of Modbus-PDU in Ser-PDU. */ + +/* ----------------------- Type definitions ---------------------------------*/ +typedef enum { + STATE_RX_INIT, /*!< Receiver is in initial state. */ + STATE_RX_IDLE, /*!< Receiver is in idle state. */ + STATE_RX_RCV, /*!< Frame is beeing received. */ + STATE_RX_ERROR /*!< If the frame is invalid. */ +} eMBRcvState; + +typedef enum { + STATE_TX_IDLE, /*!< Transmitter is in idle state. */ + STATE_TX_XMIT /*!< Transmitter is in transfer state. */ +} eMBSndState; + +/* ----------------------- Static variables ---------------------------------*/ +static volatile eMBSndState eSndState; +static volatile eMBRcvState eRcvState; + +volatile UCHAR ucRTUBuf[MB_SER_PDU_SIZE_MAX]; + +static volatile UCHAR *pucSndBufferCur; +static volatile USHORT usSndBufferCount; + +static volatile USHORT usRcvBufferPos; + +/* ----------------------- Start implementation -----------------------------*/ +eMBErrorCode eMBRTUInit(UCHAR ucSlaveAddress, UCHAR ucPort, ULONG ulBaudRate, + eMBParity eParity) { + eMBErrorCode eStatus = MB_ENOERR; + ULONG usTimerT35_50us; + + (void)ucSlaveAddress; + ENTER_CRITICAL_SECTION(); + + /* Modbus RTU uses 8 Databits. */ + if (xMBPortSerialInit(ucPort, ulBaudRate, 8, eParity) != TRUE) { + eStatus = MB_EPORTERR; + } else { + /* If baudrate > 19200 then we should use the fixed timer values + * t35 = 1750us. Otherwise t35 must be 3.5 times the character time. + */ + if (ulBaudRate > 19200) { + usTimerT35_50us = 35; /* 1800us. */ + } else { + /* The timer reload value for a character is given by: + * + * ChTimeValue = Ticks_per_1s / ( Baudrate / 11 ) + * = 11 * Ticks_per_1s / Baudrate + * = 220000 / Baudrate + * The reload for t3.5 is 1.5 times this value and similary + * for t3.5. + */ + usTimerT35_50us = (7UL * 220000UL) / (2UL * ulBaudRate); + } + if (xMBPortTimersInit((USHORT)usTimerT35_50us) != TRUE) { + eStatus = MB_EPORTERR; + } + } + EXIT_CRITICAL_SECTION(); + + return eStatus; +} + +void eMBRTUStart(void) { + ENTER_CRITICAL_SECTION(); + /* Initially the receiver is in the state STATE_RX_INIT. we start + * the timer and if no character is received within t3.5 we change + * to STATE_RX_IDLE. This makes sure that we delay startup of the + * modbus protocol stack until the bus is free. + */ + eRcvState = STATE_RX_INIT; + vMBPortSerialEnable(TRUE, FALSE); + vMBPortTimersEnable(); + EXIT_CRITICAL_SECTION(); +} + +void eMBRTUStop(void) { + ENTER_CRITICAL_SECTION(); + vMBPortSerialEnable(FALSE, FALSE); + vMBPortTimersDisable(); + EXIT_CRITICAL_SECTION(); +} + +eMBErrorCode eMBRTUReceive(UCHAR *pucRcvAddress, UCHAR **pucFrame, + USHORT *pusLength) { + eMBErrorCode eStatus = MB_ENOERR; + + ENTER_CRITICAL_SECTION(); + assert_param(usRcvBufferPos < MB_SER_PDU_SIZE_MAX); + /* Length and CRC check */ + if ((usRcvBufferPos >= MB_SER_PDU_SIZE_MIN) && + (usMBCRC16((UCHAR *)ucRTUBuf, usRcvBufferPos) == 0)) { + /* Save the address field. All frames are passed to the upper layed + * and the decision if a frame is used is done there. + */ + *pucRcvAddress = ucRTUBuf[MB_SER_PDU_ADDR_OFF]; + + /* Total length of Modbus-PDU is Modbus-Serial-Line-PDU minus + * size of address field and CRC checksum. + */ + *pusLength = + (USHORT)(usRcvBufferPos - MB_SER_PDU_PDU_OFF - MB_SER_PDU_SIZE_CRC); + + /* Return the start of the Modbus PDU to the caller. */ + *pucFrame = (UCHAR *)&ucRTUBuf[MB_SER_PDU_PDU_OFF]; + } else { + eStatus = MB_EIO; + } + + EXIT_CRITICAL_SECTION(); + return eStatus; +} + +eMBErrorCode eMBRTUSend(UCHAR ucSlaveAddress, const UCHAR *pucFrame, + USHORT usLength) { + eMBErrorCode eStatus = MB_ENOERR; + USHORT usCRC16; + + ENTER_CRITICAL_SECTION(); + + /* Check if the receiver is still in idle state. If not we where to + * slow with processing the received frame and the master sent another + * frame on the network. We have to abort sending the frame. + */ + if (eRcvState == STATE_RX_IDLE) { + /* First byte before the Modbus-PDU is the slave address. */ + pucSndBufferCur = (UCHAR *)pucFrame - 1; + usSndBufferCount = 1; + + /* Now copy the Modbus-PDU into the Modbus-Serial-Line-PDU. */ + pucSndBufferCur[MB_SER_PDU_ADDR_OFF] = ucSlaveAddress; + usSndBufferCount += usLength; + + /* Calculate CRC16 checksum for Modbus-Serial-Line-PDU. */ + usCRC16 = usMBCRC16((UCHAR *)pucSndBufferCur, usSndBufferCount); + ucRTUBuf[usSndBufferCount++] = (UCHAR)(usCRC16 & 0xFF); + ucRTUBuf[usSndBufferCount++] = (UCHAR)(usCRC16 >> 8); + + /* Activate the transmitter. */ + eSndState = STATE_TX_XMIT; + vMBPortSerialEnable(FALSE, TRUE); + } else { + eStatus = MB_EIO; + } + EXIT_CRITICAL_SECTION(); + return eStatus; +} + +BOOL xMBRTUReceiveFSM(void) { + BOOL xTaskNeedSwitch = FALSE; + UCHAR ucByte; + assert_param(eSndState == STATE_TX_IDLE); + + /* Always read the character. */ + (void)xMBPortSerialGetByte((CHAR *)&ucByte); + + switch (eRcvState) { + /* If we have received a character in the init state we have to + * wait until the frame is finished. + */ + case STATE_RX_INIT: + vMBPortTimersEnable(); + break; + + /* In the error state we wait until all characters in the + * damaged frame are transmitted. + */ + case STATE_RX_ERROR: + vMBPortTimersEnable(); + break; + + /* In the idle state we wait for a new character. If a character + * is received the t1.5 and t3.5 timers are started and the + * receiver is in the state STATE_RX_RECEIVCE. + */ + case STATE_RX_IDLE: + usRcvBufferPos = 0; + ucRTUBuf[usRcvBufferPos++] = ucByte; + eRcvState = STATE_RX_RCV; + + /* Enable t3.5 timers. */ + vMBPortTimersEnable(); + break; + + /* We are currently receiving a frame. Reset the timer after + * every character received. If more than the maximum possible + * number of bytes in a modbus frame is received the frame is + * ignored. + */ + case STATE_RX_RCV: + if (usRcvBufferPos < MB_SER_PDU_SIZE_MAX) { + ucRTUBuf[usRcvBufferPos++] = ucByte; + } else { + eRcvState = STATE_RX_ERROR; + } + vMBPortTimersEnable(); + break; + } + return xTaskNeedSwitch; +} + +BOOL xMBRTUTransmitFSM(void) { + BOOL xNeedPoll = FALSE; + + assert_param(eRcvState == STATE_RX_IDLE); + + switch (eSndState) { + /* We should not get a transmitter event if the transmitter is in + * idle state. */ + case STATE_TX_IDLE: + /* enable receiver/disable transmitter. */ + vMBPortSerialEnable(TRUE, FALSE); + break; + + case STATE_TX_XMIT: + /* check if we are finished. */ + if (usSndBufferCount != 0) { + xMBPortSerialPutByte((CHAR)*pucSndBufferCur); + pucSndBufferCur++; /* next byte in sendbuffer. */ + usSndBufferCount--; + } else { + xNeedPoll = xMBPortEventPost(EV_FRAME_SENT); + /* Disable transmitter. This prevents another transmit buffer + * empty interrupt. */ + vMBPortSerialEnable(TRUE, FALSE); + eSndState = STATE_TX_IDLE; + } + break; + } + + return xNeedPoll; +} + +BOOL xMBRTUTimerT35Expired(void) { + BOOL xNeedPoll = FALSE; + + switch (eRcvState) { + /* Timer t35 expired. Startup phase is finished. */ + case STATE_RX_INIT: + xNeedPoll = xMBPortEventPost(EV_READY); + break; + + /* A frame was received and t35 expired. Notify the listener that + * a new frame was received. */ + case STATE_RX_RCV: + xNeedPoll = xMBPortEventPost(EV_FRAME_RECEIVED); + break; + + /* An error occured while receiving the frame. */ + case STATE_RX_ERROR: + break; + + /* Function called in an illegal state. */ + default: + assert_param((eRcvState == STATE_RX_INIT) || (eRcvState == STATE_RX_RCV) || + (eRcvState == STATE_RX_ERROR)); + break; + } + vMBPortTimersDisable(); + eRcvState = STATE_RX_IDLE; + return xNeedPoll; +} diff --git a/HardWare/FreeModbus/modbus/rtu/mbrtu.h b/HardWare/FreeModbus/modbus/rtu/mbrtu.h new file mode 100644 index 0000000..da56acd --- /dev/null +++ b/HardWare/FreeModbus/modbus/rtu/mbrtu.h @@ -0,0 +1,64 @@ +/* + * FreeModbus Libary: A portable Modbus implementation for Modbus ASCII/RTU. + * Copyright (c) 2006-2018 Christian Walter + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * File: $Id: mbrtu.h,v 1.9 2006/12/07 22:10:34 wolti Exp $ + * File: $Id: mbrtu.h,v 1.60 2013/08/17 13:11:42 Armink Add Master Functions $ + */ +#include "mbconfig.h" + +#ifndef _MB_RTU_H +#define _MB_RTU_H + +#ifdef __cplusplus +PR_BEGIN_EXTERN_C +#endif +eMBErrorCode eMBRTUInit( UCHAR slaveAddress, UCHAR ucPort, ULONG ulBaudRate, + eMBParity eParity ); +void eMBRTUStart( void ); +void eMBRTUStop( void ); +eMBErrorCode eMBRTUReceive( UCHAR * pucRcvAddress, UCHAR ** pucFrame, USHORT * pusLength ); +eMBErrorCode eMBRTUSend( UCHAR slaveAddress, const UCHAR * pucFrame, USHORT usLength ); +BOOL xMBRTUReceiveFSM( void ); +BOOL xMBRTUTransmitFSM( void ); +BOOL xMBRTUTimerT15Expired( void ); +BOOL xMBRTUTimerT35Expired( void ); + +#if MB_MASTER_RTU_ENABLED > 0 +eMBErrorCode eMBMasterRTUInit( UCHAR ucPort, ULONG ulBaudRate,eMBParity eParity ); +void eMBMasterRTUStart( void ); +void eMBMasterRTUStop( void ); +eMBErrorCode eMBMasterRTUReceive( UCHAR * pucRcvAddress, UCHAR ** pucFrame, USHORT * pusLength ); +eMBErrorCode eMBMasterRTUSend( UCHAR slaveAddress, const UCHAR * pucFrame, USHORT usLength ); +BOOL xMBMasterRTUReceiveFSM( void ); +BOOL xMBMasterRTUTransmitFSM( void ); +BOOL xMBMasterRTUTimerExpired( void ); +#endif + +#ifdef __cplusplus +PR_END_EXTERN_C +#endif +#endif diff --git a/HardWare/FreeModbus/modbus/rtu/mbrtu_m.c b/HardWare/FreeModbus/modbus/rtu/mbrtu_m.c new file mode 100644 index 0000000..b7719c8 --- /dev/null +++ b/HardWare/FreeModbus/modbus/rtu/mbrtu_m.c @@ -0,0 +1,446 @@ +/* + * FreeModbus Libary: A portable Modbus implementation for Modbus ASCII/RTU. + * Copyright (c) 2013 China Beijing Armink + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * File: $Id: mbrtu_m.c,v 1.60 2013/08/17 11:42:56 Armink Add Master Functions $ + */ + +/* ----------------------- System includes ----------------------------------*/ +#include "stdlib.h" +#include "string.h" + +/* ----------------------- Platform includes --------------------------------*/ +#include "port.h" + +/* ----------------------- Modbus includes ----------------------------------*/ +#include "mb.h" +#include "mb_m.h" +#include "mbrtu.h" +#include "mbframe.h" + +#include "mbcrc.h" +#include "mbport.h" + +#if MB_MASTER_RTU_ENABLED > 0 +/* ----------------------- Defines ------------------------------------------*/ +#define MB_SER_PDU_SIZE_MIN 4 /*!< Minimum size of a Modbus RTU frame. */ +#define MB_SER_PDU_SIZE_MAX 256 /*!< Maximum size of a Modbus RTU frame. */ +#define MB_SER_PDU_SIZE_CRC 2 /*!< Size of CRC field in PDU. */ +#define MB_SER_PDU_ADDR_OFF 0 /*!< Offset of slave address in Ser-PDU. */ +#define MB_SER_PDU_PDU_OFF 1 /*!< Offset of Modbus-PDU in Ser-PDU. */ + +/* ----------------------- Type definitions ---------------------------------*/ +typedef enum +{ + STATE_M_RX_INIT, /*!< Receiver is in initial state. */ + STATE_M_RX_IDLE, /*!< Receiver is in idle state. */ + STATE_M_RX_RCV, /*!< Frame is beeing received. */ + STATE_M_RX_ERROR, /*!< If the frame is invalid. */ +} eMBMasterRcvState; + +typedef enum +{ + STATE_M_TX_IDLE, /*!< Transmitter is in idle state. */ + STATE_M_TX_XMIT, /*!< Transmitter is in transfer state. */ + STATE_M_TX_XFWR, /*!< Transmitter is in transfer finish and wait receive state. */ +} eMBMasterSndState; + +/* ----------------------- Static variables ---------------------------------*/ +static volatile eMBMasterSndState eSndState; +static volatile eMBMasterRcvState eRcvState; + +static volatile UCHAR ucMasterRTUSndBuf[MB_PDU_SIZE_MAX]; +static volatile UCHAR ucMasterRTURcvBuf[MB_SER_PDU_SIZE_MAX]; +static volatile USHORT usMasterSendPDULength; + +static volatile UCHAR *pucMasterSndBufferCur; +static volatile USHORT usMasterSndBufferCount; + +static volatile USHORT usMasterRcvBufferPos; +static volatile BOOL xFrameIsBroadcast = FALSE; + +static volatile eMBMasterTimerMode eMasterCurTimerMode; + +/* ----------------------- Start implementation -----------------------------*/ +eMBErrorCode +eMBMasterRTUInit(UCHAR ucPort, ULONG ulBaudRate, eMBParity eParity ) +{ + eMBErrorCode eStatus = MB_ENOERR; + ULONG usTimerT35_50us; + + ENTER_CRITICAL_SECTION( ); + + /* Modbus RTU uses 8 Databits. */ + if( xMBMasterPortSerialInit( ucPort, ulBaudRate, 8, eParity ) != TRUE ) + { + eStatus = MB_EPORTERR; + } + else + { + /* If baudrate > 19200 then we should use the fixed timer values + * t35 = 1750us. Otherwise t35 must be 3.5 times the character time. + */ + if( ulBaudRate > 19200 ) + { + usTimerT35_50us = 35; /* 1800us. */ + } + else + { + /* The timer reload value for a character is given by: + * + * ChTimeValue = Ticks_per_1s / ( Baudrate / 11 ) + * = 11 * Ticks_per_1s / Baudrate + * = 220000 / Baudrate + * The reload for t3.5 is 1.5 times this value and similary + * for t3.5. + */ + usTimerT35_50us = ( 7UL * 220000UL ) / ( 2UL * ulBaudRate ); + } + if( xMBMasterPortTimersInit( ( USHORT ) usTimerT35_50us ) != TRUE ) + { + eStatus = MB_EPORTERR; + } + } + EXIT_CRITICAL_SECTION( ); + + return eStatus; +} + +void +eMBMasterRTUStart( void ) +{ + ENTER_CRITICAL_SECTION( ); + /* Initially the receiver is in the state STATE_M_RX_INIT. we start + * the timer and if no character is received within t3.5 we change + * to STATE_M_RX_IDLE. This makes sure that we delay startup of the + * modbus protocol stack until the bus is free. + */ + eRcvState = STATE_M_RX_INIT; + vMBMasterPortSerialEnable( TRUE, FALSE ); + vMBMasterPortTimersT35Enable( ); + + EXIT_CRITICAL_SECTION( ); +} + +void +eMBMasterRTUStop( void ) +{ + ENTER_CRITICAL_SECTION( ); + vMBMasterPortSerialEnable( FALSE, FALSE ); + vMBMasterPortTimersDisable( ); + EXIT_CRITICAL_SECTION( ); +} + +eMBErrorCode +eMBMasterRTUReceive( UCHAR * pucRcvAddress, UCHAR ** pucFrame, USHORT * pusLength ) +{ + eMBErrorCode eStatus = MB_ENOERR; + + ENTER_CRITICAL_SECTION( ); + assert_param( usMasterRcvBufferPos < MB_SER_PDU_SIZE_MAX ); + + /* Length and CRC check */ + if( ( usMasterRcvBufferPos >= MB_SER_PDU_SIZE_MIN ) + && ( usMBCRC16( ( UCHAR * ) ucMasterRTURcvBuf, usMasterRcvBufferPos ) == 0 ) ) + { + /* Save the address field. All frames are passed to the upper layed + * and the decision if a frame is used is done there. + */ + *pucRcvAddress = ucMasterRTURcvBuf[MB_SER_PDU_ADDR_OFF]; + + /* Total length of Modbus-PDU is Modbus-Serial-Line-PDU minus + * size of address field and CRC checksum. + */ + *pusLength = ( USHORT )( usMasterRcvBufferPos - MB_SER_PDU_PDU_OFF - MB_SER_PDU_SIZE_CRC ); + + /* Return the start of the Modbus PDU to the caller. */ + *pucFrame = ( UCHAR * ) & ucMasterRTURcvBuf[MB_SER_PDU_PDU_OFF]; + } + else + { + eStatus = MB_EIO; + } + + EXIT_CRITICAL_SECTION( ); + return eStatus; +} + +eMBErrorCode +eMBMasterRTUSend( UCHAR ucSlaveAddress, const UCHAR * pucFrame, USHORT usLength ) +{ + eMBErrorCode eStatus = MB_ENOERR; + USHORT usCRC16; + + if ( ucSlaveAddress > MB_MASTER_TOTAL_SLAVE_NUM ) return MB_EINVAL; + + ENTER_CRITICAL_SECTION( ); + + /* Check if the receiver is still in idle state. If not we where to + * slow with processing the received frame and the master sent another + * frame on the network. We have to abort sending the frame. + */ + if( eRcvState == STATE_M_RX_IDLE ) + { + /* First byte before the Modbus-PDU is the slave address. */ + pucMasterSndBufferCur = ( UCHAR * ) pucFrame - 1; + usMasterSndBufferCount = 1; + + /* Now copy the Modbus-PDU into the Modbus-Serial-Line-PDU. */ + pucMasterSndBufferCur[MB_SER_PDU_ADDR_OFF] = ucSlaveAddress; + usMasterSndBufferCount += usLength; + + /* Calculate CRC16 checksum for Modbus-Serial-Line-PDU. */ + usCRC16 = usMBCRC16( ( UCHAR * ) pucMasterSndBufferCur, usMasterSndBufferCount ); + ucMasterRTUSndBuf[usMasterSndBufferCount++] = ( UCHAR )( usCRC16 & 0xFF ); + ucMasterRTUSndBuf[usMasterSndBufferCount++] = ( UCHAR )( usCRC16 >> 8 ); + + /* Activate the transmitter. */ + eSndState = STATE_M_TX_XMIT; + vMBMasterPortSerialEnable( FALSE, TRUE ); + } + else + { + eStatus = MB_EIO; + } + EXIT_CRITICAL_SECTION( ); + return eStatus; +} + +BOOL +xMBMasterRTUReceiveFSM( void ) +{ + BOOL xTaskNeedSwitch = FALSE; + UCHAR ucByte; + + assert_param(( eSndState == STATE_M_TX_IDLE ) || ( eSndState == STATE_M_TX_XFWR )); + + /* Always read the character. */ + ( void )xMBMasterPortSerialGetByte( ( CHAR * ) & ucByte ); + + switch ( eRcvState ) + { + /* If we have received a character in the init state we have to + * wait until the frame is finished. + */ + case STATE_M_RX_INIT: + vMBMasterPortTimersT35Enable( ); + break; + + /* In the error state we wait until all characters in the + * damaged frame are transmitted. + */ + case STATE_M_RX_ERROR: + vMBMasterPortTimersT35Enable( ); + break; + + /* In the idle state we wait for a new character. If a character + * is received the t1.5 and t3.5 timers are started and the + * receiver is in the state STATE_RX_RECEIVCE and disable early + * the timer of respond timeout . + */ + case STATE_M_RX_IDLE: + /* In time of respond timeout,the receiver receive a frame. + * Disable timer of respond timeout and change the transmiter state to idle. + */ + vMBMasterPortTimersDisable( ); + eSndState = STATE_M_TX_IDLE; + + usMasterRcvBufferPos = 0; + ucMasterRTURcvBuf[usMasterRcvBufferPos++] = ucByte; + eRcvState = STATE_M_RX_RCV; + + /* Enable t3.5 timers. */ + vMBMasterPortTimersT35Enable( ); + break; + + /* We are currently receiving a frame. Reset the timer after + * every character received. If more than the maximum possible + * number of bytes in a modbus frame is received the frame is + * ignored. + */ + case STATE_M_RX_RCV: + if( usMasterRcvBufferPos < MB_SER_PDU_SIZE_MAX ) + { + ucMasterRTURcvBuf[usMasterRcvBufferPos++] = ucByte; + } + else + { + eRcvState = STATE_M_RX_ERROR; + } + vMBMasterPortTimersT35Enable(); + break; + } + return xTaskNeedSwitch; +} + +BOOL +xMBMasterRTUTransmitFSM( void ) +{ + BOOL xNeedPoll = FALSE; + + assert_param( eRcvState == STATE_M_RX_IDLE ); + + switch ( eSndState ) + { + /* We should not get a transmitter event if the transmitter is in + * idle state. */ + case STATE_M_TX_IDLE: + /* enable receiver/disable transmitter. */ + vMBMasterPortSerialEnable( TRUE, FALSE ); + break; + + case STATE_M_TX_XMIT: + /* check if we are finished. */ + if( usMasterSndBufferCount != 0 ) + { + xMBMasterPortSerialPutByte( ( CHAR )*pucMasterSndBufferCur ); + pucMasterSndBufferCur++; /* next byte in sendbuffer. */ + usMasterSndBufferCount--; + } + else + { + xFrameIsBroadcast = ( ucMasterRTUSndBuf[MB_SER_PDU_ADDR_OFF] == MB_ADDRESS_BROADCAST ) ? TRUE : FALSE; + /* Disable transmitter. This prevents another transmit buffer + * empty interrupt. */ + vMBMasterPortSerialEnable( TRUE, FALSE ); + eSndState = STATE_M_TX_XFWR; + /* If the frame is broadcast ,master will enable timer of convert delay, + * else master will enable timer of respond timeout. */ + if ( xFrameIsBroadcast == TRUE ) + { + vMBMasterPortTimersConvertDelayEnable( ); + } + else + { + vMBMasterPortTimersRespondTimeoutEnable( ); + } + } + break; + + default: + break; + } + + return xNeedPoll; +} + +BOOL +xMBMasterRTUTimerExpired(void) +{ + BOOL xNeedPoll = FALSE; + + switch (eRcvState) + { + /* Timer t35 expired. Startup phase is finished. */ + case STATE_M_RX_INIT: + xNeedPoll = xMBMasterPortEventPost(EV_MASTER_READY); + break; + + /* A frame was received and t35 expired. Notify the listener that + * a new frame was received. */ + case STATE_M_RX_RCV: + xNeedPoll = xMBMasterPortEventPost(EV_MASTER_FRAME_RECEIVED); + break; + + /* An error occured while receiving the frame. */ + case STATE_M_RX_ERROR: + vMBMasterSetErrorType(EV_ERROR_RECEIVE_DATA); + xNeedPoll = xMBMasterPortEventPost( EV_MASTER_ERROR_PROCESS ); + break; + + /* Function called in an illegal state. */ + default: + assert_param( + ( eRcvState == STATE_M_RX_INIT ) || ( eRcvState == STATE_M_RX_RCV ) || + ( eRcvState == STATE_M_RX_ERROR ) || ( eRcvState == STATE_M_RX_IDLE )); + break; + } + eRcvState = STATE_M_RX_IDLE; + + switch (eSndState) + { + /* A frame was send finish and convert delay or respond timeout expired. + * If the frame is broadcast,The master will idle,and if the frame is not + * broadcast.Notify the listener process error.*/ + case STATE_M_TX_XFWR: + if ( xFrameIsBroadcast == FALSE ) { + vMBMasterSetErrorType(EV_ERROR_RESPOND_TIMEOUT); + xNeedPoll = xMBMasterPortEventPost(EV_MASTER_ERROR_PROCESS); + } + break; + /* Function called in an illegal state. */ + default: + assert_param( + ( eSndState == STATE_M_TX_XFWR ) || ( eSndState == STATE_M_TX_IDLE )); + break; + } + eSndState = STATE_M_TX_IDLE; + + vMBMasterPortTimersDisable( ); + /* If timer mode is convert delay, the master event then turns EV_MASTER_EXECUTE status. */ + if (eMasterCurTimerMode == MB_TMODE_CONVERT_DELAY) { + xNeedPoll = xMBMasterPortEventPost( EV_MASTER_EXECUTE ); + } + + return xNeedPoll; +} + +/* Get Modbus Master send RTU's buffer address pointer.*/ +void vMBMasterGetRTUSndBuf( UCHAR ** pucFrame ) +{ + *pucFrame = ( UCHAR * ) ucMasterRTUSndBuf; +} + +/* Get Modbus Master send PDU's buffer address pointer.*/ +void vMBMasterGetPDUSndBuf( UCHAR ** pucFrame ) +{ + *pucFrame = ( UCHAR * ) &ucMasterRTUSndBuf[MB_SER_PDU_PDU_OFF]; +} + +/* Set Modbus Master send PDU's buffer length.*/ +void vMBMasterSetPDUSndLength( USHORT SendPDULength ) +{ + usMasterSendPDULength = SendPDULength; +} + +/* Get Modbus Master send PDU's buffer length.*/ +USHORT usMBMasterGetPDUSndLength( void ) +{ + return usMasterSendPDULength; +} + +/* Set Modbus Master current timer mode.*/ +void vMBMasterSetCurTimerMode( eMBMasterTimerMode eMBTimerMode ) +{ + eMasterCurTimerMode = eMBTimerMode; +} + +/* The master request is broadcast? */ +BOOL xMBMasterRequestIsBroadcast( void ){ + return xFrameIsBroadcast; +} +#endif + diff --git a/HardWare/FreeModbus/modbus/tcp/mbtcp.c b/HardWare/FreeModbus/modbus/tcp/mbtcp.c new file mode 100644 index 0000000..e6ce040 --- /dev/null +++ b/HardWare/FreeModbus/modbus/tcp/mbtcp.c @@ -0,0 +1,158 @@ +/* + * FreeModbus Libary: A portable Modbus implementation for Modbus ASCII/RTU. + * Copyright (c) 2006-2018 Christian Walter + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * File: $Id: mbtcp.c,v 1.3 2006/12/07 22:10:34 wolti Exp $ + */ + +/* ----------------------- System includes ----------------------------------*/ +#include "stdlib.h" +#include "string.h" + +/* ----------------------- Platform includes --------------------------------*/ +#include "port.h" + +/* ----------------------- Modbus includes ----------------------------------*/ +#include "mb.h" +#include "mbconfig.h" +#include "mbtcp.h" +#include "mbframe.h" +#include "mbport.h" + +#if MB_SLAVE_TCP_ENABLED > 0 + +/* ----------------------- Defines ------------------------------------------*/ + +/* ----------------------- MBAP Header --------------------------------------*/ +/* + * + * <------------------------ MODBUS TCP/IP ADU(1) -------------------------> + * <----------- MODBUS PDU (1') ----------------> + * +-----------+---------------+------------------------------------------+ + * | TID | PID | Length | UID |Code | Data | + * +-----------+---------------+------------------------------------------+ + * | | | | | + * (2) (3) (4) (5) (6) + * + * (2) ... MB_TCP_TID = 0 (Transaction Identifier - 2 Byte) + * (3) ... MB_TCP_PID = 2 (Protocol Identifier - 2 Byte) + * (4) ... MB_TCP_LEN = 4 (Number of bytes - 2 Byte) + * (5) ... MB_TCP_UID = 6 (Unit Identifier - 1 Byte) + * (6) ... MB_TCP_FUNC = 7 (Modbus Function Code) + * + * (1) ... Modbus TCP/IP Application Data Unit + * (1') ... Modbus Protocol Data Unit + */ + +#define MB_TCP_TID 0 +#define MB_TCP_PID 2 +#define MB_TCP_LEN 4 +#define MB_TCP_UID 6 +#define MB_TCP_FUNC 7 + +#define MB_TCP_PROTOCOL_ID 0 /* 0 = Modbus Protocol */ + + +/* ----------------------- Start implementation -----------------------------*/ +eMBErrorCode +eMBTCPDoInit( USHORT ucTCPPort ) +{ + eMBErrorCode eStatus = MB_ENOERR; + + if( xMBTCPPortInit( ucTCPPort ) == FALSE ) + { + eStatus = MB_EPORTERR; + } + return eStatus; +} + +void +eMBTCPStart( void ) +{ +} + +void +eMBTCPStop( void ) +{ + /* Make sure that no more clients are connected. */ + vMBTCPPortDisable( ); +} + +eMBErrorCode +eMBTCPReceive( UCHAR * pucRcvAddress, UCHAR ** ppucFrame, USHORT * pusLength ) +{ + eMBErrorCode eStatus = MB_EIO; + UCHAR *pucMBTCPFrame; + USHORT usLength; + USHORT usPID; + + if( xMBTCPPortGetRequest( &pucMBTCPFrame, &usLength ) != FALSE ) + { + usPID = pucMBTCPFrame[MB_TCP_PID] << 8U; + usPID |= pucMBTCPFrame[MB_TCP_PID + 1]; + + if( usPID == MB_TCP_PROTOCOL_ID ) + { + *ppucFrame = &pucMBTCPFrame[MB_TCP_FUNC]; + *pusLength = usLength - MB_TCP_FUNC; + eStatus = MB_ENOERR; + + /* Modbus TCP does not use any addresses. Fake the source address such + * that the processing part deals with this frame. + */ + *pucRcvAddress = MB_TCP_PSEUDO_ADDRESS; + } + } + else + { + eStatus = MB_EIO; + } + return eStatus; +} + +eMBErrorCode +eMBTCPSend( UCHAR _unused, const UCHAR * pucFrame, USHORT usLength ) +{ + eMBErrorCode eStatus = MB_ENOERR; + UCHAR *pucMBTCPFrame = ( UCHAR * ) pucFrame - MB_TCP_FUNC; + USHORT usTCPLength = usLength + MB_TCP_FUNC; + + /* The MBAP header is already initialized because the caller calls this + * function with the buffer returned by the previous call. Therefore we + * only have to update the length in the header. Note that the length + * header includes the size of the Modbus PDU and the UID Byte. Therefore + * the length is usLength plus one. + */ + pucMBTCPFrame[MB_TCP_LEN] = ( usLength + 1 ) >> 8U; + pucMBTCPFrame[MB_TCP_LEN + 1] = ( usLength + 1 ) & 0xFF; + if( xMBTCPPortSendResponse( pucMBTCPFrame, usTCPLength ) == FALSE ) + { + eStatus = MB_EIO; + } + return eStatus; +} + +#endif diff --git a/HardWare/FreeModbus/modbus/tcp/mbtcp.h b/HardWare/FreeModbus/modbus/tcp/mbtcp.h new file mode 100644 index 0000000..7818b76 --- /dev/null +++ b/HardWare/FreeModbus/modbus/tcp/mbtcp.h @@ -0,0 +1,53 @@ +/* + * FreeModbus Libary: A portable Modbus implementation for Modbus ASCII/RTU. + * Copyright (c) 2006-2018 Christian Walter + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * File: $Id: mbtcp.h,v 1.2 2006/12/07 22:10:34 wolti Exp $ + */ + +#ifndef _MB_TCP_H +#define _MB_TCP_H + +#ifdef __cplusplus +PR_BEGIN_EXTERN_C +#endif + +/* ----------------------- Defines ------------------------------------------*/ +#define MB_TCP_PSEUDO_ADDRESS 255 + +/* ----------------------- Function prototypes ------------------------------*/ + eMBErrorCode eMBTCPDoInit( USHORT ucTCPPort ); +void eMBTCPStart( void ); +void eMBTCPStop( void ); +eMBErrorCode eMBTCPReceive( UCHAR * pucRcvAddress, UCHAR ** pucFrame, + USHORT * pusLength ); +eMBErrorCode eMBTCPSend( UCHAR _unused, const UCHAR * pucFrame, + USHORT usLength ); + +#ifdef __cplusplus +PR_END_EXTERN_C +#endif +#endif diff --git a/HardWare/FreeModbus/port/FreeRTOS/port.c b/HardWare/FreeModbus/port/FreeRTOS/port.c new file mode 100644 index 0000000..c83d44c --- /dev/null +++ b/HardWare/FreeModbus/port/FreeRTOS/port.c @@ -0,0 +1,86 @@ +/* + * FreeModbus Libary: RT-Thread Port + * Copyright (C) 2013 Armink + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2.1 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * + * File: $Id: port.c,v 1.60 2015/02/01 9:18:05 Armink $ + */ + +/* ----------------------- System includes --------------------------------*/ + +/* ----------------------- Modbus includes ----------------------------------*/ +#include "port.h" +/* ----------------------- Variables ----------------------------------------*/ + +/* ----------------------- Start implementation -----------------------------*/ +void EnterCriticalSection(void) { taskENTER_CRITICAL(); } + +void ExitCriticalSection(void) { taskEXIT_CRITICAL(); } +/*put bytes in buff*/ +void Put_in_fifo(Serial_fifo *buff, uint8_t *putdata, int length) { + + portDISABLE_INTERRUPTS(); + while (length--) { + buff->buffer[buff->put_index] = *putdata; + buff->put_index += 1; + if (buff->put_index >= FIFO_SIZE_MAX) + buff->put_index = 0; + /* if the next position is read index, discard this 'read char' */ + if (buff->put_index == buff->get_index) { + buff->get_index += 1; + if (buff->get_index >= FIFO_SIZE_MAX) + buff->get_index = 0; + } + } + portENABLE_INTERRUPTS(); +} +/*get bytes from buff*/ +int Get_from_fifo(Serial_fifo *buff, uint8_t *getdata, int length) { + int size = length; + /* read from software FIFO */ + while (length) { + int ch; + /* disable interrupt */ + portDISABLE_INTERRUPTS(); + if (buff->get_index != buff->put_index) { + ch = buff->buffer[buff->get_index]; + buff->get_index += 1; + if (buff->get_index >= FIFO_SIZE_MAX) + buff->get_index = 0; + } else { + /* no data, enable interrupt and break out */ + portENABLE_INTERRUPTS(); + break; + } + *getdata = ch & 0xff; + getdata++; + length--; + /* enable interrupt */ + portENABLE_INTERRUPTS(); + } + return size - length; +} +/*判断是否进入在中断中*/ +#ifndef IS_IRQ() +extern __asm uint32_t vPortGetIPSR(void); //调用FreeRTOS API +__inline bool IS_IRQ(void) //使用内联函数提高速度 +{ + if (vPortGetIPSR()) { + return TRUE; + } + return FALSE; +} +#endif // MACRO diff --git a/HardWare/FreeModbus/port/FreeRTOS/portevent.c b/HardWare/FreeModbus/port/FreeRTOS/portevent.c new file mode 100644 index 0000000..2032377 --- /dev/null +++ b/HardWare/FreeModbus/port/FreeRTOS/portevent.c @@ -0,0 +1,79 @@ +/* + * FreeModbus Libary: RT-Thread Port + * Copyright (C) 2013 Armink + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2.1 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * + * File: $Id: portevent.c,v 1.60 2013/08/13 15:07:05 Armink $ + */ + +/* ----------------------- Modbus includes ----------------------------------*/ +#include "mb.h" +#include "mbport.h" +#include "port.h" + +/* ----------------------- Variables ----------------------------------------*/ +static EventGroupHandle_t xSlaveOsEvent; +/* ----------------------- Start implementation -----------------------------*/ +BOOL xMBPortEventInit(void) { + xSlaveOsEvent = xEventGroupCreate(); + if (xSlaveOsEvent != NULL) { + MODBUS_DEBUG("xMBPortEventInit Success!\r\n"); + } else { + MODBUS_DEBUG("xMBPortEventInit Faild !\r\n"); + return FALSE; + } + return TRUE; +} + +BOOL xMBPortEventPost(eMBEventType eEvent) { + BaseType_t flag; + MODBUS_DEBUG("Post eEvent=%d!\r\n", eEvent); + if (xSlaveOsEvent != NULL) { + if (IS_IRQ()) { + xEventGroupSetBitsFromISR(xSlaveOsEvent, eEvent, &flag); + } else { + xEventGroupSetBits(xSlaveOsEvent, eEvent); + } + } + return TRUE; +} + +BOOL xMBPortEventGet(eMBEventType *eEvent) { + uint32_t recvedEvent; + /* waiting forever OS event */ + recvedEvent = xEventGroupWaitBits(xSlaveOsEvent, + EV_READY | EV_FRAME_RECEIVED | EV_EXECUTE | + EV_FRAME_SENT, /* Ȥ¼ + */ + pdTRUE, /* ˳ʱ¼?? */ + pdFALSE, /* Ȥ?? */ + portMAX_DELAY); /* ָʱ¼,޵ȴ */ + switch (recvedEvent) { + case EV_READY: + *eEvent = EV_READY; + break; + case EV_FRAME_RECEIVED: + *eEvent = EV_FRAME_RECEIVED; + break; + case EV_EXECUTE: + *eEvent = EV_EXECUTE; + break; + case EV_FRAME_SENT: + *eEvent = EV_FRAME_SENT; + break; + } + return TRUE; +} diff --git a/HardWare/FreeModbus/port/FreeRTOS/portevent_m.c b/HardWare/FreeModbus/port/FreeRTOS/portevent_m.c new file mode 100644 index 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z>{3&$lw)%6*I4xh^<}0^{4`K`%gg}pU=bkx3oM!?B<5`5klpbT2BuRqd;d?n9 zIZz3%qSqbd?Q)fKNqR9x6znybRqZc`J^NS{1wA26QCr7Q{NM=!ko>M8Xxgjqw)lwq z?tq1S5-@0g($>_VQ4{`@)N@arJ9A~mLD9=}OwwLS%U$=>7SL%(PAItb+z6<#+8uxh zlYo{ytl&15k;jPYzeh*|)`G|bp3TY0H|tsV#!DNO9iwOYd5E?jrlN#{oX;ykI3!p~ zKA*EMkKKyHj8F7^T(+0O{NnjSA{2^+(Hu9^!!S*e2VceJmQN z_QtB2!mu|VwdcE?3(PlDCuCZoqZEoHH?9`$S%(2>ZEJh0%Jt7a8f(&)B>+L1-E;r#;kCy)OK7# zrbZ_cuwrMuS>+zXEQazvRi?HPDv({4agx!7e6}ERnnJWjL1H^{vF6|g-kk$1ihkUc z8J~l+cTp@3p7`|-i9hI+u-bb2Ks`O>PA{H zkt_p_ + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2.1 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * + * File: $Id: portserial.c,v 1.60 2013/08/13 15:07:05 Armink $ + */ +#include "port.h" +/* ----------------------- Modbus includes ----------------------------------*/ +#include "mb.h" +#include "mbport.h" + +/* ----------------------- Static variables ---------------------------------*/ +/* software simulation serial transmit IRQ handler thread */ +static TaskHandle_t thread_serial_soft_trans_irq = NULL; +/* serial event */ +static EventGroupHandle_t event_serial; +/* modbus slave serial device */ +static UART_HandleTypeDef *serial; +/* + * Serial FIFO mode + */ + +static volatile uint8_t rx_buff[FIFO_SIZE_MAX]; +static Serial_fifo Slave_serial_rx_fifo; +/* ----------------------- Defines ------------------------------------------*/ +/* serial transmit event */ +#define EVENT_SERIAL_TRANS_START (1 << 0) + +/* ----------------------- static functions ---------------------------------*/ +static void prvvUARTTxReadyISR(void); +static void prvvUARTRxISR(void); +static void serial_soft_trans_irq(void *parameter); +static void Slave_TxCpltCallback(struct __UART_HandleTypeDef *huart); +static void Slave_RxCpltCallback(struct __UART_HandleTypeDef *huart); +static int stm32_getc(void); +static int stm32_putc(CHAR c); +/* ----------------------- Start implementation -----------------------------*/ +BOOL xMBPortSerialInit(UCHAR ucPORT, ULONG ulBaudRate, UCHAR ucDataBits, + eMBParity eParity) { + /** + * set 485 mode receive and transmit control IO + * @note MODBUS_SLAVE_RT_CONTROL_PIN_INDEX need be defined by user + */ + // rt_pin_mode(MODBUS_SLAVE_RT_CONTROL_PIN_INDEX, PIN_MODE_OUTPUT); + + /* set serial name */ + if (ucPORT == 1) { +#if defined(USING_UART1) + extern UART_HandleTypeDef huart1; + serial = &huart1; + MODBUS_DEBUG("Slave using uart1!\r\n"); + +#endif + } else if (ucPORT == 2) { +#if defined(USING_UART2) + extern UART_HandleTypeDef huart2; + serial = &huart2; + MODBUS_DEBUG("Slave using uart2!\r\n"); + +#endif + } else if (ucPORT == 3) { +#if defined(USING_UART3) + extern UART_HandleTypeDef huart3; + serial = &huart3; + MODBUS_DEBUG("Slave using uart3!\r\n"); +#endif + } + /* set serial configure */ + + serial->Init.StopBits = UART_STOPBITS_1; + serial->Init.BaudRate = ulBaudRate; + switch (eParity) { + case MB_PAR_NONE: { + serial->Init.WordLength = UART_WORDLENGTH_8B; + serial->Init.Parity = UART_PARITY_NONE; + break; + } + case MB_PAR_ODD: { + serial->Init.WordLength = UART_WORDLENGTH_9B; + serial->Init.Parity = UART_PARITY_ODD; + break; + } + case MB_PAR_EVEN: { + serial->Init.WordLength = UART_WORDLENGTH_9B; + serial->Init.Parity = UART_PARITY_EVEN; + break; + } + } + if (HAL_UART_Init(serial) != HAL_OK) { + Error_Handler(); + } + __HAL_UART_DISABLE_IT(serial, UART_IT_RXNE); + __HAL_UART_DISABLE_IT(serial, UART_IT_TC); + /*registe recieve callback*/ + HAL_UART_RegisterCallback(serial, HAL_UART_RX_COMPLETE_CB_ID, + Slave_RxCpltCallback); + /* software initialize */ + Slave_serial_rx_fifo.buffer = rx_buff; + Slave_serial_rx_fifo.get_index = 0; + Slave_serial_rx_fifo.put_index = 0; + + /* ڷ߳*/ + event_serial = xEventGroupCreate(); //¼ + if (NULL != event_serial) { + MODBUS_DEBUG("Create Slave event_serial Event success!\r\n"); + } else { + MODBUS_DEBUG("Create Slave event_serial Event Faild!\r\n"); + } + BaseType_t xReturn = + xTaskCreate((TaskFunction_t)serial_soft_trans_irq, /* */ + (const char *)"slave trans", /* */ + (uint16_t)128, /* ջ*/ + (void *)NULL, /* ڲ */ + (UBaseType_t)12, /* ȼ*/ + (TaskHandle_t *)&thread_serial_soft_trans_irq); /**/ + + if (xReturn == pdPASS) { + MODBUS_DEBUG("xTaskCreate slave trans success\r\n"); + } + return TRUE; +} + +void vMBPortSerialEnable(BOOL xRxEnable, BOOL xTxEnable) { + __HAL_UART_CLEAR_FLAG(serial,UART_FLAG_RXNE); + __HAL_UART_CLEAR_FLAG(serial,UART_FLAG_TC); + if (xRxEnable) { + /* enable RX interrupt */ + __HAL_UART_ENABLE_IT(serial, UART_IT_RXNE); + /* switch 485 to receive mode */ + MODBUS_DEBUG("RS485_RX_MODE\r\n"); + SLAVE_RS485_RX_MODE; + } else { + /* switch 485 to transmit mode */ + MODBUS_DEBUG("RS485_TX_MODE\r\n"); + SLAVE_RS485_TX_MODE; + /* disable RX interrupt */ + __HAL_UART_DISABLE_IT(serial, UART_IT_RXNE); + } + if (xTxEnable) { + /* start serial transmit */ + xEventGroupSetBits(event_serial, EVENT_SERIAL_TRANS_START); + } else { + /* stop serial transmit */ + xEventGroupClearBits(event_serial, EVENT_SERIAL_TRANS_START); + /*֡*/ + // printf("ms=%.2f,fps=%.2f\r\n", __HAL_TIM_GetCounter(&htim7) / 100.f, + // 1000.f / (__HAL_TIM_GetCounter(&htim7) / 100.f)); + } +} + +void vMBPortClose(void) { __HAL_UART_DISABLE(serial); } +/*Send a byte*/ +BOOL xMBPortSerialPutByte(CHAR ucByte) { + stm32_putc(ucByte); + return TRUE; +} +/*Get a byte from fifo*/ +BOOL xMBPortSerialGetByte(CHAR *pucByte) { + Get_from_fifo(&Slave_serial_rx_fifo, (uint8_t *)pucByte, 1); + return TRUE; +} + +/* + * Create an interrupt handler for the transmit buffer empty interrupt + * (or an equivalent) for your target processor. This function should then + * call pxMBFrameCBTransmitterEmpty( ) which tells the protocol stack that + * a new character can be sent. The protocol stack will then call + * xMBPortSerialPutByte( ) to send the character. + */ +void prvvUARTTxReadyISR(void) { pxMBFrameCBTransmitterEmpty(); } + +/* + * Create an interrupt handler for the receive interrupt for your target + * processor. This function should then call pxMBFrameCBByteReceived( ). The + * protocol stack will then call xMBPortSerialGetByte( ) to retrieve the + * character. + */ +void prvvUARTRxISR(void) { pxMBFrameCBByteReceived(); } + +/** + * Software simulation serial transmit IRQ handler. + * + * @param parameter parameter + */ +static void serial_soft_trans_irq(void *parameter) { + uint32_t recved_event; + while (1) { + /* waiting for serial transmit start */ + xEventGroupWaitBits(event_serial, /* ¼ */ + EVENT_SERIAL_TRANS_START, /* Ȥ¼ */ + pdFALSE, /* ˳ʱ¼?? */ + pdFALSE, /* Ȥ?? */ + portMAX_DELAY); /* ָʱ¼,޵ȴ */ + /* execute modbus callback */ + prvvUARTTxReadyISR(); + } +} + +/** + * @brief Rx Transfer completed callbacks. + * @param huart Pointer to a UART_HandleTypeDef structure that contains + * the configuration information for the specified UART module. + * @retval None + */ +void Slave_RxCpltCallback(UART_HandleTypeDef *huart) { + int ch = -1; + while (1) { + ch = stm32_getc(); + if (ch == -1) + break; + Put_in_fifo(&Slave_serial_rx_fifo, (uint8_t *)&ch, 1); + } + prvvUARTRxISR(); +} +/*UARTһֽ*/ +static int stm32_putc(CHAR c) { + serial->Instance->DR = c; + while (!(serial->Instance->SR & UART_FLAG_TC)) + ; + return TRUE; +} +/*UARTһֽ*/ +static int stm32_getc(void) { + int ch; + ch = -1; + if (serial->Instance->SR & UART_FLAG_RXNE) { + ch = serial->Instance->DR & 0xff; + } + return ch; +} \ No newline at end of file diff --git a/HardWare/FreeModbus/port/FreeRTOS/portserial_m.c b/HardWare/FreeModbus/port/FreeRTOS/portserial_m.c new file mode 100644 index 0000000000000000000000000000000000000000..c2272ff0e73b34796e3e9e09a80452748811d799 GIT binary patch literal 16384 zcmeI%LzgB@6DHuYZQDkdZQHi_l)8*A+qP}nwr$(ie6yPQ5pS+y6Zgq;#U@TBxvGjN zy`-6ushJZ!DJdzr;fl6ZlWyKY{-Q{uB65;6H)?1Y#MsY0zXJ`SG~FYFxKKaYL)YQ|U>GGkx-F%0Nr` zfA{um(mBL5>){+am-}B!(3fyV{H<`SzyD%mEA}A;a;@^j#tiYzt|^0?nR!aia}!%M zKLUVR1zQ1RsIlA0WO)?}?Byz#Sa*d%n{JAk=%Rxj5C@)ZjM^D4F@=2_j_ni12d;Q2 z-i{LWK9*ad5yo~-?(Ve{d9d=-*~-H2{!jWaD^5$|fqT=YoizvenU{NHuiste$Bmx> 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Lesser General Public + * License as published by the Free Software Foundation; either + * version 2.1 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * + * File: $Id: porttimer.c,v 1.60 2013/08/13 15:07:05 Armink $ + */ + +/* ----------------------- Platform includes --------------------------------*/ +#include "port.h" + +/* ----------------------- Modbus includes ----------------------------------*/ +#include "mb.h" +#include "mbport.h" + +/* ----------------------- static functions ---------------------------------*/ +static TimerHandle_t timer; +static void prvvTIMERExpiredISR(void); +static void timer_timeout_ind(TIM_HandleTypeDef *xTimer); +/* ----------------------- Start implementation -----------------------------*/ +BOOL xMBPortTimersInit(USHORT usTim1Timerout50us) { + /* + Freertos can't create timer in isr! + So,I use hardware timer here! !Freq=1Mhz + */ + timer = xTimerCreate( + "Slave timer", + (50 * usTim1Timerout50us) / (1000 * 1000 / configTICK_RATE_HZ) + 1, + pdFALSE, (void *)2, timer_timeout_ind); + if (timer != NULL) + return TRUE; +} + +void vMBPortTimersEnable() { + if (IS_IRQ()) { + xTimerStartFromISR((TimerHandle_t)timer, 0); + } else { + xTimerStart((TimerHandle_t)timer, 0); + } +} + +void vMBPortTimersDisable() { + if (IS_IRQ()) { + xTimerStopFromISR((TimerHandle_t)timer, 0); + } else { + xTimerStop((TimerHandle_t)timer, 0); + } +} + +void prvvTIMERExpiredISR(void) { (void)pxMBPortCBTimerExpired(); } +static void timer_timeout_ind(TIM_HandleTypeDef *xTimer) { + prvvTIMERExpiredISR(); +} diff --git a/HardWare/FreeModbus/port/FreeRTOS/porttimer_m.c b/HardWare/FreeModbus/port/FreeRTOS/porttimer_m.c new file mode 100644 index 0000000..1b66633 --- /dev/null +++ b/HardWare/FreeModbus/port/FreeRTOS/porttimer_m.c @@ -0,0 +1,117 @@ +/* + * FreeModbus Libary: RT-Thread Port + * Copyright (C) 2013 Armink + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2.1 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * + * File: $Id: porttimer_m.c,v 1.60 2013/08/13 15:07:05 Armink add Master + * Functions$ + */ + +/* ----------------------- Platform includes --------------------------------*/ +#include "port.h" + +/* ----------------------- Modbus includes ----------------------------------*/ +#include "mb.h" +#include "mb_m.h" +#include "mbport.h" +#if MB_MASTER_RTU_ENABLED > 0 || MB_MASTER_ASCII_ENABLED > 0 +/* ----------------------- Variables ----------------------------------------*/ +static USHORT usT35TimeOut50us; +static TimerHandle_t timer = NULL; +static void prvvTIMERExpiredISR(void); +static void timer_timeout_ind(TimerHandle_t xTimer); +static BaseType_t pxHigherPriorityTaskWoken; +/* ----------------------- static functions ---------------------------------*/ +static void prvvTIMERExpiredISR(void); +/* ----------------------- Start implementation -----------------------------*/ +BOOL xMBMasterPortTimersInit(USHORT usTimeOut50us) { + /* backup T35 ticks */ + usT35TimeOut50us = usTimeOut50us; + timer = xTimerCreate( + "Master timer", + (50 * usT35TimeOut50us) / (1000 * 1000 / configTICK_RATE_HZ) + 1, pdFALSE, + (void *)1, timer_timeout_ind); + if (timer != NULL) { + MODBUS_DEBUG(" Create Master Timer Success!\r\n"); + return TRUE; + } else { + MODBUS_DEBUG(" Create Master Timer Faild!\r\n"); + return FALSE; + } + +} + +void vMBMasterPortTimersT35Enable() { + // MODBUS_DEBUG("Start master timer!\r\n"); + uint32_t timer_tick = + (50 * usT35TimeOut50us) / (1000 * 1000 / configTICK_RATE_HZ) + 1; + //printf("Set Timre=%d ms\r\n", timer_tick); + /* Set current timer mode, don't change it.*/ + vMBMasterSetCurTimerMode(MB_TMODE_T35); + if (IS_IRQ()) { + xTimerChangePeriodFromISR((TimerHandle_t)timer, timer_tick, &pxHigherPriorityTaskWoken); + } else { + xTimerChangePeriod((TimerHandle_t)timer, timer_tick, 0); + } +} + +void vMBMasterPortTimersConvertDelayEnable() { + + uint32_t timer_tick = + MB_MASTER_DELAY_MS_CONVERT * configTICK_RATE_HZ / 1000; + //printf("Set Timre=%d ms\r\n", timer_tick); + /* Set current timer mode, don't change it.*/ + vMBMasterSetCurTimerMode(MB_TMODE_CONVERT_DELAY); + if (IS_IRQ()) { + xTimerChangePeriodFromISR((TimerHandle_t)timer, timer_tick, &pxHigherPriorityTaskWoken); + } else { + xTimerChangePeriod((TimerHandle_t)timer, timer_tick, 0); + } +} + +void vMBMasterPortTimersRespondTimeoutEnable() { + uint32_t timer_tick = + MB_MASTER_TIMEOUT_MS_RESPOND * configTICK_RATE_HZ / 1000; + //printf("Set %d\r\n", timer_tick); + /* Set current timer mode, don't change it.*/ + vMBMasterSetCurTimerMode(MB_TMODE_RESPOND_TIMEOUT); + if (IS_IRQ()) { + xTimerChangePeriodFromISR((TimerHandle_t)timer, timer_tick, &pxHigherPriorityTaskWoken); + } else { + xTimerChangePeriod((TimerHandle_t)timer, timer_tick, 0); + } +} + +void vMBMasterPortTimersDisable() { + // MODBUS_DEBUG("Stop master timer!\r\n"); + //printf("STop!\r\n"); + if (IS_IRQ()) { + xTimerStopFromISR((TimerHandle_t)timer, 0); + } else { + xTimerStop((TimerHandle_t)timer, 0); + } +} + +void prvvTIMERExpiredISR(void) { (void)pxMBMasterPortCBTimerExpired(); } + +static void timer_timeout_ind(xTimerHandle xTimer) { + // MODBUS_DEBUG(" Master Timer callback!\r\n"); + //printf("%.2f ms\r\n",(float)__HAL_TIM_GetCounter(&htim7)/100.f); + prvvTIMERExpiredISR(); + +} + +#endif diff --git a/HardWare/FreeModbus/port/port.h b/HardWare/FreeModbus/port/port.h new file mode 100644 index 0000000000000000000000000000000000000000..d9460e13df23f90bebf71bda6f9193b285d7a963 GIT binary patch literal 8192 zcmeI%Ra+Deum5^_~q>%-dmXJn3>4v4d8v%($xn|Yskeiw5yteP-cUZ~{<3rkmCW@cvAHk7pDZTB%r&HaR!4j`xi4S)#< z0{mY|0?+{SnN#8i4FCX3o*IDjqw-3Q=g{qF#7Udy`A05O5Td?3Gvm7DhY(EVA!jpg z(Bkz0MMYoRs1+91E}|ewo}rS|t2*)fcsWW=my*d<_;k$R(xzI1*X-eS!17h%c4o-c z|H~U>4gD|g>y6GUAy}?L&L%_me|f-)zSjTEyFnB*`~_CNu&z#IB>uOy`rn)hz12_8 zb2+a6+xV$_5_l4L5_l4L5_l4L5_l4L5_l4L5_l4L5_l3Y?B0D5-z!?ow^2@$sDq5H zEHm+obe%AbJxN+3uw-uG{VD*JH|ot}NMZ{*M^ywY7L9naIHq_E`0ZVlB&dMUuv6AZ znf0x6FOE9K&O~qKfO6JS%FYACWwGIlG_T!B7Gr}qXGHxFAT#QiRVm1^JGLTX$oYZxCME-)6erk8VRPek-xW(H!Gyz6Gqn@@7*o8GrWN}?mT zXR*U1-?0;17iW6@qRQg$wkHQXfNCUoXGj6u27l)8^}lc3w3*mU6jjaWjWwW|<@=kg zQkFfqWjSH`&UQ_>?w$AH;0Xq5i=wf&E_HN2=)J)pZw5)=<-5i`E1q7}Pu5hQLI1<2 zB_wqTD7@ck?1CA6tMDM2rkd0vUj8frG}>Sk^dL@1`fK8~@3OlF;5RqP87olFprpNr zis5KJ;JTC(x`elSbj`VkE!AplC@*F%QF9P&Df?nV|d8g1UG}51)DW+|W`p z3*9kV|3y2=%vQlk$g00__7DwvzU7`ATOxB${0gi3z3R`o!Mb3P?j7^S^USf1V%I8f zuhF7zM``(Ea(B3+tRS_iqh(ZHvAB*w2ETuf`7ihw_#NM>;##|`WbwyeY(kh4JQNr^ zE0D?JD4WA69IQe3`bV-OMUlro^iRA$GXcd{bSsN?PG+s@Z%`=8XIK3viGGHI377%{&pdcJqC;)R_7AZFda4q3bdMmkWS?`@`3$2S!I*+F2Xf0N zS>gFT*j(=y>1~wBth5)lM3VT;J^s=MUc0;nGr_?+tt+t5X{3QzvrLWh+#qwfuSkm_ ziLs&Jd!V~aebfUT?yfHF$fXP()uds`o6{FyC`LWvP`NT(buIND6_Jt2+f1cK1huy0 zWRb|-M)wA2$;&NwoJ4^rt*ug&ryRBgB6f>Cu``w;>O0%>i?7jGf)isk;a-S2rkg>{ zmQryad;3(X<5JXn!@=bIr60bBMS@}bTsnJQ^I4R7)ng0o(h7sn5${bLK(5X`c7)~X z5c+14sh90gT-Se?zojAthsO8t}%4BzEgqh)&?)s3DH0%zjt6)q-p3P zQ;4WZ>eU`;!%s`8*yoCNswN$yHHkYc92UI6C+J?2ojaJYj>;`A?o*Yo(m$h6jpPf^ zZ9tb*!(kdQc*PO^JK0X|`fEe)orCRG-7~o_j@WoulG)3O)IyhJ2= z1FpzVsJ!>1)d^-db)JJ=r`JsRV&p&4L?Nc7sKBPT<9#WxnhIM?GVyS|uMux%d7~t@ zkuTFgMj9n8$%K1wOAK}**^o)RnW7ln5E%3-*n8^DmSmZ2oHTttex^ zJiYv6M{UL)rLa|UW;;R62yDdNB9FpJe8gXbOm5_h`PoB|WYuc~ar#hwcaJ-4?95z`IIPhc}3!gji~a(d5Ff1mf*7Sc&jBo()g- zzlwEZ^t2rb8hhDdj}9L=aN#lZ+@H^#Tg*1)&aZNp42$G(0GF0zW#{;&fx+i?@Ht5> zmIfB;0`z36ioBhTnIogDHFItkuU?%FBzxAgE+tg-d4Z`Hu9h6_zz>S^)Uc!rOoN41 zr_^h^Z}<=&&KOAhnx-0@Frg057;4ihI}$YFpqOW*TRTB&weF%6L%T^^5<(getq+^m z_Rh!4pqUt%baTrPt{kd6IwWg*3-2GWCY$w9k018R_5zDyud)ake9?QxWiw2Gj55lWLjN_ zf-`RSQ9%L`8)Zeg%02^HC#01t$qUik`$n6fw)WCqw-@B|bn!|2BTK$)mJ5i$MCE(&D z%-R`-Q3ud?l&l!(bc^T4J*a*sRPOmna>kk8EkS?>MDXR?+Hc7-M|?4|KSVJPXdW;) zB{Kf9q1r5Dd}(Ot_D&m2U4OY}m1V>*LWO~!XmTI&(~Ca^ksQFgbU>5a@5Ey?J(BwL zJWb)C3M}Wg(SakngmRT+pma z9&b}5^f8}6U5l4ZIoi1#B8OfU6q!*AMy zwY`z{Q^4D;`Cwm)zC>G3f`xSVA&lu)ABxj^U&tOA-(dm14jkV^Y|{cq#wa86S3diZtL(wRypl7qg!swi*yBfaqthwyQMf)7DVIP#gjI***$~u zR0yme+irHsdHeRyG5)*6QFyiy%EflJpH83Wfyk6MAN%h-Zk}MR3#_*XD$>h*_q`#q ze$UzxRq(iaU_lk7!INm*X13Q?VLKWyOW}J!Nvb?qhy08DzNaIN-~;D6Jdko%C}IiN zwBroW^_xo~Q_09CX7^_+%a8^ur90Y1Ou}hbD^3gX0u?X(`}|p?s(x!t#b3@alVZ?xi+xN==>hS8ULRahFun$K+ay;<@Zl?#8=ItiY}+)^ttYfUmnk8!H$j zUCd`Z&-%Lw=zTk)O0U9PX&;^ks$zZ;5$m;?M`Qig!M(a(h{o%qyahG*YMrb_=Qg`e z1AV0$&a)XJGc1`LDAxETT0^iVRSxiK7Q(tebysK5lTe`gS??Lb(hKPtM`#dAm}+Y8 zT`5S3ze(4f=I(6M(b7nG*+#=8uN^(Ixj|mpSx0XN#(bUrua(02eKN=OZ)ZG+gj4V2 zD`4G-fkm>JfhLIGC2@PBQr*~sHKvtZ6DtD=3h!~U_Iv9?vXmq>zd9;x(w=5`<`w)# zxPQPK1NMS|r-n1Ipp>ava*BpE}ZPoeghULP6kN=8W+I zy5Zc}`>hOk;1GcGAdnyYCACms9db#}*q7jAK12vC`R9z2(_d1bi_o@6lP4u?uE0z2 zkml}bLn9J@8L+zX1NW77{6cNxfo5PM_W>IMvg#CQZiV(e7g!Z%i4fTTz zTYdM=x%(D^`r|dBiAgW%$F&envM%2%M?Oj3*V4nA& z(H@Yk-?8a92z?wB*d%M>mKzzvRr3nSc|LJhl-5b6fA)q@$PLK4+XZ(6G|@SmfZKj; z15@=t8UKn?so^P(8Ly8Gao8p^ffGi;6cz%h9#yPE$Ncdh!$>$S^z-<$^GYOa$7p1x z(W-(O6Ps9o&8>lY6a7l&xQR2MN~*Lt$94vS(*B>4{H2)kR`0b&y}i4Yr?aDXOH`tislKhMmaed%LF>!u-qdl@gGxjcHs4D0Al%ItHmx(d{TTtqd7x zXNjNH{e0A3La%K3>juLmV|8R!RNp2F)}Y%#d~gvkmd5zXdiAs$g@xP4zPP!w!8R>= zI8Ul1C2(M5_w&OfTifgKmw7rW&e-g9$OuxN`!OjGdb2G@6Lv5^;ETsc6E|!5O7FzQ ztcD-)w89rJMczLU>5cdWv5Xr6gl(*u_{?8oN$iMAEW^-!I7ot0Ja{!K(|h3i+!_@% zm~^B5e{{oyN`_3AyTbuI>4g92ZRc~MMv%=hSy;>X8bM{l0oF&<=W8)(4 z&M-OI4wc%Q?r~xyPtPTKmro?>LNgj`BYsNCUo1O>J>{ZPtM=xVuBc!8btgeb>p&f@ zR`o}RW`brfS9!3GFP@@mFv`avVf5X+gmH~K?6sQ1b=062UAS7wz&)ksdV^It+8DMGFGLXU#7;_T>P zX$f>)b)~?cX2?lbpX0+-pp>Z~B + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2.1 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * + * File: $Id: user_mb_app.c,v 1.60 2013/11/23 11:49:05 Armink $ + */ +#include "user_mb_app.h" + +/*------------------------Slave mode use these variables----------------------*/ +//Slave mode:DiscreteInputs variables +USHORT usSDiscInStart = S_DISCRETE_INPUT_START; +#if S_DISCRETE_INPUT_NDISCRETES % 8 +UCHAR ucSDiscInBuf[S_DISCRETE_INPUT_NDISCRETES / 8 + 1]; +#else +UCHAR ucSDiscInBuf[S_DISCRETE_INPUT_NDISCRETES / 8]; +#endif +//Slave mode:Coils variables +USHORT usSCoilStart = S_COIL_START; +#if S_COIL_NCOILS % 8 +UCHAR ucSCoilBuf[S_COIL_NCOILS / 8 + 1]; +#else +UCHAR ucSCoilBuf[S_COIL_NCOILS / 8]; +#endif +//Slave mode:InputRegister variables +USHORT usSRegInStart = S_REG_INPUT_START; +USHORT usSRegInBuf[S_REG_INPUT_NREGS]; +//Slave mode:HoldingRegister variables +USHORT usSRegHoldStart = S_REG_HOLDING_START; +USHORT usSRegHoldBuf[S_REG_HOLDING_NREGS]; +//Slave mode:all variables +Slave_data Slave_station = { + ucSDiscInBuf, + ucSCoilBuf, + usSRegInBuf, + usSRegHoldBuf, +}; +/** + * Modbus slave input register callback function. + * + * @param pucRegBuffer input register buffer + * @param usAddress input register address + * @param usNRegs input register number + * + * @return result + */ +eMBErrorCode +eMBRegInputCB(UCHAR *pucRegBuffer, USHORT usAddress, USHORT usNRegs) +{ + eMBErrorCode eStatus = MB_ENOERR; + USHORT iRegIndex; + USHORT *pusRegInputBuf; + USHORT REG_INPUT_START; + USHORT REG_INPUT_NREGS; + USHORT usRegInStart; + + pusRegInputBuf = usSRegInBuf; + REG_INPUT_START = S_REG_INPUT_START; + REG_INPUT_NREGS = S_REG_INPUT_NREGS; + usRegInStart = usSRegInStart; + + /* it already plus one in modbus function method. */ + usAddress--; + + if ((usAddress >= REG_INPUT_START) && (usAddress + usNRegs <= REG_INPUT_START + REG_INPUT_NREGS)) + { + iRegIndex = usAddress - usRegInStart; + while (usNRegs > 0) + { + *pucRegBuffer++ = (UCHAR)(pusRegInputBuf[iRegIndex] >> 8); + *pucRegBuffer++ = (UCHAR)(pusRegInputBuf[iRegIndex] & 0xFF); + iRegIndex++; + usNRegs--; + } + } + else + { + eStatus = MB_ENOREG; + } + + return eStatus; +} + +/** + * Modbus slave holding register callback function. + * + * @param pucRegBuffer holding register buffer + * @param usAddress holding register address + * @param usNRegs holding register number + * @param eMode read or write + * + * @return result + */ +eMBErrorCode eMBRegHoldingCB(UCHAR *pucRegBuffer, USHORT usAddress, + USHORT usNRegs, eMBRegisterMode eMode) +{ + eMBErrorCode eStatus = MB_ENOERR; + USHORT iRegIndex; + USHORT *pusRegHoldingBuf; + USHORT REG_HOLDING_START; + USHORT REG_HOLDING_NREGS; + USHORT usRegHoldStart; + + pusRegHoldingBuf = usSRegHoldBuf; + REG_HOLDING_START = S_REG_HOLDING_START; + REG_HOLDING_NREGS = S_REG_HOLDING_NREGS; + usRegHoldStart = usSRegHoldStart; + + /* it already plus one in modbus function method. */ + usAddress--; + + if ((usAddress >= REG_HOLDING_START) && (usAddress + usNRegs <= REG_HOLDING_START + REG_HOLDING_NREGS)) + { + iRegIndex = usAddress - usRegHoldStart; + switch (eMode) + { + /* read current register values from the protocol stack. */ + case MB_REG_READ: + while (usNRegs > 0) + { + *pucRegBuffer++ = (UCHAR)(pusRegHoldingBuf[iRegIndex] >> 8); + *pucRegBuffer++ = (UCHAR)(pusRegHoldingBuf[iRegIndex] & 0xFF); + iRegIndex++; + usNRegs--; + } + break; + + /* write current register values with new values from the protocol stack. */ + case MB_REG_WRITE: + while (usNRegs > 0) + { + pusRegHoldingBuf[iRegIndex] = *pucRegBuffer++ << 8; + pusRegHoldingBuf[iRegIndex] |= *pucRegBuffer++; + iRegIndex++; + usNRegs--; + } + break; + } + } + else + { + eStatus = MB_ENOREG; + } + return eStatus; +} + +/** + * Modbus slave coils callback function. + * + * @param pucRegBuffer coils buffer + * @param usAddress coils address + * @param usNCoils coils number + * @param eMode read or write + * + * @return result + */ +eMBErrorCode eMBRegCoilsCB(UCHAR *pucRegBuffer, USHORT usAddress, + USHORT usNCoils, eMBRegisterMode eMode) +{ + eMBErrorCode eStatus = MB_ENOERR; + USHORT iRegIndex, iRegBitIndex, iNReg; + UCHAR *pucCoilBuf; + USHORT COIL_START; + USHORT COIL_NCOILS; + USHORT usCoilStart; + iNReg = usNCoils / 8 + 1; + + pucCoilBuf = ucSCoilBuf; + COIL_START = S_COIL_START; + COIL_NCOILS = S_COIL_NCOILS; + usCoilStart = usSCoilStart; + + /* it already plus one in modbus function method. */ + usAddress--; + + if ((usAddress >= COIL_START) && + (usAddress + usNCoils <= COIL_START + COIL_NCOILS)) + { + iRegIndex = (USHORT)(usAddress - usCoilStart) / 8; + iRegBitIndex = (USHORT)(usAddress - usCoilStart) % 8; + switch (eMode) + { + /* read current coil values from the protocol stack. */ + case MB_REG_READ: + while (iNReg > 0) + { + *pucRegBuffer++ = xMBUtilGetBits(&pucCoilBuf[iRegIndex++], + iRegBitIndex, 8); + iNReg--; + } + pucRegBuffer--; + /* last coils */ + usNCoils = usNCoils % 8; + /* filling zero to high bit */ + *pucRegBuffer = *pucRegBuffer << (8 - usNCoils); + *pucRegBuffer = *pucRegBuffer >> (8 - usNCoils); + break; + + /* write current coil values with new values from the protocol stack. */ + case MB_REG_WRITE: + while (iNReg > 1) + { + xMBUtilSetBits(&pucCoilBuf[iRegIndex++], iRegBitIndex, 8, + *pucRegBuffer++); + iNReg--; + } + /* last coils */ + usNCoils = usNCoils % 8; + /* xMBUtilSetBits has bug when ucNBits is zero */ + if (usNCoils != 0) + { + xMBUtilSetBits(&pucCoilBuf[iRegIndex++], iRegBitIndex, usNCoils, + *pucRegBuffer++); + } + break; + } + } + else + { + eStatus = MB_ENOREG; + } + return eStatus; +} + +/** + * Modbus slave discrete callback function. + * + * @param pucRegBuffer discrete buffer + * @param usAddress discrete address + * @param usNDiscrete discrete number + * + * @return result + */ +eMBErrorCode eMBRegDiscreteCB(UCHAR *pucRegBuffer, USHORT usAddress, USHORT usNDiscrete) +{ + eMBErrorCode eStatus = MB_ENOERR; + USHORT iRegIndex, iRegBitIndex, iNReg; + UCHAR *pucDiscreteInputBuf; + USHORT DISCRETE_INPUT_START; + USHORT DISCRETE_INPUT_NDISCRETES; + USHORT usDiscreteInputStart; + iNReg = usNDiscrete / 8 + 1; + + pucDiscreteInputBuf = ucSDiscInBuf; + DISCRETE_INPUT_START = S_DISCRETE_INPUT_START; + DISCRETE_INPUT_NDISCRETES = S_DISCRETE_INPUT_NDISCRETES; + usDiscreteInputStart = usSDiscInStart; + + /* it already plus one in modbus function method. */ + usAddress--; + + if ((usAddress >= DISCRETE_INPUT_START) && (usAddress + usNDiscrete <= DISCRETE_INPUT_START + DISCRETE_INPUT_NDISCRETES)) + { + iRegIndex = (USHORT)(usAddress - usDiscreteInputStart) / 8; + iRegBitIndex = (USHORT)(usAddress - usDiscreteInputStart) % 8; + + while (iNReg > 0) + { + *pucRegBuffer++ = xMBUtilGetBits(&pucDiscreteInputBuf[iRegIndex++], + iRegBitIndex, 8); + iNReg--; + } + pucRegBuffer--; + /* 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898 @@ -3593,21 +3593,57 @@ 0 100 - 0 + 5 ../Core/Src/freertos.c - 2 - 128 - 136 + 13 + 335 + 359 + 1 + + 0 + + + ..\HardWare\FreeModbus\port\FreeRTOS\portevent_m.c + 31 + 49 + 64 + 1 + + 0 + + + ../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c + 32 + 680 + 691 + 1 + + 0 + + + ../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h + 0 + 544 + 561 + 1 + + 0 + + + ../Core/Inc/FreeRTOSConfig.h + 32 + 56 + 65 1 0 ../Core/Src/usart.c - 24 - 643 - 610 + 0 + 691 + 706 1 0 diff --git a/MDK-ARM/NBQlaohua.uvoptx b/MDK-ARM/NBQlaohua.uvoptx index fc8a5ab..967910d 100644 --- a/MDK-ARM/NBQlaohua.uvoptx +++ b/MDK-ARM/NBQlaohua.uvoptx @@ -117,10 +117,6 @@ Segger\JL2CM3.dll - - 0 - DLGUARM - 0 ARMRTXEVENTFLAGS @@ -129,7 +125,7 @@ 0 DLGTARM - (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0) + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=889,161,1147,749,0) 0 @@ -157,22 +153,67 @@ 0 1 - g_uart2_dev + ADCDataBuffer,0x0A 1 1 - g_uart2_data + pusRegHoldingBuf 2 1 - i + ucMBFrame 3 1 - ADCDataBuffer,0x0A + usMRegHoldBuf + + + 4 + 1 + ucMasterRTURcvBuf + + + 5 + 1 + MB_EX_NONE + + + 6 + 1 + eException + + + 7 + 1 + ucMBFrame + + + 8 + 1 + pucFrame + + + 9 + 1 + pusLength + + + 10 + 1 + pucRcvAddress + + + 11 + 1 + j + + + 12 + 1 + im12181b,0x0A @@ -708,7 +749,7 @@ Middlewares/FreeRTOS - 0 + 1 0 0 0 @@ -835,8 +876,8 @@ - MODBUS - 0 + ADS1115 + 1 0 0 0 @@ -847,8 +888,8 @@ 0 0 0 - ..\HardWare\STM32MB\modbus_master_test.c - modbus_master_test.c + ..\HardWare\ADS1115\ADS1115_drive.c + ADS1115_drive.c 0 0 @@ -859,8 +900,8 @@ 0 0 0 - ..\HardWare\STM32MB\modbus\mb_m.c - mb_m.c + ..\HardWare\ADS1115\IIC.c + IIC.c 0 0 @@ -871,115 +912,115 @@ 0 0 0 - ..\HardWare\STM32MB\modbus\rtu\mbrtu_m.c - mbrtu_m.c - 0 - 0 - - - 8 - 50 - 1 - 0 - 0 - 0 - ..\HardWare\STM32MB\modbus\rtu\mbcrc.c - mbcrc.c - 0 - 0 - - - 8 - 51 - 1 - 0 - 0 - 0 - ..\HardWare\STM32MB\modbus\functions\mbfunccoils_m.c - mbfunccoils_m.c - 0 - 0 - - - 8 - 52 - 1 - 0 - 0 - 0 - ..\HardWare\STM32MB\modbus\functions\mbfuncdisc_m.c - mbfuncdisc_m.c - 0 - 0 - - - 8 - 53 - 1 - 0 - 0 - 0 - ..\HardWare\STM32MB\modbus\functions\mbfuncholding_m.c - mbfuncholding_m.c - 0 - 0 - - - 8 - 54 - 1 - 0 - 0 - 0 - ..\HardWare\STM32MB\modbus\functions\mbfuncinput_m.c - mbfuncinput_m.c - 0 - 0 - - - 8 - 55 - 1 - 0 - 0 - 0 - ..\HardWare\STM32MB\modbus\functions\mbutils.c - mbutils.c - 0 - 0 - - - 8 - 56 - 1 - 0 - 0 - 0 - ..\HardWare\STM32MB\modbus\functions\mbfuncdiag.c - mbfuncdiag.c - 0 - 0 - - - 8 - 57 - 1 - 0 - 0 - 0 - ..\HardWare\STM32MB\modbus\functions\mbfuncother.c - mbfuncother.c + ..\HardWare\ADS1115\ADS1115_device.c + ADS1115_device.c 0 0 - MB_Port + ModBus 1 0 0 0 + + 9 + 50 + 1 + 0 + 0 + 0 + ..\HardWare\FreeModbus\modbus\mb_m.c + mb_m.c + 0 + 0 + + + 9 + 51 + 1 + 0 + 0 + 0 + ..\HardWare\FreeModbus\modbus\rtu\mbcrc.c + mbcrc.c + 0 + 0 + + + 9 + 52 + 1 + 0 + 0 + 0 + ..\HardWare\FreeModbus\modbus\rtu\mbrtu_m.c + mbrtu_m.c + 0 + 0 + + + 9 + 53 + 1 + 0 + 0 + 0 + ..\HardWare\FreeModbus\modbus\functions\mbfunccoils_m.c + mbfunccoils_m.c + 0 + 0 + + + 9 + 54 + 1 + 0 + 0 + 0 + ..\HardWare\FreeModbus\modbus\functions\mbfuncdisc_m.c + mbfuncdisc_m.c + 0 + 0 + + + 9 + 55 + 1 + 0 + 0 + 0 + ..\HardWare\FreeModbus\modbus\functions\mbfuncholding_m.c + mbfuncholding_m.c + 0 + 0 + + + 9 + 56 + 1 + 0 + 0 + 0 + ..\HardWare\FreeModbus\modbus\functions\mbfuncinput_m.c + mbfuncinput_m.c + 0 + 0 + + + 9 + 57 + 1 + 0 + 0 + 0 + ..\HardWare\FreeModbus\modbus\functions\mbfuncother.c + mbfuncother.c + 0 + 0 + 9 58 @@ -987,8 +1028,8 @@ 0 0 0 - ..\HardWare\STM32MB\port\user_mb_app_m.c - user_mb_app_m.c + ..\HardWare\FreeModbus\modbus\functions\mbutils.c + mbutils.c 0 0 @@ -999,8 +1040,8 @@ 0 0 0 - ..\HardWare\STM32MB\port\porttimer_m.c - porttimer_m.c + ..\HardWare\FreeModbus\modbus\functions\mbfuncdiag.c + mbfuncdiag.c 0 0 @@ -1011,43 +1052,43 @@ 0 0 0 - ..\HardWare\STM32MB\port\portserial_m.c - portserial_m.c - 0 - 0 - - - 9 - 61 - 1 - 0 - 0 - 0 - ..\HardWare\STM32MB\port\portevent_m.c - portevent_m.c - 0 - 0 - - - 9 - 62 - 1 - 0 - 0 - 0 - ..\HardWare\STM32MB\port\MB_port.c - MB_port.c + ..\HardWare\FreeModbus\port\user_mb_app_m.c + user_mb_app_m.c 0 0 - ADS1115 + ModBus_Port 1 0 0 0 + + 10 + 61 + 1 + 0 + 0 + 0 + ..\HardWare\FreeModbus\port\FreeRTOS\port.c + port.c + 0 + 0 + + + 10 + 62 + 1 + 0 + 0 + 0 + ..\HardWare\FreeModbus\port\FreeRTOS\portevent_m.c + portevent_m.c + 0 + 0 + 10 63 @@ -1055,8 +1096,8 @@ 0 0 0 - ..\HardWare\ADS1115\ADS1115_drive.c - ADS1115_drive.c + ..\HardWare\FreeModbus\port\FreeRTOS\portserial_m.c + portserial_m.c 0 0 @@ -1067,20 +1108,8 @@ 0 0 0 - ..\HardWare\ADS1115\IIC.c - IIC.c - 0 - 0 - - - 10 - 65 - 1 - 0 - 0 - 0 - ..\HardWare\ADS1115\ADS1115_device.c - ADS1115_device.c + ..\HardWare\FreeModbus\port\FreeRTOS\porttimer_m.c + porttimer_m.c 0 0 diff --git a/MDK-ARM/NBQlaohua.uvprojx b/MDK-ARM/NBQlaohua.uvprojx index 8a2906cda878c162bd31501b11ad2299a635796e..21bbf50a66b27602c41b9871e4b967c9de82fdbe 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Output:

*** Using Compiler 'V5.06 update 6 (build 750)', folder: 'C:\Keil_v5\ARM\ARMCC\Bin' Build target 'NBQlaohua' -compiling freertos.c... -../Core/Inc/adc.h(44): warning: #1295-D: Deprecated declaration ADC_Start - give arg types - void ADC_Start(); -../HardWare/STM32MB/port/MB_port.h(72): warning: #47-D: incompatible redefinition of macro "DEBUG" (declared at line 55 of "../Core/Inc/usart.h") - #define DEBUG -../Core/Src/freertos.c(61): warning: #188-D: enumerated type mixed with another type - .priority = 2, -../Core/Src/freertos.c(68): warning: #188-D: enumerated type mixed with another type - .priority = 2, -../Core/Src/freertos.c(75): warning: #188-D: enumerated type mixed with another type - .priority = 2, -../Core/Src/freertos.c(82): warning: #188-D: enumerated type mixed with another type - .priority = 2, -../Core/Src/freertos.c(219): warning: #188-D: enumerated type mixed with another type - MCU_LED(0); -../Core/Src/freertos.c(219): warning: #188-D: enumerated type mixed with another type - MCU_LED(0); -../Core/Src/freertos.c(221): warning: #188-D: enumerated type mixed with another type - MCU_LED(1); -../Core/Src/freertos.c(221): warning: #188-D: enumerated type mixed with another type - MCU_LED(1); -../Core/Src/freertos.c: 10 warnings, 0 errors +compiling APP_State.c... +..\HardWare\APP\APP_State.c(284): warning: #1-D: last line of file ends without a newline + } +..\HardWare\APP\APP_State.c(284): warning: #940-D: missing return statement at end of non-void function "DetectVolCur" + } +..\HardWare\APP\APP_State.c(274): warning: #177-D: function "DetectVolCur" was declared but never referenced + static bool DetectVolCur( +..\HardWare\APP\APP_State.c: 3 warnings, 0 errors linking... -Program Size: Code=32608 RO-data=844 RW-data=804 ZI-data=13524 +Program Size: Code=41272 RO-data=1512 RW-data=1064 ZI-data=23864 FromELF: creating hex file... -"NBQlaohua\NBQlaohua.axf" - 0 Error(s), 10 Warning(s). +After Build - User command #1: fromelf --bin --output=NBQlaohua/NBQlaohua.bin NBQlaohua/NBQlaohua.axf +After Build - User command #2: fromelf --text -a -c --output=NBQlaohua/NBQlaohua.dis NBQlaohua/NBQlaohua.axf +"NBQlaohua\NBQlaohua.axf" - 0 Error(s), 3 Warning(s).

Software Packages used:

@@ -75,7 +63,7 @@ Package Vendor: Keil

Collection of Component Files used:

* Component: ARM::CMSIS:CORE:5.1.1 -Build Time Elapsed: 00:00:04 +Build Time Elapsed: 00:00:05 diff --git a/MDK-ARM/NBQlaohua/NBQlaohua.dis b/MDK-ARM/NBQlaohua/NBQlaohua.dis new file mode 100644 index 0000000..26e8938 --- /dev/null +++ b/MDK-ARM/NBQlaohua/NBQlaohua.dis @@ -0,0 +1,19340 @@ + +======================================================================== + +** ELF Header Information + + File Name: NBQlaohua/NBQlaohua.axf + + Machine class: ELFCLASS32 (32-bit) + Data encoding: ELFDATA2LSB (Little endian) + Header version: EV_CURRENT (Current version) + Operating System ABI: none + ABI Version: 0 + File Type: ET_EXEC (Executable) (2) + Machine: EM_ARM (ARM) + + Image Entry point: 0x08000151 + Flags: EF_ARM_HASENTRY + EF_ARM_ABI_FLOAT_SOFT (0x05000202) + + ARM ELF revision: 5 (ABI version 2) + + Conforms to Soft float procedure-call standard + + Built with + Component: ARM Compiler 5.06 update 6 (build 750) Tool: armasm [4d35ec] + Component: ARM Compiler 5.06 update 6 (build 750) Tool: armlink [4d35ed] + + Header size: 52 bytes (0x34) + Program header entry size: 32 bytes (0x20) + Section header entry size: 40 bytes (0x28) + + Program header entries: 1 + Section header entries: 16 + + Program header offset: 1238620 (0x0012e65c) + Section header offset: 1238652 (0x0012e67c) + + Section header string table index: 15 + +======================================================================== + +** Program header #0 (PT_LOAD) [PF_X + PF_W + PF_R + PF_ARM_ENTRY] + Size : 67712 bytes (42980 bytes in file) + Virtual address: 0x08000000 (Alignment 8) + + +======================================================================== + +** Section #1 'ER_IROM1' (SHT_PROGBITS) [SHF_ALLOC + SHF_EXECINSTR] + Size : 42784 bytes (alignment 4) + Address: 0x08000000 + + $d.realdata + RESET + __Vectors + 0x08000000: 20006160 `a. DCD 536895840 + 0x08000004: 080001fd .... DCD 134218237 + 0x08000008: 08004ad1 .J.. DCD 134236881 + 0x0800000c: 080041bb .A.. DCD 134234555 + 0x08000010: 08004acd .J.. DCD 134236877 + 0x08000014: 08000cfd .... DCD 134221053 + 0x08000018: 08005711 .W.. DCD 134240017 + 0x0800001c: 00000000 .... DCD 0 + 0x08000020: 00000000 .... DCD 0 + 0x08000024: 00000000 .... DCD 0 + 0x08000028: 00000000 .... DCD 0 + 0x0800002c: 08000165 e... DCD 134218085 + 0x08000030: 08000e4d M... DCD 134221389 + 0x08000034: 00000000 .... DCD 0 + 0x08000038: 080001a9 .... DCD 134218153 + 0x0800003c: 08004d25 %M.. DCD 134237477 + 0x08000040: 08000217 .... DCD 134218263 + 0x08000044: 08000217 .... DCD 134218263 + 0x08000048: 08000217 .... DCD 134218263 + 0x0800004c: 08000217 .... DCD 134218263 + 0x08000050: 08000217 .... DCD 134218263 + 0x08000054: 08000217 .... DCD 134218263 + 0x08000058: 08000217 .... DCD 134218263 + 0x0800005c: 08000217 .... DCD 134218263 + 0x08000060: 08000217 .... DCD 134218263 + 0x08000064: 08000217 .... DCD 134218263 + 0x08000068: 08000217 .... DCD 134218263 + 0x0800006c: 08000db1 .... DCD 134221233 + 0x08000070: 08000dc1 .... DCD 134221249 + 0x08000074: 08000dd1 .... DCD 134221265 + 0x08000078: 08000de1 .... DCD 134221281 + 0x0800007c: 08000df1 .... DCD 134221297 + 0x08000080: 08000e01 .... DCD 134221313 + 0x08000084: 08000e11 .... DCD 134221329 + 0x08000088: 08000217 .... DCD 134218263 + 0x0800008c: 08000217 .... DCD 134218263 + 0x08000090: 08000217 .... DCD 134218263 + 0x08000094: 08000217 .... DCD 134218263 + 0x08000098: 08000217 .... DCD 134218263 + 0x0800009c: 08000217 .... DCD 134218263 + 0x080000a0: 08000217 .... DCD 134218263 + 0x080000a4: 08000217 .... DCD 134218263 + 0x080000a8: 08000217 .... DCD 134218263 + 0x080000ac: 08000217 .... DCD 134218263 + 0x080000b0: 08000217 .... DCD 134218263 + 0x080000b4: 08000217 .... DCD 134218263 + 0x080000b8: 08004df1 .M.. DCD 134237681 + 0x080000bc: 08000217 .... DCD 134218263 + 0x080000c0: 08000217 .... DCD 134218263 + 0x080000c4: 08000217 .... DCD 134218263 + 0x080000c8: 08000217 .... DCD 134218263 + 0x080000cc: 08000217 .... DCD 134218263 + 0x080000d0: 08000217 .... DCD 134218263 + 0x080000d4: 08005679 yV.. DCD 134239865 + 0x080000d8: 08005689 .V.. DCD 134239881 + 0x080000dc: 08005699 .V.. DCD 134239897 + 0x080000e0: 08000217 .... DCD 134218263 + 0x080000e4: 08000217 .... DCD 134218263 + 0x080000e8: 08000217 .... DCD 134218263 + 0x080000ec: 00000000 .... DCD 0 + 0x080000f0: 00000000 .... DCD 0 + 0x080000f4: 00000000 .... DCD 0 + 0x080000f8: 00000000 .... DCD 0 + 0x080000fc: 00000000 .... DCD 0 + 0x08000100: 00000000 .... DCD 0 + 0x08000104: 00000000 .... DCD 0 + 0x08000108: 08000217 .... DCD 134218263 + 0x0800010c: 08000217 .... DCD 134218263 + 0x08000110: 08000217 .... DCD 134218263 + 0x08000114: 0800501d .P.. DCD 134238237 + 0x08000118: 08000217 .... DCD 134218263 + 0x0800011c: 08004e01 .N.. DCD 134237697 + 0x08000120: 08000217 .... DCD 134218263 + 0x08000124: 08000217 .... DCD 134218263 + 0x08000128: 08000217 .... DCD 134218263 + 0x0800012c: 08000217 .... DCD 134218263 + 0x08000130: 08000217 .... DCD 134218263 + 0x08000134: 00000000 .... DCD 0 + 0x08000138: 00000000 .... DCD 0 + 0x0800013c: 08000217 .... DCD 134218263 + 0x08000140: 08000217 .... DCD 134218263 + 0x08000144: 08000217 .... DCD 134218263 + 0x08000148: 08000217 .... DCD 134218263 + 0x0800014c: 08000217 .... DCD 134218263 + $t + .ARM.Collect$$$$00000000 + .ARM.Collect$$$$00000001 + __Vectors_End + __main + _main_stk + 0x08000150: f8dfd00c .... LDR sp,__lit__00000000 ; [0x8000160] = 0x20006160 + .ARM.Collect$$$$00000004 + _main_scatterload + 0x08000154: f000fb7a ..z. BL __scatterload ; 0x800084c + .ARM.Collect$$$$00000008 + .ARM.Collect$$$$0000000A + .ARM.Collect$$$$0000000B + __main_after_scatterload + _main_clock + _main_cpp_init + _main_init + 0x08000158: 4800 .H LDR r0,[pc,#0] ; [0x800015c] = 0x8006e85 + 0x0800015a: 4700 .G BX r0 + $d + 0x0800015c: 08006e85 .n.. DCD 134246021 + .ARM.Collect$$$$00002712 + __lit__00000000 + .ARM.Collect$$$$0000000D + .ARM.Collect$$$$0000000F + __rt_final_cpp + __rt_final_exit + 0x08000160: 20006160 `a. DCD 536895840 + $t + .emb_text + SVC_Handler + 0x08000164: 4b22 "K LDR r3,[pc,#136] ; [0x80001f0] = 0x20000258 + 0x08000166: 6819 .h LDR r1,[r3,#0] + 0x08000168: 6808 .h LDR r0,[r1,#0] + 0x0800016a: e8b00ff0 .... LDM r0!,{r4-r11} + 0x0800016e: f3808809 .... MSR PSP,r0 + 0x08000172: f3bf8f6f ..o. ISB + 0x08000176: f04f0000 O... MOV r0,#0 + 0x0800017a: f3808811 .... MSR BASEPRI,r0 + 0x0800017e: f04e0e0d N... ORR lr,lr,#0xd + 0x08000182: 4770 pG BX lr + $d + 0x08000184: 00000000 .... DCD 0 + $t + __asm___6_port_c_39a90d8d__prvStartFirstTask + 0x08000188: 4806 .H LDR r0,[pc,#24] ; [0x80001a4] = 0xe000ed08 + 0x0800018a: 6800 .h LDR r0,[r0,#0] + 0x0800018c: 6800 .h LDR r0,[r0,#0] + 0x0800018e: f3808808 .... MSR MSP,r0 + 0x08000192: b662 b. CPSIE i + 0x08000194: b661 a. CPSIE f + 0x08000196: f3bf8f4f ..O. DSB + 0x0800019a: f3bf8f6f ..o. ISB + 0x0800019e: df00 .. SVC #0x0 ; formerly SWI + 0x080001a0: bf00 .. NOP + 0x080001a2: bf00 .. NOP + $d + 0x080001a4: e000ed08 .... DCD 3758157064 + $t + PendSV_Handler + 0x080001a8: f3ef8009 .... MRS r0,PSP + 0x080001ac: f3bf8f6f ..o. ISB + 0x080001b0: 4b0f .K LDR r3,[pc,#60] ; [0x80001f0] = 0x20000258 + 0x080001b2: 681a .h LDR r2,[r3,#0] + 0x080001b4: e9200ff0 ... STMDB r0!,{r4-r11} + 0x080001b8: 6010 .` STR r0,[r2,#0] + 0x080001ba: b508 .. PUSH {r3,lr} + 0x080001bc: f04f0050 O.P. MOV r0,#0x50 + 0x080001c0: f3808811 .... MSR BASEPRI,r0 + 0x080001c4: f3bf8f4f ..O. DSB + 0x080001c8: f3bf8f6f ..o. ISB + 0x080001cc: f008fa7c ..|. BL vTaskSwitchContext ; 0x80086c8 + 0x080001d0: f04f0000 O... MOV r0,#0 + 0x080001d4: f3808811 .... MSR BASEPRI,r0 + 0x080001d8: e8bd4008 ...@ POP {r3,lr} + 0x080001dc: 6819 .h LDR r1,[r3,#0] + 0x080001de: 6808 .h LDR r0,[r1,#0] + 0x080001e0: e8b00ff0 .... LDM r0!,{r4-r11} + 0x080001e4: f3808809 .... MSR PSP,r0 + 0x080001e8: f3bf8f6f ..o. ISB + 0x080001ec: 4770 pG BX lr + 0x080001ee: bf00 .. NOP + $d + 0x080001f0: 20000258 X.. DCD 536871512 + $t + vPortGetIPSR + 0x080001f4: f3ef8005 .... MRS r0,IPSR + 0x080001f8: 4770 pG BX lr + 0x080001fa: 0000 .. MOVS r0,r0 + .text + Reset_Handler + 0x080001fc: 4806 .H LDR r0,[pc,#24] ; [0x8000218] = 0x8004ded + 0x080001fe: 4780 .G BLX r0 + 0x08000200: 4806 .H LDR r0,[pc,#24] ; [0x800021c] = 0x8000151 + 0x08000202: 4700 .G BX r0 + 0x08000204: e7fe .. B 0x8000204 ; Reset_Handler + 8 + 0x08000206: e7fe .. B 0x8000206 ; Reset_Handler + 10 + 0x08000208: e7fe .. B 0x8000208 ; Reset_Handler + 12 + 0x0800020a: e7fe .. B 0x800020a ; Reset_Handler + 14 + 0x0800020c: e7fe .. B 0x800020c ; Reset_Handler + 16 + 0x0800020e: e7fe .. B 0x800020e ; Reset_Handler + 18 + 0x08000210: e7fe .. B 0x8000210 ; Reset_Handler + 20 + 0x08000212: e7fe .. B 0x8000212 ; Reset_Handler + 22 + 0x08000214: e7fe .. B 0x8000214 ; Reset_Handler + 24 + ADC1_2_IRQHandler + CAN1_RX0_IRQHandler + CAN1_RX1_IRQHandler + CAN1_SCE_IRQHandler + CAN1_TX_IRQHandler + CAN2_RX0_IRQHandler + CAN2_RX1_IRQHandler + CAN2_SCE_IRQHandler + CAN2_TX_IRQHandler + DMA2_Channel1_IRQHandler + DMA2_Channel2_IRQHandler + DMA2_Channel3_IRQHandler + DMA2_Channel4_IRQHandler + DMA2_Channel5_IRQHandler + EXTI0_IRQHandler + EXTI15_10_IRQHandler + EXTI1_IRQHandler + EXTI2_IRQHandler + EXTI3_IRQHandler + EXTI4_IRQHandler + EXTI9_5_IRQHandler + FLASH_IRQHandler + I2C1_ER_IRQHandler + I2C1_EV_IRQHandler + I2C2_ER_IRQHandler + I2C2_EV_IRQHandler + OTG_FS_IRQHandler + OTG_FS_WKUP_IRQHandler + PVD_IRQHandler + RCC_IRQHandler + RTC_Alarm_IRQHandler + RTC_IRQHandler + SPI1_IRQHandler + SPI2_IRQHandler + SPI3_IRQHandler + TAMPER_IRQHandler + TIM1_BRK_IRQHandler + TIM1_CC_IRQHandler + TIM1_TRG_COM_IRQHandler + TIM1_UP_IRQHandler + TIM2_IRQHandler + TIM3_IRQHandler + TIM5_IRQHandler + TIM6_IRQHandler + UART4_IRQHandler + WWDG_IRQHandler + 0x08000216: e7fe .. B ADC1_2_IRQHandler ; 0x8000216 + $d + 0x08000218: 08004ded .M.. DCD 134237677 + 0x0800021c: 08000151 Q... DCD 134218065 + $t + .text + __aeabi_uldivmod + 0x08000220: e92d5ff0 -.._ PUSH {r4-r12,lr} + 0x08000224: 4605 .F MOV r5,r0 + 0x08000226: 2000 . MOVS r0,#0 + 0x08000228: 4692 .F MOV r10,r2 + 0x0800022a: 469b .F MOV r11,r3 + 0x0800022c: 4688 .F MOV r8,r1 + 0x0800022e: 4606 .F MOV r6,r0 + 0x08000230: 4681 .F MOV r9,r0 + 0x08000232: 2440 @$ MOVS r4,#0x40 + 0x08000234: e01b .. B 0x800026e ; __aeabi_uldivmod + 78 + 0x08000236: 4628 (F MOV r0,r5 + 0x08000238: 4641 AF MOV r1,r8 + 0x0800023a: 4647 GF MOV r7,r8 + 0x0800023c: 4622 "F MOV r2,r4 + 0x0800023e: f000f820 .. . BL __aeabi_llsr ; 0x8000282 + 0x08000242: 4653 SF MOV r3,r10 + 0x08000244: 465a ZF MOV r2,r11 + 0x08000246: 1ac0 .. SUBS r0,r0,r3 + 0x08000248: 4191 .A SBCS r1,r1,r2 + 0x0800024a: d310 .. BCC 0x800026e ; __aeabi_uldivmod + 78 + 0x0800024c: 4611 .F MOV r1,r2 + 0x0800024e: 4618 .F MOV r0,r3 + 0x08000250: 4622 "F MOV r2,r4 + 0x08000252: f000f912 .... BL __aeabi_llsl ; 0x800047a + 0x08000256: 1a2d -. SUBS r5,r5,r0 + 0x08000258: eb670801 g... SBC r8,r7,r1 + 0x0800025c: 464f OF MOV r7,r9 + 0x0800025e: 4622 "F MOV r2,r4 + 0x08000260: 2001 . MOVS r0,#1 + 0x08000262: 2100 .! MOVS r1,#0 + 0x08000264: f000f909 .... BL __aeabi_llsl ; 0x800047a + 0x08000268: eb170900 .... ADDS r9,r7,r0 + 0x0800026c: 414e NA ADCS r6,r6,r1 + 0x0800026e: 1e20 . SUBS r0,r4,#0 + 0x08000270: f1a40401 .... SUB r4,r4,#1 + 0x08000274: dcdf .. BGT 0x8000236 ; __aeabi_uldivmod + 22 + 0x08000276: 4648 HF MOV r0,r9 + 0x08000278: 4631 1F MOV r1,r6 + 0x0800027a: 462a *F MOV r2,r5 + 0x0800027c: 4643 CF MOV r3,r8 + 0x0800027e: e8bd9ff0 .... POP {r4-r12,pc} + .text + __aeabi_llsr + _ll_ushift_r + 0x08000282: 2a20 * CMP r2,#0x20 + 0x08000284: db04 .. BLT 0x8000290 ; __aeabi_llsr + 14 + 0x08000286: 3a20 : SUBS r2,r2,#0x20 + 0x08000288: fa21f002 !... LSR r0,r1,r2 + 0x0800028c: 2100 .! MOVS r1,#0 + 0x0800028e: 4770 pG BX lr + 0x08000290: fa21f302 !... LSR r3,r1,r2 + 0x08000294: 40d0 .@ LSRS r0,r0,r2 + 0x08000296: f1c20220 .. . RSB r2,r2,#0x20 + 0x0800029a: 4091 .@ LSLS r1,r1,r2 + 0x0800029c: 4308 .C ORRS r0,r0,r1 + 0x0800029e: 4619 .F MOV r1,r3 + 0x080002a0: 4770 pG BX lr + .text + __aeabi_memcpy + __aeabi_memcpy4 + __aeabi_memcpy8 + 0x080002a2: ea400301 @... ORR r3,r0,r1 + 0x080002a6: 079b .. LSLS r3,r3,#30 + 0x080002a8: d003 .. BEQ 0x80002b2 ; __aeabi_memcpy + 16 + 0x080002aa: e009 .. B 0x80002c0 ; __aeabi_memcpy + 30 + 0x080002ac: c908 .. LDM r1!,{r3} + 0x080002ae: 1f12 .. SUBS r2,r2,#4 + 0x080002b0: c008 .. STM r0!,{r3} + 0x080002b2: 2a04 .* CMP r2,#4 + 0x080002b4: d2fa .. BCS 0x80002ac ; __aeabi_memcpy + 10 + 0x080002b6: e003 .. B 0x80002c0 ; __aeabi_memcpy + 30 + 0x080002b8: f8113b01 ...; LDRB r3,[r1],#1 + 0x080002bc: f8003b01 ...; STRB r3,[r0],#1 + 0x080002c0: 1e52 R. SUBS r2,r2,#1 + 0x080002c2: d2f9 .. BCS 0x80002b8 ; __aeabi_memcpy + 22 + 0x080002c4: 4770 pG BX lr + .text + __aeabi_memset + __aeabi_memset4 + __aeabi_memset8 + 0x080002c6: b2d2 .. UXTB r2,r2 + 0x080002c8: e001 .. B 0x80002ce ; __aeabi_memset + 8 + 0x080002ca: f8002b01 ...+ STRB r2,[r0],#1 + 0x080002ce: 1e49 I. SUBS r1,r1,#1 + 0x080002d0: d2fb .. BCS 0x80002ca ; __aeabi_memset + 4 + 0x080002d2: 4770 pG BX lr + __aeabi_memclr + __aeabi_memclr4 + __aeabi_memclr8 + 0x080002d4: 2200 ." MOVS r2,#0 + 0x080002d6: e7f6 .. B __aeabi_memset ; 0x80002c6 + memset + 0x080002d8: b510 .. PUSH {r4,lr} + 0x080002da: 4613 .F MOV r3,r2 + 0x080002dc: 460a .F MOV r2,r1 + 0x080002de: 4604 .F MOV r4,r0 + 0x080002e0: 4619 .F MOV r1,r3 + 0x080002e2: f7fffff0 .... BL __aeabi_memset ; 0x80002c6 + 0x080002e6: 4620 F MOV r0,r4 + 0x080002e8: bd10 .. POP {r4,pc} + .text + strcmp + 0x080002ea: b510 .. PUSH {r4,lr} + 0x080002ec: 2200 ." MOVS r2,#0 + 0x080002ee: e000 .. B 0x80002f2 ; strcmp + 8 + 0x080002f0: 1c52 R. ADDS r2,r2,#1 + 0x080002f2: 5c83 .\ LDRB r3,[r0,r2] + 0x080002f4: 5c8c .\ LDRB r4,[r1,r2] + 0x080002f6: 42a3 .B CMP r3,r4 + 0x080002f8: d101 .. BNE 0x80002fe ; strcmp + 20 + 0x080002fa: 2b00 .+ CMP r3,#0 + 0x080002fc: d1f8 .. BNE 0x80002f0 ; strcmp + 6 + 0x080002fe: b2d8 .. UXTB r0,r3 + 0x08000300: b2e1 .. UXTB r1,r4 + 0x08000302: 1a40 @. SUBS r0,r0,r1 + 0x08000304: bd10 .. POP {r4,pc} + .text + __aeabi_dmul + 0x08000306: e92d4ffe -..O PUSH {r1-r11,lr} + 0x0800030a: ea810403 .... EOR r4,r1,r3 + 0x0800030e: f0044400 ...D AND r4,r4,#0x80000000 + 0x08000312: f0214100 !..A BIC r1,r1,#0x80000000 + 0x08000316: 9400 .. STR r4,[sp,#0] + 0x08000318: f04f0b00 O... MOV r11,#0 + 0x0800031c: f0234300 #..C BIC r3,r3,#0x80000000 + 0x08000320: ea500401 P... ORRS r4,r0,r1 + 0x08000324: d05e ^. BEQ 0x80003e4 ; __aeabi_dmul + 222 + 0x08000326: ea520403 R... ORRS r4,r2,r3 + 0x0800032a: d05b [. BEQ 0x80003e4 ; __aeabi_dmul + 222 + 0x0800032c: f3c3540a ...T UBFX r4,r3,#20,#11 + 0x08000330: f3c1550a ...U UBFX r5,r1,#20,#11 + 0x08000334: 442c ,D ADD r4,r4,r5 + 0x08000336: f2a434f3 ...4 SUB r4,r4,#0x3f3 + 0x0800033a: 9401 .. STR r4,[sp,#4] + 0x0800033c: fba05402 ...T UMULL r5,r4,r0,r2 + 0x08000340: f3c10113 .... UBFX r1,r1,#0,#20 + 0x08000344: f4411180 A... ORR r1,r1,#0x100000 + 0x08000348: f3c30313 .... UBFX r3,r3,#0,#20 + 0x0800034c: f4431380 C... ORR r3,r3,#0x100000 + 0x08000350: fb014402 ...D MLA r4,r1,r2,r4 + 0x08000354: fb004e03 ...N MLA lr,r0,r3,r4 + 0x08000358: 0a84 .. LSRS r4,r0,#10 + 0x0800035a: 0a97 .. LSRS r7,r2,#10 + 0x0800035c: ea445481 D..T ORR r4,r4,r1,LSL #22 + 0x08000360: ea475783 G..W ORR r7,r7,r3,LSL #22 + 0x08000364: fba46807 ...h UMULL r6,r8,r4,r7 + 0x08000368: 9502 .. STR r5,[sp,#8] + 0x0800036a: 0a8d .. LSRS r5,r1,#10 + 0x0800036c: fb058507 .... MLA r5,r5,r7,r8 + 0x08000370: ea4f2c93 O.., LSR r12,r3,#10 + 0x08000374: fb04540c ...T MLA r4,r4,r12,r5 + 0x08000378: 0527 '. LSLS r7,r4,#20 + 0x0800037a: 9d02 .. LDR r5,[sp,#8] + 0x0800037c: ea4f5806 O..X LSL r8,r6,#20 + 0x08000380: ea473716 G..7 ORR r7,r7,r6,LSR #12 + 0x08000384: ebb50508 .... SUBS r5,r5,r8 + 0x08000388: eb6e0c07 n... SBC r12,lr,r7 + 0x0800038c: 0e87 .. LSRS r7,r0,#26 + 0x0800038e: 0e92 .. LSRS r2,r2,#26 + 0x08000390: ea471781 G... ORR r7,r7,r1,LSL #6 + 0x08000394: ea421283 B... ORR r2,r2,r3,LSL #6 + 0x08000398: fba70102 .... UMULL r0,r1,r7,r2 + 0x0800039c: ebb6010b .... SUBS r1,r6,r11 + 0x080003a0: eb640400 d... SBC r4,r4,r0 + 0x080003a4: 0d2b +. LSRS r3,r5,#20 + 0x080003a6: ea43330c C..3 ORR r3,r3,r12,LSL #12 + 0x080003aa: 185e ^. ADDS r6,r3,r1 + 0x080003ac: eb44501c D..P ADC r0,r4,r12,LSR #20 + 0x080003b0: 46da .F MOV r10,r11 + 0x080003b2: 4651 QF MOV r1,r10 + 0x080003b4: fbe70102 .... UMLAL r0,r1,r7,r2 + 0x080003b8: f3c50413 .... UBFX r4,r5,#0,#20 + 0x080003bc: ea4f330b O..3 LSL r3,r11,#12 + 0x080003c0: ea435314 C..S ORR r3,r3,r4,LSR #20 + 0x080003c4: ea4f3204 O..2 LSL r2,r4,#12 + 0x080003c8: 9c01 .. LDR r4,[sp,#4] + 0x080003ca: ea430306 C... ORR r3,r3,r6 + 0x080003ce: f1a4040c .... SUB r4,r4,#0xc + 0x080003d2: 9402 .. STR r4,[sp,#8] + 0x080003d4: 9c00 .. LDR r4,[sp,#0] + 0x080003d6: e9cdb400 .... STRD r11,r4,[sp,#0] + 0x080003da: f000f8a3 .... BL _double_epilogue ; 0x8000524 + 0x080003de: b003 .. ADD sp,sp,#0xc + 0x080003e0: e8bd8ff0 .... POP {r4-r11,pc} + 0x080003e4: 2000 . MOVS r0,#0 + 0x080003e6: 4601 .F MOV r1,r0 + 0x080003e8: e7f9 .. B 0x80003de ; __aeabi_dmul + 216 + .text + __aeabi_ui2f + 0x080003ea: 2396 .# MOVS r3,#0x96 + 0x080003ec: 2200 ." MOVS r2,#0 + 0x080003ee: 4611 .F MOV r1,r2 + 0x080003f0: f000b85b ..[. B.W _float_epilogue ; 0x80004aa + .text + __aeabi_i2d + 0x080003f4: b50e .. PUSH {r1-r3,lr} + 0x080003f6: 0fc1 .. LSRS r1,r0,#31 + 0x080003f8: ea8070e0 ...p EOR r0,r0,r0,ASR #31 + 0x080003fc: 4408 .D ADD r0,r0,r1 + 0x080003fe: 07ca .. LSLS r2,r1,#31 + 0x08000400: 2100 .! MOVS r1,#0 + 0x08000402: f2404333 @.3C MOV r3,#0x433 + 0x08000406: e88d000e .... STM sp,{r1-r3} + 0x0800040a: 460a .F MOV r2,r1 + 0x0800040c: 460b .F MOV r3,r1 + 0x0800040e: f000f889 .... BL _double_epilogue ; 0x8000524 + 0x08000412: b003 .. ADD sp,sp,#0xc + 0x08000414: bd00 .. POP {pc} + .text + __aeabi_d2f + 0x08000416: f0014300 ...C AND r3,r1,#0x80000000 + 0x0800041a: b430 0. PUSH {r4,r5} + 0x0800041c: f0214100 !..A BIC r1,r1,#0x80000000 + 0x08000420: ea500201 P... ORRS r2,r0,r1 + 0x08000424: d006 .. BEQ 0x8000434 ; __aeabi_d2f + 30 + 0x08000426: 0d0a .. LSRS r2,r1,#20 + 0x08000428: f5a27260 ..`r SUB r2,r2,#0x380 + 0x0800042c: f3c10113 .... UBFX r1,r1,#0,#20 + 0x08000430: 2a00 .* CMP r2,#0 + 0x08000432: dc02 .. BGT 0x800043a ; __aeabi_d2f + 36 + 0x08000434: bc30 0. POP {r4,r5} + 0x08000436: 2000 . MOVS r0,#0 + 0x08000438: 4770 pG BX lr + 0x0800043a: 0f44 D. LSRS r4,r0,#29 + 0x0800043c: ea4404c1 D... ORR r4,r4,r1,LSL #3 + 0x08000440: 00c1 .. LSLS r1,r0,#3 + 0x08000442: 18e0 .. ADDS r0,r4,r3 + 0x08000444: bc30 0. POP {r4,r5} + 0x08000446: eb0050c2 ...P ADD r0,r0,r2,LSL #23 + 0x0800044a: f000b825 ..%. B.W __I$use$fp ; 0x8000498 + .text + __aeabi_uidiv + __aeabi_uidivmod + 0x0800044e: b530 0. PUSH {r4,r5,lr} + 0x08000450: 460b .F MOV r3,r1 + 0x08000452: 4601 .F MOV r1,r0 + 0x08000454: 2000 . MOVS r0,#0 + 0x08000456: 2220 " MOVS r2,#0x20 + 0x08000458: 2401 .$ MOVS r4,#1 + 0x0800045a: e009 .. B 0x8000470 ; __aeabi_uidiv + 34 + 0x0800045c: fa21f502 !... LSR r5,r1,r2 + 0x08000460: 429d .B CMP r5,r3 + 0x08000462: d305 .. BCC 0x8000470 ; __aeabi_uidiv + 34 + 0x08000464: fa03f502 .... LSL r5,r3,r2 + 0x08000468: 1b49 I. SUBS r1,r1,r5 + 0x0800046a: fa04f502 .... LSL r5,r4,r2 + 0x0800046e: 4428 (D ADD r0,r0,r5 + 0x08000470: 1e15 .. SUBS r5,r2,#0 + 0x08000472: f1a20201 .... SUB r2,r2,#1 + 0x08000476: dcf1 .. BGT 0x800045c ; __aeabi_uidiv + 14 + 0x08000478: bd30 0. POP {r4,r5,pc} + .text + __aeabi_llsl + _ll_shift_l + 0x0800047a: 2a20 * CMP r2,#0x20 + 0x0800047c: db04 .. BLT 0x8000488 ; __aeabi_llsl + 14 + 0x0800047e: 3a20 : SUBS r2,r2,#0x20 + 0x08000480: fa00f102 .... LSL r1,r0,r2 + 0x08000484: 2000 . MOVS r0,#0 + 0x08000486: 4770 pG BX lr + 0x08000488: 4091 .@ LSLS r1,r1,r2 + 0x0800048a: f1c20320 .. . RSB r3,r2,#0x20 + 0x0800048e: fa20f303 ... LSR r3,r0,r3 + 0x08000492: 4319 .C ORRS r1,r1,r3 + 0x08000494: 4090 .@ LSLS r0,r0,r2 + 0x08000496: 4770 pG BX lr + .text + .text + __I$use$fp + _float_round + 0x08000498: 2900 .) CMP r1,#0 + 0x0800049a: bfa8 .. IT GE + 0x0800049c: 4770 pG BXGE lr + 0x0800049e: 1c40 @. ADDS r0,r0,#1 + 0x080004a0: 0049 I. LSLS r1,r1,#1 + 0x080004a2: bf08 .. IT EQ + 0x080004a4: f0200001 ... BICEQ r0,r0,#1 + 0x080004a8: 4770 pG BX lr + _float_epilogue + 0x080004aa: b410 .. PUSH {r4} + 0x080004ac: fab0fc80 .... CLZ r12,r0 + 0x080004b0: fa00f00c .... LSL r0,r0,r12 + 0x080004b4: ea500401 P... ORRS r4,r0,r1 + 0x080004b8: bf04 .. ITT EQ + 0x080004ba: bc10 .. POPEQ {r4} + 0x080004bc: 4770 pG BXEQ lr + 0x080004be: b149 I. CBZ r1,0x80004d4 ; _float_epilogue + 42 + 0x080004c0: f1cc0420 .. . RSB r4,r12,#0x20 + 0x080004c4: fa21f404 !... LSR r4,r1,r4 + 0x080004c8: fa11f10c .... LSLS r1,r1,r12 + 0x080004cc: bf18 .. IT NE + 0x080004ce: 2101 .! MOVNE r1,#1 + 0x080004d0: 4321 !C ORRS r1,r1,r4 + 0x080004d2: 4308 .C ORRS r0,r0,r1 + 0x080004d4: eba3010c .... SUB r1,r3,r12 + 0x080004d8: 1dcb .. ADDS r3,r1,#7 + 0x080004da: ea4f6100 O..a LSL r1,r0,#24 + 0x080004de: ea4f2010 O.. LSR r0,r0,#8 + 0x080004e2: bf42 B. ITTT MI + 0x080004e4: 2000 . MOVMI r0,#0 + 0x080004e6: bc10 .. POPMI {r4} + 0x080004e8: 4770 pG BXMI lr + 0x080004ea: eb0050c3 ...P ADD r0,r0,r3,LSL #23 + 0x080004ee: 4410 .D ADD r0,r0,r2 + 0x080004f0: 2900 .) CMP r1,#0 + 0x080004f2: bfa4 .. ITT GE + 0x080004f4: bc10 .. POPGE {r4} + 0x080004f6: 4770 pG BXGE lr + 0x080004f8: 1c40 @. ADDS r0,r0,#1 + 0x080004fa: 0049 I. LSLS r1,r1,#1 + 0x080004fc: bf08 .. IT EQ + 0x080004fe: f0200001 ... BICEQ r0,r0,#1 + 0x08000502: bc10 .. POP {r4} + 0x08000504: 4770 pG BX lr + .text + _double_round + 0x08000506: b510 .. PUSH {r4,lr} + 0x08000508: 1e14 .. SUBS r4,r2,#0 + 0x0800050a: f1730400 s... SBCS r4,r3,#0 + 0x0800050e: da08 .. BGE 0x8000522 ; _double_round + 28 + 0x08000510: 1c40 @. ADDS r0,r0,#1 + 0x08000512: f1410100 A... ADC r1,r1,#0 + 0x08000516: 1892 .. ADDS r2,r2,r2 + 0x08000518: 415b [A ADCS r3,r3,r3 + 0x0800051a: 431a .C ORRS r2,r2,r3 + 0x0800051c: d101 .. BNE 0x8000522 ; _double_round + 28 + 0x0800051e: f0200001 ... BIC r0,r0,#1 + 0x08000522: bd10 .. POP {r4,pc} + _double_epilogue + 0x08000524: e92d4df0 -..M PUSH {r4-r8,r10,r11,lr} + 0x08000528: 4692 .F MOV r10,r2 + 0x0800052a: 469b .F MOV r11,r3 + 0x0800052c: b111 .. CBZ r1,0x8000534 ; _double_epilogue + 16 + 0x0800052e: fab1f281 .... CLZ r2,r1 + 0x08000532: e002 .. B 0x800053a ; _double_epilogue + 22 + 0x08000534: fab0f280 .... CLZ r2,r0 + 0x08000538: 3220 2 ADDS r2,r2,#0x20 + 0x0800053a: 4690 .F MOV r8,r2 + 0x0800053c: f7ffff9d .... BL __aeabi_llsl ; 0x800047a + 0x08000540: 4604 .F MOV r4,r0 + 0x08000542: 460f .F MOV r7,r1 + 0x08000544: ea40000a @... ORR r0,r0,r10 + 0x08000548: ea41010b A... ORR r1,r1,r11 + 0x0800054c: 4653 SF MOV r3,r10 + 0x0800054e: 465a ZF MOV r2,r11 + 0x08000550: 4308 .C ORRS r0,r0,r1 + 0x08000552: d013 .. BEQ 0x800057c ; _double_epilogue + 88 + 0x08000554: 4611 .F MOV r1,r2 + 0x08000556: ea530001 S... ORRS r0,r3,r1 + 0x0800055a: d019 .. BEQ 0x8000590 ; _double_epilogue + 108 + 0x0800055c: f1c80240 ..@. RSB r2,r8,#0x40 + 0x08000560: 4650 PF MOV r0,r10 + 0x08000562: f7fffe8e .... BL __aeabi_llsr ; 0x8000282 + 0x08000566: 4605 .F MOV r5,r0 + 0x08000568: 460e .F MOV r6,r1 + 0x0800056a: 4650 PF MOV r0,r10 + 0x0800056c: 4659 YF MOV r1,r11 + 0x0800056e: 4642 BF MOV r2,r8 + 0x08000570: f7ffff83 .... BL __aeabi_llsl ; 0x800047a + 0x08000574: 4308 .C ORRS r0,r0,r1 + 0x08000576: d005 .. BEQ 0x8000584 ; _double_epilogue + 96 + 0x08000578: 2001 . MOVS r0,#1 + 0x0800057a: e004 .. B 0x8000586 ; _double_epilogue + 98 + 0x0800057c: 4620 F MOV r0,r4 + 0x0800057e: 4639 9F MOV r1,r7 + 0x08000580: e8bd8df0 .... POP {r4-r8,r10,r11,pc} + 0x08000584: 2000 . MOVS r0,#0 + 0x08000586: 4305 .C ORRS r5,r5,r0 + 0x08000588: ea4676e0 F..v ORR r6,r6,r0,ASR #31 + 0x0800058c: 432c ,C ORRS r4,r4,r5 + 0x0800058e: 4337 7C ORRS r7,r7,r6 + 0x08000590: 980a .. LDR r0,[sp,#0x28] + 0x08000592: 0563 c. LSLS r3,r4,#21 + 0x08000594: 0ae4 .. LSRS r4,r4,#11 + 0x08000596: eba00008 .... SUB r0,r0,r8 + 0x0800059a: 2200 ." MOVS r2,#0 + 0x0800059c: 0afd .. LSRS r5,r7,#11 + 0x0800059e: ea445447 D.GT ORR r4,r4,r7,LSL #21 + 0x080005a2: 300a .0 ADDS r0,r0,#0xa + 0x080005a4: d502 .. BPL 0x80005ac ; _double_epilogue + 136 + 0x080005a6: 2000 . MOVS r0,#0 + 0x080005a8: 4601 .F MOV r1,r0 + 0x080005aa: e7e9 .. B 0x8000580 ; _double_epilogue + 92 + 0x080005ac: 0501 .. LSLS r1,r0,#20 + 0x080005ae: 1910 .. ADDS r0,r2,r4 + 0x080005b0: 4169 iA ADCS r1,r1,r5 + 0x080005b2: e9dd4508 ...E LDRD r4,r5,[sp,#0x20] + 0x080005b6: 1900 .. ADDS r0,r0,r4 + 0x080005b8: 4169 iA ADCS r1,r1,r5 + 0x080005ba: e8bd4df0 ...M POP {r4-r8,r10,r11,lr} + 0x080005be: e7a2 .. B _double_round ; 0x8000506 + .text + __aeabi_dadd + 0x080005c0: e92d4ffe -..O PUSH {r1-r11,lr} + 0x080005c4: 4680 .F MOV r8,r0 + 0x080005c6: ea810003 .... EOR r0,r1,r3 + 0x080005ca: 0fc0 .. LSRS r0,r0,#31 + 0x080005cc: 460c .F MOV r4,r1 + 0x080005ce: 9000 .. STR r0,[sp,#0] + 0x080005d0: f0214100 !..A BIC r1,r1,#0x80000000 + 0x080005d4: f0234500 #..E BIC r5,r3,#0x80000000 + 0x080005d8: ebb80002 .... SUBS r0,r8,r2 + 0x080005dc: 41a9 .A SBCS r1,r1,r5 + 0x080005de: d205 .. BCS 0x80005ec ; __aeabi_dadd + 44 + 0x080005e0: 4640 @F MOV r0,r8 + 0x080005e2: 4621 !F MOV r1,r4 + 0x080005e4: 4690 .F MOV r8,r2 + 0x080005e6: 461c .F MOV r4,r3 + 0x080005e8: 460b .F MOV r3,r1 + 0x080005ea: 4602 .F MOV r2,r0 + 0x080005ec: f0234000 #..@ BIC r0,r3,#0x80000000 + 0x080005f0: 4310 .C ORRS r0,r0,r2 + 0x080005f2: d047 G. BEQ 0x8000684 ; __aeabi_dadd + 196 + 0x080005f4: 0d27 '. LSRS r7,r4,#20 + 0x080005f6: f3c7000a .... UBFX r0,r7,#0,#11 + 0x080005fa: f3c3510a ...Q UBFX r1,r3,#20,#11 + 0x080005fe: 9002 .. STR r0,[sp,#8] + 0x08000600: 1a40 @. SUBS r0,r0,r1 + 0x08000602: 9001 .. STR r0,[sp,#4] + 0x08000604: 2840 @( CMP r0,#0x40 + 0x08000606: da6b k. BGE 0x80006e0 ; __aeabi_dadd + 288 + 0x08000608: f3c30013 .... UBFX r0,r3,#0,#20 + 0x0800060c: f4401b80 @... ORR r11,r0,#0x100000 + 0x08000610: 9800 .. LDR r0,[sp,#0] + 0x08000612: 4692 .F MOV r10,r2 + 0x08000614: b120 . CBZ r0,0x8000620 ; __aeabi_dadd + 96 + 0x08000616: 2300 .# MOVS r3,#0 + 0x08000618: ebd20a03 .... RSBS r10,r2,r3 + 0x0800061c: eb630b0b c... SBC r11,r3,r11 + 0x08000620: 9801 .. LDR r0,[sp,#4] + 0x08000622: 4659 YF MOV r1,r11 + 0x08000624: f1c00240 ..@. RSB r2,r0,#0x40 + 0x08000628: 4650 PF MOV r0,r10 + 0x0800062a: f7ffff26 ..&. BL __aeabi_llsl ; 0x800047a + 0x0800062e: 4606 .F MOV r6,r0 + 0x08000630: 460d .F MOV r5,r1 + 0x08000632: 4650 PF MOV r0,r10 + 0x08000634: 4659 YF MOV r1,r11 + 0x08000636: 9a01 .. LDR r2,[sp,#4] + 0x08000638: f000f91a .... BL __aeabi_lasr ; 0x8000870 + 0x0800063c: eb100008 .... ADDS r0,r0,r8 + 0x08000640: 4161 aA ADCS r1,r1,r4 + 0x08000642: 2400 .$ MOVS r4,#0 + 0x08000644: ea875211 ...R EOR r2,r7,r1,LSR #20 + 0x08000648: ea8473e7 ...s EOR r3,r4,r7,ASR #31 + 0x0800064c: 431a .C ORRS r2,r2,r3 + 0x0800064e: d040 @. BEQ 0x80006d2 ; __aeabi_dadd + 274 + 0x08000650: 9a00 .. LDR r2,[sp,#0] + 0x08000652: b362 b. CBZ r2,0x80006ae ; __aeabi_dadd + 238 + 0x08000654: 9a01 .. LDR r2,[sp,#4] + 0x08000656: 2a01 .* CMP r2,#1 + 0x08000658: ea4f5207 O..R LSL r2,r7,#20 + 0x0800065c: dc15 .. BGT 0x800068a ; __aeabi_dadd + 202 + 0x0800065e: 1b00 .. SUBS r0,r0,r4 + 0x08000660: eb610102 a... SBC r1,r1,r2 + 0x08000664: f04f4200 O..B MOV r2,#0x80000000 + 0x08000668: ea025207 ...R AND r2,r2,r7,LSL #20 + 0x0800066c: e9cd4200 ...B STRD r4,r2,[sp,#0] + 0x08000670: 1c00 .. ADDS r0,r0,#0 + 0x08000672: f5411180 A... ADC r1,r1,#0x100000 + 0x08000676: 4632 2F MOV r2,r6 + 0x08000678: 462b +F MOV r3,r5 + 0x0800067a: f7ffff53 ..S. BL _double_epilogue ; 0x8000524 + 0x0800067e: b003 .. ADD sp,sp,#0xc + 0x08000680: e8bd8ff0 .... POP {r4-r11,pc} + 0x08000684: 4640 @F MOV r0,r8 + 0x08000686: 4621 !F MOV r1,r4 + 0x08000688: e7f9 .. B 0x800067e ; __aeabi_dadd + 190 + 0x0800068a: 1b00 .. SUBS r0,r0,r4 + 0x0800068c: eb610102 a... SBC r1,r1,r2 + 0x08000690: 1c00 .. ADDS r0,r0,#0 + 0x08000692: f5411380 A... ADC r3,r1,#0x100000 + 0x08000696: 1800 .. ADDS r0,r0,r0 + 0x08000698: 415b [A ADCS r3,r3,r3 + 0x0800069a: 1820 . ADDS r0,r4,r0 + 0x0800069c: f5a21700 .... SUB r7,r2,#0x200000 + 0x080006a0: eb470103 G... ADC r1,r7,r3 + 0x080006a4: ea4070d5 @..p ORR r0,r0,r5,LSR #31 + 0x080006a8: 19b6 .. ADDS r6,r6,r6 + 0x080006aa: 416d mA ADCS r5,r5,r5 + 0x080006ac: e011 .. B 0x80006d2 ; __aeabi_dadd + 274 + 0x080006ae: 086d m. LSRS r5,r5,#1 + 0x080006b0: ea4f0636 O.6. RRX r6,r6 + 0x080006b4: ea4575c0 E..u ORR r5,r5,r0,LSL #31 + 0x080006b8: ea4f5207 O..R LSL r2,r7,#20 + 0x080006bc: 1b00 .. SUBS r0,r0,r4 + 0x080006be: eb610102 a... SBC r1,r1,r2 + 0x080006c2: 1c00 .. ADDS r0,r0,#0 + 0x080006c4: f5411180 A... ADC r1,r1,#0x100000 + 0x080006c8: 0849 I. LSRS r1,r1,#1 + 0x080006ca: ea4f0030 O.0. RRX r0,r0 + 0x080006ce: 1900 .. ADDS r0,r0,r4 + 0x080006d0: 4151 QA ADCS r1,r1,r2 + 0x080006d2: 4632 2F MOV r2,r6 + 0x080006d4: 462b +F MOV r3,r5 + 0x080006d6: b003 .. ADD sp,sp,#0xc + 0x080006d8: e8bd4ff0 ...O POP {r4-r11,lr} + 0x080006dc: f7ffbf13 .... B.W _double_round ; 0x8000506 + 0x080006e0: 9800 .. LDR r0,[sp,#0] + 0x080006e2: 2201 ." MOVS r2,#1 + 0x080006e4: 0040 @. LSLS r0,r0,#1 + 0x080006e6: 2300 .# MOVS r3,#0 + 0x080006e8: ebd00202 .... RSBS r2,r0,r2 + 0x080006ec: eb6373e0 c..s SBC r3,r3,r0,ASR #31 + 0x080006f0: 9800 .. LDR r0,[sp,#0] + 0x080006f2: 4621 !F MOV r1,r4 + 0x080006f4: ea4f74e0 O..t ASR r4,r0,#31 + 0x080006f8: ebb80000 .... SUBS r0,r8,r0 + 0x080006fc: eb610104 a... SBC r1,r1,r4 + 0x08000700: e7e9 .. B 0x80006d6 ; __aeabi_dadd + 278 + __aeabi_dsub + 0x08000702: f0834300 ...C EOR r3,r3,#0x80000000 + 0x08000706: e75b [. B __aeabi_dadd ; 0x80005c0 + __aeabi_drsub + 0x08000708: f0814100 ...A EOR r1,r1,#0x80000000 + 0x0800070c: e758 X. B __aeabi_dadd ; 0x80005c0 + .text + __aeabi_ddiv + 0x0800070e: e92d4df0 -..M PUSH {r4-r8,r10,r11,lr} + 0x08000712: ea810403 .... EOR r4,r1,r3 + 0x08000716: f0044b00 ...K AND r11,r4,#0x80000000 + 0x0800071a: f0214500 !..E BIC r5,r1,#0x80000000 + 0x0800071e: 4614 .F MOV r4,r2 + 0x08000720: f04f0a00 O... MOV r10,#0 + 0x08000724: f0234100 #..A BIC r1,r3,#0x80000000 + 0x08000728: ea500205 P... ORRS r2,r0,r5 + 0x0800072c: d020 . BEQ 0x8000770 ; __aeabi_ddiv + 98 + 0x0800072e: ea540201 T... ORRS r2,r4,r1 + 0x08000732: d01d .. BEQ 0x8000770 ; __aeabi_ddiv + 98 + 0x08000734: f3c5570a ...W UBFX r7,r5,#20,#11 + 0x08000738: 4602 .F MOV r2,r0 + 0x0800073a: f3c50313 .... UBFX r3,r5,#0,#20 + 0x0800073e: f3c10013 .... UBFX r0,r1,#0,#20 + 0x08000742: f3c1560a ...V UBFX r6,r1,#20,#11 + 0x08000746: f4401580 @... ORR r5,r0,#0x100000 + 0x0800074a: f4431380 C... ORR r3,r3,#0x100000 + 0x0800074e: eba70806 .... SUB r8,r7,r6 + 0x08000752: 1b10 .. SUBS r0,r2,r4 + 0x08000754: 46d6 .F MOV lr,r10 + 0x08000756: f20838fd ...8 ADD r8,r8,#0x3fd + 0x0800075a: eb730005 s... SBCS r0,r3,r5 + 0x0800075e: d302 .. BCC 0x8000766 ; __aeabi_ddiv + 88 + 0x08000760: f1080801 .... ADD r8,r8,#1 + 0x08000764: e001 .. B 0x800076a ; __aeabi_ddiv + 92 + 0x08000766: 1892 .. ADDS r2,r2,r2 + 0x08000768: 415b [A ADCS r3,r3,r3 + 0x0800076a: f1b80f00 .... CMP r8,#0 + 0x0800076e: da03 .. BGE 0x8000778 ; __aeabi_ddiv + 106 + 0x08000770: 2000 . MOVS r0,#0 + 0x08000772: 4601 .F MOV r1,r0 + 0x08000774: e8bd8df0 .... POP {r4-r8,r10,r11,pc} + 0x08000778: 2000 . MOVS r0,#0 + 0x0800077a: f44f1180 O... MOV r1,#0x100000 + 0x0800077e: 4606 .F MOV r6,r0 + 0x08000780: 4684 .F MOV r12,r0 + 0x08000782: e00e .. B 0x80007a2 ; __aeabi_ddiv + 148 + 0x08000784: 1b17 .. SUBS r7,r2,r4 + 0x08000786: eb730705 s... SBCS r7,r3,r5 + 0x0800078a: d305 .. BCC 0x8000798 ; __aeabi_ddiv + 138 + 0x0800078c: 1b12 .. SUBS r2,r2,r4 + 0x0800078e: eb630305 c... SBC r3,r3,r5 + 0x08000792: 4306 .C ORRS r6,r6,r0 + 0x08000794: ea4c0c01 L... ORR r12,r12,r1 + 0x08000798: 0849 I. LSRS r1,r1,#1 + 0x0800079a: ea4f0030 O.0. RRX r0,r0 + 0x0800079e: 1892 .. ADDS r2,r2,r2 + 0x080007a0: 415b [A ADCS r3,r3,r3 + 0x080007a2: ea500701 P... ORRS r7,r0,r1 + 0x080007a6: d1ed .. BNE 0x8000784 ; __aeabi_ddiv + 118 + 0x080007a8: ea520003 R... ORRS r0,r2,r3 + 0x080007ac: d012 .. BEQ 0x80007d4 ; __aeabi_ddiv + 198 + 0x080007ae: ea820004 .... EOR r0,r2,r4 + 0x080007b2: ea830105 .... EOR r1,r3,r5 + 0x080007b6: 4308 .C ORRS r0,r0,r1 + 0x080007b8: d005 .. BEQ 0x80007c6 ; __aeabi_ddiv + 184 + 0x080007ba: 1b10 .. SUBS r0,r2,r4 + 0x080007bc: 41ab .A SBCS r3,r3,r5 + 0x080007be: d206 .. BCS 0x80007ce ; __aeabi_ddiv + 192 + 0x080007c0: 2201 ." MOVS r2,#1 + 0x080007c2: 2300 .# MOVS r3,#0 + 0x080007c4: e006 .. B 0x80007d4 ; __aeabi_ddiv + 198 + 0x080007c6: 2200 ." MOVS r2,#0 + 0x080007c8: f04f4300 O..C MOV r3,#0x80000000 + 0x080007cc: e002 .. B 0x80007d4 ; __aeabi_ddiv + 198 + 0x080007ce: f06f0201 o... MVN r2,#1 + 0x080007d2: 1053 S. ASRS r3,r2,#1 + 0x080007d4: eb1a0006 .... ADDS r0,r10,r6 + 0x080007d8: eb4c5108 L..Q ADC r1,r12,r8,LSL #20 + 0x080007dc: eb10000a .... ADDS r0,r0,r10 + 0x080007e0: eb41010b A... ADC r1,r1,r11 + 0x080007e4: e8bd4df0 ...M POP {r4-r8,r10,r11,lr} + 0x080007e8: f7ffbe8d .... B.W _double_round ; 0x8000506 + .text + __aeabi_d2ulz + 0x080007ec: f3c1520a ...R UBFX r2,r1,#20,#11 + 0x080007f0: f3c10113 .... UBFX r1,r1,#0,#20 + 0x080007f4: f24033ff @..3 MOV r3,#0x3ff + 0x080007f8: f4411180 A... ORR r1,r1,#0x100000 + 0x080007fc: 429a .B CMP r2,r3 + 0x080007fe: da02 .. BGE 0x8000806 ; __aeabi_d2ulz + 26 + 0x08000800: 2000 . MOVS r0,#0 + 0x08000802: 4601 .F MOV r1,r0 + 0x08000804: 4770 pG BX lr + 0x08000806: f2404333 @.3C MOV r3,#0x433 + 0x0800080a: 429a .B CMP r2,r3 + 0x0800080c: f2a24233 ..3B SUB r2,r2,#0x433 + 0x08000810: dc02 .. BGT 0x8000818 ; __aeabi_d2ulz + 44 + 0x08000812: 4252 RB RSBS r2,r2,#0 + 0x08000814: f7ffbd35 ..5. B.W __aeabi_llsr ; 0x8000282 + 0x08000818: f7ffbe2f ../. B.W __aeabi_llsl ; 0x800047a + .text + __aeabi_cdrcmple + 0x0800081c: b530 0. PUSH {r4,r5,lr} + 0x0800081e: 1e04 .. SUBS r4,r0,#0 + 0x08000820: f1710400 q... SBCS r4,r1,#0 + 0x08000824: db04 .. BLT 0x8000830 ; __aeabi_cdrcmple + 20 + 0x08000826: f04f4400 O..D MOV r4,#0x80000000 + 0x0800082a: 4240 @B RSBS r0,r0,#0 + 0x0800082c: eb640101 d... SBC r1,r4,r1 + 0x08000830: 1e14 .. SUBS r4,r2,#0 + 0x08000832: f1730400 s... SBCS r4,r3,#0 + 0x08000836: db05 .. BLT 0x8000844 ; __aeabi_cdrcmple + 40 + 0x08000838: 461c .F MOV r4,r3 + 0x0800083a: f04f4300 O..C MOV r3,#0x80000000 + 0x0800083e: 4252 RB RSBS r2,r2,#0 + 0x08000840: eb630304 c... SBC r3,r3,r4 + 0x08000844: 4299 .B CMP r1,r3 + 0x08000846: bf08 .. IT EQ + 0x08000848: 4290 .B CMPEQ r0,r2 + 0x0800084a: bd30 0. POP {r4,r5,pc} + .text + __scatterload + __scatterload_rt2 + 0x0800084c: 4c06 .L LDR r4,[pc,#24] ; [0x8000868] = 0x800a700 + 0x0800084e: 4d07 .M LDR r5,[pc,#28] ; [0x800086c] = 0x800a720 + 0x08000850: e006 .. B 0x8000860 ; __scatterload + 20 + 0x08000852: 68e0 .h LDR r0,[r4,#0xc] + 0x08000854: f0400301 @... ORR r3,r0,#1 + 0x08000858: e8940007 .... LDM r4,{r0-r2} + 0x0800085c: 4798 .G BLX r3 + 0x0800085e: 3410 .4 ADDS r4,r4,#0x10 + 0x08000860: 42ac .B CMP r4,r5 + 0x08000862: d3f6 .. BCC 0x8000852 ; __scatterload + 6 + 0x08000864: f7fffc78 ..x. BL __main_after_scatterload ; 0x8000158 + $d + 0x08000868: 0800a700 .... DCD 134260480 + 0x0800086c: 0800a720 ... DCD 134260512 + $t + .text + __aeabi_lasr + _ll_sshift_r + 0x08000870: 2a20 * CMP r2,#0x20 + 0x08000872: db06 .. BLT 0x8000882 ; __aeabi_lasr + 18 + 0x08000874: 17cb .. ASRS r3,r1,#31 + 0x08000876: 3a20 : SUBS r2,r2,#0x20 + 0x08000878: fa41f002 A... ASR r0,r1,r2 + 0x0800087c: ea4373e0 C..s ORR r3,r3,r0,ASR #31 + 0x08000880: e006 .. B 0x8000890 ; __aeabi_lasr + 32 + 0x08000882: fa41f302 A... ASR r3,r1,r2 + 0x08000886: 40d0 .@ LSRS r0,r0,r2 + 0x08000888: f1c20220 .. . RSB r2,r2,#0x20 + 0x0800088c: 4091 .@ LSLS r1,r1,r2 + 0x0800088e: 4308 .C ORRS r0,r0,r1 + 0x08000890: 4619 .F MOV r1,r3 + 0x08000892: 4770 pG BX lr + .text + __decompress + __decompress1 + 0x08000894: b570 p. PUSH {r4-r6,lr} + 0x08000896: 188c .. ADDS r4,r1,r2 + 0x08000898: f8105b01 ...[ LDRB r5,[r0],#1 + 0x0800089c: f0150307 .... ANDS r3,r5,#7 + 0x080008a0: d101 .. BNE 0x80008a6 ; __decompress + 18 + 0x080008a2: f8103b01 ...; LDRB r3,[r0],#1 + 0x080008a6: 112a *. ASRS r2,r5,#4 + 0x080008a8: d106 .. BNE 0x80008b8 ; __decompress + 36 + 0x080008aa: f8102b01 ...+ LDRB r2,[r0],#1 + 0x080008ae: e003 .. B 0x80008b8 ; __decompress + 36 + 0x080008b0: f8106b01 ...k LDRB r6,[r0],#1 + 0x080008b4: f8016b01 ...k STRB r6,[r1],#1 + 0x080008b8: 1e5b [. SUBS r3,r3,#1 + 0x080008ba: d1f9 .. BNE 0x80008b0 ; __decompress + 28 + 0x080008bc: 072b +. LSLS r3,r5,#28 + 0x080008be: d405 .. BMI 0x80008cc ; __decompress + 56 + 0x080008c0: 2300 .# MOVS r3,#0 + 0x080008c2: 1e52 R. SUBS r2,r2,#1 + 0x080008c4: d40d .. BMI 0x80008e2 ; __decompress + 78 + 0x080008c6: f8013b01 ...; STRB r3,[r1],#1 + 0x080008ca: e7fa .. B 0x80008c2 ; __decompress + 46 + 0x080008cc: f8103b01 ...; LDRB r3,[r0],#1 + 0x080008d0: 1acb .. SUBS r3,r1,r3 + 0x080008d2: 1c92 .. ADDS r2,r2,#2 + 0x080008d4: e003 .. B 0x80008de ; __decompress + 74 + 0x080008d6: f8135b01 ...[ LDRB r5,[r3],#1 + 0x080008da: f8015b01 ...[ STRB r5,[r1],#1 + 0x080008de: 1e52 R. SUBS r2,r2,#1 + 0x080008e0: d5f9 .. BPL 0x80008d6 ; __decompress + 66 + 0x080008e2: 42a1 .B CMP r1,r4 + 0x080008e4: d3d8 .. BCC 0x8000898 ; __decompress + 4 + 0x080008e6: 2000 . MOVS r0,#0 + 0x080008e8: bd70 p. POP {r4-r6,pc} + i.ADC_ConversionStop_Disable + ADC_ConversionStop_Disable + 0x080008ea: b570 p. PUSH {r4-r6,lr} + 0x080008ec: 4604 .F MOV r4,r0 + 0x080008ee: 2500 .% MOVS r5,#0 + 0x080008f0: 6820 h LDR r0,[r4,#0] + 0x080008f2: 6880 .h LDR r0,[r0,#8] + 0x080008f4: f0000001 .... AND r0,r0,#1 + 0x080008f8: b318 .. CBZ r0,0x8000942 ; ADC_ConversionStop_Disable + 88 + 0x080008fa: 6820 h LDR r0,[r4,#0] + 0x080008fc: 6880 .h LDR r0,[r0,#8] + 0x080008fe: f0200001 ... BIC r0,r0,#1 + 0x08000902: 6821 !h LDR r1,[r4,#0] + 0x08000904: 6088 .` STR r0,[r1,#8] + 0x08000906: f001fc2b ..+. BL HAL_GetTick ; 0x8002160 + 0x0800090a: 4605 .F MOV r5,r0 + 0x0800090c: e013 .. B 0x8000936 ; ADC_ConversionStop_Disable + 76 + 0x0800090e: f001fc27 ..'. BL HAL_GetTick ; 0x8002160 + 0x08000912: 1b40 @. SUBS r0,r0,r5 + 0x08000914: 2802 .( CMP r0,#2 + 0x08000916: d90e .. BLS 0x8000936 ; ADC_ConversionStop_Disable + 76 + 0x08000918: 6820 h LDR r0,[r4,#0] + 0x0800091a: 6880 .h LDR r0,[r0,#8] + 0x0800091c: f0000001 .... AND r0,r0,#1 + 0x08000920: b148 H. CBZ r0,0x8000936 ; ADC_ConversionStop_Disable + 76 + 0x08000922: 6aa0 .j LDR r0,[r4,#0x28] + 0x08000924: f0400010 @... ORR r0,r0,#0x10 + 0x08000928: 62a0 .b STR r0,[r4,#0x28] + 0x0800092a: 6ae0 .j LDR r0,[r4,#0x2c] + 0x0800092c: f0400001 @... ORR r0,r0,#1 + 0x08000930: 62e0 .b STR r0,[r4,#0x2c] + 0x08000932: 2001 . MOVS r0,#1 + 0x08000934: bd70 p. POP {r4-r6,pc} + 0x08000936: 6820 h LDR r0,[r4,#0] + 0x08000938: 6880 .h LDR r0,[r0,#8] + 0x0800093a: f0000001 .... AND r0,r0,#1 + 0x0800093e: 2800 .( CMP r0,#0 + 0x08000940: d1e5 .. BNE 0x800090e ; ADC_ConversionStop_Disable + 36 + 0x08000942: 2000 . MOVS r0,#0 + 0x08000944: e7f6 .. B 0x8000934 ; ADC_ConversionStop_Disable + 74 + 0x08000946: 0000 .. MOVS r0,r0 + i.ADC_Enable + ADC_Enable + 0x08000948: b538 8. PUSH {r3-r5,lr} + 0x0800094a: 4604 .F MOV r4,r0 + 0x0800094c: 2500 .% MOVS r5,#0 + 0x0800094e: 2000 . MOVS r0,#0 + 0x08000950: 9000 .. STR r0,[sp,#0] + 0x08000952: 6820 h LDR r0,[r4,#0] + 0x08000954: 6880 .h LDR r0,[r0,#8] + 0x08000956: f0000001 .... AND r0,r0,#1 + 0x0800095a: bb78 x. CBNZ r0,0x80009bc ; ADC_Enable + 116 + 0x0800095c: 6820 h LDR r0,[r4,#0] + 0x0800095e: 6880 .h LDR r0,[r0,#8] + 0x08000960: f0400001 @... ORR r0,r0,#1 + 0x08000964: 6821 !h LDR r1,[r4,#0] + 0x08000966: 6088 .` STR r0,[r1,#8] + 0x08000968: 4819 .H LDR r0,[pc,#100] ; [0x80009d0] = 0x20000254 + 0x0800096a: 6800 .h LDR r0,[r0,#0] + 0x0800096c: 4919 .I LDR r1,[pc,#100] ; [0x80009d4] = 0xf4240 + 0x0800096e: fbb0f0f1 .... UDIV r0,r0,r1 + 0x08000972: 9000 .. STR r0,[sp,#0] + 0x08000974: e002 .. B 0x800097c ; ADC_Enable + 52 + 0x08000976: 9800 .. LDR r0,[sp,#0] + 0x08000978: 1e40 @. SUBS r0,r0,#1 + 0x0800097a: 9000 .. STR r0,[sp,#0] + 0x0800097c: 9800 .. LDR r0,[sp,#0] + 0x0800097e: 2800 .( CMP r0,#0 + 0x08000980: d1f9 .. BNE 0x8000976 ; ADC_Enable + 46 + 0x08000982: f001fbed .... BL HAL_GetTick ; 0x8002160 + 0x08000986: 4605 .F MOV r5,r0 + 0x08000988: e019 .. B 0x80009be ; ADC_Enable + 118 + 0x0800098a: f001fbe9 .... BL HAL_GetTick ; 0x8002160 + 0x0800098e: 1b40 @. SUBS r0,r0,r5 + 0x08000990: 2802 .( CMP r0,#2 + 0x08000992: d914 .. BLS 0x80009be ; ADC_Enable + 118 + 0x08000994: 6820 h LDR r0,[r4,#0] + 0x08000996: 6880 .h LDR r0,[r0,#8] + 0x08000998: f0000001 .... AND r0,r0,#1 + 0x0800099c: b978 x. CBNZ r0,0x80009be ; ADC_Enable + 118 + 0x0800099e: 6aa0 .j LDR r0,[r4,#0x28] + 0x080009a0: f0400010 @... ORR r0,r0,#0x10 + 0x080009a4: 62a0 .b STR r0,[r4,#0x28] + 0x080009a6: 6ae0 .j LDR r0,[r4,#0x2c] + 0x080009a8: f0400001 @... ORR r0,r0,#1 + 0x080009ac: 62e0 .b STR r0,[r4,#0x2c] + 0x080009ae: bf00 .. NOP + 0x080009b0: 2000 . MOVS r0,#0 + 0x080009b2: f8840024 ..$. STRB r0,[r4,#0x24] + 0x080009b6: bf00 .. NOP + 0x080009b8: 2001 . MOVS r0,#1 + 0x080009ba: bd38 8. POP {r3-r5,pc} + 0x080009bc: e005 .. B 0x80009ca ; ADC_Enable + 130 + 0x080009be: 6820 h LDR r0,[r4,#0] + 0x080009c0: 6880 .h LDR r0,[r0,#8] + 0x080009c2: f0000001 .... AND r0,r0,#1 + 0x080009c6: 2800 .( CMP r0,#0 + 0x080009c8: d0df .. BEQ 0x800098a ; ADC_Enable + 66 + 0x080009ca: 2000 . MOVS r0,#0 + 0x080009cc: e7f5 .. B 0x80009ba ; ADC_Enable + 114 + $d + 0x080009ce: 0000 .. DCW 0 + 0x080009d0: 20000254 T.. DCD 536871508 + 0x080009d4: 000f4240 @B.. DCD 1000000 + $t + i.ADS1115GetAverageVol + ADS1115GetAverageVol + 0x080009d8: b538 8. PUSH {r3-r5,lr} + 0x080009da: 4604 .F MOV r4,r0 + 0x080009dc: 2000 . MOVS r0,#0 + 0x080009de: 9000 .. STR r0,[sp,#0] + 0x080009e0: 2500 .% MOVS r5,#0 + 0x080009e2: 4668 hF MOV r0,sp + 0x080009e4: f000f910 .... BL ADS1115_ReadRawData ; 0x8000c08 + 0x080009e8: 4620 F MOV r0,r4 + 0x080009ea: f000f871 ..q. BL ADS1115_GetAverageVoltage ; 0x8000ad0 + 0x080009ee: 4605 .F MOV r5,r0 + 0x080009f0: 4628 (F MOV r0,r5 + 0x080009f2: bd38 8. POP {r3-r5,pc} + i.ADS1115GetOriginalVol + ADS1115GetOriginalVol + 0x080009f4: b538 8. PUSH {r3-r5,lr} + 0x080009f6: 2000 . MOVS r0,#0 + 0x080009f8: 9000 .. STR r0,[sp,#0] + 0x080009fa: 2400 .$ MOVS r4,#0 + 0x080009fc: 4668 hF MOV r0,sp + 0x080009fe: f000f903 .... BL ADS1115_ReadRawData ; 0x8000c08 + 0x08000a02: 4605 .F MOV r5,r0 + 0x08000a04: f7fffcf1 .... BL __aeabi_ui2f ; 0x80003ea + 0x08000a08: bd38 8. POP {r3-r5,pc} + i.ADS1115GetVol + ADS1115GetVol + 0x08000a0a: b538 8. PUSH {r3-r5,lr} + 0x08000a0c: 2000 . MOVS r0,#0 + 0x08000a0e: 9000 .. STR r0,[sp,#0] + 0x08000a10: 2400 .$ MOVS r4,#0 + 0x08000a12: 4668 hF MOV r0,sp + 0x08000a14: f000f8f8 .... BL ADS1115_ReadRawData ; 0x8000c08 + 0x08000a18: f9bd0000 .... LDRSH r0,[sp,#0] + 0x08000a1c: f000f87c ..|. BL ADS1115_RawDataToVoltage ; 0x8000b18 + 0x08000a20: 4604 .F MOV r4,r0 + 0x08000a22: 4620 F MOV r0,r4 + 0x08000a24: bd38 8. POP {r3-r5,pc} + 0x08000a26: 0000 .. MOVS r0,r0 + i.ADS1115Init + ADS1115Init + 0x08000a28: b510 .. PUSH {r4,lr} + 0x08000a2a: 4806 .H LDR r0,[pc,#24] ; [0x8000a44] = 0x200002d0 + 0x08000a2c: f003fbea .... BL I2C_Virtual_ConfigPort ; 0x8004204 + 0x08000a30: 4804 .H LDR r0,[pc,#16] ; [0x8000a44] = 0x200002d0 + 0x08000a32: f003fcf3 .... BL I2C_Virtual_SwitchBus ; 0x800441c + 0x08000a36: f000f949 ..I. BL ADS1115_UserConfig1 ; 0x8000ccc + 0x08000a3a: 2002 . MOVS r0,#2 + 0x08000a3c: f000f920 .. . BL ADS1115_ScanChannel ; 0x8000c80 + 0x08000a40: bd10 .. POP {r4,pc} + $d + 0x08000a42: 0000 .. DCW 0 + 0x08000a44: 200002d0 ... DCD 536871632 + $t + i.ADS1115_Config + ADS1115_Config + 0x08000a48: b57c |. PUSH {r2-r6,lr} + 0x08000a4a: 4604 .F MOV r4,r0 + 0x08000a4c: 2500 .% MOVS r5,#0 + 0x08000a4e: 8820 . LDRH r0,[r4,#0] + 0x08000a50: 8861 a. LDRH r1,[r4,#2] + 0x08000a52: 4408 .D ADD r0,r0,r1 + 0x08000a54: 88a1 .. LDRH r1,[r4,#4] + 0x08000a56: 4408 .D ADD r0,r0,r1 + 0x08000a58: 88e1 .. LDRH r1,[r4,#6] + 0x08000a5a: 4408 .D ADD r0,r0,r1 + 0x08000a5c: 8921 !. LDRH r1,[r4,#8] + 0x08000a5e: 4408 .D ADD r0,r0,r1 + 0x08000a60: 8961 a. LDRH r1,[r4,#0xa] + 0x08000a62: 4408 .D ADD r0,r0,r1 + 0x08000a64: 89a1 .. LDRH r1,[r4,#0xc] + 0x08000a66: 4408 .D ADD r0,r0,r1 + 0x08000a68: 89e1 .. LDRH r1,[r4,#0xe] + 0x08000a6a: 4408 .D ADD r0,r0,r1 + 0x08000a6c: 8a21 !. LDRH r1,[r4,#0x10] + 0x08000a6e: 4408 .D ADD r0,r0,r1 + 0x08000a70: b280 .. UXTH r0,r0 + 0x08000a72: 9001 .. STR r0,[sp,#4] + 0x08000a74: f8bd0004 .... LDRH r0,[sp,#4] + 0x08000a78: 0a00 .. LSRS r0,r0,#8 + 0x08000a7a: f88d0000 .... STRB r0,[sp,#0] + 0x08000a7e: f8bd0004 .... LDRH r0,[sp,#4] + 0x08000a82: b2c0 .. UXTB r0,r0 + 0x08000a84: f88d0001 .... STRB r0,[sp,#1] + 0x08000a88: f003fc92 .... BL I2C_Virtual_Start ; 0x80043b0 + 0x08000a8c: 2090 . MOVS r0,#0x90 + 0x08000a8e: f003fc31 ..1. BL I2C_Virtual_SendByte ; 0x80042f4 + 0x08000a92: 4605 .F MOV r5,r0 + 0x08000a94: b90d .. CBNZ r5,0x8000a9a ; ADS1115_Config + 82 + 0x08000a96: 2000 . MOVS r0,#0 + 0x08000a98: bd7c |. POP {r2-r6,pc} + 0x08000a9a: 2001 . MOVS r0,#1 + 0x08000a9c: f003fc2a ..*. BL I2C_Virtual_SendByte ; 0x80042f4 + 0x08000aa0: 4605 .F MOV r5,r0 + 0x08000aa2: b90d .. CBNZ r5,0x8000aa8 ; ADS1115_Config + 96 + 0x08000aa4: 2000 . MOVS r0,#0 + 0x08000aa6: e7f7 .. B 0x8000a98 ; ADS1115_Config + 80 + 0x08000aa8: f89d0000 .... LDRB r0,[sp,#0] + 0x08000aac: f003fc22 ..". BL I2C_Virtual_SendByte ; 0x80042f4 + 0x08000ab0: 4605 .F MOV r5,r0 + 0x08000ab2: b90d .. CBNZ r5,0x8000ab8 ; ADS1115_Config + 112 + 0x08000ab4: 2000 . MOVS r0,#0 + 0x08000ab6: e7ef .. B 0x8000a98 ; ADS1115_Config + 80 + 0x08000ab8: f89d0001 .... LDRB r0,[sp,#1] + 0x08000abc: f003fc1a .... BL I2C_Virtual_SendByte ; 0x80042f4 + 0x08000ac0: 4605 .F MOV r5,r0 + 0x08000ac2: b90d .. CBNZ r5,0x8000ac8 ; ADS1115_Config + 128 + 0x08000ac4: 2000 . MOVS r0,#0 + 0x08000ac6: e7e7 .. B 0x8000a98 ; ADS1115_Config + 80 + 0x08000ac8: f003fc8c .... BL I2C_Virtual_Stop ; 0x80043e4 + 0x08000acc: 2001 . MOVS r0,#1 + 0x08000ace: e7e3 .. B 0x8000a98 ; ADS1115_Config + 80 + i.ADS1115_GetAverageVoltage + ADS1115_GetAverageVoltage + 0x08000ad0: b5f8 .. PUSH {r3-r7,lr} + 0x08000ad2: 4604 .F MOV r4,r0 + 0x08000ad4: 2500 .% MOVS r5,#0 + 0x08000ad6: b914 .. CBNZ r4,0x8000ade ; ADS1115_GetAverageVoltage + 14 + 0x08000ad8: f000f814 .... BL ADS1115_GetVoltage ; 0x8000b04 + 0x08000adc: bdf8 .. POP {r3-r7,pc} + 0x08000ade: 2600 .& MOVS r6,#0 + 0x08000ae0: e007 .. B 0x8000af2 ; ADS1115_GetAverageVoltage + 34 + 0x08000ae2: 4668 hF MOV r0,sp + 0x08000ae4: f000f890 .... BL ADS1115_ReadRawData ; 0x8000c08 + 0x08000ae8: f9bd0000 .... LDRSH r0,[sp,#0] + 0x08000aec: 4405 .D ADD r5,r5,r0 + 0x08000aee: 1c70 p. ADDS r0,r6,#1 + 0x08000af0: b286 .. UXTH r6,r0 + 0x08000af2: 42a6 .B CMP r6,r4 + 0x08000af4: dbf5 .. BLT 0x8000ae2 ; ADS1115_GetAverageVoltage + 18 + 0x08000af6: fb95f0f4 .... SDIV r0,r5,r4 + 0x08000afa: b206 .. SXTH r6,r0 + 0x08000afc: 4630 0F MOV r0,r6 + 0x08000afe: f000f80b .... BL ADS1115_RawDataToVoltage ; 0x8000b18 + 0x08000b02: e7eb .. B 0x8000adc ; ADS1115_GetAverageVoltage + 12 + i.ADS1115_GetVoltage + ADS1115_GetVoltage + 0x08000b04: b508 .. PUSH {r3,lr} + 0x08000b06: 4668 hF MOV r0,sp + 0x08000b08: f000f87e ..~. BL ADS1115_ReadRawData ; 0x8000c08 + 0x08000b0c: f9bd0000 .... LDRSH r0,[sp,#0] + 0x08000b10: f000f802 .... BL ADS1115_RawDataToVoltage ; 0x8000b18 + 0x08000b14: bd08 .. POP {r3,pc} + 0x08000b16: 0000 .. MOVS r0,r0 + i.ADS1115_RawDataToVoltage + ADS1115_RawDataToVoltage + 0x08000b18: e92d47f0 -..G PUSH {r4-r10,lr} + 0x08000b1c: 4681 .F MOV r9,r0 + 0x08000b1e: 4835 5H LDR r0,[pc,#212] ; [0x8000bf4] = 0x200033a0 + 0x08000b20: 8880 .. LDRH r0,[r0,#4] + 0x08000b22: f5b06fc0 ...o CMP r0,#0x600 + 0x08000b26: d02a *. BEQ 0x8000b7e ; ADS1115_RawDataToVoltage + 102 + 0x08000b28: dc08 .. BGT 0x8000b3c ; ADS1115_RawDataToVoltage + 36 + 0x08000b2a: 2800 .( CMP r0,#0 + 0x08000b2c: d04f O. BEQ 0x8000bce ; ADS1115_RawDataToVoltage + 182 + 0x08000b2e: f5b07f00 .... CMP r0,#0x200 + 0x08000b32: d03e >. BEQ 0x8000bb2 ; ADS1115_RawDataToVoltage + 154 + 0x08000b34: f5b06f80 ...o CMP r0,#0x400 + 0x08000b38: d156 V. BNE 0x8000be8 ; ADS1115_RawDataToVoltage + 208 + 0x08000b3a: e02d -. B 0x8000b98 ; ADS1115_RawDataToVoltage + 128 + 0x08000b3c: f5b06f00 ...o CMP r0,#0x800 + 0x08000b40: d010 .. BEQ 0x8000b64 ; ADS1115_RawDataToVoltage + 76 + 0x08000b42: f5b06f20 .. o CMP r0,#0xa00 + 0x08000b46: d14f O. BNE 0x8000be8 ; ADS1115_RawDataToVoltage + 208 + 0x08000b48: 4648 HF MOV r0,r9 + 0x08000b4a: f7fffc53 ..S. BL __aeabi_i2d ; 0x80003f4 + 0x08000b4e: 4607 .F MOV r7,r0 + 0x08000b50: 2200 ." MOVS r2,#0 + 0x08000b52: f04f537e O.~S MOV r3,#0x3f800000 + 0x08000b56: f7fffbd6 .... BL __aeabi_dmul ; 0x8000306 + 0x08000b5a: 4605 .F MOV r5,r0 + 0x08000b5c: f7fffc5b ..[. BL __aeabi_d2f ; 0x8000416 + 0x08000b60: 4604 .F MOV r4,r0 + 0x08000b62: e043 C. B 0x8000bec ; ADS1115_RawDataToVoltage + 212 + 0x08000b64: 4648 HF MOV r0,r9 + 0x08000b66: f7fffc45 ..E. BL __aeabi_i2d ; 0x80003f4 + 0x08000b6a: 4607 .F MOV r7,r0 + 0x08000b6c: 2200 ." MOVS r2,#0 + 0x08000b6e: 4b22 "K LDR r3,[pc,#136] ; [0x8000bf8] = 0x3f900000 + 0x08000b70: f7fffbc9 .... BL __aeabi_dmul ; 0x8000306 + 0x08000b74: 4605 .F MOV r5,r0 + 0x08000b76: f7fffc4e ..N. BL __aeabi_d2f ; 0x8000416 + 0x08000b7a: 4604 .F MOV r4,r0 + 0x08000b7c: e036 6. B 0x8000bec ; ADS1115_RawDataToVoltage + 212 + 0x08000b7e: 4648 HF MOV r0,r9 + 0x08000b80: f7fffc38 ..8. BL __aeabi_i2d ; 0x80003f4 + 0x08000b84: 4607 .F MOV r7,r0 + 0x08000b86: 2200 ." MOVS r2,#0 + 0x08000b88: 4b1c .K LDR r3,[pc,#112] ; [0x8000bfc] = 0x3fa00000 + 0x08000b8a: f7fffbbc .... BL __aeabi_dmul ; 0x8000306 + 0x08000b8e: 4605 .F MOV r5,r0 + 0x08000b90: f7fffc41 ..A. BL __aeabi_d2f ; 0x8000416 + 0x08000b94: 4604 .F MOV r4,r0 + 0x08000b96: e029 ). B 0x8000bec ; ADS1115_RawDataToVoltage + 212 + 0x08000b98: 4648 HF MOV r0,r9 + 0x08000b9a: f7fffc2b ..+. BL __aeabi_i2d ; 0x80003f4 + 0x08000b9e: 4607 .F MOV r7,r0 + 0x08000ba0: 2200 ." MOVS r2,#0 + 0x08000ba2: 4b17 .K LDR r3,[pc,#92] ; [0x8000c00] = 0x3fb00000 + 0x08000ba4: f7fffbaf .... BL __aeabi_dmul ; 0x8000306 + 0x08000ba8: 4605 .F MOV r5,r0 + 0x08000baa: f7fffc34 ..4. BL __aeabi_d2f ; 0x8000416 + 0x08000bae: 4604 .F MOV r4,r0 + 0x08000bb0: e01c .. B 0x8000bec ; ADS1115_RawDataToVoltage + 212 + 0x08000bb2: 4648 HF MOV r0,r9 + 0x08000bb4: f7fffc1e .... BL __aeabi_i2d ; 0x80003f4 + 0x08000bb8: 4607 .F MOV r7,r0 + 0x08000bba: 2200 ." MOVS r2,#0 + 0x08000bbc: f04f537f O..S MOV r3,#0x3fc00000 + 0x08000bc0: f7fffba1 .... BL __aeabi_dmul ; 0x8000306 + 0x08000bc4: 4605 .F MOV r5,r0 + 0x08000bc6: f7fffc26 ..&. BL __aeabi_d2f ; 0x8000416 + 0x08000bca: 4604 .F MOV r4,r0 + 0x08000bcc: e00e .. B 0x8000bec ; ADS1115_RawDataToVoltage + 212 + 0x08000bce: 4648 HF MOV r0,r9 + 0x08000bd0: f7fffc10 .... BL __aeabi_i2d ; 0x80003f4 + 0x08000bd4: 4607 .F MOV r7,r0 + 0x08000bd6: 2200 ." MOVS r2,#0 + 0x08000bd8: 4b0a .K LDR r3,[pc,#40] ; [0x8000c04] = 0x3fc80000 + 0x08000bda: f7fffb94 .... BL __aeabi_dmul ; 0x8000306 + 0x08000bde: 4605 .F MOV r5,r0 + 0x08000be0: f7fffc19 .... BL __aeabi_d2f ; 0x8000416 + 0x08000be4: 4604 .F MOV r4,r0 + 0x08000be6: e001 .. B 0x8000bec ; ADS1115_RawDataToVoltage + 212 + 0x08000be8: 2400 .$ MOVS r4,#0 + 0x08000bea: bf00 .. NOP + 0x08000bec: bf00 .. NOP + 0x08000bee: 4620 F MOV r0,r4 + 0x08000bf0: e8bd87f0 .... POP {r4-r10,pc} + $d + 0x08000bf4: 200033a0 .3. DCD 536884128 + 0x08000bf8: 3f900000 ...? DCD 1066401792 + 0x08000bfc: 3fa00000 ...? DCD 1067450368 + 0x08000c00: 3fb00000 ...? DCD 1068498944 + 0x08000c04: 3fc80000 ...? DCD 1070071808 + $t + i.ADS1115_ReadRawData + ADS1115_ReadRawData + 0x08000c08: b538 8. PUSH {r3-r5,lr} + 0x08000c0a: 4605 .F MOV r5,r0 + 0x08000c0c: 2400 .$ MOVS r4,#0 + 0x08000c0e: f003fbcf .... BL I2C_Virtual_Start ; 0x80043b0 + 0x08000c12: 2090 . MOVS r0,#0x90 + 0x08000c14: f003fb6e ..n. BL I2C_Virtual_SendByte ; 0x80042f4 + 0x08000c18: 4604 .F MOV r4,r0 + 0x08000c1a: b90c .. CBNZ r4,0x8000c20 ; ADS1115_ReadRawData + 24 + 0x08000c1c: 2000 . MOVS r0,#0 + 0x08000c1e: bd38 8. POP {r3-r5,pc} + 0x08000c20: 2000 . MOVS r0,#0 + 0x08000c22: f003fb67 ..g. BL I2C_Virtual_SendByte ; 0x80042f4 + 0x08000c26: 4604 .F MOV r4,r0 + 0x08000c28: b90c .. CBNZ r4,0x8000c2e ; ADS1115_ReadRawData + 38 + 0x08000c2a: 2000 . MOVS r0,#0 + 0x08000c2c: e7f7 .. B 0x8000c1e ; ADS1115_ReadRawData + 22 + 0x08000c2e: f003fbd9 .... BL I2C_Virtual_Stop ; 0x80043e4 + 0x08000c32: 200a . MOVS r0,#0xa + 0x08000c34: f005fa1a .... BL delay_us ; 0x800606c + 0x08000c38: f003fbba .... BL I2C_Virtual_Start ; 0x80043b0 + 0x08000c3c: 2091 . MOVS r0,#0x91 + 0x08000c3e: f003fb59 ..Y. BL I2C_Virtual_SendByte ; 0x80042f4 + 0x08000c42: 4604 .F MOV r4,r0 + 0x08000c44: b90c .. CBNZ r4,0x8000c4a ; ADS1115_ReadRawData + 66 + 0x08000c46: 2000 . MOVS r0,#0 + 0x08000c48: e7e9 .. B 0x8000c1e ; ADS1115_ReadRawData + 22 + 0x08000c4a: f003fb17 .... BL I2C_Virtual_RcvByte ; 0x800427c + 0x08000c4e: f88d0000 .... STRB r0,[sp,#0] + 0x08000c52: f003fabb .... BL I2C_Virtual_Ack ; 0x80041cc + 0x08000c56: f003fb11 .... BL I2C_Virtual_RcvByte ; 0x800427c + 0x08000c5a: f88d0001 .... STRB r0,[sp,#1] + 0x08000c5e: f003faf1 .... BL I2C_Virtual_NoAck ; 0x8004244 + 0x08000c62: f003fbbf .... BL I2C_Virtual_Stop ; 0x80043e4 + 0x08000c66: f89d0000 .... LDRB r0,[sp,#0] + 0x08000c6a: f44f417f O..A MOV r1,#0xff00 + 0x08000c6e: ea012000 ... AND r0,r1,r0,LSL #8 + 0x08000c72: f89d1001 .... LDRB r1,[sp,#1] + 0x08000c76: 4308 .C ORRS r0,r0,r1 + 0x08000c78: b200 .. SXTH r0,r0 + 0x08000c7a: 8028 (. STRH r0,[r5,#0] + 0x08000c7c: 2001 . MOVS r0,#1 + 0x08000c7e: e7ce .. B 0x8000c1e ; ADS1115_ReadRawData + 22 + i.ADS1115_ScanChannel + ADS1115_ScanChannel + 0x08000c80: b510 .. PUSH {r4,lr} + 0x08000c82: 4604 .F MOV r4,r0 + 0x08000c84: b134 4. CBZ r4,0x8000c94 ; ADS1115_ScanChannel + 20 + 0x08000c86: 2c01 ., CMP r4,#1 + 0x08000c88: d009 .. BEQ 0x8000c9e ; ADS1115_ScanChannel + 30 + 0x08000c8a: 2c02 ., CMP r4,#2 + 0x08000c8c: d00c .. BEQ 0x8000ca8 ; ADS1115_ScanChannel + 40 + 0x08000c8e: 2c03 ., CMP r4,#3 + 0x08000c90: d114 .. BNE 0x8000cbc ; ADS1115_ScanChannel + 60 + 0x08000c92: e00e .. B 0x8000cb2 ; ADS1115_ScanChannel + 50 + 0x08000c94: f44f4080 O..@ MOV r0,#0x4000 + 0x08000c98: 490b .I LDR r1,[pc,#44] ; [0x8000cc8] = 0x200033a0 + 0x08000c9a: 8048 H. STRH r0,[r1,#2] + 0x08000c9c: e00f .. B 0x8000cbe ; ADS1115_ScanChannel + 62 + 0x08000c9e: f44f40a0 O..@ MOV r0,#0x5000 + 0x08000ca2: 4909 .I LDR r1,[pc,#36] ; [0x8000cc8] = 0x200033a0 + 0x08000ca4: 8048 H. STRH r0,[r1,#2] + 0x08000ca6: e00a .. B 0x8000cbe ; ADS1115_ScanChannel + 62 + 0x08000ca8: f44f40c0 O..@ MOV r0,#0x6000 + 0x08000cac: 4906 .I LDR r1,[pc,#24] ; [0x8000cc8] = 0x200033a0 + 0x08000cae: 8048 H. STRH r0,[r1,#2] + 0x08000cb0: e005 .. B 0x8000cbe ; ADS1115_ScanChannel + 62 + 0x08000cb2: f44f40e0 O..@ MOV r0,#0x7000 + 0x08000cb6: 4904 .I LDR r1,[pc,#16] ; [0x8000cc8] = 0x200033a0 + 0x08000cb8: 8048 H. STRH r0,[r1,#2] + 0x08000cba: e000 .. B 0x8000cbe ; ADS1115_ScanChannel + 62 + 0x08000cbc: bf00 .. NOP + 0x08000cbe: bf00 .. NOP + 0x08000cc0: 4801 .H LDR r0,[pc,#4] ; [0x8000cc8] = 0x200033a0 + 0x08000cc2: f7fffec1 .... BL ADS1115_Config ; 0x8000a48 + 0x08000cc6: bd10 .. POP {r4,pc} + $d + 0x08000cc8: 200033a0 .3. DCD 536884128 + $t + i.ADS1115_UserConfig1 + ADS1115_UserConfig1 + 0x08000ccc: b510 .. PUSH {r4,lr} + 0x08000cce: 2000 . MOVS r0,#0 + 0x08000cd0: 4909 .I LDR r1,[pc,#36] ; [0x8000cf8] = 0x200033a0 + 0x08000cd2: 81c8 .. STRH r0,[r1,#0xe] + 0x08000cd4: 8148 H. STRH r0,[r1,#0xa] + 0x08000cd6: 8188 .. STRH r0,[r1,#0xc] + 0x08000cd8: 20c0 . MOVS r0,#0xc0 + 0x08000cda: 8108 .. STRH r0,[r1,#8] + 0x08000cdc: f44f7080 O..p MOV r0,#0x100 + 0x08000ce0: 80c8 .. STRH r0,[r1,#6] + 0x08000ce2: 0180 .. LSLS r0,r0,#6 + 0x08000ce4: 8048 H. STRH r0,[r1,#2] + 0x08000ce6: 0040 @. LSLS r0,r0,#1 + 0x08000ce8: 8008 .. STRH r0,[r1,#0] + 0x08000cea: 1180 .. ASRS r0,r0,#6 + 0x08000cec: 8088 .. STRH r0,[r1,#4] + 0x08000cee: 4608 .F MOV r0,r1 + 0x08000cf0: f7fffeaa .... BL ADS1115_Config ; 0x8000a48 + 0x08000cf4: bd10 .. POP {r4,pc} + $d + 0x08000cf6: 0000 .. DCW 0 + 0x08000cf8: 200033a0 .3. DCD 536884128 + $t + i.BusFault_Handler + BusFault_Handler + 0x08000cfc: bf00 .. NOP + 0x08000cfe: e7fe .. B 0x8000cfe ; BusFault_Handler + 2 + i.CompatibleConversionSCL + CompatibleConversionSCL + 0x08000d00: 4601 .F MOV r1,r0 + 0x08000d02: 4a10 .J LDR r2,[pc,#64] ; [0x8000d44] = 0x40010800 + 0x08000d04: 6888 .h LDR r0,[r1,#8] + 0x08000d06: 4290 .B CMP r0,r2 + 0x08000d08: d101 .. BNE 0x8000d0e ; CompatibleConversionSCL + 14 + 0x08000d0a: 2041 A MOVS r0,#0x41 + 0x08000d0c: 4770 pG BX lr + 0x08000d0e: 4a0e .J LDR r2,[pc,#56] ; [0x8000d48] = 0x40010c00 + 0x08000d10: 6888 .h LDR r0,[r1,#8] + 0x08000d12: 4290 .B CMP r0,r2 + 0x08000d14: d101 .. BNE 0x8000d1a ; CompatibleConversionSCL + 26 + 0x08000d16: 2042 B MOVS r0,#0x42 + 0x08000d18: e7f8 .. B 0x8000d0c ; CompatibleConversionSCL + 12 + 0x08000d1a: 4a0c .J LDR r2,[pc,#48] ; [0x8000d4c] = 0x40011000 + 0x08000d1c: 6888 .h LDR r0,[r1,#8] + 0x08000d1e: 4290 .B CMP r0,r2 + 0x08000d20: d101 .. BNE 0x8000d26 ; CompatibleConversionSCL + 38 + 0x08000d22: 2043 C MOVS r0,#0x43 + 0x08000d24: e7f2 .. B 0x8000d0c ; CompatibleConversionSCL + 12 + 0x08000d26: 4a0a .J LDR r2,[pc,#40] ; [0x8000d50] = 0x40011400 + 0x08000d28: 6888 .h LDR r0,[r1,#8] + 0x08000d2a: 4290 .B CMP r0,r2 + 0x08000d2c: d101 .. BNE 0x8000d32 ; CompatibleConversionSCL + 50 + 0x08000d2e: 2044 D MOVS r0,#0x44 + 0x08000d30: e7ec .. B 0x8000d0c ; CompatibleConversionSCL + 12 + 0x08000d32: 4a08 .J LDR r2,[pc,#32] ; [0x8000d54] = 0x40011800 + 0x08000d34: 6888 .h LDR r0,[r1,#8] + 0x08000d36: 4290 .B CMP r0,r2 + 0x08000d38: d101 .. BNE 0x8000d3e ; CompatibleConversionSCL + 62 + 0x08000d3a: 2045 E MOVS r0,#0x45 + 0x08000d3c: e7e6 .. B 0x8000d0c ; CompatibleConversionSCL + 12 + 0x08000d3e: 2000 . MOVS r0,#0 + 0x08000d40: e7e4 .. B 0x8000d0c ; CompatibleConversionSCL + 12 + $d + 0x08000d42: 0000 .. DCW 0 + 0x08000d44: 40010800 ...@ DCD 1073809408 + 0x08000d48: 40010c00 ...@ DCD 1073810432 + 0x08000d4c: 40011000 ...@ DCD 1073811456 + 0x08000d50: 40011400 ...@ DCD 1073812480 + 0x08000d54: 40011800 ...@ DCD 1073813504 + $t + i.CompatibleConversionSDA + CompatibleConversionSDA + 0x08000d58: 4601 .F MOV r1,r0 + 0x08000d5a: 4a10 .J LDR r2,[pc,#64] ; [0x8000d9c] = 0x40010800 + 0x08000d5c: 6808 .h LDR r0,[r1,#0] + 0x08000d5e: 4290 .B CMP r0,r2 + 0x08000d60: d101 .. BNE 0x8000d66 ; CompatibleConversionSDA + 14 + 0x08000d62: 2041 A MOVS r0,#0x41 + 0x08000d64: 4770 pG BX lr + 0x08000d66: 4a0e .J LDR r2,[pc,#56] ; [0x8000da0] = 0x40010c00 + 0x08000d68: 6808 .h LDR r0,[r1,#0] + 0x08000d6a: 4290 .B CMP r0,r2 + 0x08000d6c: d101 .. BNE 0x8000d72 ; CompatibleConversionSDA + 26 + 0x08000d6e: 2042 B MOVS r0,#0x42 + 0x08000d70: e7f8 .. B 0x8000d64 ; CompatibleConversionSDA + 12 + 0x08000d72: 4a0c .J LDR r2,[pc,#48] ; [0x8000da4] = 0x40011000 + 0x08000d74: 6808 .h LDR r0,[r1,#0] + 0x08000d76: 4290 .B CMP r0,r2 + 0x08000d78: d101 .. BNE 0x8000d7e ; CompatibleConversionSDA + 38 + 0x08000d7a: 2043 C MOVS r0,#0x43 + 0x08000d7c: e7f2 .. B 0x8000d64 ; CompatibleConversionSDA + 12 + 0x08000d7e: 4a0a .J LDR r2,[pc,#40] ; [0x8000da8] = 0x40011400 + 0x08000d80: 6808 .h LDR r0,[r1,#0] + 0x08000d82: 4290 .B CMP r0,r2 + 0x08000d84: d101 .. BNE 0x8000d8a ; CompatibleConversionSDA + 50 + 0x08000d86: 2044 D MOVS r0,#0x44 + 0x08000d88: e7ec .. B 0x8000d64 ; CompatibleConversionSDA + 12 + 0x08000d8a: 4a08 .J LDR r2,[pc,#32] ; [0x8000dac] = 0x40011800 + 0x08000d8c: 6808 .h LDR r0,[r1,#0] + 0x08000d8e: 4290 .B CMP r0,r2 + 0x08000d90: d101 .. BNE 0x8000d96 ; CompatibleConversionSDA + 62 + 0x08000d92: 2045 E MOVS r0,#0x45 + 0x08000d94: e7e6 .. B 0x8000d64 ; CompatibleConversionSDA + 12 + 0x08000d96: 2000 . MOVS r0,#0 + 0x08000d98: e7e4 .. B 0x8000d64 ; CompatibleConversionSDA + 12 + $d + 0x08000d9a: 0000 .. DCW 0 + 0x08000d9c: 40010800 ...@ DCD 1073809408 + 0x08000da0: 40010c00 ...@ DCD 1073810432 + 0x08000da4: 40011000 ...@ DCD 1073811456 + 0x08000da8: 40011400 ...@ DCD 1073812480 + 0x08000dac: 40011800 ...@ DCD 1073813504 + $t + i.DMA1_Channel1_IRQHandler + DMA1_Channel1_IRQHandler + 0x08000db0: b510 .. PUSH {r4,lr} + 0x08000db2: 4802 .H LDR r0,[pc,#8] ; [0x8000dbc] = 0x20000490 + 0x08000db4: f000fd44 ..D. BL HAL_DMA_IRQHandler ; 0x8001840 + 0x08000db8: bd10 .. POP {r4,pc} + $d + 0x08000dba: 0000 .. DCW 0 + 0x08000dbc: 20000490 ... DCD 536872080 + $t + i.DMA1_Channel2_IRQHandler + DMA1_Channel2_IRQHandler + 0x08000dc0: b510 .. PUSH {r4,lr} + 0x08000dc2: 4802 .H LDR r0,[pc,#8] ; [0x8000dcc] = 0x200008d4 + 0x08000dc4: f000fd3c ..<. BL HAL_DMA_IRQHandler ; 0x8001840 + 0x08000dc8: bd10 .. POP {r4,pc} + $d + 0x08000dca: 0000 .. DCW 0 + 0x08000dcc: 200008d4 ... DCD 536873172 + $t + i.DMA1_Channel3_IRQHandler + DMA1_Channel3_IRQHandler + 0x08000dd0: b510 .. PUSH {r4,lr} + 0x08000dd2: 4802 .H LDR r0,[pc,#8] ; [0x8000ddc] = 0x20000890 + 0x08000dd4: f000fd34 ..4. BL HAL_DMA_IRQHandler ; 0x8001840 + 0x08000dd8: bd10 .. POP {r4,pc} + $d + 0x08000dda: 0000 .. DCW 0 + 0x08000ddc: 20000890 ... DCD 536873104 + $t + i.DMA1_Channel4_IRQHandler + DMA1_Channel4_IRQHandler + 0x08000de0: b510 .. PUSH {r4,lr} + 0x08000de2: 4802 .H LDR r0,[pc,#8] ; [0x8000dec] = 0x200007c4 + 0x08000de4: f000fd2c ..,. BL HAL_DMA_IRQHandler ; 0x8001840 + 0x08000de8: bd10 .. POP {r4,pc} + $d + 0x08000dea: 0000 .. DCW 0 + 0x08000dec: 200007c4 ... DCD 536872900 + $t + i.DMA1_Channel5_IRQHandler + DMA1_Channel5_IRQHandler + 0x08000df0: b510 .. PUSH {r4,lr} + 0x08000df2: 4802 .H LDR r0,[pc,#8] ; [0x8000dfc] = 0x20000780 + 0x08000df4: f000fd24 ..$. BL HAL_DMA_IRQHandler ; 0x8001840 + 0x08000df8: bd10 .. POP {r4,pc} + $d + 0x08000dfa: 0000 .. DCW 0 + 0x08000dfc: 20000780 ... DCD 536872832 + $t + i.DMA1_Channel6_IRQHandler + DMA1_Channel6_IRQHandler + 0x08000e00: b510 .. PUSH {r4,lr} + 0x08000e02: 4802 .H LDR r0,[pc,#8] ; [0x8000e0c] = 0x20000808 + 0x08000e04: f000fd1c .... BL HAL_DMA_IRQHandler ; 0x8001840 + 0x08000e08: bd10 .. POP {r4,pc} + $d + 0x08000e0a: 0000 .. DCW 0 + 0x08000e0c: 20000808 ... DCD 536872968 + $t + i.DMA1_Channel7_IRQHandler + DMA1_Channel7_IRQHandler + 0x08000e10: b510 .. PUSH {r4,lr} + 0x08000e12: 4802 .H LDR r0,[pc,#8] ; [0x8000e1c] = 0x2000084c + 0x08000e14: f000fd14 .... BL HAL_DMA_IRQHandler ; 0x8001840 + 0x08000e18: bd10 .. POP {r4,pc} + $d + 0x08000e1a: 0000 .. DCW 0 + 0x08000e1c: 2000084c L.. DCD 536873036 + $t + i.DMA_SetConfig + DMA_SetConfig + 0x08000e20: b530 0. PUSH {r4,r5,lr} + 0x08000e22: f8905040 ..@P LDRB r5,[r0,#0x40] + 0x08000e26: 2401 .$ MOVS r4,#1 + 0x08000e28: 40ac .@ LSLS r4,r4,r5 + 0x08000e2a: 6bc5 .k LDR r5,[r0,#0x3c] + 0x08000e2c: 606c l` STR r4,[r5,#4] + 0x08000e2e: 6804 .h LDR r4,[r0,#0] + 0x08000e30: 6063 c` STR r3,[r4,#4] + 0x08000e32: 6844 Dh LDR r4,[r0,#4] + 0x08000e34: 2c10 ., CMP r4,#0x10 + 0x08000e36: d104 .. BNE 0x8000e42 ; DMA_SetConfig + 34 + 0x08000e38: 6804 .h LDR r4,[r0,#0] + 0x08000e3a: 60a2 .` STR r2,[r4,#8] + 0x08000e3c: 6804 .h LDR r4,[r0,#0] + 0x08000e3e: 60e1 .` STR r1,[r4,#0xc] + 0x08000e40: e003 .. B 0x8000e4a ; DMA_SetConfig + 42 + 0x08000e42: 6804 .h LDR r4,[r0,#0] + 0x08000e44: 60a1 .` STR r1,[r4,#8] + 0x08000e46: 6804 .h LDR r4,[r0,#0] + 0x08000e48: 60e2 .` STR r2,[r4,#0xc] + 0x08000e4a: bd30 0. POP {r4,r5,pc} + i.DebugMon_Handler + DebugMon_Handler + 0x08000e4c: 4770 pG BX lr + i.EnterCriticalSection + EnterCriticalSection + 0x08000e4e: b510 .. PUSH {r4,lr} + 0x08000e50: f007f94e ..N. BL vPortEnterCritical ; 0x80080f0 + 0x08000e54: bd10 .. POP {r4,pc} + i.Error_Handler + Error_Handler + 0x08000e56: b672 r. CPSID i + 0x08000e58: bf00 .. NOP + 0x08000e5a: e7fe .. B 0x8000e5a ; Error_Handler + 4 + i.ExitCriticalSection + ExitCriticalSection + 0x08000e5c: b510 .. PUSH {r4,lr} + 0x08000e5e: f007f971 ..q. BL vPortExitCritical ; 0x8008144 + 0x08000e62: bd10 .. POP {r4,pc} + i.GetADS1115Device + GetADS1115Device + 0x08000e64: b570 p. PUSH {r4-r6,lr} + 0x08000e66: 4605 .F MOV r5,r0 + 0x08000e68: 2400 .$ MOVS r4,#0 + 0x08000e6a: bf00 .. NOP + 0x08000e6c: e00c .. B 0x8000e88 ; GetADS1115Device + 36 + 0x08000e6e: 4808 .H LDR r0,[pc,#32] ; [0x8000e90] = 0x20000314 + 0x08000e70: f8500024 P.$. LDR r0,[r0,r4,LSL #2] + 0x08000e74: 6801 .h LDR r1,[r0,#0] + 0x08000e76: 4628 (F MOV r0,r5 + 0x08000e78: f7fffa37 ..7. BL strcmp ; 0x80002ea + 0x08000e7c: b918 .. CBNZ r0,0x8000e86 ; GetADS1115Device + 34 + 0x08000e7e: 4804 .H LDR r0,[pc,#16] ; [0x8000e90] = 0x20000314 + 0x08000e80: f8500024 P.$. LDR r0,[r0,r4,LSL #2] + 0x08000e84: bd70 p. POP {r4-r6,pc} + 0x08000e86: 1c64 d. ADDS r4,r4,#1 + 0x08000e88: 2c05 ., CMP r4,#5 + 0x08000e8a: d3f0 .. BCC 0x8000e6e ; GetADS1115Device + 10 + 0x08000e8c: 2000 . MOVS r0,#0 + 0x08000e8e: e7f9 .. B 0x8000e84 ; GetADS1115Device + 32 + $d + 0x08000e90: 20000314 ... DCD 536871700 + $t + i.Get_from_fifo + Get_from_fifo + 0x08000e94: b570 p. PUSH {r4-r6,lr} + 0x08000e96: 4603 .F MOV r3,r0 + 0x08000e98: 4615 .F MOV r5,r2 + 0x08000e9a: e026 &. B 0x8000eea ; Get_from_fifo + 86 + 0x08000e9c: bf00 .. NOP + 0x08000e9e: 2450 P$ MOVS r4,#0x50 + 0x08000ea0: f3848811 .... MSR BASEPRI,r4 + 0x08000ea4: f3bf8f4f ..O. DSB + 0x08000ea8: f3bf8f6f ..o. ISB + 0x08000eac: bf00 .. NOP + 0x08000eae: 88dc .. LDRH r4,[r3,#6] + 0x08000eb0: 889e .. LDRH r6,[r3,#4] + 0x08000eb2: 42b4 .B CMP r4,r6 + 0x08000eb4: d00c .. BEQ 0x8000ed0 ; Get_from_fifo + 60 + 0x08000eb6: 88de .. LDRH r6,[r3,#6] + 0x08000eb8: 681c .h LDR r4,[r3,#0] + 0x08000eba: 5da0 .] LDRB r0,[r4,r6] + 0x08000ebc: 88dc .. LDRH r4,[r3,#6] + 0x08000ebe: 1c64 d. ADDS r4,r4,#1 + 0x08000ec0: 80dc .. STRH r4,[r3,#6] + 0x08000ec2: 88dc .. LDRH r4,[r3,#6] + 0x08000ec4: f5b47f84 .... CMP r4,#0x108 + 0x08000ec8: dd07 .. BLE 0x8000eda ; Get_from_fifo + 70 + 0x08000eca: 2400 .$ MOVS r4,#0 + 0x08000ecc: 80dc .. STRH r4,[r3,#6] + 0x08000ece: e004 .. B 0x8000eda ; Get_from_fifo + 70 + 0x08000ed0: 2400 .$ MOVS r4,#0 + 0x08000ed2: f3848811 .... MSR BASEPRI,r4 + 0x08000ed6: bf00 .. NOP + 0x08000ed8: e009 .. B 0x8000eee ; Get_from_fifo + 90 + 0x08000eda: 7008 .p STRB r0,[r1,#0] + 0x08000edc: 1c49 I. ADDS r1,r1,#1 + 0x08000ede: 1e52 R. SUBS r2,r2,#1 + 0x08000ee0: 2400 .$ MOVS r4,#0 + 0x08000ee2: f3848811 .... MSR BASEPRI,r4 + 0x08000ee6: bf00 .. NOP + 0x08000ee8: bf00 .. NOP + 0x08000eea: 2a00 .* CMP r2,#0 + 0x08000eec: d1d6 .. BNE 0x8000e9c ; Get_from_fifo + 8 + 0x08000eee: bf00 .. NOP + 0x08000ef0: 1aa8 .. SUBS r0,r5,r2 + 0x08000ef2: bd70 p. POP {r4-r6,pc} + i.HAL_ADCEx_Calibration_Start + HAL_ADCEx_Calibration_Start + 0x08000ef4: b5f8 .. PUSH {r3-r7,lr} + 0x08000ef6: 4604 .F MOV r4,r0 + 0x08000ef8: 2600 .& MOVS r6,#0 + 0x08000efa: 2000 . MOVS r0,#0 + 0x08000efc: 9000 .. STR r0,[sp,#0] + 0x08000efe: bf00 .. NOP + 0x08000f00: f8940024 ..$. LDRB r0,[r4,#0x24] + 0x08000f04: 2801 .( CMP r0,#1 + 0x08000f06: d101 .. BNE 0x8000f0c ; HAL_ADCEx_Calibration_Start + 24 + 0x08000f08: 2002 . MOVS r0,#2 + 0x08000f0a: bdf8 .. POP {r3-r7,pc} + 0x08000f0c: 2001 . MOVS r0,#1 + 0x08000f0e: f8840024 ..$. STRB r0,[r4,#0x24] + 0x08000f12: bf00 .. NOP + 0x08000f14: 4620 F MOV r0,r4 + 0x08000f16: f7fffce8 .... BL ADC_ConversionStop_Disable ; 0x80008ea + 0x08000f1a: 4606 .F MOV r6,r0 + 0x08000f1c: 2e00 .. CMP r6,#0 + 0x08000f1e: d16c l. BNE 0x8000ffa ; HAL_ADCEx_Calibration_Start + 262 + 0x08000f20: 6aa0 .j LDR r0,[r4,#0x28] + 0x08000f22: f4205088 ..P BIC r0,r0,#0x1100 + 0x08000f26: f0400002 @... ORR r0,r0,#2 + 0x08000f2a: 62a0 .b STR r0,[r4,#0x28] + 0x08000f2c: 2002 . MOVS r0,#2 + 0x08000f2e: f001fa4b ..K. BL HAL_RCCEx_GetPeriphCLKFreq ; 0x80023c8 + 0x08000f32: 4935 5I LDR r1,[pc,#212] ; [0x8001008] = 0x20000254 + 0x08000f34: 6809 .h LDR r1,[r1,#0] + 0x08000f36: fbb1f0f0 .... UDIV r0,r1,r0 + 0x08000f3a: 0040 @. LSLS r0,r0,#1 + 0x08000f3c: 9000 .. STR r0,[sp,#0] + 0x08000f3e: e002 .. B 0x8000f46 ; HAL_ADCEx_Calibration_Start + 82 + 0x08000f40: 9800 .. LDR r0,[sp,#0] + 0x08000f42: 1e40 @. SUBS r0,r0,#1 + 0x08000f44: 9000 .. STR r0,[sp,#0] + 0x08000f46: 9800 .. LDR r0,[sp,#0] + 0x08000f48: 2800 .( CMP r0,#0 + 0x08000f4a: d1f9 .. BNE 0x8000f40 ; HAL_ADCEx_Calibration_Start + 76 + 0x08000f4c: 4620 F MOV r0,r4 + 0x08000f4e: f7fffcfb .... BL ADC_Enable ; 0x8000948 + 0x08000f52: 6820 h LDR r0,[r4,#0] + 0x08000f54: 6880 .h LDR r0,[r0,#8] + 0x08000f56: f0400008 @... ORR r0,r0,#8 + 0x08000f5a: 6821 !h LDR r1,[r4,#0] + 0x08000f5c: 6088 .` STR r0,[r1,#8] + 0x08000f5e: f001f8ff .... BL HAL_GetTick ; 0x8002160 + 0x08000f62: 4605 .F MOV r5,r0 + 0x08000f64: e016 .. B 0x8000f94 ; HAL_ADCEx_Calibration_Start + 160 + 0x08000f66: f001f8fb .... BL HAL_GetTick ; 0x8002160 + 0x08000f6a: 1b40 @. SUBS r0,r0,r5 + 0x08000f6c: 280a .( CMP r0,#0xa + 0x08000f6e: d911 .. BLS 0x8000f94 ; HAL_ADCEx_Calibration_Start + 160 + 0x08000f70: 6820 h LDR r0,[r4,#0] + 0x08000f72: 6880 .h LDR r0,[r0,#8] + 0x08000f74: f0000008 .... AND r0,r0,#8 + 0x08000f78: b160 `. CBZ r0,0x8000f94 ; HAL_ADCEx_Calibration_Start + 160 + 0x08000f7a: 6aa0 .j LDR r0,[r4,#0x28] + 0x08000f7c: f0200002 ... BIC r0,r0,#2 + 0x08000f80: f0400010 @... ORR r0,r0,#0x10 + 0x08000f84: 62a0 .b STR r0,[r4,#0x28] + 0x08000f86: bf00 .. NOP + 0x08000f88: 2000 . MOVS r0,#0 + 0x08000f8a: f8840024 ..$. STRB r0,[r4,#0x24] + 0x08000f8e: bf00 .. NOP + 0x08000f90: 2001 . MOVS r0,#1 + 0x08000f92: e7ba .. B 0x8000f0a ; HAL_ADCEx_Calibration_Start + 22 + 0x08000f94: 6820 h LDR r0,[r4,#0] + 0x08000f96: 6880 .h LDR r0,[r0,#8] + 0x08000f98: f0000008 .... AND r0,r0,#8 + 0x08000f9c: 2800 .( CMP r0,#0 + 0x08000f9e: d1e2 .. BNE 0x8000f66 ; HAL_ADCEx_Calibration_Start + 114 + 0x08000fa0: 6820 h LDR r0,[r4,#0] + 0x08000fa2: 6880 .h LDR r0,[r0,#8] + 0x08000fa4: f0400004 @... ORR r0,r0,#4 + 0x08000fa8: 6821 !h LDR r1,[r4,#0] + 0x08000faa: 6088 .` STR r0,[r1,#8] + 0x08000fac: f001f8d8 .... BL HAL_GetTick ; 0x8002160 + 0x08000fb0: 4605 .F MOV r5,r0 + 0x08000fb2: e016 .. B 0x8000fe2 ; HAL_ADCEx_Calibration_Start + 238 + 0x08000fb4: f001f8d4 .... BL HAL_GetTick ; 0x8002160 + 0x08000fb8: 1b40 @. SUBS r0,r0,r5 + 0x08000fba: 280a .( CMP r0,#0xa + 0x08000fbc: d911 .. BLS 0x8000fe2 ; HAL_ADCEx_Calibration_Start + 238 + 0x08000fbe: 6820 h LDR r0,[r4,#0] + 0x08000fc0: 6880 .h LDR r0,[r0,#8] + 0x08000fc2: f0000004 .... AND r0,r0,#4 + 0x08000fc6: b160 `. CBZ r0,0x8000fe2 ; HAL_ADCEx_Calibration_Start + 238 + 0x08000fc8: 6aa0 .j LDR r0,[r4,#0x28] + 0x08000fca: f0200002 ... BIC r0,r0,#2 + 0x08000fce: f0400010 @... ORR r0,r0,#0x10 + 0x08000fd2: 62a0 .b STR r0,[r4,#0x28] + 0x08000fd4: bf00 .. NOP + 0x08000fd6: 2000 . MOVS r0,#0 + 0x08000fd8: f8840024 ..$. STRB r0,[r4,#0x24] + 0x08000fdc: bf00 .. NOP + 0x08000fde: 2001 . MOVS r0,#1 + 0x08000fe0: e793 .. B 0x8000f0a ; HAL_ADCEx_Calibration_Start + 22 + 0x08000fe2: 6820 h LDR r0,[r4,#0] + 0x08000fe4: 6880 .h LDR r0,[r0,#8] + 0x08000fe6: f0000004 .... AND r0,r0,#4 + 0x08000fea: 2800 .( CMP r0,#0 + 0x08000fec: d1e2 .. BNE 0x8000fb4 ; HAL_ADCEx_Calibration_Start + 192 + 0x08000fee: 6aa0 .j LDR r0,[r4,#0x28] + 0x08000ff0: f0200002 ... BIC r0,r0,#2 + 0x08000ff4: f0400001 @... ORR r0,r0,#1 + 0x08000ff8: 62a0 .b STR r0,[r4,#0x28] + 0x08000ffa: bf00 .. NOP + 0x08000ffc: 2000 . MOVS r0,#0 + 0x08000ffe: f8840024 ..$. STRB r0,[r4,#0x24] + 0x08001002: bf00 .. NOP + 0x08001004: 4630 0F MOV r0,r6 + 0x08001006: e780 .. B 0x8000f0a ; HAL_ADCEx_Calibration_Start + 22 + $d + 0x08001008: 20000254 T.. DCD 536871508 + $t + i.HAL_ADC_ConfigChannel + HAL_ADC_ConfigChannel + 0x0800100c: b538 8. PUSH {r3-r5,lr} + 0x0800100e: 4602 .F MOV r2,r0 + 0x08001010: 2300 .# MOVS r3,#0 + 0x08001012: 2000 . MOVS r0,#0 + 0x08001014: 9000 .. STR r0,[sp,#0] + 0x08001016: bf00 .. NOP + 0x08001018: f8920024 ..$. LDRB r0,[r2,#0x24] + 0x0800101c: 2801 .( CMP r0,#1 + 0x0800101e: d101 .. BNE 0x8001024 ; HAL_ADC_ConfigChannel + 24 + 0x08001020: 2002 . MOVS r0,#2 + 0x08001022: bd38 8. POP {r3-r5,pc} + 0x08001024: 2001 . MOVS r0,#1 + 0x08001026: f8820024 ..$. STRB r0,[r2,#0x24] + 0x0800102a: bf00 .. NOP + 0x0800102c: 6848 Hh LDR r0,[r1,#4] + 0x0800102e: 2807 .( CMP r0,#7 + 0x08001030: d212 .. BCS 0x8001058 ; HAL_ADC_ConfigChannel + 76 + 0x08001032: 6810 .h LDR r0,[r2,#0] + 0x08001034: 6b40 @k LDR r0,[r0,#0x34] + 0x08001036: 790c .y LDRB r4,[r1,#4] + 0x08001038: 1e64 d. SUBS r4,r4,#1 + 0x0800103a: eb040584 .... ADD r5,r4,r4,LSL #2 + 0x0800103e: 241f .$ MOVS r4,#0x1f + 0x08001040: 40ac .@ LSLS r4,r4,r5 + 0x08001042: 43a0 .C BICS r0,r0,r4 + 0x08001044: 790d .y LDRB r5,[r1,#4] + 0x08001046: 1e6d m. SUBS r5,r5,#1 + 0x08001048: eb050585 .... ADD r5,r5,r5,LSL #2 + 0x0800104c: 680c .h LDR r4,[r1,#0] + 0x0800104e: 40ac .@ LSLS r4,r4,r5 + 0x08001050: 4320 C ORRS r0,r0,r4 + 0x08001052: 6814 .h LDR r4,[r2,#0] + 0x08001054: 6360 `c STR r0,[r4,#0x34] + 0x08001056: e027 '. B 0x80010a8 ; HAL_ADC_ConfigChannel + 156 + 0x08001058: 6848 Hh LDR r0,[r1,#4] + 0x0800105a: 280d .( CMP r0,#0xd + 0x0800105c: d212 .. BCS 0x8001084 ; HAL_ADC_ConfigChannel + 120 + 0x0800105e: 6810 .h LDR r0,[r2,#0] + 0x08001060: 6b00 .k LDR r0,[r0,#0x30] + 0x08001062: 790c .y LDRB r4,[r1,#4] + 0x08001064: 1fe4 .. SUBS r4,r4,#7 + 0x08001066: eb040584 .... ADD r5,r4,r4,LSL #2 + 0x0800106a: 241f .$ MOVS r4,#0x1f + 0x0800106c: 40ac .@ LSLS r4,r4,r5 + 0x0800106e: 43a0 .C BICS r0,r0,r4 + 0x08001070: 790d .y LDRB r5,[r1,#4] + 0x08001072: 1fed .. SUBS r5,r5,#7 + 0x08001074: eb050585 .... ADD r5,r5,r5,LSL #2 + 0x08001078: 680c .h LDR r4,[r1,#0] + 0x0800107a: 40ac .@ LSLS r4,r4,r5 + 0x0800107c: 4320 C ORRS r0,r0,r4 + 0x0800107e: 6814 .h LDR r4,[r2,#0] + 0x08001080: 6320 c STR r0,[r4,#0x30] + 0x08001082: e011 .. B 0x80010a8 ; HAL_ADC_ConfigChannel + 156 + 0x08001084: 6810 .h LDR r0,[r2,#0] + 0x08001086: 6ac0 .j LDR r0,[r0,#0x2c] + 0x08001088: 790c .y LDRB r4,[r1,#4] + 0x0800108a: 3c0d .< SUBS r4,r4,#0xd + 0x0800108c: eb040584 .... ADD r5,r4,r4,LSL #2 + 0x08001090: 241f .$ MOVS r4,#0x1f + 0x08001092: 40ac .@ LSLS r4,r4,r5 + 0x08001094: 43a0 .C BICS r0,r0,r4 + 0x08001096: 790d .y LDRB r5,[r1,#4] + 0x08001098: 3d0d .= SUBS r5,r5,#0xd + 0x0800109a: eb050585 .... ADD r5,r5,r5,LSL #2 + 0x0800109e: 680c .h LDR r4,[r1,#0] + 0x080010a0: 40ac .@ LSLS r4,r4,r5 + 0x080010a2: 4320 C ORRS r0,r0,r4 + 0x080010a4: 6814 .h LDR r4,[r2,#0] + 0x080010a6: 62e0 .b STR r0,[r4,#0x2c] + 0x080010a8: 6808 .h LDR r0,[r1,#0] + 0x080010aa: 280a .( CMP r0,#0xa + 0x080010ac: d312 .. BCC 0x80010d4 ; HAL_ADC_ConfigChannel + 200 + 0x080010ae: 6810 .h LDR r0,[r2,#0] + 0x080010b0: 68c0 .h LDR r0,[r0,#0xc] + 0x080010b2: 780c .x LDRB r4,[r1,#0] + 0x080010b4: 3c0a .< SUBS r4,r4,#0xa + 0x080010b6: eb040544 ..D. ADD r5,r4,r4,LSL #1 + 0x080010ba: 2407 .$ MOVS r4,#7 + 0x080010bc: 40ac .@ LSLS r4,r4,r5 + 0x080010be: 43a0 .C BICS r0,r0,r4 + 0x080010c0: 780d .x LDRB r5,[r1,#0] + 0x080010c2: 3d0a .= SUBS r5,r5,#0xa + 0x080010c4: eb050545 ..E. ADD r5,r5,r5,LSL #1 + 0x080010c8: 688c .h LDR r4,[r1,#8] + 0x080010ca: 40ac .@ LSLS r4,r4,r5 + 0x080010cc: 4320 C ORRS r0,r0,r4 + 0x080010ce: 6814 .h LDR r4,[r2,#0] + 0x080010d0: 60e0 .` STR r0,[r4,#0xc] + 0x080010d2: e00f .. B 0x80010f4 ; HAL_ADC_ConfigChannel + 232 + 0x080010d4: 6810 .h LDR r0,[r2,#0] + 0x080010d6: 6900 .i LDR r0,[r0,#0x10] + 0x080010d8: 780c .x LDRB r4,[r1,#0] + 0x080010da: eb040544 ..D. ADD r5,r4,r4,LSL #1 + 0x080010de: 2407 .$ MOVS r4,#7 + 0x080010e0: 40ac .@ LSLS r4,r4,r5 + 0x080010e2: 43a0 .C BICS r0,r0,r4 + 0x080010e4: 780d .x LDRB r5,[r1,#0] + 0x080010e6: eb050545 ..E. ADD r5,r5,r5,LSL #1 + 0x080010ea: 688c .h LDR r4,[r1,#8] + 0x080010ec: 40ac .@ LSLS r4,r4,r5 + 0x080010ee: 4320 C ORRS r0,r0,r4 + 0x080010f0: 6814 .h LDR r4,[r2,#0] + 0x080010f2: 6120 a STR r0,[r4,#0x10] + 0x080010f4: 6808 .h LDR r0,[r1,#0] + 0x080010f6: 2810 .( CMP r0,#0x10 + 0x080010f8: d002 .. BEQ 0x8001100 ; HAL_ADC_ConfigChannel + 244 + 0x080010fa: 6808 .h LDR r0,[r1,#0] + 0x080010fc: 2811 .( CMP r0,#0x11 + 0x080010fe: d127 '. BNE 0x8001150 ; HAL_ADC_ConfigChannel + 324 + 0x08001100: 4c17 .L LDR r4,[pc,#92] ; [0x8001160] = 0x40012400 + 0x08001102: 6810 .h LDR r0,[r2,#0] + 0x08001104: 42a0 .B CMP r0,r4 + 0x08001106: d11e .. BNE 0x8001146 ; HAL_ADC_ConfigChannel + 314 + 0x08001108: 6810 .h LDR r0,[r2,#0] + 0x0800110a: 6880 .h LDR r0,[r0,#8] + 0x0800110c: f4000000 .... AND r0,r0,#0x800000 + 0x08001110: b9f0 .. CBNZ r0,0x8001150 ; HAL_ADC_ConfigChannel + 324 + 0x08001112: 6810 .h LDR r0,[r2,#0] + 0x08001114: 6880 .h LDR r0,[r0,#8] + 0x08001116: f4400000 @... ORR r0,r0,#0x800000 + 0x0800111a: 6814 .h LDR r4,[r2,#0] + 0x0800111c: 60a0 .` STR r0,[r4,#8] + 0x0800111e: 6808 .h LDR r0,[r1,#0] + 0x08001120: 2810 .( CMP r0,#0x10 + 0x08001122: d115 .. BNE 0x8001150 ; HAL_ADC_ConfigChannel + 324 + 0x08001124: 480f .H LDR r0,[pc,#60] ; [0x8001164] = 0x20000254 + 0x08001126: 6800 .h LDR r0,[r0,#0] + 0x08001128: 4c0f .L LDR r4,[pc,#60] ; [0x8001168] = 0xf4240 + 0x0800112a: fbb0f0f4 .... UDIV r0,r0,r4 + 0x0800112e: eb000080 .... ADD r0,r0,r0,LSL #2 + 0x08001132: 0040 @. LSLS r0,r0,#1 + 0x08001134: 9000 .. STR r0,[sp,#0] + 0x08001136: e002 .. B 0x800113e ; HAL_ADC_ConfigChannel + 306 + 0x08001138: 9800 .. LDR r0,[sp,#0] + 0x0800113a: 1e40 @. SUBS r0,r0,#1 + 0x0800113c: 9000 .. STR r0,[sp,#0] + 0x0800113e: 9800 .. LDR r0,[sp,#0] + 0x08001140: 2800 .( CMP r0,#0 + 0x08001142: d1f9 .. BNE 0x8001138 ; HAL_ADC_ConfigChannel + 300 + 0x08001144: e004 .. B 0x8001150 ; HAL_ADC_ConfigChannel + 324 + 0x08001146: 6a90 .j LDR r0,[r2,#0x28] + 0x08001148: f0400020 @. . ORR r0,r0,#0x20 + 0x0800114c: 6290 .b STR r0,[r2,#0x28] + 0x0800114e: 2301 .# MOVS r3,#1 + 0x08001150: bf00 .. NOP + 0x08001152: 2000 . MOVS r0,#0 + 0x08001154: f8820024 ..$. STRB r0,[r2,#0x24] + 0x08001158: bf00 .. NOP + 0x0800115a: 4618 .F MOV r0,r3 + 0x0800115c: e761 a. B 0x8001022 ; HAL_ADC_ConfigChannel + 22 + $d + 0x0800115e: 0000 .. DCW 0 + 0x08001160: 40012400 .$.@ DCD 1073816576 + 0x08001164: 20000254 T.. DCD 536871508 + 0x08001168: 000f4240 @B.. DCD 1000000 + $t + i.HAL_ADC_Init + HAL_ADC_Init + 0x0800116c: e92d41f0 -..A PUSH {r4-r8,lr} + 0x08001170: 4604 .F MOV r4,r0 + 0x08001172: 2700 .' MOVS r7,#0 + 0x08001174: 2500 .% MOVS r5,#0 + 0x08001176: 2600 .& MOVS r6,#0 + 0x08001178: 46a8 .F MOV r8,r5 + 0x0800117a: b914 .. CBNZ r4,0x8001182 ; HAL_ADC_Init + 22 + 0x0800117c: 2001 . MOVS r0,#1 + 0x0800117e: e8bd81f0 .... POP {r4-r8,pc} + 0x08001182: 68a0 .h LDR r0,[r4,#8] + 0x08001184: b110 .. CBZ r0,0x800118c ; HAL_ADC_Init + 32 + 0x08001186: 7d20 } LDRB r0,[r4,#0x14] + 0x08001188: b100 .. CBZ r0,0x800118c ; HAL_ADC_Init + 32 + 0x0800118a: bf00 .. NOP + 0x0800118c: 6aa0 .j LDR r0,[r4,#0x28] + 0x0800118e: b930 0. CBNZ r0,0x800119e ; HAL_ADC_Init + 50 + 0x08001190: 2000 . MOVS r0,#0 + 0x08001192: 62e0 .b STR r0,[r4,#0x2c] + 0x08001194: f8840024 ..$. STRB r0,[r4,#0x24] + 0x08001198: 4620 F MOV r0,r4 + 0x0800119a: f000f889 .... BL HAL_ADC_MspInit ; 0x80012b0 + 0x0800119e: 4620 F MOV r0,r4 + 0x080011a0: f7fffba3 .... BL ADC_ConversionStop_Disable ; 0x80008ea + 0x080011a4: 4607 .F MOV r7,r0 + 0x080011a6: 6aa0 .j LDR r0,[r4,#0x28] + 0x080011a8: f0000010 .... AND r0,r0,#0x10 + 0x080011ac: 2800 .( CMP r0,#0 + 0x080011ae: d173 s. BNE 0x8001298 ; HAL_ADC_Init + 300 + 0x080011b0: 2f00 ./ CMP r7,#0 + 0x080011b2: d171 q. BNE 0x8001298 ; HAL_ADC_Init + 300 + 0x080011b4: 6aa0 .j LDR r0,[r4,#0x28] + 0x080011b6: f4205088 ..P BIC r0,r0,#0x1100 + 0x080011ba: f0400002 @... ORR r0,r0,#2 + 0x080011be: 62a0 .b STR r0,[r4,#0x28] + 0x080011c0: 69e1 .i LDR r1,[r4,#0x1c] + 0x080011c2: 6860 `h LDR r0,[r4,#4] + 0x080011c4: 4308 .C ORRS r0,r0,r1 + 0x080011c6: 7b21 !{ LDRB r1,[r4,#0xc] + 0x080011c8: ea400041 @.A. ORR r0,r0,r1,LSL #1 + 0x080011cc: 4306 .C ORRS r6,r6,r0 + 0x080011ce: 68a0 .h LDR r0,[r4,#8] + 0x080011d0: f5b07f80 .... CMP r0,#0x100 + 0x080011d4: d002 .. BEQ 0x80011dc ; HAL_ADC_Init + 112 + 0x080011d6: 68a0 .h LDR r0,[r4,#8] + 0x080011d8: 2801 .( CMP r0,#1 + 0x080011da: d102 .. BNE 0x80011e2 ; HAL_ADC_Init + 118 + 0x080011dc: f44f7080 O..p MOV r0,#0x100 + 0x080011e0: e000 .. B 0x80011e4 ; HAL_ADC_Init + 120 + 0x080011e2: 2000 . MOVS r0,#0 + 0x080011e4: 4305 .C ORRS r5,r5,r0 + 0x080011e6: 7d20 } LDRB r0,[r4,#0x14] + 0x080011e8: 2801 .( CMP r0,#1 + 0x080011ea: d111 .. BNE 0x8001210 ; HAL_ADC_Init + 164 + 0x080011ec: 7b20 { LDRB r0,[r4,#0xc] + 0x080011ee: b938 8. CBNZ r0,0x8001200 ; HAL_ADC_Init + 148 + 0x080011f0: 69a0 .i LDR r0,[r4,#0x18] + 0x080011f2: 1e40 @. SUBS r0,r0,#1 + 0x080011f4: f44f6100 O..a MOV r1,#0x800 + 0x080011f8: ea413040 A.@0 ORR r0,r1,r0,LSL #13 + 0x080011fc: 4305 .C ORRS r5,r5,r0 + 0x080011fe: e007 .. B 0x8001210 ; HAL_ADC_Init + 164 + 0x08001200: 6aa0 .j LDR r0,[r4,#0x28] + 0x08001202: f0400020 @. . ORR r0,r0,#0x20 + 0x08001206: 62a0 .b STR r0,[r4,#0x28] + 0x08001208: 6ae0 .j LDR r0,[r4,#0x2c] + 0x0800120a: f0400001 @... ORR r0,r0,#1 + 0x0800120e: 62e0 .b STR r0,[r4,#0x2c] + 0x08001210: 6820 h LDR r0,[r4,#0] + 0x08001212: 6840 @h LDR r0,[r0,#4] + 0x08001214: f4204069 .i@ BIC r0,r0,#0xe900 + 0x08001218: 4328 (C ORRS r0,r0,r5 + 0x0800121a: 6821 !h LDR r1,[r4,#0] + 0x0800121c: 6048 H` STR r0,[r1,#4] + 0x0800121e: 6820 h LDR r0,[r4,#0] + 0x08001220: 6880 .h LDR r0,[r0,#8] + 0x08001222: 4921 !I LDR r1,[pc,#132] ; [0x80012a8] = 0xffe1f7fd + 0x08001224: 4008 .@ ANDS r0,r0,r1 + 0x08001226: 4330 0C ORRS r0,r0,r6 + 0x08001228: 6821 !h LDR r1,[r4,#0] + 0x0800122a: 6088 .` STR r0,[r1,#8] + 0x0800122c: 68a0 .h LDR r0,[r4,#8] + 0x0800122e: f5b07f80 .... CMP r0,#0x100 + 0x08001232: d002 .. BEQ 0x800123a ; HAL_ADC_Init + 206 + 0x08001234: 68a0 .h LDR r0,[r4,#8] + 0x08001236: 2801 .( CMP r0,#1 + 0x08001238: d102 .. BNE 0x8001240 ; HAL_ADC_Init + 212 + 0x0800123a: f44f7080 O..p MOV r0,#0x100 + 0x0800123e: e000 .. B 0x8001242 ; HAL_ADC_Init + 214 + 0x08001240: 2000 . MOVS r0,#0 + 0x08001242: f5b07f80 .... CMP r0,#0x100 + 0x08001246: d103 .. BNE 0x8001250 ; HAL_ADC_Init + 228 + 0x08001248: 8a20 . LDRH r0,[r4,#0x10] + 0x0800124a: 1e40 @. SUBS r0,r0,#1 + 0x0800124c: ea4f5800 O..X LSL r8,r0,#20 + 0x08001250: 6820 h LDR r0,[r4,#0] + 0x08001252: 6ac0 .j LDR r0,[r0,#0x2c] + 0x08001254: f4200070 .p. BIC r0,r0,#0xf00000 + 0x08001258: ea400008 @... ORR r0,r0,r8 + 0x0800125c: 6821 !h LDR r1,[r4,#0] + 0x0800125e: 62c8 .b STR r0,[r1,#0x2c] + 0x08001260: 6820 h LDR r0,[r4,#0] + 0x08001262: 6880 .h LDR r0,[r0,#8] + 0x08001264: 4911 .I LDR r1,[pc,#68] ; [0x80012ac] = 0xff1f0efe + 0x08001266: 4008 .@ ANDS r0,r0,r1 + 0x08001268: 42b0 .B CMP r0,r6 + 0x0800126a: d108 .. BNE 0x800127e ; HAL_ADC_Init + 274 + 0x0800126c: 2000 . MOVS r0,#0 + 0x0800126e: 62e0 .b STR r0,[r4,#0x2c] + 0x08001270: 6aa0 .j LDR r0,[r4,#0x28] + 0x08001272: f0200002 ... BIC r0,r0,#2 + 0x08001276: f0400001 @... ORR r0,r0,#1 + 0x0800127a: 62a0 .b STR r0,[r4,#0x28] + 0x0800127c: e011 .. B 0x80012a2 ; HAL_ADC_Init + 310 + 0x0800127e: 6aa0 .j LDR r0,[r4,#0x28] + 0x08001280: f0200002 ... BIC r0,r0,#2 + 0x08001284: f0400010 @... ORR r0,r0,#0x10 + 0x08001288: 62a0 .b STR r0,[r4,#0x28] + 0x0800128a: 6ae0 .j LDR r0,[r4,#0x2c] + 0x0800128c: f0400001 @... ORR r0,r0,#1 + 0x08001290: 62e0 .b STR r0,[r4,#0x2c] + 0x08001292: 2701 .' MOVS r7,#1 + 0x08001294: e005 .. B 0x80012a2 ; HAL_ADC_Init + 310 + 0x08001296: e7ff .. B 0x8001298 ; HAL_ADC_Init + 300 + 0x08001298: 6aa0 .j LDR r0,[r4,#0x28] + 0x0800129a: f0400010 @... ORR r0,r0,#0x10 + 0x0800129e: 62a0 .b STR r0,[r4,#0x28] + 0x080012a0: 2701 .' MOVS r7,#1 + 0x080012a2: 4638 8F MOV r0,r7 + 0x080012a4: e76b k. B 0x800117e ; HAL_ADC_Init + 18 + $d + 0x080012a6: 0000 .. DCW 0 + 0x080012a8: ffe1f7fd .... DCD 4292999165 + 0x080012ac: ff1f0efe .... DCD 4280225534 + $t + i.HAL_ADC_MspInit + HAL_ADC_MspInit + 0x080012b0: b510 .. PUSH {r4,lr} + 0x080012b2: b086 .. SUB sp,sp,#0x18 + 0x080012b4: 4604 .F MOV r4,r0 + 0x080012b6: 2000 . MOVS r0,#0 + 0x080012b8: 9002 .. STR r0,[sp,#8] + 0x080012ba: 9003 .. STR r0,[sp,#0xc] + 0x080012bc: 9004 .. STR r0,[sp,#0x10] + 0x080012be: 9005 .. STR r0,[sp,#0x14] + 0x080012c0: 4936 6I LDR r1,[pc,#216] ; [0x800139c] = 0x40012400 + 0x080012c2: 6820 h LDR r0,[r4,#0] + 0x080012c4: 4288 .B CMP r0,r1 + 0x080012c6: d167 g. BNE 0x8001398 ; HAL_ADC_MspInit + 232 + 0x080012c8: bf00 .. NOP + 0x080012ca: 4835 5H LDR r0,[pc,#212] ; [0x80013a0] = 0x40021000 + 0x080012cc: 6980 .i LDR r0,[r0,#0x18] + 0x080012ce: f4407000 @..p ORR r0,r0,#0x200 + 0x080012d2: 4933 3I LDR r1,[pc,#204] ; [0x80013a0] = 0x40021000 + 0x080012d4: 6188 .a STR r0,[r1,#0x18] + 0x080012d6: 4608 .F MOV r0,r1 + 0x080012d8: 6980 .i LDR r0,[r0,#0x18] + 0x080012da: f4007000 ...p AND r0,r0,#0x200 + 0x080012de: 9001 .. STR r0,[sp,#4] + 0x080012e0: bf00 .. NOP + 0x080012e2: bf00 .. NOP + 0x080012e4: bf00 .. NOP + 0x080012e6: 4608 .F MOV r0,r1 + 0x080012e8: 6980 .i LDR r0,[r0,#0x18] + 0x080012ea: f0400010 @... ORR r0,r0,#0x10 + 0x080012ee: 6188 .a STR r0,[r1,#0x18] + 0x080012f0: 4608 .F MOV r0,r1 + 0x080012f2: 6980 .i LDR r0,[r0,#0x18] + 0x080012f4: f0000010 .... AND r0,r0,#0x10 + 0x080012f8: 9001 .. STR r0,[sp,#4] + 0x080012fa: bf00 .. NOP + 0x080012fc: bf00 .. NOP + 0x080012fe: bf00 .. NOP + 0x08001300: 4608 .F MOV r0,r1 + 0x08001302: 6980 .i LDR r0,[r0,#0x18] + 0x08001304: f0400004 @... ORR r0,r0,#4 + 0x08001308: 6188 .a STR r0,[r1,#0x18] + 0x0800130a: 4608 .F MOV r0,r1 + 0x0800130c: 6980 .i LDR r0,[r0,#0x18] + 0x0800130e: f0000004 .... AND r0,r0,#4 + 0x08001312: 9001 .. STR r0,[sp,#4] + 0x08001314: bf00 .. NOP + 0x08001316: bf00 .. NOP + 0x08001318: bf00 .. NOP + 0x0800131a: 4608 .F MOV r0,r1 + 0x0800131c: 6980 .i LDR r0,[r0,#0x18] + 0x0800131e: f0400008 @... ORR r0,r0,#8 + 0x08001322: 6188 .a STR r0,[r1,#0x18] + 0x08001324: 4608 .F MOV r0,r1 + 0x08001326: 6980 .i LDR r0,[r0,#0x18] + 0x08001328: f0000008 .... AND r0,r0,#8 + 0x0800132c: 9001 .. STR r0,[sp,#4] + 0x0800132e: bf00 .. NOP + 0x08001330: bf00 .. NOP + 0x08001332: 2038 8 MOVS r0,#0x38 + 0x08001334: 9002 .. STR r0,[sp,#8] + 0x08001336: 2003 . MOVS r0,#3 + 0x08001338: 9003 .. STR r0,[sp,#0xc] + 0x0800133a: a902 .. ADD r1,sp,#8 + 0x0800133c: 4819 .H LDR r0,[pc,#100] ; [0x80013a4] = 0x40011000 + 0x0800133e: f000fd79 ..y. BL HAL_GPIO_Init ; 0x8001e34 + 0x08001342: 2001 . MOVS r0,#1 + 0x08001344: 9002 .. STR r0,[sp,#8] + 0x08001346: 2003 . MOVS r0,#3 + 0x08001348: 9003 .. STR r0,[sp,#0xc] + 0x0800134a: a902 .. ADD r1,sp,#8 + 0x0800134c: 4816 .H LDR r0,[pc,#88] ; [0x80013a8] = 0x40010800 + 0x0800134e: f000fd71 ..q. BL HAL_GPIO_Init ; 0x8001e34 + 0x08001352: 2003 . MOVS r0,#3 + 0x08001354: 9002 .. STR r0,[sp,#8] + 0x08001356: 9003 .. STR r0,[sp,#0xc] + 0x08001358: a902 .. ADD r1,sp,#8 + 0x0800135a: 4814 .H LDR r0,[pc,#80] ; [0x80013ac] = 0x40010c00 + 0x0800135c: f000fd6a ..j. BL HAL_GPIO_Init ; 0x8001e34 + 0x08001360: 4813 .H LDR r0,[pc,#76] ; [0x80013b0] = 0x40020008 + 0x08001362: 4914 .I LDR r1,[pc,#80] ; [0x80013b4] = 0x20000490 + 0x08001364: 6008 .` STR r0,[r1,#0] + 0x08001366: 2000 . MOVS r0,#0 + 0x08001368: 6048 H` STR r0,[r1,#4] + 0x0800136a: 2100 .! MOVS r1,#0 + 0x0800136c: 4811 .H LDR r0,[pc,#68] ; [0x80013b4] = 0x20000490 + 0x0800136e: 6081 .` STR r1,[r0,#8] + 0x08001370: 2180 .! MOVS r1,#0x80 + 0x08001372: 60c1 .` STR r1,[r0,#0xc] + 0x08001374: 0089 .. LSLS r1,r1,#2 + 0x08001376: 6101 .a STR r1,[r0,#0x10] + 0x08001378: 0089 .. LSLS r1,r1,#2 + 0x0800137a: 6141 Aa STR r1,[r0,#0x14] + 0x0800137c: 2120 ! MOVS r1,#0x20 + 0x0800137e: 6181 .a STR r1,[r0,#0x18] + 0x08001380: 01c9 .. LSLS r1,r1,#7 + 0x08001382: 61c1 .a STR r1,[r0,#0x1c] + 0x08001384: f000fc28 ..(. BL HAL_DMA_Init ; 0x8001bd8 + 0x08001388: b108 .. CBZ r0,0x800138e ; HAL_ADC_MspInit + 222 + 0x0800138a: f7fffd64 ..d. BL Error_Handler ; 0x8000e56 + 0x0800138e: bf00 .. NOP + 0x08001390: 4808 .H LDR r0,[pc,#32] ; [0x80013b4] = 0x20000490 + 0x08001392: 6220 b STR r0,[r4,#0x20] + 0x08001394: 6244 Db STR r4,[r0,#0x24] + 0x08001396: bf00 .. NOP + 0x08001398: b006 .. ADD sp,sp,#0x18 + 0x0800139a: bd10 .. POP {r4,pc} + $d + 0x0800139c: 40012400 .$.@ DCD 1073816576 + 0x080013a0: 40021000 ...@ DCD 1073876992 + 0x080013a4: 40011000 ...@ DCD 1073811456 + 0x080013a8: 40010800 ...@ DCD 1073809408 + 0x080013ac: 40010c00 ...@ DCD 1073810432 + 0x080013b0: 40020008 ...@ DCD 1073872904 + 0x080013b4: 20000490 ... DCD 536872080 + $t + i.HAL_CAN_Init + HAL_CAN_Init + 0x080013b8: b570 p. PUSH {r4-r6,lr} + 0x080013ba: 4604 .F MOV r4,r0 + 0x080013bc: b90c .. CBNZ r4,0x80013c2 ; HAL_CAN_Init + 10 + 0x080013be: 2001 . MOVS r0,#1 + 0x080013c0: bd70 p. POP {r4-r6,pc} + 0x080013c2: f8940020 .. . LDRB r0,[r4,#0x20] + 0x080013c6: b910 .. CBNZ r0,0x80013ce ; HAL_CAN_Init + 22 + 0x080013c8: 4620 F MOV r0,r4 + 0x080013ca: f000f8af .... BL HAL_CAN_MspInit ; 0x800152c + 0x080013ce: 6820 h LDR r0,[r4,#0] + 0x080013d0: 6800 .h LDR r0,[r0,#0] + 0x080013d2: f0400001 @... ORR r0,r0,#1 + 0x080013d6: 6821 !h LDR r1,[r4,#0] + 0x080013d8: 6008 .` STR r0,[r1,#0] + 0x080013da: f000fec1 .... BL HAL_GetTick ; 0x8002160 + 0x080013de: 4605 .F MOV r5,r0 + 0x080013e0: e00d .. B 0x80013fe ; HAL_CAN_Init + 70 + 0x080013e2: f000febd .... BL HAL_GetTick ; 0x8002160 + 0x080013e6: 1b40 @. SUBS r0,r0,r5 + 0x080013e8: 280a .( CMP r0,#0xa + 0x080013ea: d908 .. BLS 0x80013fe ; HAL_CAN_Init + 70 + 0x080013ec: 6a60 `j LDR r0,[r4,#0x24] + 0x080013ee: f4403000 @..0 ORR r0,r0,#0x20000 + 0x080013f2: 6260 `b STR r0,[r4,#0x24] + 0x080013f4: 2005 . MOVS r0,#5 + 0x080013f6: f8840020 .. . STRB r0,[r4,#0x20] + 0x080013fa: 2001 . MOVS r0,#1 + 0x080013fc: e7e0 .. B 0x80013c0 ; HAL_CAN_Init + 8 + 0x080013fe: 6820 h LDR r0,[r4,#0] + 0x08001400: 6840 @h LDR r0,[r0,#4] + 0x08001402: f0000001 .... AND r0,r0,#1 + 0x08001406: 2800 .( CMP r0,#0 + 0x08001408: d0eb .. BEQ 0x80013e2 ; HAL_CAN_Init + 42 + 0x0800140a: 6820 h LDR r0,[r4,#0] + 0x0800140c: 6800 .h LDR r0,[r0,#0] + 0x0800140e: f0200002 ... BIC r0,r0,#2 + 0x08001412: 6821 !h LDR r1,[r4,#0] + 0x08001414: 6008 .` STR r0,[r1,#0] + 0x08001416: f000fea3 .... BL HAL_GetTick ; 0x8002160 + 0x0800141a: 4605 .F MOV r5,r0 + 0x0800141c: e00d .. B 0x800143a ; HAL_CAN_Init + 130 + 0x0800141e: f000fe9f .... BL HAL_GetTick ; 0x8002160 + 0x08001422: 1b40 @. SUBS r0,r0,r5 + 0x08001424: 280a .( CMP r0,#0xa + 0x08001426: d908 .. BLS 0x800143a ; HAL_CAN_Init + 130 + 0x08001428: 6a60 `j LDR r0,[r4,#0x24] + 0x0800142a: f4403000 @..0 ORR r0,r0,#0x20000 + 0x0800142e: 6260 `b STR r0,[r4,#0x24] + 0x08001430: 2005 . MOVS r0,#5 + 0x08001432: f8840020 .. . STRB r0,[r4,#0x20] + 0x08001436: 2001 . MOVS r0,#1 + 0x08001438: e7c2 .. B 0x80013c0 ; HAL_CAN_Init + 8 + 0x0800143a: 6820 h LDR r0,[r4,#0] + 0x0800143c: 6840 @h LDR r0,[r0,#4] + 0x0800143e: f0000002 .... AND r0,r0,#2 + 0x08001442: 2800 .( CMP r0,#0 + 0x08001444: d1eb .. BNE 0x800141e ; HAL_CAN_Init + 102 + 0x08001446: 7e20 ~ LDRB r0,[r4,#0x18] + 0x08001448: 2801 .( CMP r0,#1 + 0x0800144a: d106 .. BNE 0x800145a ; HAL_CAN_Init + 162 + 0x0800144c: 6820 h LDR r0,[r4,#0] + 0x0800144e: 6800 .h LDR r0,[r0,#0] + 0x08001450: f0400080 @... ORR r0,r0,#0x80 + 0x08001454: 6821 !h LDR r1,[r4,#0] + 0x08001456: 6008 .` STR r0,[r1,#0] + 0x08001458: e005 .. B 0x8001466 ; HAL_CAN_Init + 174 + 0x0800145a: 6820 h LDR r0,[r4,#0] + 0x0800145c: 6800 .h LDR r0,[r0,#0] + 0x0800145e: f0200080 ... BIC r0,r0,#0x80 + 0x08001462: 6821 !h LDR r1,[r4,#0] + 0x08001464: 6008 .` STR r0,[r1,#0] + 0x08001466: 7e60 `~ LDRB r0,[r4,#0x19] + 0x08001468: 2801 .( CMP r0,#1 + 0x0800146a: d106 .. BNE 0x800147a ; HAL_CAN_Init + 194 + 0x0800146c: 6820 h LDR r0,[r4,#0] + 0x0800146e: 6800 .h LDR r0,[r0,#0] + 0x08001470: f0400040 @.@. ORR r0,r0,#0x40 + 0x08001474: 6821 !h LDR r1,[r4,#0] + 0x08001476: 6008 .` STR r0,[r1,#0] + 0x08001478: e005 .. B 0x8001486 ; HAL_CAN_Init + 206 + 0x0800147a: 6820 h LDR r0,[r4,#0] + 0x0800147c: 6800 .h LDR r0,[r0,#0] + 0x0800147e: f0200040 .@. BIC r0,r0,#0x40 + 0x08001482: 6821 !h LDR r1,[r4,#0] + 0x08001484: 6008 .` STR r0,[r1,#0] + 0x08001486: 7ea0 .~ LDRB r0,[r4,#0x1a] + 0x08001488: 2801 .( CMP r0,#1 + 0x0800148a: d106 .. BNE 0x800149a ; HAL_CAN_Init + 226 + 0x0800148c: 6820 h LDR r0,[r4,#0] + 0x0800148e: 6800 .h LDR r0,[r0,#0] + 0x08001490: f0400020 @. . ORR r0,r0,#0x20 + 0x08001494: 6821 !h LDR r1,[r4,#0] + 0x08001496: 6008 .` STR r0,[r1,#0] + 0x08001498: e005 .. B 0x80014a6 ; HAL_CAN_Init + 238 + 0x0800149a: 6820 h LDR r0,[r4,#0] + 0x0800149c: 6800 .h LDR r0,[r0,#0] + 0x0800149e: f0200020 . . BIC r0,r0,#0x20 + 0x080014a2: 6821 !h LDR r1,[r4,#0] + 0x080014a4: 6008 .` STR r0,[r1,#0] + 0x080014a6: 7ee0 .~ LDRB r0,[r4,#0x1b] + 0x080014a8: 2801 .( CMP r0,#1 + 0x080014aa: d106 .. BNE 0x80014ba ; HAL_CAN_Init + 258 + 0x080014ac: 6820 h LDR r0,[r4,#0] + 0x080014ae: 6800 .h LDR r0,[r0,#0] + 0x080014b0: f0200010 ... BIC r0,r0,#0x10 + 0x080014b4: 6821 !h LDR r1,[r4,#0] + 0x080014b6: 6008 .` STR r0,[r1,#0] + 0x080014b8: e005 .. B 0x80014c6 ; HAL_CAN_Init + 270 + 0x080014ba: 6820 h LDR r0,[r4,#0] + 0x080014bc: 6800 .h LDR r0,[r0,#0] + 0x080014be: f0400010 @... ORR r0,r0,#0x10 + 0x080014c2: 6821 !h LDR r1,[r4,#0] + 0x080014c4: 6008 .` STR r0,[r1,#0] + 0x080014c6: 7f20 . LDRB r0,[r4,#0x1c] + 0x080014c8: 2801 .( CMP r0,#1 + 0x080014ca: d106 .. BNE 0x80014da ; HAL_CAN_Init + 290 + 0x080014cc: 6820 h LDR r0,[r4,#0] + 0x080014ce: 6800 .h LDR r0,[r0,#0] + 0x080014d0: f0400008 @... ORR r0,r0,#8 + 0x080014d4: 6821 !h LDR r1,[r4,#0] + 0x080014d6: 6008 .` STR r0,[r1,#0] + 0x080014d8: e005 .. B 0x80014e6 ; HAL_CAN_Init + 302 + 0x080014da: 6820 h LDR r0,[r4,#0] + 0x080014dc: 6800 .h LDR r0,[r0,#0] + 0x080014de: f0200008 ... BIC r0,r0,#8 + 0x080014e2: 6821 !h LDR r1,[r4,#0] + 0x080014e4: 6008 .` STR r0,[r1,#0] + 0x080014e6: 7f60 `. LDRB r0,[r4,#0x1d] + 0x080014e8: 2801 .( CMP r0,#1 + 0x080014ea: d106 .. BNE 0x80014fa ; HAL_CAN_Init + 322 + 0x080014ec: 6820 h LDR r0,[r4,#0] + 0x080014ee: 6800 .h LDR r0,[r0,#0] + 0x080014f0: f0400004 @... ORR r0,r0,#4 + 0x080014f4: 6821 !h LDR r1,[r4,#0] + 0x080014f6: 6008 .` STR r0,[r1,#0] + 0x080014f8: e005 .. B 0x8001506 ; HAL_CAN_Init + 334 + 0x080014fa: 6820 h LDR r0,[r4,#0] + 0x080014fc: 6800 .h LDR r0,[r0,#0] + 0x080014fe: f0200004 ... BIC r0,r0,#4 + 0x08001502: 6821 !h LDR r1,[r4,#0] + 0x08001504: 6008 .` STR r0,[r1,#0] + 0x08001506: e9d40102 .... LDRD r0,r1,[r4,#8] + 0x0800150a: 4308 .C ORRS r0,r0,r1 + 0x0800150c: 6921 !i LDR r1,[r4,#0x10] + 0x0800150e: 4308 .C ORRS r0,r0,r1 + 0x08001510: 6961 ai LDR r1,[r4,#0x14] + 0x08001512: 4308 .C ORRS r0,r0,r1 + 0x08001514: 6861 ah LDR r1,[r4,#4] + 0x08001516: 1e49 I. SUBS r1,r1,#1 + 0x08001518: 4308 .C ORRS r0,r0,r1 + 0x0800151a: 6821 !h LDR r1,[r4,#0] + 0x0800151c: 61c8 .a STR r0,[r1,#0x1c] + 0x0800151e: 2000 . MOVS r0,#0 + 0x08001520: 6260 `b STR r0,[r4,#0x24] + 0x08001522: 2001 . MOVS r0,#1 + 0x08001524: f8840020 .. . STRB r0,[r4,#0x20] + 0x08001528: 2000 . MOVS r0,#0 + 0x0800152a: e749 I. B 0x80013c0 ; HAL_CAN_Init + 8 + i.HAL_CAN_MspInit + HAL_CAN_MspInit + 0x0800152c: b510 .. PUSH {r4,lr} + 0x0800152e: b086 .. SUB sp,sp,#0x18 + 0x08001530: 4604 .F MOV r4,r0 + 0x08001532: 2000 . MOVS r0,#0 + 0x08001534: 9002 .. STR r0,[sp,#8] + 0x08001536: 9003 .. STR r0,[sp,#0xc] + 0x08001538: 9004 .. STR r0,[sp,#0x10] + 0x0800153a: 9005 .. STR r0,[sp,#0x14] + 0x0800153c: 491a .I LDR r1,[pc,#104] ; [0x80015a8] = 0x40006400 + 0x0800153e: 6820 h LDR r0,[r4,#0] + 0x08001540: 4288 .B CMP r0,r1 + 0x08001542: d12e .. BNE 0x80015a2 ; HAL_CAN_MspInit + 118 + 0x08001544: bf00 .. NOP + 0x08001546: 4819 .H LDR r0,[pc,#100] ; [0x80015ac] = 0x40021000 + 0x08001548: 69c0 .i LDR r0,[r0,#0x1c] + 0x0800154a: f0407000 @..p ORR r0,r0,#0x2000000 + 0x0800154e: 4917 .I LDR r1,[pc,#92] ; [0x80015ac] = 0x40021000 + 0x08001550: 61c8 .a STR r0,[r1,#0x1c] + 0x08001552: 4608 .F MOV r0,r1 + 0x08001554: 69c0 .i LDR r0,[r0,#0x1c] + 0x08001556: f0007000 ...p AND r0,r0,#0x2000000 + 0x0800155a: 9001 .. STR r0,[sp,#4] + 0x0800155c: bf00 .. NOP + 0x0800155e: bf00 .. NOP + 0x08001560: bf00 .. NOP + 0x08001562: 4608 .F MOV r0,r1 + 0x08001564: 6980 .i LDR r0,[r0,#0x18] + 0x08001566: f0400004 @... ORR r0,r0,#4 + 0x0800156a: 6188 .a STR r0,[r1,#0x18] + 0x0800156c: 4608 .F MOV r0,r1 + 0x0800156e: 6980 .i LDR r0,[r0,#0x18] + 0x08001570: f0000004 .... AND r0,r0,#4 + 0x08001574: 9001 .. STR r0,[sp,#4] + 0x08001576: bf00 .. NOP + 0x08001578: bf00 .. NOP + 0x0800157a: 14c8 .. ASRS r0,r1,#19 + 0x0800157c: 9002 .. STR r0,[sp,#8] + 0x0800157e: 2000 . MOVS r0,#0 + 0x08001580: 9003 .. STR r0,[sp,#0xc] + 0x08001582: 9004 .. STR r0,[sp,#0x10] + 0x08001584: a902 .. ADD r1,sp,#8 + 0x08001586: 480a .H LDR r0,[pc,#40] ; [0x80015b0] = 0x40010800 + 0x08001588: f000fc54 ..T. BL HAL_GPIO_Init ; 0x8001e34 + 0x0800158c: f44f5080 O..P MOV r0,#0x1000 + 0x08001590: 9002 .. STR r0,[sp,#8] + 0x08001592: 2002 . MOVS r0,#2 + 0x08001594: 9003 .. STR r0,[sp,#0xc] + 0x08001596: 2003 . MOVS r0,#3 + 0x08001598: 9005 .. STR r0,[sp,#0x14] + 0x0800159a: a902 .. ADD r1,sp,#8 + 0x0800159c: 4804 .H LDR r0,[pc,#16] ; [0x80015b0] = 0x40010800 + 0x0800159e: f000fc49 ..I. BL HAL_GPIO_Init ; 0x8001e34 + 0x080015a2: b006 .. ADD sp,sp,#0x18 + 0x080015a4: bd10 .. POP {r4,pc} + $d + 0x080015a6: 0000 .. DCW 0 + 0x080015a8: 40006400 .d.@ DCD 1073767424 + 0x080015ac: 40021000 ...@ DCD 1073876992 + 0x080015b0: 40010800 ...@ DCD 1073809408 + $t + i.HAL_DMA_Abort + HAL_DMA_Abort + 0x080015b4: 4601 .F MOV r1,r0 + 0x080015b6: 2200 ." MOVS r2,#0 + 0x080015b8: f8910021 ..!. LDRB r0,[r1,#0x21] + 0x080015bc: 2802 .( CMP r0,#2 + 0x080015be: d008 .. BEQ 0x80015d2 ; HAL_DMA_Abort + 30 + 0x080015c0: 2004 . MOVS r0,#4 + 0x080015c2: 6388 .c STR r0,[r1,#0x38] + 0x080015c4: bf00 .. NOP + 0x080015c6: 2000 . MOVS r0,#0 + 0x080015c8: f8810020 .. . STRB r0,[r1,#0x20] + 0x080015cc: bf00 .. NOP + 0x080015ce: 2001 . MOVS r0,#1 + 0x080015d0: 4770 pG BX lr + 0x080015d2: 6808 .h LDR r0,[r1,#0] + 0x080015d4: 6800 .h LDR r0,[r0,#0] + 0x080015d6: f020000e ... BIC r0,r0,#0xe + 0x080015da: 680b .h LDR r3,[r1,#0] + 0x080015dc: 6018 .` STR r0,[r3,#0] + 0x080015de: 6808 .h LDR r0,[r1,#0] + 0x080015e0: 6800 .h LDR r0,[r0,#0] + 0x080015e2: f0200001 ... BIC r0,r0,#1 + 0x080015e6: 680b .h LDR r3,[r1,#0] + 0x080015e8: 6018 .` STR r0,[r3,#0] + 0x080015ea: f8913040 ..@0 LDRB r3,[r1,#0x40] + 0x080015ee: 2001 . MOVS r0,#1 + 0x080015f0: 4098 .@ LSLS r0,r0,r3 + 0x080015f2: 6bcb .k LDR r3,[r1,#0x3c] + 0x080015f4: 6058 X` STR r0,[r3,#4] + 0x080015f6: 2001 . MOVS r0,#1 + 0x080015f8: f8810021 ..!. STRB r0,[r1,#0x21] + 0x080015fc: bf00 .. NOP + 0x080015fe: 2000 . MOVS r0,#0 + 0x08001600: f8810020 .. . STRB r0,[r1,#0x20] + 0x08001604: bf00 .. NOP + 0x08001606: 4610 .F MOV r0,r2 + 0x08001608: e7e2 .. B 0x80015d0 ; HAL_DMA_Abort + 28 + 0x0800160a: 0000 .. MOVS r0,r0 + i.HAL_DMA_Abort_IT + HAL_DMA_Abort_IT + 0x0800160c: b570 p. PUSH {r4-r6,lr} + 0x0800160e: 4604 .F MOV r4,r0 + 0x08001610: 2500 .% MOVS r5,#0 + 0x08001612: f8940021 ..!. LDRB r0,[r4,#0x21] + 0x08001616: 2802 .( CMP r0,#2 + 0x08001618: d003 .. BEQ 0x8001622 ; HAL_DMA_Abort_IT + 22 + 0x0800161a: 2004 . MOVS r0,#4 + 0x0800161c: 63a0 .c STR r0,[r4,#0x38] + 0x0800161e: 2501 .% MOVS r5,#1 + 0x08001620: e0c1 .. B 0x80017a6 ; HAL_DMA_Abort_IT + 410 + 0x08001622: 6820 h LDR r0,[r4,#0] + 0x08001624: 6800 .h LDR r0,[r0,#0] + 0x08001626: f020000e ... BIC r0,r0,#0xe + 0x0800162a: 6821 !h LDR r1,[r4,#0] + 0x0800162c: 6008 .` STR r0,[r1,#0] + 0x0800162e: 6820 h LDR r0,[r4,#0] + 0x08001630: 6800 .h LDR r0,[r0,#0] + 0x08001632: f0200001 ... BIC r0,r0,#1 + 0x08001636: 6821 !h LDR r1,[r4,#0] + 0x08001638: 6008 .` STR r0,[r1,#0] + 0x0800163a: 495c \I LDR r1,[pc,#368] ; [0x80017ac] = 0x40020080 + 0x0800163c: 6820 h LDR r0,[r4,#0] + 0x0800163e: 4288 .B CMP r0,r1 + 0x08001640: d952 R. BLS 0x80016e8 ; HAL_DMA_Abort_IT + 220 + 0x08001642: 495a ZI LDR r1,[pc,#360] ; [0x80017ac] = 0x40020080 + 0x08001644: 3978 x9 SUBS r1,r1,#0x78 + 0x08001646: 6820 h LDR r0,[r4,#0] + 0x08001648: 4288 .B CMP r0,r1 + 0x0800164a: d101 .. BNE 0x8001650 ; HAL_DMA_Abort_IT + 68 + 0x0800164c: 2001 . MOVS r0,#1 + 0x0800164e: e047 G. B 0x80016e0 ; HAL_DMA_Abort_IT + 212 + 0x08001650: 4956 VI LDR r1,[pc,#344] ; [0x80017ac] = 0x40020080 + 0x08001652: 3964 d9 SUBS r1,r1,#0x64 + 0x08001654: 6820 h LDR r0,[r4,#0] + 0x08001656: 4288 .B CMP r0,r1 + 0x08001658: d101 .. BNE 0x800165e ; HAL_DMA_Abort_IT + 82 + 0x0800165a: 2010 . MOVS r0,#0x10 + 0x0800165c: e040 @. B 0x80016e0 ; HAL_DMA_Abort_IT + 212 + 0x0800165e: 4953 SI LDR r1,[pc,#332] ; [0x80017ac] = 0x40020080 + 0x08001660: 3950 P9 SUBS r1,r1,#0x50 + 0x08001662: 6820 h LDR r0,[r4,#0] + 0x08001664: 4288 .B CMP r0,r1 + 0x08001666: d101 .. BNE 0x800166c ; HAL_DMA_Abort_IT + 96 + 0x08001668: 1580 .. ASRS r0,r0,#22 + 0x0800166a: e039 9. B 0x80016e0 ; HAL_DMA_Abort_IT + 212 + 0x0800166c: 494f OI LDR r1,[pc,#316] ; [0x80017ac] = 0x40020080 + 0x0800166e: 393c <9 SUBS r1,r1,#0x3c + 0x08001670: 6820 h LDR r0,[r4,#0] + 0x08001672: 4288 .B CMP r0,r1 + 0x08001674: d101 .. BNE 0x800167a ; HAL_DMA_Abort_IT + 110 + 0x08001676: 1480 .. ASRS r0,r0,#18 + 0x08001678: e032 2. B 0x80016e0 ; HAL_DMA_Abort_IT + 212 + 0x0800167a: 494c LI LDR r1,[pc,#304] ; [0x80017ac] = 0x40020080 + 0x0800167c: 3928 (9 SUBS r1,r1,#0x28 + 0x0800167e: 6820 h LDR r0,[r4,#0] + 0x08001680: 4288 .B CMP r0,r1 + 0x08001682: d102 .. BNE 0x800168a ; HAL_DMA_Abort_IT + 126 + 0x08001684: f44f3080 O..0 MOV r0,#0x10000 + 0x08001688: e02a *. B 0x80016e0 ; HAL_DMA_Abort_IT + 212 + 0x0800168a: 4948 HI LDR r1,[pc,#288] ; [0x80017ac] = 0x40020080 + 0x0800168c: 3914 .9 SUBS r1,r1,#0x14 + 0x0800168e: 6820 h LDR r0,[r4,#0] + 0x08001690: 4288 .B CMP r0,r1 + 0x08001692: d102 .. BNE 0x800169a ; HAL_DMA_Abort_IT + 142 + 0x08001694: f44f1080 O... MOV r0,#0x100000 + 0x08001698: e022 ". B 0x80016e0 ; HAL_DMA_Abort_IT + 212 + 0x0800169a: 4944 DI LDR r1,[pc,#272] ; [0x80017ac] = 0x40020080 + 0x0800169c: 6820 h LDR r0,[r4,#0] + 0x0800169e: 4288 .B CMP r0,r1 + 0x080016a0: d101 .. BNE 0x80016a6 ; HAL_DMA_Abort_IT + 154 + 0x080016a2: 0440 @. LSLS r0,r0,#17 + 0x080016a4: e01c .. B 0x80016e0 ; HAL_DMA_Abort_IT + 212 + 0x080016a6: 4942 BI LDR r1,[pc,#264] ; [0x80017b0] = 0x40020408 + 0x080016a8: 6820 h LDR r0,[r4,#0] + 0x080016aa: 4288 .B CMP r0,r1 + 0x080016ac: d101 .. BNE 0x80016b2 ; HAL_DMA_Abort_IT + 166 + 0x080016ae: 2001 . MOVS r0,#1 + 0x080016b0: e016 .. B 0x80016e0 ; HAL_DMA_Abort_IT + 212 + 0x080016b2: 493f ?I LDR r1,[pc,#252] ; [0x80017b0] = 0x40020408 + 0x080016b4: 3114 .1 ADDS r1,r1,#0x14 + 0x080016b6: 6820 h LDR r0,[r4,#0] + 0x080016b8: 4288 .B CMP r0,r1 + 0x080016ba: d101 .. BNE 0x80016c0 ; HAL_DMA_Abort_IT + 180 + 0x080016bc: 2010 . MOVS r0,#0x10 + 0x080016be: e00f .. B 0x80016e0 ; HAL_DMA_Abort_IT + 212 + 0x080016c0: 493b ;I LDR r1,[pc,#236] ; [0x80017b0] = 0x40020408 + 0x080016c2: 3128 (1 ADDS r1,r1,#0x28 + 0x080016c4: 6820 h LDR r0,[r4,#0] + 0x080016c6: 4288 .B CMP r0,r1 + 0x080016c8: d101 .. BNE 0x80016ce ; HAL_DMA_Abort_IT + 194 + 0x080016ca: 1580 .. ASRS r0,r0,#22 + 0x080016cc: e008 .. B 0x80016e0 ; HAL_DMA_Abort_IT + 212 + 0x080016ce: 4938 8I LDR r1,[pc,#224] ; [0x80017b0] = 0x40020408 + 0x080016d0: 313c <1 ADDS r1,r1,#0x3c + 0x080016d2: 6820 h LDR r0,[r4,#0] + 0x080016d4: 4288 .B CMP r0,r1 + 0x080016d6: d101 .. BNE 0x80016dc ; HAL_DMA_Abort_IT + 208 + 0x080016d8: 1480 .. ASRS r0,r0,#18 + 0x080016da: e001 .. B 0x80016e0 ; HAL_DMA_Abort_IT + 212 + 0x080016dc: f44f3080 O..0 MOV r0,#0x10000 + 0x080016e0: 4933 3I LDR r1,[pc,#204] ; [0x80017b0] = 0x40020408 + 0x080016e2: 1f09 .. SUBS r1,r1,#4 + 0x080016e4: 6008 .` STR r0,[r1,#0] + 0x080016e6: e051 Q. B 0x800178c ; HAL_DMA_Abort_IT + 384 + 0x080016e8: 4930 0I LDR r1,[pc,#192] ; [0x80017ac] = 0x40020080 + 0x080016ea: 3978 x9 SUBS r1,r1,#0x78 + 0x080016ec: 6820 h LDR r0,[r4,#0] + 0x080016ee: 4288 .B CMP r0,r1 + 0x080016f0: d101 .. BNE 0x80016f6 ; HAL_DMA_Abort_IT + 234 + 0x080016f2: 2001 . MOVS r0,#1 + 0x080016f4: e047 G. B 0x8001786 ; HAL_DMA_Abort_IT + 378 + 0x080016f6: 492d -I LDR r1,[pc,#180] ; [0x80017ac] = 0x40020080 + 0x080016f8: 3964 d9 SUBS r1,r1,#0x64 + 0x080016fa: 6820 h LDR r0,[r4,#0] + 0x080016fc: 4288 .B CMP r0,r1 + 0x080016fe: d101 .. BNE 0x8001704 ; HAL_DMA_Abort_IT + 248 + 0x08001700: 2010 . MOVS r0,#0x10 + 0x08001702: e040 @. B 0x8001786 ; HAL_DMA_Abort_IT + 378 + 0x08001704: 4929 )I LDR r1,[pc,#164] ; [0x80017ac] = 0x40020080 + 0x08001706: 3950 P9 SUBS r1,r1,#0x50 + 0x08001708: 6820 h LDR r0,[r4,#0] + 0x0800170a: 4288 .B CMP r0,r1 + 0x0800170c: d101 .. BNE 0x8001712 ; HAL_DMA_Abort_IT + 262 + 0x0800170e: 1580 .. ASRS r0,r0,#22 + 0x08001710: e039 9. B 0x8001786 ; HAL_DMA_Abort_IT + 378 + 0x08001712: 4926 &I LDR r1,[pc,#152] ; [0x80017ac] = 0x40020080 + 0x08001714: 393c <9 SUBS r1,r1,#0x3c + 0x08001716: 6820 h LDR r0,[r4,#0] + 0x08001718: 4288 .B CMP r0,r1 + 0x0800171a: d101 .. BNE 0x8001720 ; HAL_DMA_Abort_IT + 276 + 0x0800171c: 1480 .. ASRS r0,r0,#18 + 0x0800171e: e032 2. B 0x8001786 ; HAL_DMA_Abort_IT + 378 + 0x08001720: 4922 "I LDR r1,[pc,#136] ; [0x80017ac] = 0x40020080 + 0x08001722: 3928 (9 SUBS r1,r1,#0x28 + 0x08001724: 6820 h LDR r0,[r4,#0] + 0x08001726: 4288 .B CMP r0,r1 + 0x08001728: d102 .. BNE 0x8001730 ; HAL_DMA_Abort_IT + 292 + 0x0800172a: f44f3080 O..0 MOV r0,#0x10000 + 0x0800172e: e02a *. B 0x8001786 ; HAL_DMA_Abort_IT + 378 + 0x08001730: 491e .I LDR r1,[pc,#120] ; [0x80017ac] = 0x40020080 + 0x08001732: 3914 .9 SUBS r1,r1,#0x14 + 0x08001734: 6820 h LDR r0,[r4,#0] + 0x08001736: 4288 .B CMP r0,r1 + 0x08001738: d102 .. BNE 0x8001740 ; HAL_DMA_Abort_IT + 308 + 0x0800173a: f44f1080 O... MOV r0,#0x100000 + 0x0800173e: e022 ". B 0x8001786 ; HAL_DMA_Abort_IT + 378 + 0x08001740: 491a .I LDR r1,[pc,#104] ; [0x80017ac] = 0x40020080 + 0x08001742: 6820 h LDR r0,[r4,#0] + 0x08001744: 4288 .B CMP r0,r1 + 0x08001746: d101 .. BNE 0x800174c ; HAL_DMA_Abort_IT + 320 + 0x08001748: 0440 @. LSLS r0,r0,#17 + 0x0800174a: e01c .. B 0x8001786 ; HAL_DMA_Abort_IT + 378 + 0x0800174c: 4918 .I LDR r1,[pc,#96] ; [0x80017b0] = 0x40020408 + 0x0800174e: 6820 h LDR r0,[r4,#0] + 0x08001750: 4288 .B CMP r0,r1 + 0x08001752: d101 .. BNE 0x8001758 ; HAL_DMA_Abort_IT + 332 + 0x08001754: 2001 . MOVS r0,#1 + 0x08001756: e016 .. B 0x8001786 ; HAL_DMA_Abort_IT + 378 + 0x08001758: 4915 .I LDR r1,[pc,#84] ; [0x80017b0] = 0x40020408 + 0x0800175a: 3114 .1 ADDS r1,r1,#0x14 + 0x0800175c: 6820 h LDR r0,[r4,#0] + 0x0800175e: 4288 .B CMP r0,r1 + 0x08001760: d101 .. BNE 0x8001766 ; HAL_DMA_Abort_IT + 346 + 0x08001762: 2010 . MOVS r0,#0x10 + 0x08001764: e00f .. B 0x8001786 ; HAL_DMA_Abort_IT + 378 + 0x08001766: 4912 .I LDR r1,[pc,#72] ; [0x80017b0] = 0x40020408 + 0x08001768: 3128 (1 ADDS r1,r1,#0x28 + 0x0800176a: 6820 h LDR r0,[r4,#0] + 0x0800176c: 4288 .B CMP r0,r1 + 0x0800176e: d101 .. BNE 0x8001774 ; HAL_DMA_Abort_IT + 360 + 0x08001770: 1580 .. ASRS r0,r0,#22 + 0x08001772: e008 .. B 0x8001786 ; HAL_DMA_Abort_IT + 378 + 0x08001774: 490e .I LDR r1,[pc,#56] ; [0x80017b0] = 0x40020408 + 0x08001776: 313c <1 ADDS r1,r1,#0x3c + 0x08001778: 6820 h LDR r0,[r4,#0] + 0x0800177a: 4288 .B CMP r0,r1 + 0x0800177c: d101 .. BNE 0x8001782 ; HAL_DMA_Abort_IT + 374 + 0x0800177e: 1480 .. ASRS r0,r0,#18 + 0x08001780: e001 .. B 0x8001786 ; HAL_DMA_Abort_IT + 378 + 0x08001782: f44f3080 O..0 MOV r0,#0x10000 + 0x08001786: 4909 .I LDR r1,[pc,#36] ; [0x80017ac] = 0x40020080 + 0x08001788: 3980 .9 SUBS r1,r1,#0x80 + 0x0800178a: 6048 H` STR r0,[r1,#4] + 0x0800178c: 2001 . MOVS r0,#1 + 0x0800178e: f8840021 ..!. STRB r0,[r4,#0x21] + 0x08001792: bf00 .. NOP + 0x08001794: 2000 . MOVS r0,#0 + 0x08001796: f8840020 .. . STRB r0,[r4,#0x20] + 0x0800179a: bf00 .. NOP + 0x0800179c: 6b60 `k LDR r0,[r4,#0x34] + 0x0800179e: b110 .. CBZ r0,0x80017a6 ; HAL_DMA_Abort_IT + 410 + 0x080017a0: 4620 F MOV r0,r4 + 0x080017a2: 6b61 ak LDR r1,[r4,#0x34] + 0x080017a4: 4788 .G BLX r1 + 0x080017a6: 4628 (F MOV r0,r5 + 0x080017a8: bd70 p. POP {r4-r6,pc} + $d + 0x080017aa: 0000 .. DCW 0 + 0x080017ac: 40020080 ...@ DCD 1073873024 + 0x080017b0: 40020408 ...@ DCD 1073873928 + $t + i.HAL_DMA_DeInit + HAL_DMA_DeInit + 0x080017b4: 4601 .F MOV r1,r0 + 0x080017b6: b909 .. CBNZ r1,0x80017bc ; HAL_DMA_DeInit + 8 + 0x080017b8: 2001 . MOVS r0,#1 + 0x080017ba: 4770 pG BX lr + 0x080017bc: 6808 .h LDR r0,[r1,#0] + 0x080017be: 6800 .h LDR r0,[r0,#0] + 0x080017c0: f0200001 ... BIC r0,r0,#1 + 0x080017c4: 680a .h LDR r2,[r1,#0] + 0x080017c6: 6010 .` STR r0,[r2,#0] + 0x080017c8: 2000 . MOVS r0,#0 + 0x080017ca: 680a .h LDR r2,[r1,#0] + 0x080017cc: 6010 .` STR r0,[r2,#0] + 0x080017ce: 680a .h LDR r2,[r1,#0] + 0x080017d0: 6050 P` STR r0,[r2,#4] + 0x080017d2: 680a .h LDR r2,[r1,#0] + 0x080017d4: 6090 .` STR r0,[r2,#8] + 0x080017d6: 680a .h LDR r2,[r1,#0] + 0x080017d8: 60d0 .` STR r0,[r2,#0xc] + 0x080017da: 4a17 .J LDR r2,[pc,#92] ; [0x8001838] = 0x40020408 + 0x080017dc: 6808 .h LDR r0,[r1,#0] + 0x080017de: 4290 .B CMP r0,r2 + 0x080017e0: d20b .. BCS 0x80017fa ; HAL_DMA_DeInit + 70 + 0x080017e2: 4a16 .J LDR r2,[pc,#88] ; [0x800183c] = 0x40020008 + 0x080017e4: 6808 .h LDR r0,[r1,#0] + 0x080017e6: 1a80 .. SUBS r0,r0,r2 + 0x080017e8: 2214 ." MOVS r2,#0x14 + 0x080017ea: fbb0f0f2 .... UDIV r0,r0,r2 + 0x080017ee: 0080 .. LSLS r0,r0,#2 + 0x080017f0: 6408 .d STR r0,[r1,#0x40] + 0x080017f2: 4812 .H LDR r0,[pc,#72] ; [0x800183c] = 0x40020008 + 0x080017f4: 3808 .8 SUBS r0,r0,#8 + 0x080017f6: 63c8 .c STR r0,[r1,#0x3c] + 0x080017f8: e00a .. B 0x8001810 ; HAL_DMA_DeInit + 92 + 0x080017fa: 4a0f .J LDR r2,[pc,#60] ; [0x8001838] = 0x40020408 + 0x080017fc: 6808 .h LDR r0,[r1,#0] + 0x080017fe: 1a80 .. SUBS r0,r0,r2 + 0x08001800: 2214 ." MOVS r2,#0x14 + 0x08001802: fbb0f0f2 .... UDIV r0,r0,r2 + 0x08001806: 0080 .. LSLS r0,r0,#2 + 0x08001808: 6408 .d STR r0,[r1,#0x40] + 0x0800180a: 480b .H LDR r0,[pc,#44] ; [0x8001838] = 0x40020408 + 0x0800180c: 3808 .8 SUBS r0,r0,#8 + 0x0800180e: 63c8 .c STR r0,[r1,#0x3c] + 0x08001810: f8912040 ..@ LDRB r2,[r1,#0x40] + 0x08001814: 2001 . MOVS r0,#1 + 0x08001816: 4090 .@ LSLS r0,r0,r2 + 0x08001818: 6bca .k LDR r2,[r1,#0x3c] + 0x0800181a: 6050 P` STR r0,[r2,#4] + 0x0800181c: 2000 . MOVS r0,#0 + 0x0800181e: 6288 .b STR r0,[r1,#0x28] + 0x08001820: 62c8 .b STR r0,[r1,#0x2c] + 0x08001822: 6308 .c STR r0,[r1,#0x30] + 0x08001824: 6348 Hc STR r0,[r1,#0x34] + 0x08001826: 6388 .c STR r0,[r1,#0x38] + 0x08001828: f8810021 ..!. STRB r0,[r1,#0x21] + 0x0800182c: bf00 .. NOP + 0x0800182e: f8810020 .. . STRB r0,[r1,#0x20] + 0x08001832: bf00 .. NOP + 0x08001834: bf00 .. NOP + 0x08001836: e7c0 .. B 0x80017ba ; HAL_DMA_DeInit + 6 + $d + 0x08001838: 40020408 ...@ DCD 1073873928 + 0x0800183c: 40020008 ...@ DCD 1073872904 + $t + i.HAL_DMA_IRQHandler + HAL_DMA_IRQHandler + 0x08001840: b570 p. PUSH {r4-r6,lr} + 0x08001842: 4604 .F MOV r4,r0 + 0x08001844: 6be0 .k LDR r0,[r4,#0x3c] + 0x08001846: 6805 .h LDR r5,[r0,#0] + 0x08001848: 6820 h LDR r0,[r4,#0] + 0x0800184a: 6806 .h LDR r6,[r0,#0] + 0x0800184c: f8941040 ..@. LDRB r1,[r4,#0x40] + 0x08001850: 2004 . MOVS r0,#4 + 0x08001852: 4088 .@ LSLS r0,r0,r1 + 0x08001854: 4028 (@ ANDS r0,r0,r5 + 0x08001856: 2800 .( CMP r0,#0 + 0x08001858: d075 u. BEQ 0x8001946 ; HAL_DMA_IRQHandler + 262 + 0x0800185a: f0060004 .... AND r0,r6,#4 + 0x0800185e: 2800 .( CMP r0,#0 + 0x08001860: d0fa .. BEQ 0x8001858 ; HAL_DMA_IRQHandler + 24 + 0x08001862: 6820 h LDR r0,[r4,#0] + 0x08001864: 6800 .h LDR r0,[r0,#0] + 0x08001866: f0000020 .. . AND r0,r0,#0x20 + 0x0800186a: b928 (. CBNZ r0,0x8001878 ; HAL_DMA_IRQHandler + 56 + 0x0800186c: 6820 h LDR r0,[r4,#0] + 0x0800186e: 6800 .h LDR r0,[r0,#0] + 0x08001870: f0200004 ... BIC r0,r0,#4 + 0x08001874: 6821 !h LDR r1,[r4,#0] + 0x08001876: 6008 .` STR r0,[r1,#0] + 0x08001878: 49d5 .I LDR r1,[pc,#852] ; [0x8001bd0] = 0x40020080 + 0x0800187a: 6820 h LDR r0,[r4,#0] + 0x0800187c: 4288 .B CMP r0,r1 + 0x0800187e: d954 T. BLS 0x800192a ; HAL_DMA_IRQHandler + 234 + 0x08001880: 49d3 .I LDR r1,[pc,#844] ; [0x8001bd0] = 0x40020080 + 0x08001882: 3978 x9 SUBS r1,r1,#0x78 + 0x08001884: 6820 h LDR r0,[r4,#0] + 0x08001886: 4288 .B CMP r0,r1 + 0x08001888: d101 .. BNE 0x800188e ; HAL_DMA_IRQHandler + 78 + 0x0800188a: 2004 . MOVS r0,#4 + 0x0800188c: e049 I. B 0x8001922 ; HAL_DMA_IRQHandler + 226 + 0x0800188e: 49d0 .I LDR r1,[pc,#832] ; [0x8001bd0] = 0x40020080 + 0x08001890: 3964 d9 SUBS r1,r1,#0x64 + 0x08001892: 6820 h LDR r0,[r4,#0] + 0x08001894: 4288 .B CMP r0,r1 + 0x08001896: d101 .. BNE 0x800189c ; HAL_DMA_IRQHandler + 92 + 0x08001898: 2040 @ MOVS r0,#0x40 + 0x0800189a: e042 B. B 0x8001922 ; HAL_DMA_IRQHandler + 226 + 0x0800189c: 49cc .I LDR r1,[pc,#816] ; [0x8001bd0] = 0x40020080 + 0x0800189e: 3950 P9 SUBS r1,r1,#0x50 + 0x080018a0: 6820 h LDR r0,[r4,#0] + 0x080018a2: 4288 .B CMP r0,r1 + 0x080018a4: d101 .. BNE 0x80018aa ; HAL_DMA_IRQHandler + 106 + 0x080018a6: 1500 .. ASRS r0,r0,#20 + 0x080018a8: e03b ;. B 0x8001922 ; HAL_DMA_IRQHandler + 226 + 0x080018aa: 49c9 .I LDR r1,[pc,#804] ; [0x8001bd0] = 0x40020080 + 0x080018ac: 393c <9 SUBS r1,r1,#0x3c + 0x080018ae: 6820 h LDR r0,[r4,#0] + 0x080018b0: 4288 .B CMP r0,r1 + 0x080018b2: d102 .. BNE 0x80018ba ; HAL_DMA_IRQHandler + 122 + 0x080018b4: f44f4080 O..@ MOV r0,#0x4000 + 0x080018b8: e033 3. B 0x8001922 ; HAL_DMA_IRQHandler + 226 + 0x080018ba: 49c5 .I LDR r1,[pc,#788] ; [0x8001bd0] = 0x40020080 + 0x080018bc: 3928 (9 SUBS r1,r1,#0x28 + 0x080018be: 6820 h LDR r0,[r4,#0] + 0x080018c0: 4288 .B CMP r0,r1 + 0x080018c2: d102 .. BNE 0x80018ca ; HAL_DMA_IRQHandler + 138 + 0x080018c4: f44f2080 O.. MOV r0,#0x40000 + 0x080018c8: e02b +. B 0x8001922 ; HAL_DMA_IRQHandler + 226 + 0x080018ca: 49c1 .I LDR r1,[pc,#772] ; [0x8001bd0] = 0x40020080 + 0x080018cc: 3914 .9 SUBS r1,r1,#0x14 + 0x080018ce: 6820 h LDR r0,[r4,#0] + 0x080018d0: 4288 .B CMP r0,r1 + 0x080018d2: d102 .. BNE 0x80018da ; HAL_DMA_IRQHandler + 154 + 0x080018d4: f44f0080 O... MOV r0,#0x400000 + 0x080018d8: e023 #. B 0x8001922 ; HAL_DMA_IRQHandler + 226 + 0x080018da: 49bd .I LDR r1,[pc,#756] ; [0x8001bd0] = 0x40020080 + 0x080018dc: 6820 h LDR r0,[r4,#0] + 0x080018de: 4288 .B CMP r0,r1 + 0x080018e0: d101 .. BNE 0x80018e6 ; HAL_DMA_IRQHandler + 166 + 0x080018e2: 04c0 .. LSLS r0,r0,#19 + 0x080018e4: e01d .. B 0x8001922 ; HAL_DMA_IRQHandler + 226 + 0x080018e6: 49bb .I LDR r1,[pc,#748] ; [0x8001bd4] = 0x40020408 + 0x080018e8: 6820 h LDR r0,[r4,#0] + 0x080018ea: 4288 .B CMP r0,r1 + 0x080018ec: d101 .. BNE 0x80018f2 ; HAL_DMA_IRQHandler + 178 + 0x080018ee: 2004 . MOVS r0,#4 + 0x080018f0: e017 .. B 0x8001922 ; HAL_DMA_IRQHandler + 226 + 0x080018f2: 49b8 .I LDR r1,[pc,#736] ; [0x8001bd4] = 0x40020408 + 0x080018f4: 3114 .1 ADDS r1,r1,#0x14 + 0x080018f6: 6820 h LDR r0,[r4,#0] + 0x080018f8: 4288 .B CMP r0,r1 + 0x080018fa: d101 .. BNE 0x8001900 ; HAL_DMA_IRQHandler + 192 + 0x080018fc: 2040 @ MOVS r0,#0x40 + 0x080018fe: e010 .. B 0x8001922 ; HAL_DMA_IRQHandler + 226 + 0x08001900: 49b4 .I LDR r1,[pc,#720] ; [0x8001bd4] = 0x40020408 + 0x08001902: 3128 (1 ADDS r1,r1,#0x28 + 0x08001904: 6820 h LDR r0,[r4,#0] + 0x08001906: 4288 .B CMP r0,r1 + 0x08001908: d101 .. BNE 0x800190e ; HAL_DMA_IRQHandler + 206 + 0x0800190a: 1500 .. ASRS r0,r0,#20 + 0x0800190c: e009 .. B 0x8001922 ; HAL_DMA_IRQHandler + 226 + 0x0800190e: 49b1 .I LDR r1,[pc,#708] ; [0x8001bd4] = 0x40020408 + 0x08001910: 313c <1 ADDS r1,r1,#0x3c + 0x08001912: 6820 h LDR r0,[r4,#0] + 0x08001914: 4288 .B CMP r0,r1 + 0x08001916: d102 .. BNE 0x800191e ; HAL_DMA_IRQHandler + 222 + 0x08001918: f44f4080 O..@ MOV r0,#0x4000 + 0x0800191c: e001 .. B 0x8001922 ; HAL_DMA_IRQHandler + 226 + 0x0800191e: f44f2080 O.. MOV r0,#0x40000 + 0x08001922: 49ac .I LDR r1,[pc,#688] ; [0x8001bd4] = 0x40020408 + 0x08001924: 1f09 .. SUBS r1,r1,#4 + 0x08001926: 6008 .` STR r0,[r1,#0] + 0x08001928: e054 T. B 0x80019d4 ; HAL_DMA_IRQHandler + 404 + 0x0800192a: 49a9 .I LDR r1,[pc,#676] ; [0x8001bd0] = 0x40020080 + 0x0800192c: 3978 x9 SUBS r1,r1,#0x78 + 0x0800192e: 6820 h LDR r0,[r4,#0] + 0x08001930: 4288 .B CMP r0,r1 + 0x08001932: d101 .. BNE 0x8001938 ; HAL_DMA_IRQHandler + 248 + 0x08001934: 2004 . MOVS r0,#4 + 0x08001936: e04a J. B 0x80019ce ; HAL_DMA_IRQHandler + 398 + 0x08001938: 49a5 .I LDR r1,[pc,#660] ; [0x8001bd0] = 0x40020080 + 0x0800193a: 3964 d9 SUBS r1,r1,#0x64 + 0x0800193c: 6820 h LDR r0,[r4,#0] + 0x0800193e: 4288 .B CMP r0,r1 + 0x08001940: d102 .. BNE 0x8001948 ; HAL_DMA_IRQHandler + 264 + 0x08001942: 2040 @ MOVS r0,#0x40 + 0x08001944: e043 C. B 0x80019ce ; HAL_DMA_IRQHandler + 398 + 0x08001946: e04c L. B 0x80019e2 ; HAL_DMA_IRQHandler + 418 + 0x08001948: 49a1 .I LDR r1,[pc,#644] ; [0x8001bd0] = 0x40020080 + 0x0800194a: 3950 P9 SUBS r1,r1,#0x50 + 0x0800194c: 6820 h LDR r0,[r4,#0] + 0x0800194e: 4288 .B CMP r0,r1 + 0x08001950: d101 .. BNE 0x8001956 ; HAL_DMA_IRQHandler + 278 + 0x08001952: 1500 .. ASRS r0,r0,#20 + 0x08001954: e03b ;. B 0x80019ce ; HAL_DMA_IRQHandler + 398 + 0x08001956: 499e .I LDR r1,[pc,#632] ; [0x8001bd0] = 0x40020080 + 0x08001958: 393c <9 SUBS r1,r1,#0x3c + 0x0800195a: 6820 h LDR r0,[r4,#0] + 0x0800195c: 4288 .B CMP r0,r1 + 0x0800195e: d102 .. BNE 0x8001966 ; HAL_DMA_IRQHandler + 294 + 0x08001960: f44f4080 O..@ MOV r0,#0x4000 + 0x08001964: e033 3. B 0x80019ce ; HAL_DMA_IRQHandler + 398 + 0x08001966: 499a .I LDR r1,[pc,#616] ; [0x8001bd0] = 0x40020080 + 0x08001968: 3928 (9 SUBS r1,r1,#0x28 + 0x0800196a: 6820 h LDR r0,[r4,#0] + 0x0800196c: 4288 .B CMP r0,r1 + 0x0800196e: d102 .. BNE 0x8001976 ; HAL_DMA_IRQHandler + 310 + 0x08001970: f44f2080 O.. MOV r0,#0x40000 + 0x08001974: e02b +. B 0x80019ce ; HAL_DMA_IRQHandler + 398 + 0x08001976: 4996 .I LDR r1,[pc,#600] ; [0x8001bd0] = 0x40020080 + 0x08001978: 3914 .9 SUBS r1,r1,#0x14 + 0x0800197a: 6820 h LDR r0,[r4,#0] + 0x0800197c: 4288 .B CMP r0,r1 + 0x0800197e: d102 .. BNE 0x8001986 ; HAL_DMA_IRQHandler + 326 + 0x08001980: f44f0080 O... MOV r0,#0x400000 + 0x08001984: e023 #. B 0x80019ce ; HAL_DMA_IRQHandler + 398 + 0x08001986: 4992 .I LDR r1,[pc,#584] ; [0x8001bd0] = 0x40020080 + 0x08001988: 6820 h LDR r0,[r4,#0] + 0x0800198a: 4288 .B CMP r0,r1 + 0x0800198c: d101 .. BNE 0x8001992 ; HAL_DMA_IRQHandler + 338 + 0x0800198e: 04c0 .. LSLS r0,r0,#19 + 0x08001990: e01d .. B 0x80019ce ; HAL_DMA_IRQHandler + 398 + 0x08001992: 4990 .I LDR r1,[pc,#576] ; [0x8001bd4] = 0x40020408 + 0x08001994: 6820 h LDR r0,[r4,#0] + 0x08001996: 4288 .B CMP r0,r1 + 0x08001998: d101 .. BNE 0x800199e ; HAL_DMA_IRQHandler + 350 + 0x0800199a: 2004 . MOVS r0,#4 + 0x0800199c: e017 .. B 0x80019ce ; HAL_DMA_IRQHandler + 398 + 0x0800199e: 498d .I LDR r1,[pc,#564] ; [0x8001bd4] = 0x40020408 + 0x080019a0: 3114 .1 ADDS r1,r1,#0x14 + 0x080019a2: 6820 h LDR r0,[r4,#0] + 0x080019a4: 4288 .B CMP r0,r1 + 0x080019a6: d101 .. BNE 0x80019ac ; HAL_DMA_IRQHandler + 364 + 0x080019a8: 2040 @ MOVS r0,#0x40 + 0x080019aa: e010 .. B 0x80019ce ; HAL_DMA_IRQHandler + 398 + 0x080019ac: 4989 .I LDR r1,[pc,#548] ; [0x8001bd4] = 0x40020408 + 0x080019ae: 3128 (1 ADDS r1,r1,#0x28 + 0x080019b0: 6820 h LDR r0,[r4,#0] + 0x080019b2: 4288 .B CMP r0,r1 + 0x080019b4: d101 .. BNE 0x80019ba ; HAL_DMA_IRQHandler + 378 + 0x080019b6: 1500 .. ASRS r0,r0,#20 + 0x080019b8: e009 .. B 0x80019ce ; HAL_DMA_IRQHandler + 398 + 0x080019ba: 4986 .I LDR r1,[pc,#536] ; [0x8001bd4] = 0x40020408 + 0x080019bc: 313c <1 ADDS r1,r1,#0x3c + 0x080019be: 6820 h LDR r0,[r4,#0] + 0x080019c0: 4288 .B CMP r0,r1 + 0x080019c2: d102 .. BNE 0x80019ca ; HAL_DMA_IRQHandler + 394 + 0x080019c4: f44f4080 O..@ MOV r0,#0x4000 + 0x080019c8: e001 .. B 0x80019ce ; HAL_DMA_IRQHandler + 398 + 0x080019ca: f44f2080 O.. MOV r0,#0x40000 + 0x080019ce: 4980 .I LDR r1,[pc,#512] ; [0x8001bd0] = 0x40020080 + 0x080019d0: 3980 .9 SUBS r1,r1,#0x80 + 0x080019d2: 6048 H` STR r0,[r1,#4] + 0x080019d4: 6ae0 .j LDR r0,[r4,#0x2c] + 0x080019d6: 2800 .( CMP r0,#0 + 0x080019d8: d002 .. BEQ 0x80019e0 ; HAL_DMA_IRQHandler + 416 + 0x080019da: 4620 F MOV r0,r4 + 0x080019dc: 6ae1 .j LDR r1,[r4,#0x2c] + 0x080019de: 4788 .G BLX r1 + 0x080019e0: e0f4 .. B 0x8001bcc ; HAL_DMA_IRQHandler + 908 + 0x080019e2: f8941040 ..@. LDRB r1,[r4,#0x40] + 0x080019e6: 2002 . MOVS r0,#2 + 0x080019e8: 4088 .@ LSLS r0,r0,r1 + 0x080019ea: 4028 (@ ANDS r0,r0,r5 + 0x080019ec: 2800 .( CMP r0,#0 + 0x080019ee: d071 q. BEQ 0x8001ad4 ; HAL_DMA_IRQHandler + 660 + 0x080019f0: f0060002 .... AND r0,r6,#2 + 0x080019f4: 2800 .( CMP r0,#0 + 0x080019f6: d0fa .. BEQ 0x80019ee ; HAL_DMA_IRQHandler + 430 + 0x080019f8: 6820 h LDR r0,[r4,#0] + 0x080019fa: 6800 .h LDR r0,[r0,#0] + 0x080019fc: f0000020 .. . AND r0,r0,#0x20 + 0x08001a00: b940 @. CBNZ r0,0x8001a14 ; HAL_DMA_IRQHandler + 468 + 0x08001a02: 6820 h LDR r0,[r4,#0] + 0x08001a04: 6800 .h LDR r0,[r0,#0] + 0x08001a06: f020000a ... BIC r0,r0,#0xa + 0x08001a0a: 6821 !h LDR r1,[r4,#0] + 0x08001a0c: 6008 .` STR r0,[r1,#0] + 0x08001a0e: 2001 . MOVS r0,#1 + 0x08001a10: f8840021 ..!. STRB r0,[r4,#0x21] + 0x08001a14: 496e nI LDR r1,[pc,#440] ; [0x8001bd0] = 0x40020080 + 0x08001a16: 6820 h LDR r0,[r4,#0] + 0x08001a18: 4288 .B CMP r0,r1 + 0x08001a1a: d954 T. BLS 0x8001ac6 ; HAL_DMA_IRQHandler + 646 + 0x08001a1c: 496c lI LDR r1,[pc,#432] ; [0x8001bd0] = 0x40020080 + 0x08001a1e: 3978 x9 SUBS r1,r1,#0x78 + 0x08001a20: 6820 h LDR r0,[r4,#0] + 0x08001a22: 4288 .B CMP r0,r1 + 0x08001a24: d101 .. BNE 0x8001a2a ; HAL_DMA_IRQHandler + 490 + 0x08001a26: 2002 . MOVS r0,#2 + 0x08001a28: e049 I. B 0x8001abe ; HAL_DMA_IRQHandler + 638 + 0x08001a2a: 4969 iI LDR r1,[pc,#420] ; [0x8001bd0] = 0x40020080 + 0x08001a2c: 3964 d9 SUBS r1,r1,#0x64 + 0x08001a2e: 6820 h LDR r0,[r4,#0] + 0x08001a30: 4288 .B CMP r0,r1 + 0x08001a32: d101 .. BNE 0x8001a38 ; HAL_DMA_IRQHandler + 504 + 0x08001a34: 2020 MOVS r0,#0x20 + 0x08001a36: e042 B. B 0x8001abe ; HAL_DMA_IRQHandler + 638 + 0x08001a38: 4965 eI LDR r1,[pc,#404] ; [0x8001bd0] = 0x40020080 + 0x08001a3a: 3950 P9 SUBS r1,r1,#0x50 + 0x08001a3c: 6820 h LDR r0,[r4,#0] + 0x08001a3e: 4288 .B CMP r0,r1 + 0x08001a40: d101 .. BNE 0x8001a46 ; HAL_DMA_IRQHandler + 518 + 0x08001a42: 1540 @. ASRS r0,r0,#21 + 0x08001a44: e03b ;. B 0x8001abe ; HAL_DMA_IRQHandler + 638 + 0x08001a46: 4962 bI LDR r1,[pc,#392] ; [0x8001bd0] = 0x40020080 + 0x08001a48: 393c <9 SUBS r1,r1,#0x3c + 0x08001a4a: 6820 h LDR r0,[r4,#0] + 0x08001a4c: 4288 .B CMP r0,r1 + 0x08001a4e: d102 .. BNE 0x8001a56 ; HAL_DMA_IRQHandler + 534 + 0x08001a50: f44f5000 O..P MOV r0,#0x2000 + 0x08001a54: e033 3. B 0x8001abe ; HAL_DMA_IRQHandler + 638 + 0x08001a56: 495e ^I LDR r1,[pc,#376] ; [0x8001bd0] = 0x40020080 + 0x08001a58: 3928 (9 SUBS r1,r1,#0x28 + 0x08001a5a: 6820 h LDR r0,[r4,#0] + 0x08001a5c: 4288 .B CMP r0,r1 + 0x08001a5e: d102 .. BNE 0x8001a66 ; HAL_DMA_IRQHandler + 550 + 0x08001a60: f44f3000 O..0 MOV r0,#0x20000 + 0x08001a64: e02b +. B 0x8001abe ; HAL_DMA_IRQHandler + 638 + 0x08001a66: 495a ZI LDR r1,[pc,#360] ; [0x8001bd0] = 0x40020080 + 0x08001a68: 3914 .9 SUBS r1,r1,#0x14 + 0x08001a6a: 6820 h LDR r0,[r4,#0] + 0x08001a6c: 4288 .B CMP r0,r1 + 0x08001a6e: d102 .. BNE 0x8001a76 ; HAL_DMA_IRQHandler + 566 + 0x08001a70: f44f1000 O... MOV r0,#0x200000 + 0x08001a74: e023 #. B 0x8001abe ; HAL_DMA_IRQHandler + 638 + 0x08001a76: 4956 VI LDR r1,[pc,#344] ; [0x8001bd0] = 0x40020080 + 0x08001a78: 6820 h LDR r0,[r4,#0] + 0x08001a7a: 4288 .B CMP r0,r1 + 0x08001a7c: d101 .. BNE 0x8001a82 ; HAL_DMA_IRQHandler + 578 + 0x08001a7e: 0480 .. LSLS r0,r0,#18 + 0x08001a80: e01d .. B 0x8001abe ; HAL_DMA_IRQHandler + 638 + 0x08001a82: 4954 TI LDR r1,[pc,#336] ; [0x8001bd4] = 0x40020408 + 0x08001a84: 6820 h LDR r0,[r4,#0] + 0x08001a86: 4288 .B CMP r0,r1 + 0x08001a88: d101 .. BNE 0x8001a8e ; HAL_DMA_IRQHandler + 590 + 0x08001a8a: 2002 . MOVS r0,#2 + 0x08001a8c: e017 .. B 0x8001abe ; HAL_DMA_IRQHandler + 638 + 0x08001a8e: 4951 QI LDR r1,[pc,#324] ; [0x8001bd4] = 0x40020408 + 0x08001a90: 3114 .1 ADDS r1,r1,#0x14 + 0x08001a92: 6820 h LDR r0,[r4,#0] + 0x08001a94: 4288 .B CMP r0,r1 + 0x08001a96: d101 .. BNE 0x8001a9c ; HAL_DMA_IRQHandler + 604 + 0x08001a98: 2020 MOVS r0,#0x20 + 0x08001a9a: e010 .. B 0x8001abe ; HAL_DMA_IRQHandler + 638 + 0x08001a9c: 494d MI LDR r1,[pc,#308] ; [0x8001bd4] = 0x40020408 + 0x08001a9e: 3128 (1 ADDS r1,r1,#0x28 + 0x08001aa0: 6820 h LDR r0,[r4,#0] + 0x08001aa2: 4288 .B CMP r0,r1 + 0x08001aa4: d101 .. BNE 0x8001aaa ; HAL_DMA_IRQHandler + 618 + 0x08001aa6: 1540 @. ASRS r0,r0,#21 + 0x08001aa8: e009 .. B 0x8001abe ; HAL_DMA_IRQHandler + 638 + 0x08001aaa: 494a JI LDR r1,[pc,#296] ; [0x8001bd4] = 0x40020408 + 0x08001aac: 313c <1 ADDS r1,r1,#0x3c + 0x08001aae: 6820 h LDR r0,[r4,#0] + 0x08001ab0: 4288 .B CMP r0,r1 + 0x08001ab2: d102 .. BNE 0x8001aba ; HAL_DMA_IRQHandler + 634 + 0x08001ab4: f44f5000 O..P MOV r0,#0x2000 + 0x08001ab8: e001 .. B 0x8001abe ; HAL_DMA_IRQHandler + 638 + 0x08001aba: f44f3000 O..0 MOV r0,#0x20000 + 0x08001abe: 4945 EI LDR r1,[pc,#276] ; [0x8001bd4] = 0x40020408 + 0x08001ac0: 1f09 .. SUBS r1,r1,#4 + 0x08001ac2: 6008 .` STR r0,[r1,#0] + 0x08001ac4: e054 T. B 0x8001b70 ; HAL_DMA_IRQHandler + 816 + 0x08001ac6: 4942 BI LDR r1,[pc,#264] ; [0x8001bd0] = 0x40020080 + 0x08001ac8: 3978 x9 SUBS r1,r1,#0x78 + 0x08001aca: 6820 h LDR r0,[r4,#0] + 0x08001acc: 4288 .B CMP r0,r1 + 0x08001ace: d102 .. BNE 0x8001ad6 ; HAL_DMA_IRQHandler + 662 + 0x08001ad0: 2002 . MOVS r0,#2 + 0x08001ad2: e04a J. B 0x8001b6a ; HAL_DMA_IRQHandler + 810 + 0x08001ad4: e057 W. B 0x8001b86 ; HAL_DMA_IRQHandler + 838 + 0x08001ad6: 493e >I LDR r1,[pc,#248] ; [0x8001bd0] = 0x40020080 + 0x08001ad8: 3964 d9 SUBS r1,r1,#0x64 + 0x08001ada: 6820 h LDR r0,[r4,#0] + 0x08001adc: 4288 .B CMP r0,r1 + 0x08001ade: d101 .. BNE 0x8001ae4 ; HAL_DMA_IRQHandler + 676 + 0x08001ae0: 2020 MOVS r0,#0x20 + 0x08001ae2: e042 B. B 0x8001b6a ; HAL_DMA_IRQHandler + 810 + 0x08001ae4: 493a :I LDR r1,[pc,#232] ; [0x8001bd0] = 0x40020080 + 0x08001ae6: 3950 P9 SUBS r1,r1,#0x50 + 0x08001ae8: 6820 h LDR r0,[r4,#0] + 0x08001aea: 4288 .B CMP r0,r1 + 0x08001aec: d101 .. BNE 0x8001af2 ; HAL_DMA_IRQHandler + 690 + 0x08001aee: 1540 @. ASRS r0,r0,#21 + 0x08001af0: e03b ;. B 0x8001b6a ; HAL_DMA_IRQHandler + 810 + 0x08001af2: 4937 7I LDR r1,[pc,#220] ; [0x8001bd0] = 0x40020080 + 0x08001af4: 393c <9 SUBS r1,r1,#0x3c + 0x08001af6: 6820 h LDR r0,[r4,#0] + 0x08001af8: 4288 .B CMP r0,r1 + 0x08001afa: d102 .. BNE 0x8001b02 ; HAL_DMA_IRQHandler + 706 + 0x08001afc: f44f5000 O..P MOV r0,#0x2000 + 0x08001b00: e033 3. B 0x8001b6a ; HAL_DMA_IRQHandler + 810 + 0x08001b02: 4933 3I LDR r1,[pc,#204] ; [0x8001bd0] = 0x40020080 + 0x08001b04: 3928 (9 SUBS r1,r1,#0x28 + 0x08001b06: 6820 h LDR r0,[r4,#0] + 0x08001b08: 4288 .B CMP r0,r1 + 0x08001b0a: d102 .. BNE 0x8001b12 ; HAL_DMA_IRQHandler + 722 + 0x08001b0c: f44f3000 O..0 MOV r0,#0x20000 + 0x08001b10: e02b +. B 0x8001b6a ; HAL_DMA_IRQHandler + 810 + 0x08001b12: 492f /I LDR r1,[pc,#188] ; [0x8001bd0] = 0x40020080 + 0x08001b14: 3914 .9 SUBS r1,r1,#0x14 + 0x08001b16: 6820 h LDR r0,[r4,#0] + 0x08001b18: 4288 .B CMP r0,r1 + 0x08001b1a: d102 .. BNE 0x8001b22 ; HAL_DMA_IRQHandler + 738 + 0x08001b1c: f44f1000 O... MOV r0,#0x200000 + 0x08001b20: e023 #. B 0x8001b6a ; HAL_DMA_IRQHandler + 810 + 0x08001b22: 492b +I LDR r1,[pc,#172] ; [0x8001bd0] = 0x40020080 + 0x08001b24: 6820 h LDR r0,[r4,#0] + 0x08001b26: 4288 .B CMP r0,r1 + 0x08001b28: d101 .. BNE 0x8001b2e ; HAL_DMA_IRQHandler + 750 + 0x08001b2a: 0480 .. LSLS r0,r0,#18 + 0x08001b2c: e01d .. B 0x8001b6a ; HAL_DMA_IRQHandler + 810 + 0x08001b2e: 4929 )I LDR r1,[pc,#164] ; [0x8001bd4] = 0x40020408 + 0x08001b30: 6820 h LDR r0,[r4,#0] + 0x08001b32: 4288 .B CMP r0,r1 + 0x08001b34: d101 .. BNE 0x8001b3a ; HAL_DMA_IRQHandler + 762 + 0x08001b36: 2002 . MOVS r0,#2 + 0x08001b38: e017 .. B 0x8001b6a ; HAL_DMA_IRQHandler + 810 + 0x08001b3a: 4926 &I LDR r1,[pc,#152] ; [0x8001bd4] = 0x40020408 + 0x08001b3c: 3114 .1 ADDS r1,r1,#0x14 + 0x08001b3e: 6820 h LDR r0,[r4,#0] + 0x08001b40: 4288 .B CMP r0,r1 + 0x08001b42: d101 .. BNE 0x8001b48 ; HAL_DMA_IRQHandler + 776 + 0x08001b44: 2020 MOVS r0,#0x20 + 0x08001b46: e010 .. B 0x8001b6a ; HAL_DMA_IRQHandler + 810 + 0x08001b48: 4922 "I LDR r1,[pc,#136] ; [0x8001bd4] = 0x40020408 + 0x08001b4a: 3128 (1 ADDS r1,r1,#0x28 + 0x08001b4c: 6820 h LDR r0,[r4,#0] + 0x08001b4e: 4288 .B CMP r0,r1 + 0x08001b50: d101 .. BNE 0x8001b56 ; HAL_DMA_IRQHandler + 790 + 0x08001b52: 1540 @. ASRS r0,r0,#21 + 0x08001b54: e009 .. B 0x8001b6a ; HAL_DMA_IRQHandler + 810 + 0x08001b56: 491f .I LDR r1,[pc,#124] ; [0x8001bd4] = 0x40020408 + 0x08001b58: 313c <1 ADDS r1,r1,#0x3c + 0x08001b5a: 6820 h LDR r0,[r4,#0] + 0x08001b5c: 4288 .B CMP r0,r1 + 0x08001b5e: d102 .. BNE 0x8001b66 ; HAL_DMA_IRQHandler + 806 + 0x08001b60: f44f5000 O..P MOV r0,#0x2000 + 0x08001b64: e001 .. B 0x8001b6a ; HAL_DMA_IRQHandler + 810 + 0x08001b66: f44f3000 O..0 MOV r0,#0x20000 + 0x08001b6a: 4919 .I LDR r1,[pc,#100] ; [0x8001bd0] = 0x40020080 + 0x08001b6c: 3980 .9 SUBS r1,r1,#0x80 + 0x08001b6e: 6048 H` STR r0,[r1,#4] + 0x08001b70: bf00 .. NOP + 0x08001b72: 2000 . MOVS r0,#0 + 0x08001b74: f8840020 .. . STRB r0,[r4,#0x20] + 0x08001b78: bf00 .. NOP + 0x08001b7a: 6aa0 .j LDR r0,[r4,#0x28] + 0x08001b7c: b330 0. CBZ r0,0x8001bcc ; HAL_DMA_IRQHandler + 908 + 0x08001b7e: 4620 F MOV r0,r4 + 0x08001b80: 6aa1 .j LDR r1,[r4,#0x28] + 0x08001b82: 4788 .G BLX r1 + 0x08001b84: e022 ". B 0x8001bcc ; HAL_DMA_IRQHandler + 908 + 0x08001b86: f8941040 ..@. LDRB r1,[r4,#0x40] + 0x08001b8a: 2008 . MOVS r0,#8 + 0x08001b8c: 4088 .@ LSLS r0,r0,r1 + 0x08001b8e: 4028 (@ ANDS r0,r0,r5 + 0x08001b90: b1e0 .. CBZ r0,0x8001bcc ; HAL_DMA_IRQHandler + 908 + 0x08001b92: f0060008 .... AND r0,r6,#8 + 0x08001b96: b1c8 .. CBZ r0,0x8001bcc ; HAL_DMA_IRQHandler + 908 + 0x08001b98: 6820 h LDR r0,[r4,#0] + 0x08001b9a: 6800 .h LDR r0,[r0,#0] + 0x08001b9c: f020000e ... BIC r0,r0,#0xe + 0x08001ba0: 6821 !h LDR r1,[r4,#0] + 0x08001ba2: 6008 .` STR r0,[r1,#0] + 0x08001ba4: f8941040 ..@. LDRB r1,[r4,#0x40] + 0x08001ba8: 2001 . MOVS r0,#1 + 0x08001baa: 4088 .@ LSLS r0,r0,r1 + 0x08001bac: 6be1 .k LDR r1,[r4,#0x3c] + 0x08001bae: 6048 H` STR r0,[r1,#4] + 0x08001bb0: 2001 . MOVS r0,#1 + 0x08001bb2: 63a0 .c STR r0,[r4,#0x38] + 0x08001bb4: f8840021 ..!. STRB r0,[r4,#0x21] + 0x08001bb8: bf00 .. NOP + 0x08001bba: 2000 . MOVS r0,#0 + 0x08001bbc: f8840020 .. . STRB r0,[r4,#0x20] + 0x08001bc0: bf00 .. NOP + 0x08001bc2: 6b20 k LDR r0,[r4,#0x30] + 0x08001bc4: b110 .. CBZ r0,0x8001bcc ; HAL_DMA_IRQHandler + 908 + 0x08001bc6: 4620 F MOV r0,r4 + 0x08001bc8: 6b21 !k LDR r1,[r4,#0x30] + 0x08001bca: 4788 .G BLX r1 + 0x08001bcc: bd70 p. POP {r4-r6,pc} + $d + 0x08001bce: 0000 .. DCW 0 + 0x08001bd0: 40020080 ...@ DCD 1073873024 + 0x08001bd4: 40020408 ...@ DCD 1073873928 + $t + i.HAL_DMA_Init + HAL_DMA_Init + 0x08001bd8: 4601 .F MOV r1,r0 + 0x08001bda: 2200 ." MOVS r2,#0 + 0x08001bdc: b909 .. CBNZ r1,0x8001be2 ; HAL_DMA_Init + 10 + 0x08001bde: 2001 . MOVS r0,#1 + 0x08001be0: 4770 pG BX lr + 0x08001be2: 4b1e .K LDR r3,[pc,#120] ; [0x8001c5c] = 0x40020408 + 0x08001be4: 6808 .h LDR r0,[r1,#0] + 0x08001be6: 4298 .B CMP r0,r3 + 0x08001be8: d20b .. BCS 0x8001c02 ; HAL_DMA_Init + 42 + 0x08001bea: 4b1d .K LDR r3,[pc,#116] ; [0x8001c60] = 0x40020008 + 0x08001bec: 6808 .h LDR r0,[r1,#0] + 0x08001bee: 1ac0 .. SUBS r0,r0,r3 + 0x08001bf0: 2314 .# MOVS r3,#0x14 + 0x08001bf2: fbb0f0f3 .... UDIV r0,r0,r3 + 0x08001bf6: 0080 .. LSLS r0,r0,#2 + 0x08001bf8: 6408 .d STR r0,[r1,#0x40] + 0x08001bfa: 4819 .H LDR r0,[pc,#100] ; [0x8001c60] = 0x40020008 + 0x08001bfc: 3808 .8 SUBS r0,r0,#8 + 0x08001bfe: 63c8 .c STR r0,[r1,#0x3c] + 0x08001c00: e00a .. B 0x8001c18 ; HAL_DMA_Init + 64 + 0x08001c02: 4b16 .K LDR r3,[pc,#88] ; [0x8001c5c] = 0x40020408 + 0x08001c04: 6808 .h LDR r0,[r1,#0] + 0x08001c06: 1ac0 .. SUBS r0,r0,r3 + 0x08001c08: 2314 .# MOVS r3,#0x14 + 0x08001c0a: fbb0f0f3 .... UDIV r0,r0,r3 + 0x08001c0e: 0080 .. LSLS r0,r0,#2 + 0x08001c10: 6408 .d STR r0,[r1,#0x40] + 0x08001c12: 4812 .H LDR r0,[pc,#72] ; [0x8001c5c] = 0x40020408 + 0x08001c14: 3808 .8 SUBS r0,r0,#8 + 0x08001c16: 63c8 .c STR r0,[r1,#0x3c] + 0x08001c18: 2002 . MOVS r0,#2 + 0x08001c1a: f8810021 ..!. STRB r0,[r1,#0x21] + 0x08001c1e: 6808 .h LDR r0,[r1,#0] + 0x08001c20: 6802 .h LDR r2,[r0,#0] + 0x08001c22: f64370f0 C..p MOV r0,#0x3ff0 + 0x08001c26: 4382 .C BICS r2,r2,r0 + 0x08001c28: e9d10301 .... LDRD r0,r3,[r1,#4] + 0x08001c2c: 4318 .C ORRS r0,r0,r3 + 0x08001c2e: 68cb .h LDR r3,[r1,#0xc] + 0x08001c30: 4318 .C ORRS r0,r0,r3 + 0x08001c32: 690b .i LDR r3,[r1,#0x10] + 0x08001c34: 4318 .C ORRS r0,r0,r3 + 0x08001c36: 694b Ki LDR r3,[r1,#0x14] + 0x08001c38: 4318 .C ORRS r0,r0,r3 + 0x08001c3a: 698b .i LDR r3,[r1,#0x18] + 0x08001c3c: 4318 .C ORRS r0,r0,r3 + 0x08001c3e: 69cb .i LDR r3,[r1,#0x1c] + 0x08001c40: 4318 .C ORRS r0,r0,r3 + 0x08001c42: 4302 .C ORRS r2,r2,r0 + 0x08001c44: 6808 .h LDR r0,[r1,#0] + 0x08001c46: 6002 .` STR r2,[r0,#0] + 0x08001c48: 2000 . MOVS r0,#0 + 0x08001c4a: 6388 .c STR r0,[r1,#0x38] + 0x08001c4c: 2001 . MOVS r0,#1 + 0x08001c4e: f8810021 ..!. STRB r0,[r1,#0x21] + 0x08001c52: 2000 . MOVS r0,#0 + 0x08001c54: f8810020 .. . STRB r0,[r1,#0x20] + 0x08001c58: bf00 .. NOP + 0x08001c5a: e7c1 .. B 0x8001be0 ; HAL_DMA_Init + 8 + $d + 0x08001c5c: 40020408 ...@ DCD 1073873928 + 0x08001c60: 40020008 ...@ DCD 1073872904 + $t + i.HAL_DMA_Start_IT + HAL_DMA_Start_IT + 0x08001c64: e92d41f0 -..A PUSH {r4-r8,lr} + 0x08001c68: 4604 .F MOV r4,r0 + 0x08001c6a: 460d .F MOV r5,r1 + 0x08001c6c: 4616 .F MOV r6,r2 + 0x08001c6e: 461f .F MOV r7,r3 + 0x08001c70: f04f0800 O... MOV r8,#0 + 0x08001c74: bf00 .. NOP + 0x08001c76: f8940020 .. . LDRB r0,[r4,#0x20] + 0x08001c7a: 2801 .( CMP r0,#1 + 0x08001c7c: d102 .. BNE 0x8001c84 ; HAL_DMA_Start_IT + 32 + 0x08001c7e: 2002 . MOVS r0,#2 + 0x08001c80: e8bd81f0 .... POP {r4-r8,pc} + 0x08001c84: 2001 . MOVS r0,#1 + 0x08001c86: f8840020 .. . STRB r0,[r4,#0x20] + 0x08001c8a: bf00 .. NOP + 0x08001c8c: f8940021 ..!. LDRB r0,[r4,#0x21] + 0x08001c90: 2801 .( CMP r0,#1 + 0x08001c92: d12c ,. BNE 0x8001cee ; HAL_DMA_Start_IT + 138 + 0x08001c94: 2002 . MOVS r0,#2 + 0x08001c96: f8840021 ..!. STRB r0,[r4,#0x21] + 0x08001c9a: 2000 . MOVS r0,#0 + 0x08001c9c: 63a0 .c STR r0,[r4,#0x38] + 0x08001c9e: 6820 h LDR r0,[r4,#0] + 0x08001ca0: 6800 .h LDR r0,[r0,#0] + 0x08001ca2: f0200001 ... BIC r0,r0,#1 + 0x08001ca6: 6821 !h LDR r1,[r4,#0] + 0x08001ca8: 6008 .` STR r0,[r1,#0] + 0x08001caa: 463b ;F MOV r3,r7 + 0x08001cac: 4632 2F MOV r2,r6 + 0x08001cae: 4629 )F MOV r1,r5 + 0x08001cb0: 4620 F MOV r0,r4 + 0x08001cb2: f7fff8b5 .... BL DMA_SetConfig ; 0x8000e20 + 0x08001cb6: 6ae0 .j LDR r0,[r4,#0x2c] + 0x08001cb8: b130 0. CBZ r0,0x8001cc8 ; HAL_DMA_Start_IT + 100 + 0x08001cba: 6820 h LDR r0,[r4,#0] + 0x08001cbc: 6800 .h LDR r0,[r0,#0] + 0x08001cbe: f040000e @... ORR r0,r0,#0xe + 0x08001cc2: 6821 !h LDR r1,[r4,#0] + 0x08001cc4: 6008 .` STR r0,[r1,#0] + 0x08001cc6: e00b .. B 0x8001ce0 ; HAL_DMA_Start_IT + 124 + 0x08001cc8: 6820 h LDR r0,[r4,#0] + 0x08001cca: 6800 .h LDR r0,[r0,#0] + 0x08001ccc: f0200004 ... BIC r0,r0,#4 + 0x08001cd0: 6821 !h LDR r1,[r4,#0] + 0x08001cd2: 6008 .` STR r0,[r1,#0] + 0x08001cd4: 6820 h LDR r0,[r4,#0] + 0x08001cd6: 6800 .h LDR r0,[r0,#0] + 0x08001cd8: f040000a @... ORR r0,r0,#0xa + 0x08001cdc: 6821 !h LDR r1,[r4,#0] + 0x08001cde: 6008 .` STR r0,[r1,#0] + 0x08001ce0: 6820 h LDR r0,[r4,#0] + 0x08001ce2: 6800 .h LDR r0,[r0,#0] + 0x08001ce4: f0400001 @... ORR r0,r0,#1 + 0x08001ce8: 6821 !h LDR r1,[r4,#0] + 0x08001cea: 6008 .` STR r0,[r1,#0] + 0x08001cec: e006 .. B 0x8001cfc ; HAL_DMA_Start_IT + 152 + 0x08001cee: bf00 .. NOP + 0x08001cf0: 2000 . MOVS r0,#0 + 0x08001cf2: f8840020 .. . STRB r0,[r4,#0x20] + 0x08001cf6: bf00 .. NOP + 0x08001cf8: f04f0802 O... MOV r8,#2 + 0x08001cfc: 4640 @F MOV r0,r8 + 0x08001cfe: e7bf .. B 0x8001c80 ; HAL_DMA_Start_IT + 28 + i.HAL_GPIO_DeInit + HAL_GPIO_DeInit + 0x08001d00: e92d41f0 -..A PUSH {r4-r8,lr} + 0x08001d04: 4602 .F MOV r2,r0 + 0x08001d06: 460b .F MOV r3,r1 + 0x08001d08: 2000 . MOVS r0,#0 + 0x08001d0a: e07f .. B 0x8001e0c ; HAL_GPIO_DeInit + 268 + 0x08001d0c: 2701 .' MOVS r7,#1 + 0x08001d0e: 4087 .@ LSLS r7,r7,r0 + 0x08001d10: ea070103 .... AND r1,r7,r3 + 0x08001d14: 2900 .) CMP r1,#0 + 0x08001d16: d078 x. BEQ 0x8001e0a ; HAL_GPIO_DeInit + 266 + 0x08001d18: 4f40 @O LDR r7,[pc,#256] ; [0x8001e1c] = 0x40010008 + 0x08001d1a: ea4f0c90 O... LSR r12,r0,#2 + 0x08001d1e: f857402c W.,@ LDR r4,[r7,r12,LSL #2] + 0x08001d22: 0787 .. LSLS r7,r0,#30 + 0x08001d24: ea4f7c17 O..| LSR r12,r7,#28 + 0x08001d28: 270f .' MOVS r7,#0xf + 0x08001d2a: fa07f70c .... LSL r7,r7,r12 + 0x08001d2e: 403c <@ ANDS r4,r4,r7 + 0x08001d30: 4f3b ;O LDR r7,[pc,#236] ; [0x8001e20] = 0x40010800 + 0x08001d32: 42ba .B CMP r2,r7 + 0x08001d34: d101 .. BNE 0x8001d3a ; HAL_GPIO_DeInit + 58 + 0x08001d36: 2700 .' MOVS r7,#0 + 0x08001d38: e00f .. B 0x8001d5a ; HAL_GPIO_DeInit + 90 + 0x08001d3a: 4f3a :O LDR r7,[pc,#232] ; [0x8001e24] = 0x40010c00 + 0x08001d3c: 42ba .B CMP r2,r7 + 0x08001d3e: d101 .. BNE 0x8001d44 ; HAL_GPIO_DeInit + 68 + 0x08001d40: 2701 .' MOVS r7,#1 + 0x08001d42: e00a .. B 0x8001d5a ; HAL_GPIO_DeInit + 90 + 0x08001d44: 4f38 8O LDR r7,[pc,#224] ; [0x8001e28] = 0x40011000 + 0x08001d46: 42ba .B CMP r2,r7 + 0x08001d48: d101 .. BNE 0x8001d4e ; HAL_GPIO_DeInit + 78 + 0x08001d4a: 2702 .' MOVS r7,#2 + 0x08001d4c: e005 .. B 0x8001d5a ; HAL_GPIO_DeInit + 90 + 0x08001d4e: 4f37 7O LDR r7,[pc,#220] ; [0x8001e2c] = 0x40011400 + 0x08001d50: 42ba .B CMP r2,r7 + 0x08001d52: d101 .. BNE 0x8001d58 ; HAL_GPIO_DeInit + 88 + 0x08001d54: 2703 .' MOVS r7,#3 + 0x08001d56: e000 .. B 0x8001d5a ; HAL_GPIO_DeInit + 90 + 0x08001d58: 2704 .' MOVS r7,#4 + 0x08001d5a: ea4f7c80 O..| LSL r12,r0,#30 + 0x08001d5e: ea4f7c1c O..| LSR r12,r12,#28 + 0x08001d62: fa07f70c .... LSL r7,r7,r12 + 0x08001d66: 42a7 .B CMP r7,r4 + 0x08001d68: d130 0. BNE 0x8001dcc ; HAL_GPIO_DeInit + 204 + 0x08001d6a: 0787 .. LSLS r7,r0,#30 + 0x08001d6c: ea4f7c17 O..| LSR r12,r7,#28 + 0x08001d70: 270f .' MOVS r7,#0xf + 0x08001d72: fa07f40c .... LSL r4,r7,r12 + 0x08001d76: 4f29 )O LDR r7,[pc,#164] ; [0x8001e1c] = 0x40010008 + 0x08001d78: ea4f0c90 O... LSR r12,r0,#2 + 0x08001d7c: f857702c W.,p LDR r7,[r7,r12,LSL #2] + 0x08001d80: 43a7 .C BICS r7,r7,r4 + 0x08001d82: f8dfc098 .... LDR r12,[pc,#152] ; [0x8001e1c] = 0x40010008 + 0x08001d86: ea4f0890 O... LSR r8,r0,#2 + 0x08001d8a: f84c7028 L.(p STR r7,[r12,r8,LSL #2] + 0x08001d8e: 4f28 (O LDR r7,[pc,#160] ; [0x8001e30] = 0x40010400 + 0x08001d90: 683f ?h LDR r7,[r7,#0] + 0x08001d92: 438f .C BICS r7,r7,r1 + 0x08001d94: f8dfc098 .... LDR r12,[pc,#152] ; [0x8001e30] = 0x40010400 + 0x08001d98: f8cc7000 ...p STR r7,[r12,#0] + 0x08001d9c: f10c0704 .... ADD r7,r12,#4 + 0x08001da0: 683f ?h LDR r7,[r7,#0] + 0x08001da2: 438f .C BICS r7,r7,r1 + 0x08001da4: f10c0c04 .... ADD r12,r12,#4 + 0x08001da8: f8cc7000 ...p STR r7,[r12,#0] + 0x08001dac: f10c0704 .... ADD r7,r12,#4 + 0x08001db0: 683f ?h LDR r7,[r7,#0] + 0x08001db2: 438f .C BICS r7,r7,r1 + 0x08001db4: f10c0c04 .... ADD r12,r12,#4 + 0x08001db8: f8cc7000 ...p STR r7,[r12,#0] + 0x08001dbc: f10c0704 .... ADD r7,r12,#4 + 0x08001dc0: 683f ?h LDR r7,[r7,#0] + 0x08001dc2: 438f .C BICS r7,r7,r1 + 0x08001dc4: f10c0c04 .... ADD r12,r12,#4 + 0x08001dc8: f8cc7000 ...p STR r7,[r12,#0] + 0x08001dcc: 29ff .) CMP r1,#0xff + 0x08001dce: d801 .. BHI 0x8001dd4 ; HAL_GPIO_DeInit + 212 + 0x08001dd0: 4617 .F MOV r7,r2 + 0x08001dd2: e000 .. B 0x8001dd6 ; HAL_GPIO_DeInit + 214 + 0x08001dd4: 1d17 .. ADDS r7,r2,#4 + 0x08001dd6: 463d =F MOV r5,r7 + 0x08001dd8: 29ff .) CMP r1,#0xff + 0x08001dda: d801 .. BHI 0x8001de0 ; HAL_GPIO_DeInit + 224 + 0x08001ddc: 0087 .. LSLS r7,r0,#2 + 0x08001dde: e002 .. B 0x8001de6 ; HAL_GPIO_DeInit + 230 + 0x08001de0: f1a00708 .... SUB r7,r0,#8 + 0x08001de4: 00bf .. LSLS r7,r7,#2 + 0x08001de6: 463e >F MOV r6,r7 + 0x08001de8: 682f /h LDR r7,[r5,#0] + 0x08001dea: f04f0c0f O... MOV r12,#0xf + 0x08001dee: fa0cfc06 .... LSL r12,r12,r6 + 0x08001df2: ea27070c '... BIC r7,r7,r12 + 0x08001df6: f04f0c04 O... MOV r12,#4 + 0x08001dfa: fa0cfc06 .... LSL r12,r12,r6 + 0x08001dfe: ea47070c G... ORR r7,r7,r12 + 0x08001e02: 602f /` STR r7,[r5,#0] + 0x08001e04: 68d7 .h LDR r7,[r2,#0xc] + 0x08001e06: 438f .C BICS r7,r7,r1 + 0x08001e08: 60d7 .` STR r7,[r2,#0xc] + 0x08001e0a: 1c40 @. ADDS r0,r0,#1 + 0x08001e0c: fa23f700 #... LSR r7,r3,r0 + 0x08001e10: 2f00 ./ CMP r7,#0 + 0x08001e12: f47faf7b ..{. BNE 0x8001d0c ; HAL_GPIO_DeInit + 12 + 0x08001e16: e8bd81f0 .... POP {r4-r8,pc} + $d + 0x08001e1a: 0000 .. DCW 0 + 0x08001e1c: 40010008 ...@ DCD 1073807368 + 0x08001e20: 40010800 ...@ DCD 1073809408 + 0x08001e24: 40010c00 ...@ DCD 1073810432 + 0x08001e28: 40011000 ...@ DCD 1073811456 + 0x08001e2c: 40011400 ...@ DCD 1073812480 + 0x08001e30: 40010400 ...@ DCD 1073808384 + $t + i.HAL_GPIO_Init + HAL_GPIO_Init + 0x08001e34: e92d47f8 -..G PUSH {r3-r10,lr} + 0x08001e38: 4603 .F MOV r3,r0 + 0x08001e3a: 2200 ." MOVS r2,#0 + 0x08001e3c: 4694 .F MOV r12,r2 + 0x08001e3e: e16e n. B 0x800211e ; HAL_GPIO_Init + 746 + 0x08001e40: f04f0801 O... MOV r8,#1 + 0x08001e44: fa08f402 .... LSL r4,r8,r2 + 0x08001e48: f8d18000 .... LDR r8,[r1,#0] + 0x08001e4c: ea080004 .... AND r0,r8,r4 + 0x08001e50: 42a0 .B CMP r0,r4 + 0x08001e52: d17d }. BNE 0x8001f50 ; HAL_GPIO_Init + 284 + 0x08001e54: f8dfa2dc .... LDR r10,[pc,#732] ; [0x8002134] = 0x10110000 + 0x08001e58: f8d18004 .... LDR r8,[r1,#4] + 0x08001e5c: eba8090a .... SUB r9,r8,r10 + 0x08001e60: 45d0 .E CMP r8,r10 + 0x08001e62: d03a :. BEQ 0x8001eda ; HAL_GPIO_Init + 166 + 0x08001e64: dc14 .. BGT 0x8001e90 ; HAL_GPIO_Init + 92 + 0x08001e66: f1b80f03 .... CMP r8,#3 + 0x08001e6a: d050 P. BEQ 0x8001f0e ; HAL_GPIO_Init + 218 + 0x08001e6c: dc09 .. BGT 0x8001e82 ; HAL_GPIO_Init + 78 + 0x08001e6e: f1b80f00 .... CMP r8,#0 + 0x08001e72: d031 1. BEQ 0x8001ed8 ; HAL_GPIO_Init + 164 + 0x08001e74: f1b80f01 .... CMP r8,#1 + 0x08001e78: d01c .. BEQ 0x8001eb4 ; HAL_GPIO_Init + 128 + 0x08001e7a: f1b80f02 .... CMP r8,#2 + 0x08001e7e: d149 I. BNE 0x8001f14 ; HAL_GPIO_Init + 224 + 0x08001e80: e020 . B 0x8001ec4 ; HAL_GPIO_Init + 144 + 0x08001e82: f1b80f11 .... CMP r8,#0x11 + 0x08001e86: d018 .. BEQ 0x8001eba ; HAL_GPIO_Init + 134 + 0x08001e88: f1b80f12 .... CMP r8,#0x12 + 0x08001e8c: d142 B. BNE 0x8001f14 ; HAL_GPIO_Init + 224 + 0x08001e8e: e01e .. B 0x8001ece ; HAL_GPIO_Init + 154 + 0x08001e90: f5b91f88 .... CMP r9,#0x110000 + 0x08001e94: d025 %. BEQ 0x8001ee2 ; HAL_GPIO_Init + 174 + 0x08001e96: dc06 .. BGT 0x8001ea6 ; HAL_GPIO_Init + 114 + 0x08001e98: f5b93f80 ...? CMP r9,#0x10000 + 0x08001e9c: d020 . BEQ 0x8001ee0 ; HAL_GPIO_Init + 172 + 0x08001e9e: f5b91f80 .... CMP r9,#0x100000 + 0x08001ea2: d137 7. BNE 0x8001f14 ; HAL_GPIO_Init + 224 + 0x08001ea4: e01a .. B 0x8001edc ; HAL_GPIO_Init + 168 + 0x08001ea6: f5b91f00 .... CMP r9,#0x200000 + 0x08001eaa: d018 .. BEQ 0x8001ede ; HAL_GPIO_Init + 170 + 0x08001eac: f5b91f04 .... CMP r9,#0x210000 + 0x08001eb0: d130 0. BNE 0x8001f14 ; HAL_GPIO_Init + 224 + 0x08001eb2: e017 .. B 0x8001ee4 ; HAL_GPIO_Init + 176 + 0x08001eb4: f8d1c00c .... LDR r12,[r1,#0xc] + 0x08001eb8: e02d -. B 0x8001f16 ; HAL_GPIO_Init + 226 + 0x08001eba: f8d1800c .... LDR r8,[r1,#0xc] + 0x08001ebe: f1080c04 .... ADD r12,r8,#4 + 0x08001ec2: e028 (. B 0x8001f16 ; HAL_GPIO_Init + 226 + 0x08001ec4: f8d1800c .... LDR r8,[r1,#0xc] + 0x08001ec8: f1080c08 .... ADD r12,r8,#8 + 0x08001ecc: e023 #. B 0x8001f16 ; HAL_GPIO_Init + 226 + 0x08001ece: f8d1800c .... LDR r8,[r1,#0xc] + 0x08001ed2: f1080c0c .... ADD r12,r8,#0xc + 0x08001ed6: e01e .. B 0x8001f16 ; HAL_GPIO_Init + 226 + 0x08001ed8: bf00 .. NOP + 0x08001eda: bf00 .. NOP + 0x08001edc: bf00 .. NOP + 0x08001ede: bf00 .. NOP + 0x08001ee0: bf00 .. NOP + 0x08001ee2: bf00 .. NOP + 0x08001ee4: f8d18008 .... LDR r8,[r1,#8] + 0x08001ee8: f1b80f00 .... CMP r8,#0 + 0x08001eec: d102 .. BNE 0x8001ef4 ; HAL_GPIO_Init + 192 + 0x08001eee: f04f0c04 O... MOV r12,#4 + 0x08001ef2: e00b .. B 0x8001f0c ; HAL_GPIO_Init + 216 + 0x08001ef4: f8d18008 .... LDR r8,[r1,#8] + 0x08001ef8: f1b80f01 .... CMP r8,#1 + 0x08001efc: d103 .. BNE 0x8001f06 ; HAL_GPIO_Init + 210 + 0x08001efe: f04f0c08 O... MOV r12,#8 + 0x08001f02: 611c .a STR r4,[r3,#0x10] + 0x08001f04: e002 .. B 0x8001f0c ; HAL_GPIO_Init + 216 + 0x08001f06: f04f0c08 O... MOV r12,#8 + 0x08001f0a: 615c \a STR r4,[r3,#0x14] + 0x08001f0c: e003 .. B 0x8001f16 ; HAL_GPIO_Init + 226 + 0x08001f0e: f04f0c00 O... MOV r12,#0 + 0x08001f12: e000 .. B 0x8001f16 ; HAL_GPIO_Init + 226 + 0x08001f14: bf00 .. NOP + 0x08001f16: bf00 .. NOP + 0x08001f18: 28ff .( CMP r0,#0xff + 0x08001f1a: d801 .. BHI 0x8001f20 ; HAL_GPIO_Init + 236 + 0x08001f1c: 4698 .F MOV r8,r3 + 0x08001f1e: e001 .. B 0x8001f24 ; HAL_GPIO_Init + 240 + 0x08001f20: f1030804 .... ADD r8,r3,#4 + 0x08001f24: 4646 FF MOV r6,r8 + 0x08001f26: 28ff .( CMP r0,#0xff + 0x08001f28: d802 .. BHI 0x8001f30 ; HAL_GPIO_Init + 252 + 0x08001f2a: ea4f0882 O... LSL r8,r2,#2 + 0x08001f2e: e003 .. B 0x8001f38 ; HAL_GPIO_Init + 260 + 0x08001f30: f1a20808 .... SUB r8,r2,#8 + 0x08001f34: ea4f0888 O... LSL r8,r8,#2 + 0x08001f38: 4647 GF MOV r7,r8 + 0x08001f3a: f8d68000 .... LDR r8,[r6,#0] + 0x08001f3e: f04f090f O... MOV r9,#0xf + 0x08001f42: fa09f907 .... LSL r9,r9,r7 + 0x08001f46: ea280809 (... BIC r8,r8,r9 + 0x08001f4a: fa0cf907 .... LSL r9,r12,r7 + 0x08001f4e: e000 .. B 0x8001f52 ; HAL_GPIO_Init + 286 + 0x08001f50: e088 .. B 0x8002064 ; HAL_GPIO_Init + 560 + 0x08001f52: ea480809 H... ORR r8,r8,r9 + 0x08001f56: f8c68000 .... STR r8,[r6,#0] + 0x08001f5a: f8d18004 .... LDR r8,[r1,#4] + 0x08001f5e: f0085880 ...X AND r8,r8,#0x10000000 + 0x08001f62: f1b85f80 ..._ CMP r8,#0x10000000 + 0x08001f66: d17d }. BNE 0x8002064 ; HAL_GPIO_Init + 560 + 0x08001f68: bf00 .. NOP + 0x08001f6a: f8df81cc .... LDR r8,[pc,#460] ; [0x8002138] = 0x40021000 + 0x08001f6e: f8d88018 .... LDR r8,[r8,#0x18] + 0x08001f72: f0480801 H... ORR r8,r8,#1 + 0x08001f76: f8df91c0 .... LDR r9,[pc,#448] ; [0x8002138] = 0x40021000 + 0x08001f7a: f8c98018 .... STR r8,[r9,#0x18] + 0x08001f7e: 46c8 .F MOV r8,r9 + 0x08001f80: f8d88018 .... LDR r8,[r8,#0x18] + 0x08001f84: f0080801 .... AND r8,r8,#1 + 0x08001f88: f8cd8000 .... STR r8,[sp,#0] + 0x08001f8c: bf00 .. NOP + 0x08001f8e: bf00 .. NOP + 0x08001f90: ea4f38b9 O..8 ROR r8,r9,#14 + 0x08001f94: ea4f0992 O... LSR r9,r2,#2 + 0x08001f98: f8585029 X.)P LDR r5,[r8,r9,LSL #2] + 0x08001f9c: ea4f7882 O..x LSL r8,r2,#30 + 0x08001fa0: ea4f7918 O..y LSR r9,r8,#28 + 0x08001fa4: f04f080f O... MOV r8,#0xf + 0x08001fa8: fa08f809 .... LSL r8,r8,r9 + 0x08001fac: ea250508 %... BIC r5,r5,r8 + 0x08001fb0: f8df8188 .... LDR r8,[pc,#392] ; [0x800213c] = 0x40010800 + 0x08001fb4: 4543 CE CMP r3,r8 + 0x08001fb6: d102 .. BNE 0x8001fbe ; HAL_GPIO_Init + 394 + 0x08001fb8: f04f0800 O... MOV r8,#0 + 0x08001fbc: e016 .. B 0x8001fec ; HAL_GPIO_Init + 440 + 0x08001fbe: f8df8180 .... LDR r8,[pc,#384] ; [0x8002140] = 0x40010c00 + 0x08001fc2: 4543 CE CMP r3,r8 + 0x08001fc4: d102 .. BNE 0x8001fcc ; HAL_GPIO_Init + 408 + 0x08001fc6: f04f0801 O... MOV r8,#1 + 0x08001fca: e00f .. B 0x8001fec ; HAL_GPIO_Init + 440 + 0x08001fcc: f8df8174 ..t. LDR r8,[pc,#372] ; [0x8002144] = 0x40011000 + 0x08001fd0: 4543 CE CMP r3,r8 + 0x08001fd2: d102 .. BNE 0x8001fda ; HAL_GPIO_Init + 422 + 0x08001fd4: f04f0802 O... MOV r8,#2 + 0x08001fd8: e008 .. B 0x8001fec ; HAL_GPIO_Init + 440 + 0x08001fda: f8df816c ..l. LDR r8,[pc,#364] ; [0x8002148] = 0x40011400 + 0x08001fde: 4543 CE CMP r3,r8 + 0x08001fe0: d102 .. BNE 0x8001fe8 ; HAL_GPIO_Init + 436 + 0x08001fe2: f04f0803 O... MOV r8,#3 + 0x08001fe6: e001 .. B 0x8001fec ; HAL_GPIO_Init + 440 + 0x08001fe8: f04f0804 O... MOV r8,#4 + 0x08001fec: ea4f7982 O..y LSL r9,r2,#30 + 0x08001ff0: ea4f7919 O..y LSR r9,r9,#28 + 0x08001ff4: fa08f809 .... LSL r8,r8,r9 + 0x08001ff8: ea480505 H... ORR r5,r8,r5 + 0x08001ffc: f8df814c ..L. LDR r8,[pc,#332] ; [0x800214c] = 0x40010008 + 0x08002000: ea4f0992 O... LSR r9,r2,#2 + 0x08002004: f8485029 H.)P STR r5,[r8,r9,LSL #2] + 0x08002008: f8d18004 .... LDR r8,[r1,#4] + 0x0800200c: f4083880 ...8 AND r8,r8,#0x10000 + 0x08002010: f5b83f80 ...? CMP r8,#0x10000 + 0x08002014: d10a .. BNE 0x800202c ; HAL_GPIO_Init + 504 + 0x08002016: f8df8138 ..8. LDR r8,[pc,#312] ; [0x8002150] = 0x40010400 + 0x0800201a: f8d88000 .... LDR r8,[r8,#0] + 0x0800201e: ea480800 H... ORR r8,r8,r0 + 0x08002022: f8df912c ..,. LDR r9,[pc,#300] ; [0x8002150] = 0x40010400 + 0x08002026: f8c98000 .... STR r8,[r9,#0] + 0x0800202a: e009 .. B 0x8002040 ; HAL_GPIO_Init + 524 + 0x0800202c: f8df8120 .. . LDR r8,[pc,#288] ; [0x8002150] = 0x40010400 + 0x08002030: f8d88000 .... LDR r8,[r8,#0] + 0x08002034: ea280800 (... BIC r8,r8,r0 + 0x08002038: f8df9114 .... LDR r9,[pc,#276] ; [0x8002150] = 0x40010400 + 0x0800203c: f8c98000 .... STR r8,[r9,#0] + 0x08002040: f8d18004 .... LDR r8,[r1,#4] + 0x08002044: f4083800 ...8 AND r8,r8,#0x20000 + 0x08002048: f5b83f00 ...? CMP r8,#0x20000 + 0x0800204c: d110 .. BNE 0x8002070 ; HAL_GPIO_Init + 572 + 0x0800204e: f8df8100 .... LDR r8,[pc,#256] ; [0x8002150] = 0x40010400 + 0x08002052: f1080804 .... ADD r8,r8,#4 + 0x08002056: f8d88000 .... LDR r8,[r8,#0] + 0x0800205a: ea480800 H... ORR r8,r8,r0 + 0x0800205e: f8df90f0 .... LDR r9,[pc,#240] ; [0x8002150] = 0x40010400 + 0x08002062: e000 .. B 0x8002066 ; HAL_GPIO_Init + 562 + 0x08002064: e05a Z. B 0x800211c ; HAL_GPIO_Init + 744 + 0x08002066: f1090904 .... ADD r9,r9,#4 + 0x0800206a: f8c98000 .... STR r8,[r9,#0] + 0x0800206e: e00d .. B 0x800208c ; HAL_GPIO_Init + 600 + 0x08002070: f8df80dc .... LDR r8,[pc,#220] ; [0x8002150] = 0x40010400 + 0x08002074: f1080804 .... ADD r8,r8,#4 + 0x08002078: f8d88000 .... LDR r8,[r8,#0] + 0x0800207c: ea280800 (... BIC r8,r8,r0 + 0x08002080: f8df90cc .... LDR r9,[pc,#204] ; [0x8002150] = 0x40010400 + 0x08002084: f1090904 .... ADD r9,r9,#4 + 0x08002088: f8c98000 .... STR r8,[r9,#0] + 0x0800208c: f8d18004 .... LDR r8,[r1,#4] + 0x08002090: f4081880 .... AND r8,r8,#0x100000 + 0x08002094: f5b81f80 .... CMP r8,#0x100000 + 0x08002098: d10e .. BNE 0x80020b8 ; HAL_GPIO_Init + 644 + 0x0800209a: f8df80b4 .... LDR r8,[pc,#180] ; [0x8002150] = 0x40010400 + 0x0800209e: f1080808 .... ADD r8,r8,#8 + 0x080020a2: f8d88000 .... LDR r8,[r8,#0] + 0x080020a6: ea480800 H... ORR r8,r8,r0 + 0x080020aa: f8df90a4 .... LDR r9,[pc,#164] ; [0x8002150] = 0x40010400 + 0x080020ae: f1090908 .... ADD r9,r9,#8 + 0x080020b2: f8c98000 .... STR r8,[r9,#0] + 0x080020b6: e00d .. B 0x80020d4 ; HAL_GPIO_Init + 672 + 0x080020b8: f8df8094 .... LDR r8,[pc,#148] ; [0x8002150] = 0x40010400 + 0x080020bc: f1080808 .... ADD r8,r8,#8 + 0x080020c0: f8d88000 .... LDR r8,[r8,#0] + 0x080020c4: ea280800 (... BIC r8,r8,r0 + 0x080020c8: f8df9084 .... LDR r9,[pc,#132] ; [0x8002150] = 0x40010400 + 0x080020cc: f1090908 .... ADD r9,r9,#8 + 0x080020d0: f8c98000 .... STR r8,[r9,#0] + 0x080020d4: f8d18004 .... LDR r8,[r1,#4] + 0x080020d8: f4081800 .... AND r8,r8,#0x200000 + 0x080020dc: f5b81f00 .... CMP r8,#0x200000 + 0x080020e0: d10e .. BNE 0x8002100 ; HAL_GPIO_Init + 716 + 0x080020e2: f8df806c ..l. LDR r8,[pc,#108] ; [0x8002150] = 0x40010400 + 0x080020e6: f108080c .... ADD r8,r8,#0xc + 0x080020ea: f8d88000 .... LDR r8,[r8,#0] + 0x080020ee: ea480800 H... ORR r8,r8,r0 + 0x080020f2: f8df905c ..\. LDR r9,[pc,#92] ; [0x8002150] = 0x40010400 + 0x080020f6: f109090c .... ADD r9,r9,#0xc + 0x080020fa: f8c98000 .... STR r8,[r9,#0] + 0x080020fe: e00d .. B 0x800211c ; HAL_GPIO_Init + 744 + 0x08002100: f8df804c ..L. LDR r8,[pc,#76] ; [0x8002150] = 0x40010400 + 0x08002104: f108080c .... ADD r8,r8,#0xc + 0x08002108: f8d88000 .... LDR r8,[r8,#0] + 0x0800210c: ea280800 (... BIC r8,r8,r0 + 0x08002110: f8df903c ..<. LDR r9,[pc,#60] ; [0x8002150] = 0x40010400 + 0x08002114: f109090c .... ADD r9,r9,#0xc + 0x08002118: f8c98000 .... STR r8,[r9,#0] + 0x0800211c: 1c52 R. ADDS r2,r2,#1 + 0x0800211e: f8d18000 .... LDR r8,[r1,#0] + 0x08002122: fa28f802 (... LSR r8,r8,r2 + 0x08002126: f1b80f00 .... CMP r8,#0 + 0x0800212a: f47fae89 .... BNE 0x8001e40 ; HAL_GPIO_Init + 12 + 0x0800212e: e8bd87f8 .... POP {r3-r10,pc} + $d + 0x08002132: 0000 .. DCW 0 + 0x08002134: 10110000 .... DCD 269549568 + 0x08002138: 40021000 ...@ DCD 1073876992 + 0x0800213c: 40010800 ...@ DCD 1073809408 + 0x08002140: 40010c00 ...@ DCD 1073810432 + 0x08002144: 40011000 ...@ DCD 1073811456 + 0x08002148: 40011400 ...@ DCD 1073812480 + 0x0800214c: 40010008 ...@ DCD 1073807368 + 0x08002150: 40010400 ...@ DCD 1073808384 + $t + i.HAL_GPIO_WritePin + HAL_GPIO_WritePin + 0x08002154: b10a .. CBZ r2,0x800215a ; HAL_GPIO_WritePin + 6 + 0x08002156: 6101 .a STR r1,[r0,#0x10] + 0x08002158: e001 .. B 0x800215e ; HAL_GPIO_WritePin + 10 + 0x0800215a: 040b .. LSLS r3,r1,#16 + 0x0800215c: 6103 .a STR r3,[r0,#0x10] + 0x0800215e: 4770 pG BX lr + i.HAL_GetTick + HAL_GetTick + 0x08002160: 4801 .H LDR r0,[pc,#4] ; [0x8002168] = 0x20000248 + 0x08002162: 6800 .h LDR r0,[r0,#0] + 0x08002164: 4770 pG BX lr + $d + 0x08002166: 0000 .. DCW 0 + 0x08002168: 20000248 H.. DCD 536871496 + $t + i.HAL_IncTick + HAL_IncTick + 0x0800216c: 4803 .H LDR r0,[pc,#12] ; [0x800217c] = 0x20000248 + 0x0800216e: 6800 .h LDR r0,[r0,#0] + 0x08002170: 4903 .I LDR r1,[pc,#12] ; [0x8002180] = 0x20000250 + 0x08002172: 7809 .x LDRB r1,[r1,#0] + 0x08002174: 4408 .D ADD r0,r0,r1 + 0x08002176: 4901 .I LDR r1,[pc,#4] ; [0x800217c] = 0x20000248 + 0x08002178: 6008 .` STR r0,[r1,#0] + 0x0800217a: 4770 pG BX lr + $d + 0x0800217c: 20000248 H.. DCD 536871496 + 0x08002180: 20000250 P.. DCD 536871504 + $t + i.HAL_Init + HAL_Init + 0x08002184: b510 .. PUSH {r4,lr} + 0x08002186: 4808 .H LDR r0,[pc,#32] ; [0x80021a8] = 0x40022000 + 0x08002188: 6800 .h LDR r0,[r0,#0] + 0x0800218a: f0400010 @... ORR r0,r0,#0x10 + 0x0800218e: 4906 .I LDR r1,[pc,#24] ; [0x80021a8] = 0x40022000 + 0x08002190: 6008 .` STR r0,[r1,#0] + 0x08002192: 2003 . MOVS r0,#3 + 0x08002194: f000f904 .... BL HAL_NVIC_SetPriorityGrouping ; 0x80023a0 + 0x08002198: 200f . MOVS r0,#0xf + 0x0800219a: f000f807 .... BL HAL_InitTick ; 0x80021ac + 0x0800219e: f000f85f .._. BL HAL_MspInit ; 0x8002260 + 0x080021a2: 2000 . MOVS r0,#0 + 0x080021a4: bd10 .. POP {r4,pc} + $d + 0x080021a6: 0000 .. DCW 0 + 0x080021a8: 40022000 . .@ DCD 1073881088 + $t + i.HAL_InitTick + HAL_InitTick + 0x080021ac: e92d41f0 -..A PUSH {r4-r8,lr} + 0x080021b0: b088 .. SUB sp,sp,#0x20 + 0x080021b2: 4604 .F MOV r4,r0 + 0x080021b4: 2700 .' MOVS r7,#0 + 0x080021b6: 46b8 .F MOV r8,r7 + 0x080021b8: 2600 .& MOVS r6,#0 + 0x080021ba: bf00 .. NOP + 0x080021bc: 4823 #H LDR r0,[pc,#140] ; [0x800224c] = 0x40021000 + 0x080021be: 69c0 .i LDR r0,[r0,#0x1c] + 0x080021c0: f0400020 @. . ORR r0,r0,#0x20 + 0x080021c4: 4921 !I LDR r1,[pc,#132] ; [0x800224c] = 0x40021000 + 0x080021c6: 61c8 .a STR r0,[r1,#0x1c] + 0x080021c8: 4608 .F MOV r0,r1 + 0x080021ca: 69c0 .i LDR r0,[r0,#0x1c] + 0x080021cc: f0000020 .. . AND r0,r0,#0x20 + 0x080021d0: 9001 .. STR r0,[sp,#4] + 0x080021d2: bf00 .. NOP + 0x080021d4: bf00 .. NOP + 0x080021d6: a902 .. ADD r1,sp,#8 + 0x080021d8: a803 .. ADD r0,sp,#0xc + 0x080021da: f000fbd7 .... BL HAL_RCC_GetClockConfig ; 0x800298c + 0x080021de: 9f06 .. LDR r7,[sp,#0x18] + 0x080021e0: b91f .. CBNZ r7,0x80021ea ; HAL_InitTick + 62 + 0x080021e2: f000fbfb .... BL HAL_RCC_GetPCLK1Freq ; 0x80029dc + 0x080021e6: 4605 .F MOV r5,r0 + 0x080021e8: e002 .. B 0x80021f0 ; HAL_InitTick + 68 + 0x080021ea: f000fbf7 .... BL HAL_RCC_GetPCLK1Freq ; 0x80029dc + 0x080021ee: 0045 E. LSLS r5,r0,#1 + 0x080021f0: 4817 .H LDR r0,[pc,#92] ; [0x8002250] = 0xf4240 + 0x080021f2: fbb5f0f0 .... UDIV r0,r5,r0 + 0x080021f6: f1a00801 .... SUB r8,r0,#1 + 0x080021fa: 4816 .H LDR r0,[pc,#88] ; [0x8002254] = 0x40001400 + 0x080021fc: 4916 .I LDR r1,[pc,#88] ; [0x8002258] = 0x20000918 + 0x080021fe: 6008 .` STR r0,[r1,#0] + 0x08002200: f24031e7 @..1 MOV r1,#0x3e7 + 0x08002204: 4814 .H LDR r0,[pc,#80] ; [0x8002258] = 0x20000918 + 0x08002206: 60c1 .` STR r1,[r0,#0xc] + 0x08002208: f8c08004 .... STR r8,[r0,#4] + 0x0800220c: 2100 .! MOVS r1,#0 + 0x0800220e: 6101 .a STR r1,[r0,#0x10] + 0x08002210: 6081 .` STR r1,[r0,#8] + 0x08002212: 6181 .a STR r1,[r0,#0x18] + 0x08002214: f000ff96 .... BL HAL_TIM_Base_Init ; 0x8003144 + 0x08002218: 4606 .F MOV r6,r0 + 0x0800221a: b996 .. CBNZ r6,0x8002242 ; HAL_InitTick + 150 + 0x0800221c: 480e .H LDR r0,[pc,#56] ; [0x8002258] = 0x20000918 + 0x0800221e: f000ffef .... BL HAL_TIM_Base_Start_IT ; 0x8003200 + 0x08002222: 4606 .F MOV r6,r0 + 0x08002224: b96e n. CBNZ r6,0x8002242 ; HAL_InitTick + 150 + 0x08002226: 2037 7 MOVS r0,#0x37 + 0x08002228: f000f86c ..l. BL HAL_NVIC_EnableIRQ ; 0x8002304 + 0x0800222c: 2c10 ., CMP r4,#0x10 + 0x0800222e: d207 .. BCS 0x8002240 ; HAL_InitTick + 148 + 0x08002230: 2200 ." MOVS r2,#0 + 0x08002232: 4621 !F MOV r1,r4 + 0x08002234: 2037 7 MOVS r0,#0x37 + 0x08002236: f000f875 ..u. BL HAL_NVIC_SetPriority ; 0x8002324 + 0x0800223a: 4808 .H LDR r0,[pc,#32] ; [0x800225c] = 0x2000024c + 0x0800223c: 6004 .` STR r4,[r0,#0] + 0x0800223e: e000 .. B 0x8002242 ; HAL_InitTick + 150 + 0x08002240: 2601 .& MOVS r6,#1 + 0x08002242: 4630 0F MOV r0,r6 + 0x08002244: b008 .. ADD sp,sp,#0x20 + 0x08002246: e8bd81f0 .... POP {r4-r8,pc} + $d + 0x0800224a: 0000 .. DCW 0 + 0x0800224c: 40021000 ...@ DCD 1073876992 + 0x08002250: 000f4240 @B.. DCD 1000000 + 0x08002254: 40001400 ...@ DCD 1073746944 + 0x08002258: 20000918 ... DCD 536873240 + 0x0800225c: 2000024c L.. DCD 536871500 + $t + i.HAL_MspInit + HAL_MspInit + 0x08002260: b508 .. PUSH {r3,lr} + 0x08002262: bf00 .. NOP + 0x08002264: 4814 .H LDR r0,[pc,#80] ; [0x80022b8] = 0x40021000 + 0x08002266: 6980 .i LDR r0,[r0,#0x18] + 0x08002268: f0400001 @... ORR r0,r0,#1 + 0x0800226c: 4912 .I LDR r1,[pc,#72] ; [0x80022b8] = 0x40021000 + 0x0800226e: 6188 .a STR r0,[r1,#0x18] + 0x08002270: 4608 .F MOV r0,r1 + 0x08002272: 6980 .i LDR r0,[r0,#0x18] + 0x08002274: f0000001 .... AND r0,r0,#1 + 0x08002278: 9000 .. STR r0,[sp,#0] + 0x0800227a: bf00 .. NOP + 0x0800227c: bf00 .. NOP + 0x0800227e: bf00 .. NOP + 0x08002280: 4608 .F MOV r0,r1 + 0x08002282: 69c0 .i LDR r0,[r0,#0x1c] + 0x08002284: f0405080 @..P ORR r0,r0,#0x10000000 + 0x08002288: 61c8 .a STR r0,[r1,#0x1c] + 0x0800228a: 4608 .F MOV r0,r1 + 0x0800228c: 69c0 .i LDR r0,[r0,#0x1c] + 0x0800228e: f0005080 ...P AND r0,r0,#0x10000000 + 0x08002292: 9000 .. STR r0,[sp,#0] + 0x08002294: bf00 .. NOP + 0x08002296: bf00 .. NOP + 0x08002298: 2200 ." MOVS r2,#0 + 0x0800229a: 210f .! MOVS r1,#0xf + 0x0800229c: 1e90 .. SUBS r0,r2,#2 + 0x0800229e: f000f841 ..A. BL HAL_NVIC_SetPriority ; 0x8002324 + 0x080022a2: bf00 .. NOP + 0x080022a4: 4905 .I LDR r1,[pc,#20] ; [0x80022bc] = 0x40010000 + 0x080022a6: 6848 Hh LDR r0,[r1,#4] + 0x080022a8: f02060e0 ..` BIC r0,r0,#0x7000000 + 0x080022ac: f0407000 @..p ORR r0,r0,#0x2000000 + 0x080022b0: 6048 H` STR r0,[r1,#4] + 0x080022b2: bf00 .. NOP + 0x080022b4: bd08 .. POP {r3,pc} + $d + 0x080022b6: 0000 .. DCW 0 + 0x080022b8: 40021000 ...@ DCD 1073876992 + 0x080022bc: 40010000 ...@ DCD 1073807360 + $t + i.HAL_NVIC_DisableIRQ + HAL_NVIC_DisableIRQ + 0x080022c0: b510 .. PUSH {r4,lr} + 0x080022c2: 4601 .F MOV r1,r0 + 0x080022c4: 4608 .F MOV r0,r1 + 0x080022c6: 2800 .( CMP r0,#0 + 0x080022c8: db17 .. BLT 0x80022fa ; HAL_NVIC_DisableIRQ + 58 + 0x080022ca: f000031f .... AND r3,r0,#0x1f + 0x080022ce: 2201 ." MOVS r2,#1 + 0x080022d0: 409a .@ LSLS r2,r2,r3 + 0x080022d2: 4b0b .K LDR r3,[pc,#44] ; [0x8002300] = 0xe000e180 + 0x080022d4: 0944 D. LSRS r4,r0,#5 + 0x080022d6: f8432024 C.$ STR r2,[r3,r4,LSL #2] + 0x080022da: bf00 .. NOP + 0x080022dc: bf00 .. NOP + 0x080022de: bf00 .. NOP + 0x080022e0: f3bf8f4f ..O. DSB + 0x080022e4: bf00 .. NOP + 0x080022e6: bf00 .. NOP + 0x080022e8: bf00 .. NOP + 0x080022ea: bf00 .. NOP + 0x080022ec: bf00 .. NOP + 0x080022ee: bf00 .. NOP + 0x080022f0: f3bf8f6f ..o. ISB + 0x080022f4: bf00 .. NOP + 0x080022f6: bf00 .. NOP + 0x080022f8: bf00 .. NOP + 0x080022fa: bf00 .. NOP + 0x080022fc: bd10 .. POP {r4,pc} + $d + 0x080022fe: 0000 .. DCW 0 + 0x08002300: e000e180 .... DCD 3758154112 + $t + i.HAL_NVIC_EnableIRQ + HAL_NVIC_EnableIRQ + 0x08002304: 4601 .F MOV r1,r0 + 0x08002306: 4608 .F MOV r0,r1 + 0x08002308: 2800 .( CMP r0,#0 + 0x0800230a: db09 .. BLT 0x8002320 ; HAL_NVIC_EnableIRQ + 28 + 0x0800230c: f000031f .... AND r3,r0,#0x1f + 0x08002310: 2201 ." MOVS r2,#1 + 0x08002312: 409a .@ LSLS r2,r2,r3 + 0x08002314: 0943 C. LSRS r3,r0,#5 + 0x08002316: 009b .. LSLS r3,r3,#2 + 0x08002318: f10323e0 ...# ADD r3,r3,#0xe000e000 + 0x0800231c: f8c32100 ...! STR r2,[r3,#0x100] + 0x08002320: bf00 .. NOP + 0x08002322: 4770 pG BX lr + i.HAL_NVIC_SetPriority + HAL_NVIC_SetPriority + 0x08002324: e92d5ff0 -.._ PUSH {r4-r12,lr} + 0x08002328: 4680 .F MOV r8,r0 + 0x0800232a: 460d .F MOV r5,r1 + 0x0800232c: 4616 .F MOV r6,r2 + 0x0800232e: 2700 .' MOVS r7,#0 + 0x08002330: f003fa0e .... BL __NVIC_GetPriorityGrouping ; 0x8005750 + 0x08002334: 4607 .F MOV r7,r0 + 0x08002336: 4639 9F MOV r1,r7 + 0x08002338: 462a *F MOV r2,r5 + 0x0800233a: 4633 3F MOV r3,r6 + 0x0800233c: f0010007 .... AND r0,r1,#7 + 0x08002340: f1c00a07 .... RSB r10,r0,#7 + 0x08002344: f1ba0f04 .... CMP r10,#4 + 0x08002348: d902 .. BLS 0x8002350 ; HAL_NVIC_SetPriority + 44 + 0x0800234a: f04f0a04 O... MOV r10,#4 + 0x0800234e: e001 .. B 0x8002354 ; HAL_NVIC_SetPriority + 48 + 0x08002350: f1c00a07 .... RSB r10,r0,#7 + 0x08002354: 46d1 .F MOV r9,r10 + 0x08002356: f1000a04 .... ADD r10,r0,#4 + 0x0800235a: f1ba0f07 .... CMP r10,#7 + 0x0800235e: d202 .. BCS 0x8002366 ; HAL_NVIC_SetPriority + 66 + 0x08002360: f04f0a00 O... MOV r10,#0 + 0x08002364: e001 .. B 0x800236a ; HAL_NVIC_SetPriority + 70 + 0x08002366: f1a00a03 .... SUB r10,r0,#3 + 0x0800236a: 46d4 .F MOV r12,r10 + 0x0800236c: f04f0a01 O... MOV r10,#1 + 0x08002370: fa0afa09 .... LSL r10,r10,r9 + 0x08002374: f1aa0a01 .... SUB r10,r10,#1 + 0x08002378: ea0a0a02 .... AND r10,r10,r2 + 0x0800237c: fa0afa0c .... LSL r10,r10,r12 + 0x08002380: f04f0b01 O... MOV r11,#1 + 0x08002384: fa0bfb0c .... LSL r11,r11,r12 + 0x08002388: f1ab0b01 .... SUB r11,r11,#1 + 0x0800238c: ea0b0b03 .... AND r11,r11,r3 + 0x08002390: ea4a040b J... ORR r4,r10,r11 + 0x08002394: 4621 !F MOV r1,r4 + 0x08002396: 4640 @F MOV r0,r8 + 0x08002398: f003f9e2 .... BL __NVIC_SetPriority ; 0x8005760 + 0x0800239c: e8bd9ff0 .... POP {r4-r12,pc} + i.HAL_NVIC_SetPriorityGrouping + HAL_NVIC_SetPriorityGrouping + 0x080023a0: bf00 .. NOP + 0x080023a2: f0000207 .... AND r2,r0,#7 + 0x080023a6: 4b06 .K LDR r3,[pc,#24] ; [0x80023c0] = 0xe000ed0c + 0x080023a8: 6819 .h LDR r1,[r3,#0] + 0x080023aa: f64f03ff O... MOV r3,#0xf8ff + 0x080023ae: 4019 .@ ANDS r1,r1,r3 + 0x080023b0: 4b04 .K LDR r3,[pc,#16] ; [0x80023c4] = 0x5fa0000 + 0x080023b2: 430b .C ORRS r3,r3,r1 + 0x080023b4: ea432102 C..! ORR r1,r3,r2,LSL #8 + 0x080023b8: 4b01 .K LDR r3,[pc,#4] ; [0x80023c0] = 0xe000ed0c + 0x080023ba: 6019 .` STR r1,[r3,#0] + 0x080023bc: bf00 .. NOP + 0x080023be: 4770 pG BX lr + $d + 0x080023c0: e000ed0c .... DCD 3758157068 + 0x080023c4: 05fa0000 .... DCD 100270080 + $t + i.HAL_RCCEx_GetPeriphCLKFreq + HAL_RCCEx_GetPeriphCLKFreq + 0x080023c8: e92d4ff0 -..O PUSH {r4-r11,lr} + 0x080023cc: b089 .. SUB sp,sp,#0x24 + 0x080023ce: 4680 .F MOV r8,r0 + 0x080023d0: a17c |. ADR r1,{pc}+0x1f4 ; 0x80025c4 + 0x080023d2: e9d12300 ...# LDRD r2,r3,[r1,#0] + 0x080023d6: e9d10102 .... LDRD r0,r1,[r1,#8] + 0x080023da: e9cd2305 ...# STRD r2,r3,[sp,#0x14] + 0x080023de: e9cd0107 .... STRD r0,r1,[sp,#0x1c] + 0x080023e2: a37c |. ADR r3,{pc}+0x1f2 ; 0x80025d4 + 0x080023e4: e9d30201 .... LDRD r0,r2,[r3,#4] + 0x080023e8: 6819 .h LDR r1,[r3,#0] + 0x080023ea: 68db .h LDR r3,[r3,#0xc] + 0x080023ec: ac02 .. ADD r4,sp,#8 + 0x080023ee: c40d .. STM r4!,{r0,r2,r3} + 0x080023f0: 9101 .. STR r1,[sp,#4] + 0x080023f2: f04f0900 O... MOV r9,#0 + 0x080023f6: 2500 .% MOVS r5,#0 + 0x080023f8: 2600 .& MOVS r6,#0 + 0x080023fa: 46ab .F MOV r11,r5 + 0x080023fc: 46aa .F MOV r10,r5 + 0x080023fe: 2700 .' MOVS r7,#0 + 0x08002400: 2400 .$ MOVS r4,#0 + 0x08002402: 2000 . MOVS r0,#0 + 0x08002404: 9000 .. STR r0,[sp,#0] + 0x08002406: f1b80f04 .... CMP r8,#4 + 0x0800240a: d059 Y. BEQ 0x80024c0 ; HAL_RCCEx_GetPeriphCLKFreq + 248 + 0x0800240c: dc06 .. BGT 0x800241c ; HAL_RCCEx_GetPeriphCLKFreq + 84 + 0x0800240e: f1b80f01 .... CMP r8,#1 + 0x08002412: d076 v. BEQ 0x8002502 ; HAL_RCCEx_GetPeriphCLKFreq + 314 + 0x08002414: f1b80f02 .... CMP r8,#2 + 0x08002418: d174 t. BNE 0x8002504 ; HAL_RCCEx_GetPeriphCLKFreq + 316 + 0x0800241a: e0c0 .. B 0x800259e ; HAL_RCCEx_GetPeriphCLKFreq + 470 + 0x0800241c: f1b80f08 .... CMP r8,#8 + 0x08002420: d072 r. BEQ 0x8002508 ; HAL_RCCEx_GetPeriphCLKFreq + 320 + 0x08002422: f1b80f10 .... CMP r8,#0x10 + 0x08002426: d1f7 .. BNE 0x8002418 ; HAL_RCCEx_GetPeriphCLKFreq + 80 + 0x08002428: 486e nH LDR r0,[pc,#440] ; [0x80025e4] = 0x40021000 + 0x0800242a: 6844 Dh LDR r4,[r0,#4] + 0x0800242c: 6800 .h LDR r0,[r0,#0] + 0x0800242e: f0007080 ...p AND r0,r0,#0x1000000 + 0x08002432: 2800 .( CMP r0,#0 + 0x08002434: d043 C. BEQ 0x80024be ; HAL_RCCEx_GetPeriphCLKFreq + 246 + 0x08002436: a805 .. ADD r0,sp,#0x14 + 0x08002438: f3c44183 ...A UBFX r1,r4,#18,#4 + 0x0800243c: 5c46 F\ LDRB r6,[r0,r1] + 0x0800243e: f4043080 ...0 AND r0,r4,#0x10000 + 0x08002442: b358 X. CBZ r0,0x800249c ; HAL_RCCEx_GetPeriphCLKFreq + 212 + 0x08002444: 4867 gH LDR r0,[pc,#412] ; [0x80025e4] = 0x40021000 + 0x08002446: 6ac0 .j LDR r0,[r0,#0x2c] + 0x08002448: f000000f .... AND r0,r0,#0xf + 0x0800244c: a901 .. ADD r1,sp,#4 + 0x0800244e: f8119000 .... LDRB r9,[r1,r0] + 0x08002452: 4864 dH LDR r0,[pc,#400] ; [0x80025e4] = 0x40021000 + 0x08002454: 6ac0 .j LDR r0,[r0,#0x2c] + 0x08002456: f4003080 ...0 AND r0,r0,#0x10000 + 0x0800245a: b1a0 .. CBZ r0,0x8002486 ; HAL_RCCEx_GetPeriphCLKFreq + 190 + 0x0800245c: 4861 aH LDR r0,[pc,#388] ; [0x80025e4] = 0x40021000 + 0x0800245e: 6ac0 .j LDR r0,[r0,#0x2c] + 0x08002460: f3c01003 .... UBFX r0,r0,#4,#4 + 0x08002464: 1c47 G. ADDS r7,r0,#1 + 0x08002466: 485f _H LDR r0,[pc,#380] ; [0x80025e4] = 0x40021000 + 0x08002468: 6ac0 .j LDR r0,[r0,#0x2c] + 0x0800246a: f3c02003 ... UBFX r0,r0,#8,#4 + 0x0800246e: f1000b02 .... ADD r11,r0,#2 + 0x08002472: 485d ]H LDR r0,[pc,#372] ; [0x80025e8] = 0x7a1200 + 0x08002474: fbb0f0f7 .... UDIV r0,r0,r7 + 0x08002478: fb00f00b .... MUL r0,r0,r11 + 0x0800247c: fbb0f0f9 .... UDIV r0,r0,r9 + 0x08002480: fb00f506 .... MUL r5,r0,r6 + 0x08002484: e004 .. B 0x8002490 ; HAL_RCCEx_GetPeriphCLKFreq + 200 + 0x08002486: 4858 XH LDR r0,[pc,#352] ; [0x80025e8] = 0x7a1200 + 0x08002488: fbb0f0f9 .... UDIV r0,r0,r9 + 0x0800248c: fb00f506 .... MUL r5,r0,r6 + 0x08002490: f89d0021 ..!. LDRB r0,[sp,#0x21] + 0x08002494: 42b0 .B CMP r0,r6 + 0x08002496: d104 .. BNE 0x80024a2 ; HAL_RCCEx_GetPeriphCLKFreq + 218 + 0x08002498: 086d m. LSRS r5,r5,#1 + 0x0800249a: e002 .. B 0x80024a2 ; HAL_RCCEx_GetPeriphCLKFreq + 218 + 0x0800249c: 4853 SH LDR r0,[pc,#332] ; [0x80025ec] = 0x3d0900 + 0x0800249e: fb06f500 .... MUL r5,r6,r0 + 0x080024a2: 4850 PH LDR r0,[pc,#320] ; [0x80025e4] = 0x40021000 + 0x080024a4: 6840 @h LDR r0,[r0,#4] + 0x080024a6: f4000080 .... AND r0,r0,#0x400000 + 0x080024aa: f5b00f80 .... CMP r0,#0x400000 + 0x080024ae: d101 .. BNE 0x80024b4 ; HAL_RCCEx_GetPeriphCLKFreq + 236 + 0x080024b0: 9500 .. STR r5,[sp,#0] + 0x080024b2: e004 .. B 0x80024be ; HAL_RCCEx_GetPeriphCLKFreq + 246 + 0x080024b4: 0068 h. LSLS r0,r5,#1 + 0x080024b6: 2103 .! MOVS r1,#3 + 0x080024b8: fbb0f0f1 .... UDIV r0,r0,r1 + 0x080024bc: 9000 .. STR r0,[sp,#0] + 0x080024be: e07b {. B 0x80025b8 ; HAL_RCCEx_GetPeriphCLKFreq + 496 + 0x080024c0: 4848 HH LDR r0,[pc,#288] ; [0x80025e4] = 0x40021000 + 0x080024c2: 6ac0 .j LDR r0,[r0,#0x2c] + 0x080024c4: f4003000 ...0 AND r0,r0,#0x20000 + 0x080024c8: b918 .. CBNZ r0,0x80024d2 ; HAL_RCCEx_GetPeriphCLKFreq + 266 + 0x080024ca: f000faa7 .... BL HAL_RCC_GetSysClockFreq ; 0x8002a1c + 0x080024ce: 9000 .. STR r0,[sp,#0] + 0x080024d0: e016 .. B 0x8002500 ; HAL_RCCEx_GetPeriphCLKFreq + 312 + 0x080024d2: 4844 DH LDR r0,[pc,#272] ; [0x80025e4] = 0x40021000 + 0x080024d4: 6800 .h LDR r0,[r0,#0] + 0x080024d6: f0005080 ...P AND r0,r0,#0x10000000 + 0x080024da: b188 .. CBZ r0,0x8002500 ; HAL_RCCEx_GetPeriphCLKFreq + 312 + 0x080024dc: 4841 AH LDR r0,[pc,#260] ; [0x80025e4] = 0x40021000 + 0x080024de: 6ac0 .j LDR r0,[r0,#0x2c] + 0x080024e0: f3c01003 .... UBFX r0,r0,#4,#4 + 0x080024e4: 1c47 G. ADDS r7,r0,#1 + 0x080024e6: 483f ?H LDR r0,[pc,#252] ; [0x80025e4] = 0x40021000 + 0x080024e8: 6ac0 .j LDR r0,[r0,#0x2c] + 0x080024ea: f3c03003 ...0 UBFX r0,r0,#12,#4 + 0x080024ee: f1000a02 .... ADD r10,r0,#2 + 0x080024f2: 483d =H LDR r0,[pc,#244] ; [0x80025e8] = 0x7a1200 + 0x080024f4: fbb0f0f7 .... UDIV r0,r0,r7 + 0x080024f8: fb00f00a .... MUL r0,r0,r10 + 0x080024fc: 0040 @. LSLS r0,r0,#1 + 0x080024fe: 9000 .. STR r0,[sp,#0] + 0x08002500: e05a Z. B 0x80025b8 ; HAL_RCCEx_GetPeriphCLKFreq + 496 + 0x08002502: e022 ". B 0x800254a ; HAL_RCCEx_GetPeriphCLKFreq + 386 + 0x08002504: e057 W. B 0x80025b6 ; HAL_RCCEx_GetPeriphCLKFreq + 494 + 0x08002506: e7ff .. B 0x8002508 ; HAL_RCCEx_GetPeriphCLKFreq + 320 + 0x08002508: 4836 6H LDR r0,[pc,#216] ; [0x80025e4] = 0x40021000 + 0x0800250a: 6ac0 .j LDR r0,[r0,#0x2c] + 0x0800250c: f4002080 ... AND r0,r0,#0x40000 + 0x08002510: b918 .. CBNZ r0,0x800251a ; HAL_RCCEx_GetPeriphCLKFreq + 338 + 0x08002512: f000fa83 .... BL HAL_RCC_GetSysClockFreq ; 0x8002a1c + 0x08002516: 9000 .. STR r0,[sp,#0] + 0x08002518: e016 .. B 0x8002548 ; HAL_RCCEx_GetPeriphCLKFreq + 384 + 0x0800251a: 4832 2H LDR r0,[pc,#200] ; [0x80025e4] = 0x40021000 + 0x0800251c: 6800 .h LDR r0,[r0,#0] + 0x0800251e: f0005080 ...P AND r0,r0,#0x10000000 + 0x08002522: b188 .. CBZ r0,0x8002548 ; HAL_RCCEx_GetPeriphCLKFreq + 384 + 0x08002524: 482f /H LDR r0,[pc,#188] ; [0x80025e4] = 0x40021000 + 0x08002526: 6ac0 .j LDR r0,[r0,#0x2c] + 0x08002528: f3c01003 .... UBFX r0,r0,#4,#4 + 0x0800252c: 1c47 G. ADDS r7,r0,#1 + 0x0800252e: 482d -H LDR r0,[pc,#180] ; [0x80025e4] = 0x40021000 + 0x08002530: 6ac0 .j LDR r0,[r0,#0x2c] + 0x08002532: f3c03003 ...0 UBFX r0,r0,#12,#4 + 0x08002536: f1000a02 .... ADD r10,r0,#2 + 0x0800253a: 482b +H LDR r0,[pc,#172] ; [0x80025e8] = 0x7a1200 + 0x0800253c: fbb0f0f7 .... UDIV r0,r0,r7 + 0x08002540: fb00f00a .... MUL r0,r0,r10 + 0x08002544: 0040 @. LSLS r0,r0,#1 + 0x08002546: 9000 .. STR r0,[sp,#0] + 0x08002548: e036 6. B 0x80025b8 ; HAL_RCCEx_GetPeriphCLKFreq + 496 + 0x0800254a: 4826 &H LDR r0,[pc,#152] ; [0x80025e4] = 0x40021000 + 0x0800254c: 6a04 .j LDR r4,[r0,#0x20] + 0x0800254e: f4047040 ..@p AND r0,r4,#0x300 + 0x08002552: f5b07f80 .... CMP r0,#0x100 + 0x08002556: d106 .. BNE 0x8002566 ; HAL_RCCEx_GetPeriphCLKFreq + 414 + 0x08002558: f0040002 .... AND r0,r4,#2 + 0x0800255c: b118 .. CBZ r0,0x8002566 ; HAL_RCCEx_GetPeriphCLKFreq + 414 + 0x0800255e: f44f4000 O..@ MOV r0,#0x8000 + 0x08002562: 9000 .. STR r0,[sp,#0] + 0x08002564: e01a .. B 0x800259c ; HAL_RCCEx_GetPeriphCLKFreq + 468 + 0x08002566: f4047040 ..@p AND r0,r4,#0x300 + 0x0800256a: f5b07f00 .... CMP r0,#0x200 + 0x0800256e: d108 .. BNE 0x8002582 ; HAL_RCCEx_GetPeriphCLKFreq + 442 + 0x08002570: 481c .H LDR r0,[pc,#112] ; [0x80025e4] = 0x40021000 + 0x08002572: 6a40 @j LDR r0,[r0,#0x24] + 0x08002574: f0000002 .... AND r0,r0,#2 + 0x08002578: b118 .. CBZ r0,0x8002582 ; HAL_RCCEx_GetPeriphCLKFreq + 442 + 0x0800257a: f6494040 I.@@ MOV r0,#0x9c40 + 0x0800257e: 9000 .. STR r0,[sp,#0] + 0x08002580: e00c .. B 0x800259c ; HAL_RCCEx_GetPeriphCLKFreq + 468 + 0x08002582: f4047040 ..@p AND r0,r4,#0x300 + 0x08002586: f5b07f40 ..@. CMP r0,#0x300 + 0x0800258a: d107 .. BNE 0x800259c ; HAL_RCCEx_GetPeriphCLKFreq + 468 + 0x0800258c: 4815 .H LDR r0,[pc,#84] ; [0x80025e4] = 0x40021000 + 0x0800258e: 6800 .h LDR r0,[r0,#0] + 0x08002590: f4003000 ...0 AND r0,r0,#0x20000 + 0x08002594: b110 .. CBZ r0,0x800259c ; HAL_RCCEx_GetPeriphCLKFreq + 468 + 0x08002596: f24f4024 O.$@ MOV r0,#0xf424 + 0x0800259a: 9000 .. STR r0,[sp,#0] + 0x0800259c: e00c .. B 0x80025b8 ; HAL_RCCEx_GetPeriphCLKFreq + 496 + 0x0800259e: f000fa2d ..-. BL HAL_RCC_GetPCLK2Freq ; 0x80029fc + 0x080025a2: 4910 .I LDR r1,[pc,#64] ; [0x80025e4] = 0x40021000 + 0x080025a4: 6849 Ih LDR r1,[r1,#4] + 0x080025a6: f3c13181 ...1 UBFX r1,r1,#14,#2 + 0x080025aa: 1c49 I. ADDS r1,r1,#1 + 0x080025ac: 0049 I. LSLS r1,r1,#1 + 0x080025ae: fbb0f0f1 .... UDIV r0,r0,r1 + 0x080025b2: 9000 .. STR r0,[sp,#0] + 0x080025b4: e000 .. B 0x80025b8 ; HAL_RCCEx_GetPeriphCLKFreq + 496 + 0x080025b6: bf00 .. NOP + 0x080025b8: bf00 .. NOP + 0x080025ba: 9800 .. LDR r0,[sp,#0] + 0x080025bc: b009 .. ADD sp,sp,#0x24 + 0x080025be: e8bd8ff0 .... POP {r4-r11,pc} + $d + 0x080025c2: 0000 .. DCW 0 + 0x080025c4: 05040000 .... DCD 84148224 + 0x080025c8: 09080706 .... DCD 151521030 + 0x080025cc: 00000000 .... DCD 0 + 0x080025d0: 00000d00 .... DCD 3328 + 0x080025d4: 04030201 .... DCD 67305985 + 0x080025d8: 08070605 .... DCD 134678021 + 0x080025dc: 0c0b0a09 .... DCD 202050057 + 0x080025e0: 100f0e0d .... DCD 269422093 + 0x080025e4: 40021000 ...@ DCD 1073876992 + 0x080025e8: 007a1200 ..z. DCD 8000000 + 0x080025ec: 003d0900 ..=. DCD 4000000 + $t + i.HAL_RCCEx_PeriphCLKConfig + HAL_RCCEx_PeriphCLKConfig + 0x080025f0: e92d43f8 -..C PUSH {r3-r9,lr} + 0x080025f4: 4604 .F MOV r4,r0 + 0x080025f6: 2600 .& MOVS r6,#0 + 0x080025f8: 2500 .% MOVS r5,#0 + 0x080025fa: 2700 .' MOVS r7,#0 + 0x080025fc: 7820 x LDRB r0,[r4,#0] + 0x080025fe: f0000001 .... AND r0,r0,#1 + 0x08002602: 2800 .( CMP r0,#0 + 0x08002604: d06e n. BEQ 0x80026e4 ; HAL_RCCEx_PeriphCLKConfig + 244 + 0x08002606: 46a8 .F MOV r8,r5 + 0x08002608: 4879 yH LDR r0,[pc,#484] ; [0x80027f0] = 0x40021000 + 0x0800260a: 69c0 .i LDR r0,[r0,#0x1c] + 0x0800260c: f0005080 ...P AND r0,r0,#0x10000000 + 0x08002610: b978 x. CBNZ r0,0x8002632 ; HAL_RCCEx_PeriphCLKConfig + 66 + 0x08002612: bf00 .. NOP + 0x08002614: 4876 vH LDR r0,[pc,#472] ; [0x80027f0] = 0x40021000 + 0x08002616: 69c0 .i LDR r0,[r0,#0x1c] + 0x08002618: f0405080 @..P ORR r0,r0,#0x10000000 + 0x0800261c: 4974 tI LDR r1,[pc,#464] ; [0x80027f0] = 0x40021000 + 0x0800261e: 61c8 .a STR r0,[r1,#0x1c] + 0x08002620: 4608 .F MOV r0,r1 + 0x08002622: 69c0 .i LDR r0,[r0,#0x1c] + 0x08002624: f0005080 ...P AND r0,r0,#0x10000000 + 0x08002628: 9000 .. STR r0,[sp,#0] + 0x0800262a: bf00 .. NOP + 0x0800262c: bf00 .. NOP + 0x0800262e: f04f0801 O... MOV r8,#1 + 0x08002632: 4870 pH LDR r0,[pc,#448] ; [0x80027f4] = 0x40007000 + 0x08002634: 6800 .h LDR r0,[r0,#0] + 0x08002636: f4007080 ...p AND r0,r0,#0x100 + 0x0800263a: b9b8 .. CBNZ r0,0x800266c ; HAL_RCCEx_PeriphCLKConfig + 124 + 0x0800263c: 486d mH LDR r0,[pc,#436] ; [0x80027f4] = 0x40007000 + 0x0800263e: 6800 .h LDR r0,[r0,#0] + 0x08002640: f4407080 @..p ORR r0,r0,#0x100 + 0x08002644: 496b kI LDR r1,[pc,#428] ; [0x80027f4] = 0x40007000 + 0x08002646: 6008 .` STR r0,[r1,#0] + 0x08002648: f7fffd8a .... BL HAL_GetTick ; 0x8002160 + 0x0800264c: 4606 .F MOV r6,r0 + 0x0800264e: e007 .. B 0x8002660 ; HAL_RCCEx_PeriphCLKConfig + 112 + 0x08002650: f7fffd86 .... BL HAL_GetTick ; 0x8002160 + 0x08002654: 1b80 .. SUBS r0,r0,r6 + 0x08002656: 2864 d( CMP r0,#0x64 + 0x08002658: d902 .. BLS 0x8002660 ; HAL_RCCEx_PeriphCLKConfig + 112 + 0x0800265a: 2003 . MOVS r0,#3 + 0x0800265c: e8bd83f8 .... POP {r3-r9,pc} + 0x08002660: 4864 dH LDR r0,[pc,#400] ; [0x80027f4] = 0x40007000 + 0x08002662: 6800 .h LDR r0,[r0,#0] + 0x08002664: f4007080 ...p AND r0,r0,#0x100 + 0x08002668: 2800 .( CMP r0,#0 + 0x0800266a: d0f1 .. BEQ 0x8002650 ; HAL_RCCEx_PeriphCLKConfig + 96 + 0x0800266c: 4860 `H LDR r0,[pc,#384] ; [0x80027f0] = 0x40021000 + 0x0800266e: 6a00 .j LDR r0,[r0,#0x20] + 0x08002670: f4007540 ..@u AND r5,r0,#0x300 + 0x08002674: b32d -. CBZ r5,0x80026c2 ; HAL_RCCEx_PeriphCLKConfig + 210 + 0x08002676: 88a0 .. LDRH r0,[r4,#4] + 0x08002678: f4007040 ..@p AND r0,r0,#0x300 + 0x0800267c: 42a8 .B CMP r0,r5 + 0x0800267e: d020 . BEQ 0x80026c2 ; HAL_RCCEx_PeriphCLKConfig + 210 + 0x08002680: 485b [H LDR r0,[pc,#364] ; [0x80027f0] = 0x40021000 + 0x08002682: 6a00 .j LDR r0,[r0,#0x20] + 0x08002684: f4207540 .@u BIC r5,r0,#0x300 + 0x08002688: 2001 . MOVS r0,#1 + 0x0800268a: 495b [I LDR r1,[pc,#364] ; [0x80027f8] = 0x42420440 + 0x0800268c: 6008 .` STR r0,[r1,#0] + 0x0800268e: 2000 . MOVS r0,#0 + 0x08002690: 6008 .` STR r0,[r1,#0] + 0x08002692: 4857 WH LDR r0,[pc,#348] ; [0x80027f0] = 0x40021000 + 0x08002694: 6205 .b STR r5,[r0,#0x20] + 0x08002696: f0050001 .... AND r0,r5,#1 + 0x0800269a: b190 .. CBZ r0,0x80026c2 ; HAL_RCCEx_PeriphCLKConfig + 210 + 0x0800269c: f7fffd60 ..`. BL HAL_GetTick ; 0x8002160 + 0x080026a0: 4606 .F MOV r6,r0 + 0x080026a2: e008 .. B 0x80026b6 ; HAL_RCCEx_PeriphCLKConfig + 198 + 0x080026a4: f7fffd5c ..\. BL HAL_GetTick ; 0x8002160 + 0x080026a8: 1b80 .. SUBS r0,r0,r6 + 0x080026aa: f2413188 A..1 MOV r1,#0x1388 + 0x080026ae: 4288 .B CMP r0,r1 + 0x080026b0: d901 .. BLS 0x80026b6 ; HAL_RCCEx_PeriphCLKConfig + 198 + 0x080026b2: 2003 . MOVS r0,#3 + 0x080026b4: e7d2 .. B 0x800265c ; HAL_RCCEx_PeriphCLKConfig + 108 + 0x080026b6: 484e NH LDR r0,[pc,#312] ; [0x80027f0] = 0x40021000 + 0x080026b8: 6a00 .j LDR r0,[r0,#0x20] + 0x080026ba: f0000002 .... AND r0,r0,#2 + 0x080026be: 2800 .( CMP r0,#0 + 0x080026c0: d0f0 .. BEQ 0x80026a4 ; HAL_RCCEx_PeriphCLKConfig + 180 + 0x080026c2: 484b KH LDR r0,[pc,#300] ; [0x80027f0] = 0x40021000 + 0x080026c4: 6a00 .j LDR r0,[r0,#0x20] + 0x080026c6: f4207040 .@p BIC r0,r0,#0x300 + 0x080026ca: 6861 ah LDR r1,[r4,#4] + 0x080026cc: 4308 .C ORRS r0,r0,r1 + 0x080026ce: 4948 HI LDR r1,[pc,#288] ; [0x80027f0] = 0x40021000 + 0x080026d0: 6208 .b STR r0,[r1,#0x20] + 0x080026d2: f1b80f01 .... CMP r8,#1 + 0x080026d6: d104 .. BNE 0x80026e2 ; HAL_RCCEx_PeriphCLKConfig + 242 + 0x080026d8: 4608 .F MOV r0,r1 + 0x080026da: 69c0 .i LDR r0,[r0,#0x1c] + 0x080026dc: f0205080 ..P BIC r0,r0,#0x10000000 + 0x080026e0: 61c8 .a STR r0,[r1,#0x1c] + 0x080026e2: bf00 .. NOP + 0x080026e4: 7820 x LDRB r0,[r4,#0] + 0x080026e6: f0000002 .... AND r0,r0,#2 + 0x080026ea: 2802 .( CMP r0,#2 + 0x080026ec: d107 .. BNE 0x80026fe ; HAL_RCCEx_PeriphCLKConfig + 270 + 0x080026ee: 4840 @H LDR r0,[pc,#256] ; [0x80027f0] = 0x40021000 + 0x080026f0: 6840 @h LDR r0,[r0,#4] + 0x080026f2: f4204040 .@@ BIC r0,r0,#0xc000 + 0x080026f6: 68a1 .h LDR r1,[r4,#8] + 0x080026f8: 4308 .C ORRS r0,r0,r1 + 0x080026fa: 493d =I LDR r1,[pc,#244] ; [0x80027f0] = 0x40021000 + 0x080026fc: 6048 H` STR r0,[r1,#4] + 0x080026fe: 7820 x LDRB r0,[r4,#0] + 0x08002700: f0000004 .... AND r0,r0,#4 + 0x08002704: 2804 .( CMP r0,#4 + 0x08002706: d107 .. BNE 0x8002718 ; HAL_RCCEx_PeriphCLKConfig + 296 + 0x08002708: 4839 9H LDR r0,[pc,#228] ; [0x80027f0] = 0x40021000 + 0x0800270a: 6ac0 .j LDR r0,[r0,#0x2c] + 0x0800270c: f4203000 ..0 BIC r0,r0,#0x20000 + 0x08002710: 68e1 .h LDR r1,[r4,#0xc] + 0x08002712: 4308 .C ORRS r0,r0,r1 + 0x08002714: 4936 6I LDR r1,[pc,#216] ; [0x80027f0] = 0x40021000 + 0x08002716: 62c8 .b STR r0,[r1,#0x2c] + 0x08002718: 7820 x LDRB r0,[r4,#0] + 0x0800271a: f0000008 .... AND r0,r0,#8 + 0x0800271e: 2808 .( CMP r0,#8 + 0x08002720: d107 .. BNE 0x8002732 ; HAL_RCCEx_PeriphCLKConfig + 322 + 0x08002722: 4833 3H LDR r0,[pc,#204] ; [0x80027f0] = 0x40021000 + 0x08002724: 6ac0 .j LDR r0,[r0,#0x2c] + 0x08002726: f4202080 .. BIC r0,r0,#0x40000 + 0x0800272a: 6921 !i LDR r1,[r4,#0x10] + 0x0800272c: 4308 .C ORRS r0,r0,r1 + 0x0800272e: 4930 0I LDR r1,[pc,#192] ; [0x80027f0] = 0x40021000 + 0x08002730: 62c8 .b STR r0,[r1,#0x2c] + 0x08002732: 482f /H LDR r0,[pc,#188] ; [0x80027f0] = 0x40021000 + 0x08002734: 6ac0 .j LDR r0,[r0,#0x2c] + 0x08002736: f4003000 ...0 AND r0,r0,#0x20000 + 0x0800273a: b920 . CBNZ r0,0x8002746 ; HAL_RCCEx_PeriphCLKConfig + 342 + 0x0800273c: 482c ,H LDR r0,[pc,#176] ; [0x80027f0] = 0x40021000 + 0x0800273e: 6ac0 .j LDR r0,[r0,#0x2c] + 0x08002740: f4002080 ... AND r0,r0,#0x40000 + 0x08002744: b100 .. CBZ r0,0x8002748 ; HAL_RCCEx_PeriphCLKConfig + 344 + 0x08002746: 2701 .' MOVS r7,#1 + 0x08002748: 2f01 ./ CMP r7,#1 + 0x0800274a: d141 A. BNE 0x80027d0 ; HAL_RCCEx_PeriphCLKConfig + 480 + 0x0800274c: 4828 (H LDR r0,[pc,#160] ; [0x80027f0] = 0x40021000 + 0x0800274e: 6800 .h LDR r0,[r0,#0] + 0x08002750: f0005080 ...P AND r0,r0,#0x10000000 + 0x08002754: bb90 .. CBNZ r0,0x80027bc ; HAL_RCCEx_PeriphCLKConfig + 460 + 0x08002756: 4826 &H LDR r0,[pc,#152] ; [0x80027f0] = 0x40021000 + 0x08002758: 6800 .h LDR r0,[r0,#0] + 0x0800275a: f0006080 ...` AND r0,r0,#0x4000000 + 0x0800275e: b140 @. CBZ r0,0x8002772 ; HAL_RCCEx_PeriphCLKConfig + 386 + 0x08002760: 4823 #H LDR r0,[pc,#140] ; [0x80027f0] = 0x40021000 + 0x08002762: 6ac0 .j LDR r0,[r0,#0x2c] + 0x08002764: f00001f0 .... AND r1,r0,#0xf0 + 0x08002768: 69a0 .i LDR r0,[r4,#0x18] + 0x0800276a: 4281 .B CMP r1,r0 + 0x0800276c: d001 .. BEQ 0x8002772 ; HAL_RCCEx_PeriphCLKConfig + 386 + 0x0800276e: 2001 . MOVS r0,#1 + 0x08002770: e774 t. B 0x800265c ; HAL_RCCEx_PeriphCLKConfig + 108 + 0x08002772: 481f .H LDR r0,[pc,#124] ; [0x80027f0] = 0x40021000 + 0x08002774: 6ac0 .j LDR r0,[r0,#0x2c] + 0x08002776: f02000f0 ... BIC r0,r0,#0xf0 + 0x0800277a: 69a1 .i LDR r1,[r4,#0x18] + 0x0800277c: 4308 .C ORRS r0,r0,r1 + 0x0800277e: 491c .I LDR r1,[pc,#112] ; [0x80027f0] = 0x40021000 + 0x08002780: 62c8 .b STR r0,[r1,#0x2c] + 0x08002782: 4608 .F MOV r0,r1 + 0x08002784: 6ac0 .j LDR r0,[r0,#0x2c] + 0x08002786: f4204070 .p@ BIC r0,r0,#0xf000 + 0x0800278a: 6961 ai LDR r1,[r4,#0x14] + 0x0800278c: 4308 .C ORRS r0,r0,r1 + 0x0800278e: 4918 .I LDR r1,[pc,#96] ; [0x80027f0] = 0x40021000 + 0x08002790: 62c8 .b STR r0,[r1,#0x2c] + 0x08002792: 2001 . MOVS r0,#1 + 0x08002794: 4919 .I LDR r1,[pc,#100] ; [0x80027fc] = 0x42420000 + 0x08002796: 6708 .g STR r0,[r1,#0x70] + 0x08002798: f7fffce2 .... BL HAL_GetTick ; 0x8002160 + 0x0800279c: 4606 .F MOV r6,r0 + 0x0800279e: e006 .. B 0x80027ae ; HAL_RCCEx_PeriphCLKConfig + 446 + 0x080027a0: f7fffcde .... BL HAL_GetTick ; 0x8002160 + 0x080027a4: 1b80 .. SUBS r0,r0,r6 + 0x080027a6: 2864 d( CMP r0,#0x64 + 0x080027a8: d901 .. BLS 0x80027ae ; HAL_RCCEx_PeriphCLKConfig + 446 + 0x080027aa: 2003 . MOVS r0,#3 + 0x080027ac: e756 V. B 0x800265c ; HAL_RCCEx_PeriphCLKConfig + 108 + 0x080027ae: 4810 .H LDR r0,[pc,#64] ; [0x80027f0] = 0x40021000 + 0x080027b0: 6800 .h LDR r0,[r0,#0] + 0x080027b2: f0005000 ...P AND r0,r0,#0x20000000 + 0x080027b6: 2800 .( CMP r0,#0 + 0x080027b8: d0f2 .. BEQ 0x80027a0 ; HAL_RCCEx_PeriphCLKConfig + 432 + 0x080027ba: e009 .. B 0x80027d0 ; HAL_RCCEx_PeriphCLKConfig + 480 + 0x080027bc: e7ff .. B 0x80027be ; HAL_RCCEx_PeriphCLKConfig + 462 + 0x080027be: 480c .H LDR r0,[pc,#48] ; [0x80027f0] = 0x40021000 + 0x080027c0: 6ac0 .j LDR r0,[r0,#0x2c] + 0x080027c2: f4004070 ..p@ AND r0,r0,#0xf000 + 0x080027c6: 6961 ai LDR r1,[r4,#0x14] + 0x080027c8: 4288 .B CMP r0,r1 + 0x080027ca: d001 .. BEQ 0x80027d0 ; HAL_RCCEx_PeriphCLKConfig + 480 + 0x080027cc: 2001 . MOVS r0,#1 + 0x080027ce: e745 E. B 0x800265c ; HAL_RCCEx_PeriphCLKConfig + 108 + 0x080027d0: 7820 x LDRB r0,[r4,#0] + 0x080027d2: f0000010 .... AND r0,r0,#0x10 + 0x080027d6: 2810 .( CMP r0,#0x10 + 0x080027d8: d107 .. BNE 0x80027ea ; HAL_RCCEx_PeriphCLKConfig + 506 + 0x080027da: 4805 .H LDR r0,[pc,#20] ; [0x80027f0] = 0x40021000 + 0x080027dc: 6840 @h LDR r0,[r0,#4] + 0x080027de: f4200080 ... BIC r0,r0,#0x400000 + 0x080027e2: 69e1 .i LDR r1,[r4,#0x1c] + 0x080027e4: 4308 .C ORRS r0,r0,r1 + 0x080027e6: 4902 .I LDR r1,[pc,#8] ; [0x80027f0] = 0x40021000 + 0x080027e8: 6048 H` STR r0,[r1,#4] + 0x080027ea: 2000 . MOVS r0,#0 + 0x080027ec: e736 6. B 0x800265c ; HAL_RCCEx_PeriphCLKConfig + 108 + $d + 0x080027ee: 0000 .. DCW 0 + 0x080027f0: 40021000 ...@ DCD 1073876992 + 0x080027f4: 40007000 .p.@ DCD 1073770496 + 0x080027f8: 42420440 @.BB DCD 1111622720 + 0x080027fc: 42420000 ..BB DCD 1111621632 + $t + i.HAL_RCC_ClockConfig + HAL_RCC_ClockConfig + 0x08002800: b570 p. PUSH {r4-r6,lr} + 0x08002802: 4604 .F MOV r4,r0 + 0x08002804: 460d .F MOV r5,r1 + 0x08002806: b90c .. CBNZ r4,0x800280c ; HAL_RCC_ClockConfig + 12 + 0x08002808: 2001 . MOVS r0,#1 + 0x0800280a: bd70 p. POP {r4-r6,pc} + 0x0800280c: 485a ZH LDR r0,[pc,#360] ; [0x8002978] = 0x40022000 + 0x0800280e: 6800 .h LDR r0,[r0,#0] + 0x08002810: f0000007 .... AND r0,r0,#7 + 0x08002814: 42a8 .B CMP r0,r5 + 0x08002816: d20e .. BCS 0x8002836 ; HAL_RCC_ClockConfig + 54 + 0x08002818: 4857 WH LDR r0,[pc,#348] ; [0x8002978] = 0x40022000 + 0x0800281a: 6800 .h LDR r0,[r0,#0] + 0x0800281c: f0200007 ... BIC r0,r0,#7 + 0x08002820: 4328 (C ORRS r0,r0,r5 + 0x08002822: 4955 UI LDR r1,[pc,#340] ; [0x8002978] = 0x40022000 + 0x08002824: 6008 .` STR r0,[r1,#0] + 0x08002826: 4608 .F MOV r0,r1 + 0x08002828: 6800 .h LDR r0,[r0,#0] + 0x0800282a: f0000007 .... AND r0,r0,#7 + 0x0800282e: 42a8 .B CMP r0,r5 + 0x08002830: d001 .. BEQ 0x8002836 ; HAL_RCC_ClockConfig + 54 + 0x08002832: 2001 . MOVS r0,#1 + 0x08002834: e7e9 .. B 0x800280a ; HAL_RCC_ClockConfig + 10 + 0x08002836: 7820 x LDRB r0,[r4,#0] + 0x08002838: f0000002 .... AND r0,r0,#2 + 0x0800283c: 2802 .( CMP r0,#2 + 0x0800283e: d11d .. BNE 0x800287c ; HAL_RCC_ClockConfig + 124 + 0x08002840: 7820 x LDRB r0,[r4,#0] + 0x08002842: f0000004 .... AND r0,r0,#4 + 0x08002846: 2804 .( CMP r0,#4 + 0x08002848: d105 .. BNE 0x8002856 ; HAL_RCC_ClockConfig + 86 + 0x0800284a: 484c LH LDR r0,[pc,#304] ; [0x800297c] = 0x40021000 + 0x0800284c: 6840 @h LDR r0,[r0,#4] + 0x0800284e: f44060e0 @..` ORR r0,r0,#0x700 + 0x08002852: 494a JI LDR r1,[pc,#296] ; [0x800297c] = 0x40021000 + 0x08002854: 6048 H` STR r0,[r1,#4] + 0x08002856: 7820 x LDRB r0,[r4,#0] + 0x08002858: f0000008 .... AND r0,r0,#8 + 0x0800285c: 2808 .( CMP r0,#8 + 0x0800285e: d105 .. BNE 0x800286c ; HAL_RCC_ClockConfig + 108 + 0x08002860: 4846 FH LDR r0,[pc,#280] ; [0x800297c] = 0x40021000 + 0x08002862: 6840 @h LDR r0,[r0,#4] + 0x08002864: f4405060 @.`P ORR r0,r0,#0x3800 + 0x08002868: 4944 DI LDR r1,[pc,#272] ; [0x800297c] = 0x40021000 + 0x0800286a: 6048 H` STR r0,[r1,#4] + 0x0800286c: 4843 CH LDR r0,[pc,#268] ; [0x800297c] = 0x40021000 + 0x0800286e: 6840 @h LDR r0,[r0,#4] + 0x08002870: f02000f0 ... BIC r0,r0,#0xf0 + 0x08002874: 68a1 .h LDR r1,[r4,#8] + 0x08002876: 4308 .C ORRS r0,r0,r1 + 0x08002878: 4940 @I LDR r1,[pc,#256] ; [0x800297c] = 0x40021000 + 0x0800287a: 6048 H` STR r0,[r1,#4] + 0x0800287c: 7820 x LDRB r0,[r4,#0] + 0x0800287e: f0000001 .... AND r0,r0,#1 + 0x08002882: b378 x. CBZ r0,0x80028e4 ; HAL_RCC_ClockConfig + 228 + 0x08002884: 6860 `h LDR r0,[r4,#4] + 0x08002886: 2801 .( CMP r0,#1 + 0x08002888: d106 .. BNE 0x8002898 ; HAL_RCC_ClockConfig + 152 + 0x0800288a: 483c . STRB r0,[r4,#0x3e] + 0x08003188: 2101 .! MOVS r1,#1 + 0x0800318a: 203f ? MOVS r0,#0x3f + 0x0800318c: 5501 .U STRB r1,[r0,r4] + 0x0800318e: 2040 @ MOVS r0,#0x40 + 0x08003190: 5501 .U STRB r1,[r0,r4] + 0x08003192: 2041 A MOVS r0,#0x41 + 0x08003194: 5501 .U STRB r1,[r0,r4] + 0x08003196: bf00 .. NOP + 0x08003198: bf00 .. NOP + 0x0800319a: 2001 . MOVS r0,#1 + 0x0800319c: f8840042 ..B. STRB r0,[r4,#0x42] + 0x080031a0: 2043 C MOVS r0,#0x43 + 0x080031a2: 5501 .U STRB r1,[r0,r4] + 0x080031a4: 2044 D MOVS r0,#0x44 + 0x080031a6: 5501 .U STRB r1,[r0,r4] + 0x080031a8: 2045 E MOVS r0,#0x45 + 0x080031aa: 5501 .U STRB r1,[r0,r4] + 0x080031ac: bf00 .. NOP + 0x080031ae: 2001 . MOVS r0,#1 + 0x080031b0: f884003d ..=. STRB r0,[r4,#0x3d] + 0x080031b4: 2000 . MOVS r0,#0 + 0x080031b6: e7c9 .. B 0x800314c ; HAL_TIM_Base_Init + 8 + $d + 0x080031b8: 080031bd .1.. DCD 134230461 + $t + i.HAL_TIM_Base_MspInit + HAL_TIM_Base_MspInit + 0x080031bc: b538 8. PUSH {r3-r5,lr} + 0x080031be: 4604 .F MOV r4,r0 + 0x080031c0: 490d .I LDR r1,[pc,#52] ; [0x80031f8] = 0x40000800 + 0x080031c2: 6820 h LDR r0,[r4,#0] + 0x080031c4: 4288 .B CMP r0,r1 + 0x080031c6: d115 .. BNE 0x80031f4 ; HAL_TIM_Base_MspInit + 56 + 0x080031c8: bf00 .. NOP + 0x080031ca: 480c .H LDR r0,[pc,#48] ; [0x80031fc] = 0x40021000 + 0x080031cc: 69c0 .i LDR r0,[r0,#0x1c] + 0x080031ce: f0400004 @... ORR r0,r0,#4 + 0x080031d2: 490a .I LDR r1,[pc,#40] ; [0x80031fc] = 0x40021000 + 0x080031d4: 61c8 .a STR r0,[r1,#0x1c] + 0x080031d6: 4608 .F MOV r0,r1 + 0x080031d8: 69c0 .i LDR r0,[r0,#0x1c] + 0x080031da: f0000004 .... AND r0,r0,#4 + 0x080031de: 9000 .. STR r0,[sp,#0] + 0x080031e0: bf00 .. NOP + 0x080031e2: bf00 .. NOP + 0x080031e4: 2200 ." MOVS r2,#0 + 0x080031e6: 2105 .! MOVS r1,#5 + 0x080031e8: 201e . MOVS r0,#0x1e + 0x080031ea: f7fff89b .... BL HAL_NVIC_SetPriority ; 0x8002324 + 0x080031ee: 201e . MOVS r0,#0x1e + 0x080031f0: f7fff888 .... BL HAL_NVIC_EnableIRQ ; 0x8002304 + 0x080031f4: bd38 8. POP {r3-r5,pc} + $d + 0x080031f6: 0000 .. DCW 0 + 0x080031f8: 40000800 ...@ DCD 1073743872 + 0x080031fc: 40021000 ...@ DCD 1073876992 + $t + i.HAL_TIM_Base_Start_IT + HAL_TIM_Base_Start_IT + 0x08003200: 4601 .F MOV r1,r0 + 0x08003202: f891003d ..=. LDRB r0,[r1,#0x3d] + 0x08003206: 2801 .( CMP r0,#1 + 0x08003208: d001 .. BEQ 0x800320e ; HAL_TIM_Base_Start_IT + 14 + 0x0800320a: 2001 . MOVS r0,#1 + 0x0800320c: 4770 pG BX lr + 0x0800320e: 2002 . MOVS r0,#2 + 0x08003210: f881003d ..=. STRB r0,[r1,#0x3d] + 0x08003214: 6808 .h LDR r0,[r1,#0] + 0x08003216: 68c0 .h LDR r0,[r0,#0xc] + 0x08003218: f0400001 @... ORR r0,r0,#1 + 0x0800321c: 680b .h LDR r3,[r1,#0] + 0x0800321e: 60d8 .` STR r0,[r3,#0xc] + 0x08003220: 4b14 .K LDR r3,[pc,#80] ; [0x8003274] = 0x40012c00 + 0x08003222: 6808 .h LDR r0,[r1,#0] + 0x08003224: 4298 .B CMP r0,r3 + 0x08003226: d00f .. BEQ 0x8003248 ; HAL_TIM_Base_Start_IT + 72 + 0x08003228: 6808 .h LDR r0,[r1,#0] + 0x0800322a: f1b04f80 ...O CMP r0,#0x40000000 + 0x0800322e: d00b .. BEQ 0x8003248 ; HAL_TIM_Base_Start_IT + 72 + 0x08003230: 4b11 .K LDR r3,[pc,#68] ; [0x8003278] = 0x40000400 + 0x08003232: 6808 .h LDR r0,[r1,#0] + 0x08003234: 4298 .B CMP r0,r3 + 0x08003236: d007 .. BEQ 0x8003248 ; HAL_TIM_Base_Start_IT + 72 + 0x08003238: 4b10 .K LDR r3,[pc,#64] ; [0x800327c] = 0x40000800 + 0x0800323a: 6808 .h LDR r0,[r1,#0] + 0x0800323c: 4298 .B CMP r0,r3 + 0x0800323e: d003 .. BEQ 0x8003248 ; HAL_TIM_Base_Start_IT + 72 + 0x08003240: 4b0f .K LDR r3,[pc,#60] ; [0x8003280] = 0x40000c00 + 0x08003242: 6808 .h LDR r0,[r1,#0] + 0x08003244: 4298 .B CMP r0,r3 + 0x08003246: d10c .. BNE 0x8003262 ; HAL_TIM_Base_Start_IT + 98 + 0x08003248: 6808 .h LDR r0,[r1,#0] + 0x0800324a: 6880 .h LDR r0,[r0,#8] + 0x0800324c: f0000207 .... AND r2,r0,#7 + 0x08003250: 2a06 .* CMP r2,#6 + 0x08003252: d00c .. BEQ 0x800326e ; HAL_TIM_Base_Start_IT + 110 + 0x08003254: 6808 .h LDR r0,[r1,#0] + 0x08003256: 6800 .h LDR r0,[r0,#0] + 0x08003258: f0400001 @... ORR r0,r0,#1 + 0x0800325c: 680b .h LDR r3,[r1,#0] + 0x0800325e: 6018 .` STR r0,[r3,#0] + 0x08003260: e005 .. B 0x800326e ; HAL_TIM_Base_Start_IT + 110 + 0x08003262: 6808 .h LDR r0,[r1,#0] + 0x08003264: 6800 .h LDR r0,[r0,#0] + 0x08003266: f0400001 @... ORR r0,r0,#1 + 0x0800326a: 680b .h LDR r3,[r1,#0] + 0x0800326c: 6018 .` STR r0,[r3,#0] + 0x0800326e: 2000 . MOVS r0,#0 + 0x08003270: e7cc .. B 0x800320c ; HAL_TIM_Base_Start_IT + 12 + $d + 0x08003272: 0000 .. DCW 0 + 0x08003274: 40012c00 .,.@ DCD 1073818624 + 0x08003278: 40000400 ...@ DCD 1073742848 + 0x0800327c: 40000800 ...@ DCD 1073743872 + 0x08003280: 40000c00 ...@ DCD 1073744896 + $t + i.HAL_TIM_ConfigClockSource + HAL_TIM_ConfigClockSource + 0x08003284: e92d41f0 -..A PUSH {r4-r8,lr} + 0x08003288: 4604 .F MOV r4,r0 + 0x0800328a: 460d .F MOV r5,r1 + 0x0800328c: bf00 .. NOP + 0x0800328e: f894003c ..<. LDRB r0,[r4,#0x3c] + 0x08003292: 2801 .( CMP r0,#1 + 0x08003294: d102 .. BNE 0x800329c ; HAL_TIM_ConfigClockSource + 24 + 0x08003296: 2002 . MOVS r0,#2 + 0x08003298: e8bd81f0 .... POP {r4-r8,pc} + 0x0800329c: 2001 . MOVS r0,#1 + 0x0800329e: f884003c ..<. STRB r0,[r4,#0x3c] + 0x080032a2: bf00 .. NOP + 0x080032a4: 2002 . MOVS r0,#2 + 0x080032a6: f884003d ..=. STRB r0,[r4,#0x3d] + 0x080032aa: 6820 h LDR r0,[r4,#0] + 0x080032ac: 6886 .h LDR r6,[r0,#8] + 0x080032ae: f0260677 &.w. BIC r6,r6,#0x77 + 0x080032b2: f426467f &..F BIC r6,r6,#0xff00 + 0x080032b6: 6820 h LDR r0,[r4,#0] + 0x080032b8: 6086 .` STR r6,[r0,#8] + 0x080032ba: 6828 (h LDR r0,[r5,#0] + 0x080032bc: 2850 P( CMP r0,#0x50 + 0x080032be: d033 3. BEQ 0x8003328 ; HAL_TIM_ConfigClockSource + 164 + 0x080032c0: dc0c .. BGT 0x80032dc ; HAL_TIM_ConfigClockSource + 88 + 0x080032c2: 2820 ( CMP r0,#0x20 + 0x080032c4: d050 P. BEQ 0x8003368 ; HAL_TIM_ConfigClockSource + 228 + 0x080032c6: dc04 .. BGT 0x80032d2 ; HAL_TIM_ConfigClockSource + 78 + 0x080032c8: 2800 .( CMP r0,#0 + 0x080032ca: d04b K. BEQ 0x8003364 ; HAL_TIM_ConfigClockSource + 224 + 0x080032cc: 2810 .( CMP r0,#0x10 + 0x080032ce: d151 Q. BNE 0x8003374 ; HAL_TIM_ConfigClockSource + 240 + 0x080032d0: e049 I. B 0x8003366 ; HAL_TIM_ConfigClockSource + 226 + 0x080032d2: 2830 0( CMP r0,#0x30 + 0x080032d4: d049 I. BEQ 0x800336a ; HAL_TIM_ConfigClockSource + 230 + 0x080032d6: 2840 @( CMP r0,#0x40 + 0x080032d8: d14c L. BNE 0x8003374 ; HAL_TIM_ConfigClockSource + 240 + 0x080032da: e039 9. B 0x8003350 ; HAL_TIM_ConfigClockSource + 204 + 0x080032dc: 2860 `( CMP r0,#0x60 + 0x080032de: d02d -. BEQ 0x800333c ; HAL_TIM_ConfigClockSource + 184 + 0x080032e0: 2870 p( CMP r0,#0x70 + 0x080032e2: d007 .. BEQ 0x80032f4 ; HAL_TIM_ConfigClockSource + 112 + 0x080032e4: f5b05f80 ..._ CMP r0,#0x1000 + 0x080032e8: d003 .. BEQ 0x80032f2 ; HAL_TIM_ConfigClockSource + 110 + 0x080032ea: f5b05f00 ..._ CMP r0,#0x2000 + 0x080032ee: d141 A. BNE 0x8003374 ; HAL_TIM_ConfigClockSource + 240 + 0x080032f0: e00d .. B 0x800330e ; HAL_TIM_ConfigClockSource + 138 + 0x080032f2: e040 @. B 0x8003376 ; HAL_TIM_ConfigClockSource + 242 + 0x080032f4: e9d51302 .... LDRD r1,r3,[r5,#8] + 0x080032f8: 686a jh LDR r2,[r5,#4] + 0x080032fa: 6820 h LDR r0,[r4,#0] + 0x080032fc: f001fdca .... BL TIM_ETR_SetConfig ; 0x8004e94 + 0x08003300: 6820 h LDR r0,[r4,#0] + 0x08003302: 6886 .h LDR r6,[r0,#8] + 0x08003304: f0460677 F.w. ORR r6,r6,#0x77 + 0x08003308: 6820 h LDR r0,[r4,#0] + 0x0800330a: 6086 .` STR r6,[r0,#8] + 0x0800330c: e033 3. B 0x8003376 ; HAL_TIM_ConfigClockSource + 242 + 0x0800330e: e9d51302 .... LDRD r1,r3,[r5,#8] + 0x08003312: 686a jh LDR r2,[r5,#4] + 0x08003314: 6820 h LDR r0,[r4,#0] + 0x08003316: f001fdbd .... BL TIM_ETR_SetConfig ; 0x8004e94 + 0x0800331a: 6820 h LDR r0,[r4,#0] + 0x0800331c: 6880 .h LDR r0,[r0,#8] + 0x0800331e: f4404080 @..@ ORR r0,r0,#0x4000 + 0x08003322: 6821 !h LDR r1,[r4,#0] + 0x08003324: 6088 .` STR r0,[r1,#8] + 0x08003326: e026 &. B 0x8003376 ; HAL_TIM_ConfigClockSource + 242 + 0x08003328: 68ea .h LDR r2,[r5,#0xc] + 0x0800332a: 6869 ih LDR r1,[r5,#4] + 0x0800332c: 6820 h LDR r0,[r4,#0] + 0x0800332e: f001fdfd .... BL TIM_TI1_ConfigInputStage ; 0x8004f2c + 0x08003332: 2150 P! MOVS r1,#0x50 + 0x08003334: 6820 h LDR r0,[r4,#0] + 0x08003336: f001fdb8 .... BL TIM_ITRx_SetConfig ; 0x8004eaa + 0x0800333a: e01c .. B 0x8003376 ; HAL_TIM_ConfigClockSource + 242 + 0x0800333c: 68ea .h LDR r2,[r5,#0xc] + 0x0800333e: 6869 ih LDR r1,[r5,#4] + 0x08003340: 6820 h LDR r0,[r4,#0] + 0x08003342: f001fe06 .... BL TIM_TI2_ConfigInputStage ; 0x8004f52 + 0x08003346: 2160 `! MOVS r1,#0x60 + 0x08003348: 6820 h LDR r0,[r4,#0] + 0x0800334a: f001fdae .... BL TIM_ITRx_SetConfig ; 0x8004eaa + 0x0800334e: e012 .. B 0x8003376 ; HAL_TIM_ConfigClockSource + 242 + 0x08003350: 68ea .h LDR r2,[r5,#0xc] + 0x08003352: 6869 ih LDR r1,[r5,#4] + 0x08003354: 6820 h LDR r0,[r4,#0] + 0x08003356: f001fde9 .... BL TIM_TI1_ConfigInputStage ; 0x8004f2c + 0x0800335a: 2140 @! MOVS r1,#0x40 + 0x0800335c: 6820 h LDR r0,[r4,#0] + 0x0800335e: f001fda4 .... BL TIM_ITRx_SetConfig ; 0x8004eaa + 0x08003362: e008 .. B 0x8003376 ; HAL_TIM_ConfigClockSource + 242 + 0x08003364: bf00 .. NOP + 0x08003366: bf00 .. NOP + 0x08003368: bf00 .. NOP + 0x0800336a: 6829 )h LDR r1,[r5,#0] + 0x0800336c: 6820 h LDR r0,[r4,#0] + 0x0800336e: f001fd9c .... BL TIM_ITRx_SetConfig ; 0x8004eaa + 0x08003372: e000 .. B 0x8003376 ; HAL_TIM_ConfigClockSource + 242 + 0x08003374: bf00 .. NOP + 0x08003376: bf00 .. NOP + 0x08003378: 2001 . MOVS r0,#1 + 0x0800337a: f884003d ..=. STRB r0,[r4,#0x3d] + 0x0800337e: bf00 .. NOP + 0x08003380: 2000 . MOVS r0,#0 + 0x08003382: f884003c ..<. STRB r0,[r4,#0x3c] + 0x08003386: bf00 .. NOP + 0x08003388: bf00 .. NOP + 0x0800338a: e785 .. B 0x8003298 ; HAL_TIM_ConfigClockSource + 20 + i.HAL_TIM_ErrorCallback + HAL_TIM_ErrorCallback + 0x0800338c: 4770 pG BX lr + i.HAL_TIM_IC_CaptureCallback + HAL_TIM_IC_CaptureCallback + 0x0800338e: 4770 pG BX lr + i.HAL_TIM_IC_CaptureHalfCpltCallback + HAL_TIM_IC_CaptureHalfCpltCallback + 0x08003390: 4770 pG BX lr + i.HAL_TIM_IRQHandler + HAL_TIM_IRQHandler + 0x08003392: b510 .. PUSH {r4,lr} + 0x08003394: 4604 .F MOV r4,r0 + 0x08003396: 6820 h LDR r0,[r4,#0] + 0x08003398: 6900 .i LDR r0,[r0,#0x10] + 0x0800339a: f3c00040 ..@. UBFX r0,r0,#1,#1 + 0x0800339e: b1f0 .. CBZ r0,0x80033de ; HAL_TIM_IRQHandler + 76 + 0x080033a0: 6820 h LDR r0,[r4,#0] + 0x080033a2: 68c0 .h LDR r0,[r0,#0xc] + 0x080033a4: f3c00040 ..@. UBFX r0,r0,#1,#1 + 0x080033a8: b1c8 .. CBZ r0,0x80033de ; HAL_TIM_IRQHandler + 76 + 0x080033aa: f06f0002 o... MVN r0,#2 + 0x080033ae: 6821 !h LDR r1,[r4,#0] + 0x080033b0: 6108 .a STR r0,[r1,#0x10] + 0x080033b2: 2001 . MOVS r0,#1 + 0x080033b4: 7720 w STRB r0,[r4,#0x1c] + 0x080033b6: 6820 h LDR r0,[r4,#0] + 0x080033b8: 6980 .i LDR r0,[r0,#0x18] + 0x080033ba: f0000003 .... AND r0,r0,#3 + 0x080033be: b120 . CBZ r0,0x80033ca ; HAL_TIM_IRQHandler + 56 + 0x080033c0: 4620 F MOV r0,r4 + 0x080033c2: f8d41090 .... LDR r1,[r4,#0x90] + 0x080033c6: 4788 .G BLX r1 + 0x080033c8: e007 .. B 0x80033da ; HAL_TIM_IRQHandler + 72 + 0x080033ca: 4620 F MOV r0,r4 + 0x080033cc: f8d41098 .... LDR r1,[r4,#0x98] + 0x080033d0: 4788 .G BLX r1 + 0x080033d2: 4620 F MOV r0,r4 + 0x080033d4: f8d4109c .... LDR r1,[r4,#0x9c] + 0x080033d8: 4788 .G BLX r1 + 0x080033da: 2000 . MOVS r0,#0 + 0x080033dc: 7720 w STRB r0,[r4,#0x1c] + 0x080033de: 6820 h LDR r0,[r4,#0] + 0x080033e0: 6900 .i LDR r0,[r0,#0x10] + 0x080033e2: f3c00080 .... UBFX r0,r0,#2,#1 + 0x080033e6: b1f0 .. CBZ r0,0x8003426 ; HAL_TIM_IRQHandler + 148 + 0x080033e8: 6820 h LDR r0,[r4,#0] + 0x080033ea: 68c0 .h LDR r0,[r0,#0xc] + 0x080033ec: f3c00080 .... UBFX r0,r0,#2,#1 + 0x080033f0: b1c8 .. CBZ r0,0x8003426 ; HAL_TIM_IRQHandler + 148 + 0x080033f2: f06f0004 o... MVN r0,#4 + 0x080033f6: 6821 !h LDR r1,[r4,#0] + 0x080033f8: 6108 .a STR r0,[r1,#0x10] + 0x080033fa: 2002 . MOVS r0,#2 + 0x080033fc: 7720 w STRB r0,[r4,#0x1c] + 0x080033fe: 6820 h LDR r0,[r4,#0] + 0x08003400: 6980 .i LDR r0,[r0,#0x18] + 0x08003402: f4007040 ..@p AND r0,r0,#0x300 + 0x08003406: b120 . CBZ r0,0x8003412 ; HAL_TIM_IRQHandler + 128 + 0x08003408: 4620 F MOV r0,r4 + 0x0800340a: f8d41090 .... LDR r1,[r4,#0x90] + 0x0800340e: 4788 .G BLX r1 + 0x08003410: e007 .. B 0x8003422 ; HAL_TIM_IRQHandler + 144 + 0x08003412: 4620 F MOV r0,r4 + 0x08003414: f8d41098 .... LDR r1,[r4,#0x98] + 0x08003418: 4788 .G BLX r1 + 0x0800341a: 4620 F MOV r0,r4 + 0x0800341c: f8d4109c .... LDR r1,[r4,#0x9c] + 0x08003420: 4788 .G BLX r1 + 0x08003422: 2000 . MOVS r0,#0 + 0x08003424: 7720 w STRB r0,[r4,#0x1c] + 0x08003426: 6820 h LDR r0,[r4,#0] + 0x08003428: 6900 .i LDR r0,[r0,#0x10] + 0x0800342a: f3c000c0 .... UBFX r0,r0,#3,#1 + 0x0800342e: b1f0 .. CBZ r0,0x800346e ; HAL_TIM_IRQHandler + 220 + 0x08003430: 6820 h LDR r0,[r4,#0] + 0x08003432: 68c0 .h LDR r0,[r0,#0xc] + 0x08003434: f3c000c0 .... UBFX r0,r0,#3,#1 + 0x08003438: b1c8 .. CBZ r0,0x800346e ; HAL_TIM_IRQHandler + 220 + 0x0800343a: f06f0008 o... MVN r0,#8 + 0x0800343e: 6821 !h LDR r1,[r4,#0] + 0x08003440: 6108 .a STR r0,[r1,#0x10] + 0x08003442: 2004 . MOVS r0,#4 + 0x08003444: 7720 w STRB r0,[r4,#0x1c] + 0x08003446: 6820 h LDR r0,[r4,#0] + 0x08003448: 69c0 .i LDR r0,[r0,#0x1c] + 0x0800344a: f0000003 .... AND r0,r0,#3 + 0x0800344e: b120 . CBZ r0,0x800345a ; HAL_TIM_IRQHandler + 200 + 0x08003450: 4620 F MOV r0,r4 + 0x08003452: f8d41090 .... LDR r1,[r4,#0x90] + 0x08003456: 4788 .G BLX r1 + 0x08003458: e007 .. B 0x800346a ; HAL_TIM_IRQHandler + 216 + 0x0800345a: 4620 F MOV r0,r4 + 0x0800345c: f8d41098 .... LDR r1,[r4,#0x98] + 0x08003460: 4788 .G BLX r1 + 0x08003462: 4620 F MOV r0,r4 + 0x08003464: f8d4109c .... LDR r1,[r4,#0x9c] + 0x08003468: 4788 .G BLX r1 + 0x0800346a: 2000 . MOVS r0,#0 + 0x0800346c: 7720 w STRB r0,[r4,#0x1c] + 0x0800346e: 6820 h LDR r0,[r4,#0] + 0x08003470: 6900 .i LDR r0,[r0,#0x10] + 0x08003472: f3c01000 .... UBFX r0,r0,#4,#1 + 0x08003476: b1f0 .. CBZ r0,0x80034b6 ; HAL_TIM_IRQHandler + 292 + 0x08003478: 6820 h LDR r0,[r4,#0] + 0x0800347a: 68c0 .h LDR r0,[r0,#0xc] + 0x0800347c: f3c01000 .... UBFX r0,r0,#4,#1 + 0x08003480: b1c8 .. CBZ r0,0x80034b6 ; HAL_TIM_IRQHandler + 292 + 0x08003482: f06f0010 o... MVN r0,#0x10 + 0x08003486: 6821 !h LDR r1,[r4,#0] + 0x08003488: 6108 .a STR r0,[r1,#0x10] + 0x0800348a: 2008 . MOVS r0,#8 + 0x0800348c: 7720 w STRB r0,[r4,#0x1c] + 0x0800348e: 6820 h LDR r0,[r4,#0] + 0x08003490: 69c0 .i LDR r0,[r0,#0x1c] + 0x08003492: f4007040 ..@p AND r0,r0,#0x300 + 0x08003496: b120 . CBZ r0,0x80034a2 ; HAL_TIM_IRQHandler + 272 + 0x08003498: 4620 F MOV r0,r4 + 0x0800349a: f8d41090 .... LDR r1,[r4,#0x90] + 0x0800349e: 4788 .G BLX r1 + 0x080034a0: e007 .. B 0x80034b2 ; HAL_TIM_IRQHandler + 288 + 0x080034a2: 4620 F MOV r0,r4 + 0x080034a4: f8d41098 .... LDR r1,[r4,#0x98] + 0x080034a8: 4788 .G BLX r1 + 0x080034aa: 4620 F MOV r0,r4 + 0x080034ac: f8d4109c .... LDR r1,[r4,#0x9c] + 0x080034b0: 4788 .G BLX r1 + 0x080034b2: 2000 . MOVS r0,#0 + 0x080034b4: 7720 w STRB r0,[r4,#0x1c] + 0x080034b6: 6820 h LDR r0,[r4,#0] + 0x080034b8: 6900 .i LDR r0,[r0,#0x10] + 0x080034ba: f0000001 .... AND r0,r0,#1 + 0x080034be: b160 `. CBZ r0,0x80034da ; HAL_TIM_IRQHandler + 328 + 0x080034c0: 6820 h LDR r0,[r4,#0] + 0x080034c2: 68c0 .h LDR r0,[r0,#0xc] + 0x080034c4: f0000001 .... AND r0,r0,#1 + 0x080034c8: b138 8. CBZ r0,0x80034da ; HAL_TIM_IRQHandler + 328 + 0x080034ca: f06f0001 o... MVN r0,#1 + 0x080034ce: 6821 !h LDR r1,[r4,#0] + 0x080034d0: 6108 .a STR r0,[r1,#0x10] + 0x080034d2: 4620 F MOV r0,r4 + 0x080034d4: f8d41080 .... LDR r1,[r4,#0x80] + 0x080034d8: 4788 .G BLX r1 + 0x080034da: 6820 h LDR r0,[r4,#0] + 0x080034dc: 6900 .i LDR r0,[r0,#0x10] + 0x080034de: f3c010c0 .... UBFX r0,r0,#7,#1 + 0x080034e2: b160 `. CBZ r0,0x80034fe ; HAL_TIM_IRQHandler + 364 + 0x080034e4: 6820 h LDR r0,[r4,#0] + 0x080034e6: 68c0 .h LDR r0,[r0,#0xc] + 0x080034e8: f3c010c0 .... UBFX r0,r0,#7,#1 + 0x080034ec: b138 8. CBZ r0,0x80034fe ; HAL_TIM_IRQHandler + 364 + 0x080034ee: f06f0080 o... MVN r0,#0x80 + 0x080034f2: 6821 !h LDR r1,[r4,#0] + 0x080034f4: 6108 .a STR r0,[r1,#0x10] + 0x080034f6: 4620 F MOV r0,r4 + 0x080034f8: f8d410b0 .... LDR r1,[r4,#0xb0] + 0x080034fc: 4788 .G BLX r1 + 0x080034fe: 6820 h LDR r0,[r4,#0] + 0x08003500: 6900 .i LDR r0,[r0,#0x10] + 0x08003502: f3c01080 .... UBFX r0,r0,#6,#1 + 0x08003506: b160 `. CBZ r0,0x8003522 ; HAL_TIM_IRQHandler + 400 + 0x08003508: 6820 h LDR r0,[r4,#0] + 0x0800350a: 68c0 .h LDR r0,[r0,#0xc] + 0x0800350c: f3c01080 .... UBFX r0,r0,#6,#1 + 0x08003510: b138 8. CBZ r0,0x8003522 ; HAL_TIM_IRQHandler + 400 + 0x08003512: f06f0040 o.@. MVN r0,#0x40 + 0x08003516: 6821 !h LDR r1,[r4,#0] + 0x08003518: 6108 .a STR r0,[r1,#0x10] + 0x0800351a: 4620 F MOV r0,r4 + 0x0800351c: f8d41088 .... LDR r1,[r4,#0x88] + 0x08003520: 4788 .G BLX r1 + 0x08003522: 6820 h LDR r0,[r4,#0] + 0x08003524: 6900 .i LDR r0,[r0,#0x10] + 0x08003526: f3c01040 ..@. UBFX r0,r0,#5,#1 + 0x0800352a: b160 `. CBZ r0,0x8003546 ; HAL_TIM_IRQHandler + 436 + 0x0800352c: 6820 h LDR r0,[r4,#0] + 0x0800352e: 68c0 .h LDR r0,[r0,#0xc] + 0x08003530: f3c01040 ..@. UBFX r0,r0,#5,#1 + 0x08003534: b138 8. CBZ r0,0x8003546 ; HAL_TIM_IRQHandler + 436 + 0x08003536: f06f0020 o. . MVN r0,#0x20 + 0x0800353a: 6821 !h LDR r1,[r4,#0] + 0x0800353c: 6108 .a STR r0,[r1,#0x10] + 0x0800353e: 4620 F MOV r0,r4 + 0x08003540: f8d410a8 .... LDR r1,[r4,#0xa8] + 0x08003544: 4788 .G BLX r1 + 0x08003546: bd10 .. POP {r4,pc} + i.HAL_TIM_OC_DelayElapsedCallback + HAL_TIM_OC_DelayElapsedCallback + 0x08003548: 4770 pG BX lr + i.HAL_TIM_PWM_PulseFinishedCallback + HAL_TIM_PWM_PulseFinishedCallback + 0x0800354a: 4770 pG BX lr + i.HAL_TIM_PWM_PulseFinishedHalfCpltCallback + HAL_TIM_PWM_PulseFinishedHalfCpltCallback + 0x0800354c: 4770 pG BX lr + 0x0800354e: 0000 .. MOVS r0,r0 + i.HAL_TIM_PeriodElapsedCallback + HAL_TIM_PeriodElapsedCallback + 0x08003550: b510 .. PUSH {r4,lr} + 0x08003552: 4604 .F MOV r4,r0 + 0x08003554: 4903 .I LDR r1,[pc,#12] ; [0x8003564] = 0x40001400 + 0x08003556: 6820 h LDR r0,[r4,#0] + 0x08003558: 4288 .B CMP r0,r1 + 0x0800355a: d101 .. BNE 0x8003560 ; HAL_TIM_PeriodElapsedCallback + 16 + 0x0800355c: f7fefe06 .... BL HAL_IncTick ; 0x800216c + 0x08003560: bd10 .. POP {r4,pc} + $d + 0x08003562: 0000 .. DCW 0 + 0x08003564: 40001400 ...@ DCD 1073746944 + $t + i.HAL_TIM_PeriodElapsedHalfCpltCallback + HAL_TIM_PeriodElapsedHalfCpltCallback + 0x08003568: 4770 pG BX lr + i.HAL_TIM_TriggerCallback + HAL_TIM_TriggerCallback + 0x0800356a: 4770 pG BX lr + i.HAL_TIM_TriggerHalfCpltCallback + HAL_TIM_TriggerHalfCpltCallback + 0x0800356c: 4770 pG BX lr + i.HAL_UARTEx_ReceiveToIdle_DMA + HAL_UARTEx_ReceiveToIdle_DMA + 0x0800356e: b5f8 .. PUSH {r3-r7,lr} + 0x08003570: 4604 .F MOV r4,r0 + 0x08003572: 460e .F MOV r6,r1 + 0x08003574: 4617 .F MOV r7,r2 + 0x08003576: f894003e ..>. LDRB r0,[r4,#0x3e] + 0x0800357a: 2820 ( CMP r0,#0x20 + 0x0800357c: d12e .. BNE 0x80035dc ; HAL_UARTEx_ReceiveToIdle_DMA + 110 + 0x0800357e: b106 .. CBZ r6,0x8003582 ; HAL_UARTEx_ReceiveToIdle_DMA + 20 + 0x08003580: b90f .. CBNZ r7,0x8003586 ; HAL_UARTEx_ReceiveToIdle_DMA + 24 + 0x08003582: 2001 . MOVS r0,#1 + 0x08003584: bdf8 .. POP {r3-r7,pc} + 0x08003586: bf00 .. NOP + 0x08003588: f894003c ..<. LDRB r0,[r4,#0x3c] + 0x0800358c: 2801 .( CMP r0,#1 + 0x0800358e: d101 .. BNE 0x8003594 ; HAL_UARTEx_ReceiveToIdle_DMA + 38 + 0x08003590: 2002 . MOVS r0,#2 + 0x08003592: e7f7 .. B 0x8003584 ; HAL_UARTEx_ReceiveToIdle_DMA + 22 + 0x08003594: 2001 . MOVS r0,#1 + 0x08003596: f884003c ..<. STRB r0,[r4,#0x3c] + 0x0800359a: bf00 .. NOP + 0x0800359c: 6320 c STR r0,[r4,#0x30] + 0x0800359e: 463a :F MOV r2,r7 + 0x080035a0: 4631 1F MOV r1,r6 + 0x080035a2: 4620 F MOV r0,r4 + 0x080035a4: f001ffb6 .... BL UART_Start_Receive_DMA ; 0x8005514 + 0x080035a8: 4605 .F MOV r5,r0 + 0x080035aa: b9ad .. CBNZ r5,0x80035d8 ; HAL_UARTEx_ReceiveToIdle_DMA + 106 + 0x080035ac: 6b20 k LDR r0,[r4,#0x30] + 0x080035ae: 2801 .( CMP r0,#1 + 0x080035b0: d111 .. BNE 0x80035d6 ; HAL_UARTEx_ReceiveToIdle_DMA + 104 + 0x080035b2: bf00 .. NOP + 0x080035b4: 2000 . MOVS r0,#0 + 0x080035b6: 9000 .. STR r0,[sp,#0] + 0x080035b8: 6820 h LDR r0,[r4,#0] + 0x080035ba: 6800 .h LDR r0,[r0,#0] + 0x080035bc: 9000 .. STR r0,[sp,#0] + 0x080035be: 6820 h LDR r0,[r4,#0] + 0x080035c0: 6840 @h LDR r0,[r0,#4] + 0x080035c2: 9000 .. STR r0,[sp,#0] + 0x080035c4: bf00 .. NOP + 0x080035c6: bf00 .. NOP + 0x080035c8: 6820 h LDR r0,[r4,#0] + 0x080035ca: 68c0 .h LDR r0,[r0,#0xc] + 0x080035cc: f0400010 @... ORR r0,r0,#0x10 + 0x080035d0: 6821 !h LDR r1,[r4,#0] + 0x080035d2: 60c8 .` STR r0,[r1,#0xc] + 0x080035d4: e000 .. B 0x80035d8 ; HAL_UARTEx_ReceiveToIdle_DMA + 106 + 0x080035d6: 2501 .% MOVS r5,#1 + 0x080035d8: 4628 (F MOV r0,r5 + 0x080035da: e7d3 .. B 0x8003584 ; HAL_UARTEx_ReceiveToIdle_DMA + 22 + 0x080035dc: 2002 . MOVS r0,#2 + 0x080035de: e7d1 .. B 0x8003584 ; HAL_UARTEx_ReceiveToIdle_DMA + 22 + i.HAL_UARTEx_RxEventCallback + HAL_UARTEx_RxEventCallback + 0x080035e0: e92d41f0 -..A PUSH {r4-r8,lr} + 0x080035e4: 4604 .F MOV r4,r0 + 0x080035e6: 460f .F MOV r7,r1 + 0x080035e8: 4812 .H LDR r0,[pc,#72] ; [0x8003634] = 0x20000624 + 0x080035ea: 4284 .B CMP r4,r0 + 0x080035ec: d100 .. BNE 0x80035f0 ; HAL_UARTEx_RxEventCallback + 16 + 0x080035ee: 4d12 .M LDR r5,[pc,#72] ; [0x8003638] = 0x20000024 + 0x080035f0: 4812 .H LDR r0,[pc,#72] ; [0x800363c] = 0x20000698 + 0x080035f2: 4284 .B CMP r4,r0 + 0x080035f4: d100 .. BNE 0x80035f8 ; HAL_UARTEx_RxEventCallback + 24 + 0x080035f6: 4d12 .M LDR r5,[pc,#72] ; [0x8003640] = 0x20000094 + 0x080035f8: 4812 .H LDR r0,[pc,#72] ; [0x8003644] = 0x2000070c + 0x080035fa: 4284 .B CMP r4,r0 + 0x080035fc: d100 .. BNE 0x8003600 ; HAL_UARTEx_RxEventCallback + 32 + 0x080035fe: 4d12 .M LDR r5,[pc,#72] ; [0x8003648] = 0x20000104 + 0x08003600: 4812 .H LDR r0,[pc,#72] ; [0x800364c] = 0x200005b0 + 0x08003602: 4284 .B CMP r4,r0 + 0x08003604: d100 .. BNE 0x8003608 ; HAL_UARTEx_RxEventCallback + 40 + 0x08003606: 4d12 .M LDR r5,[pc,#72] ; [0x8003650] = 0x20000174 + 0x08003608: 2600 .& MOVS r6,#0 + 0x0800360a: e008 .. B 0x800361e ; HAL_UARTEx_RxEventCallback + 62 + 0x0800360c: f105020c .... ADD r2,r5,#0xc + 0x08003610: 1991 .. ADDS r1,r2,r6 + 0x08003612: 2300 .# MOVS r3,#0 + 0x08003614: 461a .F MOV r2,r3 + 0x08003616: 6868 hh LDR r0,[r5,#4] + 0x08003618: f006f808 .... BL xQueueGenericSendFromISR ; 0x800962c + 0x0800361c: 1c76 v. ADDS r6,r6,#1 + 0x0800361e: 42be .B CMP r6,r7 + 0x08003620: dbf4 .. BLT 0x800360c ; HAL_UARTEx_RxEventCallback + 44 + 0x08003622: 2264 d" MOVS r2,#0x64 + 0x08003624: f105010c .... ADD r1,r5,#0xc + 0x08003628: 6828 (h LDR r0,[r5,#0] + 0x0800362a: f7ffffa0 .... BL HAL_UARTEx_ReceiveToIdle_DMA ; 0x800356e + 0x0800362e: e8bd81f0 .... POP {r4-r8,pc} + $d + 0x08003632: 0000 .. DCW 0 + 0x08003634: 20000624 $.. DCD 536872484 + 0x08003638: 20000024 $.. DCD 536870948 + 0x0800363c: 20000698 ... DCD 536872600 + 0x08003640: 20000094 ... DCD 536871060 + 0x08003644: 2000070c ... DCD 536872716 + 0x08003648: 20000104 ... DCD 536871172 + 0x0800364c: 200005b0 ... DCD 536872368 + 0x08003650: 20000174 t.. DCD 536871284 + $t + i.HAL_UART_AbortCpltCallback + HAL_UART_AbortCpltCallback + 0x08003654: 4770 pG BX lr + i.HAL_UART_AbortReceiveCpltCallback + HAL_UART_AbortReceiveCpltCallback + 0x08003656: 4770 pG BX lr + i.HAL_UART_AbortTransmitCpltCallback + HAL_UART_AbortTransmitCpltCallback + 0x08003658: 4770 pG BX lr + 0x0800365a: 0000 .. MOVS r0,r0 + i.HAL_UART_DeInit + HAL_UART_DeInit + 0x0800365c: b510 .. PUSH {r4,lr} + 0x0800365e: 4604 .F MOV r4,r0 + 0x08003660: b90c .. CBNZ r4,0x8003666 ; HAL_UART_DeInit + 10 + 0x08003662: 2001 . MOVS r0,#1 + 0x08003664: bd10 .. POP {r4,pc} + 0x08003666: 2024 $ MOVS r0,#0x24 + 0x08003668: f884003d ..=. STRB r0,[r4,#0x3d] + 0x0800366c: 6820 h LDR r0,[r4,#0] + 0x0800366e: 68c0 .h LDR r0,[r0,#0xc] + 0x08003670: f4205000 ..P BIC r0,r0,#0x2000 + 0x08003674: 6821 !h LDR r1,[r4,#0] + 0x08003676: 60c8 .` STR r0,[r1,#0xc] + 0x08003678: 6f20 o LDR r0,[r4,#0x70] + 0x0800367a: b908 .. CBNZ r0,0x8003680 ; HAL_UART_DeInit + 36 + 0x0800367c: 4808 .H LDR r0,[pc,#32] ; [0x80036a0] = 0x80039d9 + 0x0800367e: 6720 g STR r0,[r4,#0x70] + 0x08003680: 4620 F MOV r0,r4 + 0x08003682: 6f21 !o LDR r1,[r4,#0x70] + 0x08003684: 4788 .G BLX r1 + 0x08003686: 2000 . MOVS r0,#0 + 0x08003688: 6420 d STR r0,[r4,#0x40] + 0x0800368a: f884003d ..=. STRB r0,[r4,#0x3d] + 0x0800368e: f884003e ..>. STRB r0,[r4,#0x3e] + 0x08003692: 6320 c STR r0,[r4,#0x30] + 0x08003694: bf00 .. NOP + 0x08003696: f884003c ..<. STRB r0,[r4,#0x3c] + 0x0800369a: bf00 .. NOP + 0x0800369c: bf00 .. NOP + 0x0800369e: e7e1 .. B 0x8003664 ; HAL_UART_DeInit + 8 + $d + 0x080036a0: 080039d9 .9.. DCD 134232537 + $t + i.HAL_UART_ErrorCallback + HAL_UART_ErrorCallback + 0x080036a4: b570 p. PUSH {r4-r6,lr} + 0x080036a6: 4604 .F MOV r4,r0 + 0x080036a8: 2500 .% MOVS r5,#0 + 0x080036aa: 480f .H LDR r0,[pc,#60] ; [0x80036e8] = 0x20000624 + 0x080036ac: 4284 .B CMP r4,r0 + 0x080036ae: d100 .. BNE 0x80036b2 ; HAL_UART_ErrorCallback + 14 + 0x080036b0: 4d0e .M LDR r5,[pc,#56] ; [0x80036ec] = 0x20000024 + 0x080036b2: 480f .H LDR r0,[pc,#60] ; [0x80036f0] = 0x20000698 + 0x080036b4: 4284 .B CMP r4,r0 + 0x080036b6: d100 .. BNE 0x80036ba ; HAL_UART_ErrorCallback + 22 + 0x080036b8: 4d0e .M LDR r5,[pc,#56] ; [0x80036f4] = 0x20000094 + 0x080036ba: 480f .H LDR r0,[pc,#60] ; [0x80036f8] = 0x2000070c + 0x080036bc: 4284 .B CMP r4,r0 + 0x080036be: d100 .. BNE 0x80036c2 ; HAL_UART_ErrorCallback + 30 + 0x080036c0: 4d0e .M LDR r5,[pc,#56] ; [0x80036fc] = 0x20000104 + 0x080036c2: 480f .H LDR r0,[pc,#60] ; [0x8003700] = 0x200005b0 + 0x080036c4: 4284 .B CMP r4,r0 + 0x080036c6: d100 .. BNE 0x80036ca ; HAL_UART_ErrorCallback + 38 + 0x080036c8: 4d0e .M LDR r5,[pc,#56] ; [0x8003704] = 0x20000174 + 0x080036ca: b15d ]. CBZ r5,0x80036e4 ; HAL_UART_ErrorCallback + 64 + 0x080036cc: 6828 (h LDR r0,[r5,#0] + 0x080036ce: f7ffffc5 .... BL HAL_UART_DeInit ; 0x800365c + 0x080036d2: 6828 (h LDR r0,[r5,#0] + 0x080036d4: f000f93e ..>. BL HAL_UART_Init ; 0x8003954 + 0x080036d8: 2264 d" MOVS r2,#0x64 + 0x080036da: f105010c .... ADD r1,r5,#0xc + 0x080036de: 6828 (h LDR r0,[r5,#0] + 0x080036e0: f7ffff45 ..E. BL HAL_UARTEx_ReceiveToIdle_DMA ; 0x800356e + 0x080036e4: bd70 p. POP {r4-r6,pc} + $d + 0x080036e6: 0000 .. DCW 0 + 0x080036e8: 20000624 $.. DCD 536872484 + 0x080036ec: 20000024 $.. DCD 536870948 + 0x080036f0: 20000698 ... DCD 536872600 + 0x080036f4: 20000094 ... DCD 536871060 + 0x080036f8: 2000070c ... DCD 536872716 + 0x080036fc: 20000104 ... DCD 536871172 + 0x08003700: 200005b0 ... DCD 536872368 + 0x08003704: 20000174 t.. DCD 536871284 + $t + i.HAL_UART_IRQHandler + HAL_UART_IRQHandler + 0x08003708: e92d4ff8 -..O PUSH {r3-r11,lr} + 0x0800370c: 4604 .F MOV r4,r0 + 0x0800370e: 6820 h LDR r0,[r4,#0] + 0x08003710: 6805 .h LDR r5,[r0,#0] + 0x08003712: 6820 h LDR r0,[r4,#0] + 0x08003714: 68c6 .h LDR r6,[r0,#0xc] + 0x08003716: 6820 h LDR r0,[r4,#0] + 0x08003718: 6947 Gi LDR r7,[r0,#0x14] + 0x0800371a: f04f0900 O... MOV r9,#0 + 0x0800371e: 46ca .F MOV r10,r9 + 0x08003720: f005090f .... AND r9,r5,#0xf + 0x08003724: f1b90f00 .... CMP r9,#0 + 0x08003728: d10a .. BNE 0x8003740 ; HAL_UART_IRQHandler + 56 + 0x0800372a: f0050020 .. . AND r0,r5,#0x20 + 0x0800372e: b138 8. CBZ r0,0x8003740 ; HAL_UART_IRQHandler + 56 + 0x08003730: f0060020 .. . AND r0,r6,#0x20 + 0x08003734: b120 . CBZ r0,0x8003740 ; HAL_UART_IRQHandler + 56 + 0x08003736: 4620 F MOV r0,r4 + 0x08003738: f001fd90 .... BL UART_Receive_IT ; 0x800525c + 0x0800373c: e8bd8ff8 .... POP {r3-r11,pc} + 0x08003740: f1b90f00 .... CMP r9,#0 + 0x08003744: d072 r. BEQ 0x800382c ; HAL_UART_IRQHandler + 292 + 0x08003746: f0070001 .... AND r0,r7,#1 + 0x0800374a: b918 .. CBNZ r0,0x8003754 ; HAL_UART_IRQHandler + 76 + 0x0800374c: f4067090 ...p AND r0,r6,#0x120 + 0x08003750: 2800 .( CMP r0,#0 + 0x08003752: d06b k. BEQ 0x800382c ; HAL_UART_IRQHandler + 292 + 0x08003754: f0050001 .... AND r0,r5,#1 + 0x08003758: b130 0. CBZ r0,0x8003768 ; HAL_UART_IRQHandler + 96 + 0x0800375a: f4067080 ...p AND r0,r6,#0x100 + 0x0800375e: b118 .. CBZ r0,0x8003768 ; HAL_UART_IRQHandler + 96 + 0x08003760: 6c20 l LDR r0,[r4,#0x40] + 0x08003762: f0400001 @... ORR r0,r0,#1 + 0x08003766: 6420 d STR r0,[r4,#0x40] + 0x08003768: f0050004 .... AND r0,r5,#4 + 0x0800376c: b130 0. CBZ r0,0x800377c ; HAL_UART_IRQHandler + 116 + 0x0800376e: f0070001 .... AND r0,r7,#1 + 0x08003772: b118 .. CBZ r0,0x800377c ; HAL_UART_IRQHandler + 116 + 0x08003774: 6c20 l LDR r0,[r4,#0x40] + 0x08003776: f0400002 @... ORR r0,r0,#2 + 0x0800377a: 6420 d STR r0,[r4,#0x40] + 0x0800377c: f0050002 .... AND r0,r5,#2 + 0x08003780: b130 0. CBZ r0,0x8003790 ; HAL_UART_IRQHandler + 136 + 0x08003782: f0070001 .... AND r0,r7,#1 + 0x08003786: b118 .. CBZ r0,0x8003790 ; HAL_UART_IRQHandler + 136 + 0x08003788: 6c20 l LDR r0,[r4,#0x40] + 0x0800378a: f0400004 @... ORR r0,r0,#4 + 0x0800378e: 6420 d STR r0,[r4,#0x40] + 0x08003790: f0050008 .... AND r0,r5,#8 + 0x08003794: b148 H. CBZ r0,0x80037aa ; HAL_UART_IRQHandler + 162 + 0x08003796: f0060020 .. . AND r0,r6,#0x20 + 0x0800379a: b910 .. CBNZ r0,0x80037a2 ; HAL_UART_IRQHandler + 154 + 0x0800379c: f0070001 .... AND r0,r7,#1 + 0x080037a0: b118 .. CBZ r0,0x80037aa ; HAL_UART_IRQHandler + 162 + 0x080037a2: 6c20 l LDR r0,[r4,#0x40] + 0x080037a4: f0400008 @... ORR r0,r0,#8 + 0x080037a8: 6420 d STR r0,[r4,#0x40] + 0x080037aa: 6c20 l LDR r0,[r4,#0x40] + 0x080037ac: 2800 .( CMP r0,#0 + 0x080037ae: d03b ;. BEQ 0x8003828 ; HAL_UART_IRQHandler + 288 + 0x080037b0: f0050020 .. . AND r0,r5,#0x20 + 0x080037b4: b128 (. CBZ r0,0x80037c2 ; HAL_UART_IRQHandler + 186 + 0x080037b6: f0060020 .. . AND r0,r6,#0x20 + 0x080037ba: b110 .. CBZ r0,0x80037c2 ; HAL_UART_IRQHandler + 186 + 0x080037bc: 4620 F MOV r0,r4 + 0x080037be: f001fd4d ..M. BL UART_Receive_IT ; 0x800525c + 0x080037c2: 6820 h LDR r0,[r4,#0] + 0x080037c4: 6940 @i LDR r0,[r0,#0x14] + 0x080037c6: f3c01a80 .... UBFX r10,r0,#6,#1 + 0x080037ca: 6c20 l LDR r0,[r4,#0x40] + 0x080037cc: f0000008 .... AND r0,r0,#8 + 0x080037d0: b910 .. CBNZ r0,0x80037d8 ; HAL_UART_IRQHandler + 208 + 0x080037d2: f1ba0f00 .... CMP r10,#0 + 0x080037d6: d022 ". BEQ 0x800381e ; HAL_UART_IRQHandler + 278 + 0x080037d8: 4620 F MOV r0,r4 + 0x080037da: f001fcbf .... BL UART_EndRxTransfer ; 0x800515c + 0x080037de: 6820 h LDR r0,[r4,#0] + 0x080037e0: 6940 @i LDR r0,[r0,#0x14] + 0x080037e2: f0000040 ..@. AND r0,r0,#0x40 + 0x080037e6: b1b0 .. CBZ r0,0x8003816 ; HAL_UART_IRQHandler + 270 + 0x080037e8: 6820 h LDR r0,[r4,#0] + 0x080037ea: 6940 @i LDR r0,[r0,#0x14] + 0x080037ec: f0200040 .@. BIC r0,r0,#0x40 + 0x080037f0: 6821 !h LDR r1,[r4,#0] + 0x080037f2: 6148 Ha STR r0,[r1,#0x14] + 0x080037f4: 6ba0 .k LDR r0,[r4,#0x38] + 0x080037f6: b150 P. CBZ r0,0x800380e ; HAL_UART_IRQHandler + 262 + 0x080037f8: 4855 UH LDR r0,[pc,#340] ; [0x8003950] = 0x800502d + 0x080037fa: 6ba1 .k LDR r1,[r4,#0x38] + 0x080037fc: 6348 Hc STR r0,[r1,#0x34] + 0x080037fe: 6ba0 .k LDR r0,[r4,#0x38] + 0x08003800: f7fdff04 .... BL HAL_DMA_Abort_IT ; 0x800160c + 0x08003804: b180 .. CBZ r0,0x8003828 ; HAL_UART_IRQHandler + 288 + 0x08003806: 6ba0 .k LDR r0,[r4,#0x38] + 0x08003808: 6b41 Ak LDR r1,[r0,#0x34] + 0x0800380a: 4788 .G BLX r1 + 0x0800380c: e00c .. B 0x8003828 ; HAL_UART_IRQHandler + 288 + 0x0800380e: 4620 F MOV r0,r4 + 0x08003810: 6d61 am LDR r1,[r4,#0x54] + 0x08003812: 4788 .G BLX r1 + 0x08003814: e008 .. B 0x8003828 ; HAL_UART_IRQHandler + 288 + 0x08003816: 4620 F MOV r0,r4 + 0x08003818: 6d61 am LDR r1,[r4,#0x54] + 0x0800381a: 4788 .G BLX r1 + 0x0800381c: e004 .. B 0x8003828 ; HAL_UART_IRQHandler + 288 + 0x0800381e: 4620 F MOV r0,r4 + 0x08003820: 6d61 am LDR r1,[r4,#0x54] + 0x08003822: 4788 .G BLX r1 + 0x08003824: 2000 . MOVS r0,#0 + 0x08003826: 6420 d STR r0,[r4,#0x40] + 0x08003828: e788 .. B 0x800373c ; HAL_UART_IRQHandler + 52 + 0x0800382a: e7ff .. B 0x800382c ; HAL_UART_IRQHandler + 292 + 0x0800382c: 6b20 k LDR r0,[r4,#0x30] + 0x0800382e: 2801 .( CMP r0,#1 + 0x08003830: d178 x. BNE 0x8003924 ; HAL_UART_IRQHandler + 540 + 0x08003832: f0050010 .... AND r0,r5,#0x10 + 0x08003836: 2800 .( CMP r0,#0 + 0x08003838: d074 t. BEQ 0x8003924 ; HAL_UART_IRQHandler + 540 + 0x0800383a: f0060010 .... AND r0,r6,#0x10 + 0x0800383e: 2800 .( CMP r0,#0 + 0x08003840: d070 p. BEQ 0x8003924 ; HAL_UART_IRQHandler + 540 + 0x08003842: bf00 .. NOP + 0x08003844: 2000 . MOVS r0,#0 + 0x08003846: 9000 .. STR r0,[sp,#0] + 0x08003848: 6820 h LDR r0,[r4,#0] + 0x0800384a: 6800 .h LDR r0,[r0,#0] + 0x0800384c: 9000 .. STR r0,[sp,#0] + 0x0800384e: 6820 h LDR r0,[r4,#0] + 0x08003850: 6840 @h LDR r0,[r0,#4] + 0x08003852: 9000 .. STR r0,[sp,#0] + 0x08003854: bf00 .. NOP + 0x08003856: bf00 .. NOP + 0x08003858: 6820 h LDR r0,[r4,#0] + 0x0800385a: 6940 @i LDR r0,[r0,#0x14] + 0x0800385c: f0000040 ..@. AND r0,r0,#0x40 + 0x08003860: b3c0 .. CBZ r0,0x80038d4 ; HAL_UART_IRQHandler + 460 + 0x08003862: 6ba0 .k LDR r0,[r4,#0x38] + 0x08003864: 6800 .h LDR r0,[r0,#0] + 0x08003866: 6840 @h LDR r0,[r0,#4] + 0x08003868: fa1ff880 .... UXTH r8,r0 + 0x0800386c: f1b80f00 .... CMP r8,#0 + 0x08003870: d02f /. BEQ 0x80038d2 ; HAL_UART_IRQHandler + 458 + 0x08003872: 8da0 .. LDRH r0,[r4,#0x2c] + 0x08003874: 4540 @E CMP r0,r8 + 0x08003876: dd2c ,. BLE 0x80038d2 ; HAL_UART_IRQHandler + 458 + 0x08003878: f8a4802e .... STRH r8,[r4,#0x2e] + 0x0800387c: 6ba0 .k LDR r0,[r4,#0x38] + 0x0800387e: 6980 .i LDR r0,[r0,#0x18] + 0x08003880: 2820 ( CMP r0,#0x20 + 0x08003882: d01f .. BEQ 0x80038c4 ; HAL_UART_IRQHandler + 444 + 0x08003884: 6820 h LDR r0,[r4,#0] + 0x08003886: 68c0 .h LDR r0,[r0,#0xc] + 0x08003888: f4207080 ..p BIC r0,r0,#0x100 + 0x0800388c: 6821 !h LDR r1,[r4,#0] + 0x0800388e: 60c8 .` STR r0,[r1,#0xc] + 0x08003890: 6820 h LDR r0,[r4,#0] + 0x08003892: 6940 @i LDR r0,[r0,#0x14] + 0x08003894: f0200001 ... BIC r0,r0,#1 + 0x08003898: 6821 !h LDR r1,[r4,#0] + 0x0800389a: 6148 Ha STR r0,[r1,#0x14] + 0x0800389c: 6820 h LDR r0,[r4,#0] + 0x0800389e: 6940 @i LDR r0,[r0,#0x14] + 0x080038a0: f0200040 .@. BIC r0,r0,#0x40 + 0x080038a4: 6821 !h LDR r1,[r4,#0] + 0x080038a6: 6148 Ha STR r0,[r1,#0x14] + 0x080038a8: 2020 MOVS r0,#0x20 + 0x080038aa: f884003e ..>. STRB r0,[r4,#0x3e] + 0x080038ae: 2000 . MOVS r0,#0 + 0x080038b0: 6320 c STR r0,[r4,#0x30] + 0x080038b2: 6820 h LDR r0,[r4,#0] + 0x080038b4: 68c0 .h LDR r0,[r0,#0xc] + 0x080038b6: f0200010 ... BIC r0,r0,#0x10 + 0x080038ba: 6821 !h LDR r1,[r4,#0] + 0x080038bc: 60c8 .` STR r0,[r1,#0xc] + 0x080038be: 6ba0 .k LDR r0,[r4,#0x38] + 0x080038c0: f7fdfe78 ..x. BL HAL_DMA_Abort ; 0x80015b4 + 0x080038c4: 8da0 .. LDRH r0,[r4,#0x2c] + 0x080038c6: 8de3 .. LDRH r3,[r4,#0x2e] + 0x080038c8: 1ac0 .. SUBS r0,r0,r3 + 0x080038ca: b281 .. UXTH r1,r0 + 0x080038cc: 4620 F MOV r0,r4 + 0x080038ce: 6ea2 .n LDR r2,[r4,#0x68] + 0x080038d0: 4790 .G BLX r2 + 0x080038d2: e733 3. B 0x800373c ; HAL_UART_IRQHandler + 52 + 0x080038d4: e7ff .. B 0x80038d6 ; HAL_UART_IRQHandler + 462 + 0x080038d6: 8da0 .. LDRH r0,[r4,#0x2c] + 0x080038d8: 8de1 .. LDRH r1,[r4,#0x2e] + 0x080038da: 1a40 @. SUBS r0,r0,r1 + 0x080038dc: fa1ff880 .... UXTH r8,r0 + 0x080038e0: 8de0 .. LDRH r0,[r4,#0x2e] + 0x080038e2: b1e8 .. CBZ r0,0x8003920 ; HAL_UART_IRQHandler + 536 + 0x080038e4: f1b80f00 .... CMP r8,#0 + 0x080038e8: d01a .. BEQ 0x8003920 ; HAL_UART_IRQHandler + 536 + 0x080038ea: 6820 h LDR r0,[r4,#0] + 0x080038ec: 68c0 .h LDR r0,[r0,#0xc] + 0x080038ee: f4207090 ..p BIC r0,r0,#0x120 + 0x080038f2: 6821 !h LDR r1,[r4,#0] + 0x080038f4: 60c8 .` STR r0,[r1,#0xc] + 0x080038f6: 6820 h LDR r0,[r4,#0] + 0x080038f8: 6940 @i LDR r0,[r0,#0x14] + 0x080038fa: f0200001 ... BIC r0,r0,#1 + 0x080038fe: 6821 !h LDR r1,[r4,#0] + 0x08003900: 6148 Ha STR r0,[r1,#0x14] + 0x08003902: 2020 MOVS r0,#0x20 + 0x08003904: f884003e ..>. STRB r0,[r4,#0x3e] + 0x08003908: 2000 . MOVS r0,#0 + 0x0800390a: 6320 c STR r0,[r4,#0x30] + 0x0800390c: 6820 h LDR r0,[r4,#0] + 0x0800390e: 68c0 .h LDR r0,[r0,#0xc] + 0x08003910: f0200010 ... BIC r0,r0,#0x10 + 0x08003914: 6821 !h LDR r1,[r4,#0] + 0x08003916: 60c8 .` STR r0,[r1,#0xc] + 0x08003918: 4641 AF MOV r1,r8 + 0x0800391a: 4620 F MOV r0,r4 + 0x0800391c: 6ea2 .n LDR r2,[r4,#0x68] + 0x0800391e: 4790 .G BLX r2 + 0x08003920: e70c .. B 0x800373c ; HAL_UART_IRQHandler + 52 + 0x08003922: e7ff .. B 0x8003924 ; HAL_UART_IRQHandler + 540 + 0x08003924: f0050080 .... AND r0,r5,#0x80 + 0x08003928: b130 0. CBZ r0,0x8003938 ; HAL_UART_IRQHandler + 560 + 0x0800392a: f0060080 .... AND r0,r6,#0x80 + 0x0800392e: b118 .. CBZ r0,0x8003938 ; HAL_UART_IRQHandler + 560 + 0x08003930: 4620 F MOV r0,r4 + 0x08003932: f001fe3b ..;. BL UART_Transmit_IT ; 0x80055ac + 0x08003936: e701 .. B 0x800373c ; HAL_UART_IRQHandler + 52 + 0x08003938: f0050040 ..@. AND r0,r5,#0x40 + 0x0800393c: b130 0. CBZ r0,0x800394c ; HAL_UART_IRQHandler + 580 + 0x0800393e: f0060040 ..@. AND r0,r6,#0x40 + 0x08003942: b118 .. CBZ r0,0x800394c ; HAL_UART_IRQHandler + 580 + 0x08003944: 4620 F MOV r0,r4 + 0x08003946: f001fc24 ..$. BL UART_EndTransmit_IT ; 0x8005192 + 0x0800394a: e6f7 .. B 0x800373c ; HAL_UART_IRQHandler + 52 + 0x0800394c: bf00 .. NOP + 0x0800394e: e6f5 .. B 0x800373c ; HAL_UART_IRQHandler + 52 + $d + 0x08003950: 0800502d -P.. DCD 134238253 + $t + i.HAL_UART_Init + HAL_UART_Init + 0x08003954: b510 .. PUSH {r4,lr} + 0x08003956: 4604 .F MOV r4,r0 + 0x08003958: b90c .. CBNZ r4,0x800395e ; HAL_UART_Init + 10 + 0x0800395a: 2001 . MOVS r0,#1 + 0x0800395c: bd10 .. POP {r4,pc} + 0x0800395e: 69a0 .i LDR r0,[r4,#0x18] + 0x08003960: b100 .. CBZ r0,0x8003964 ; HAL_UART_Init + 16 + 0x08003962: e000 .. B 0x8003966 ; HAL_UART_Init + 18 + 0x08003964: bf00 .. NOP + 0x08003966: f894003d ..=. LDRB r0,[r4,#0x3d] + 0x0800396a: b960 `. CBNZ r0,0x8003986 ; HAL_UART_Init + 50 + 0x0800396c: 2000 . MOVS r0,#0 + 0x0800396e: f884003c ..<. STRB r0,[r4,#0x3c] + 0x08003972: 4620 F MOV r0,r4 + 0x08003974: f001fc4c ..L. BL UART_InitCallbacksToDefault ; 0x8005210 + 0x08003978: 6ee0 .n LDR r0,[r4,#0x6c] + 0x0800397a: b908 .. CBNZ r0,0x8003980 ; HAL_UART_Init + 44 + 0x0800397c: 4815 .H LDR r0,[pc,#84] ; [0x80039d4] = 0x8003ae5 + 0x0800397e: 66e0 .f STR r0,[r4,#0x6c] + 0x08003980: 4620 F MOV r0,r4 + 0x08003982: 6ee1 .n LDR r1,[r4,#0x6c] + 0x08003984: 4788 .G BLX r1 + 0x08003986: 2024 $ MOVS r0,#0x24 + 0x08003988: f884003d ..=. STRB r0,[r4,#0x3d] + 0x0800398c: 6820 h LDR r0,[r4,#0] + 0x0800398e: 68c0 .h LDR r0,[r0,#0xc] + 0x08003990: f4205000 ..P BIC r0,r0,#0x2000 + 0x08003994: 6821 !h LDR r1,[r4,#0] + 0x08003996: 60c8 .` STR r0,[r1,#0xc] + 0x08003998: 4620 F MOV r0,r4 + 0x0800399a: f001fd3d ..=. BL UART_SetConfig ; 0x8005418 + 0x0800399e: 6820 h LDR r0,[r4,#0] + 0x080039a0: 6900 .i LDR r0,[r0,#0x10] + 0x080039a2: f4204090 ..@ BIC r0,r0,#0x4800 + 0x080039a6: 6821 !h LDR r1,[r4,#0] + 0x080039a8: 6108 .a STR r0,[r1,#0x10] + 0x080039aa: 6820 h LDR r0,[r4,#0] + 0x080039ac: 6940 @i LDR r0,[r0,#0x14] + 0x080039ae: f020002a .*. BIC r0,r0,#0x2a + 0x080039b2: 6821 !h LDR r1,[r4,#0] + 0x080039b4: 6148 Ha STR r0,[r1,#0x14] + 0x080039b6: 6820 h LDR r0,[r4,#0] + 0x080039b8: 68c0 .h LDR r0,[r0,#0xc] + 0x080039ba: f4405000 @..P ORR r0,r0,#0x2000 + 0x080039be: 6821 !h LDR r1,[r4,#0] + 0x080039c0: 60c8 .` STR r0,[r1,#0xc] + 0x080039c2: 2000 . MOVS r0,#0 + 0x080039c4: 6420 d STR r0,[r4,#0x40] + 0x080039c6: 2020 MOVS r0,#0x20 + 0x080039c8: f884003d ..=. STRB r0,[r4,#0x3d] + 0x080039cc: f884003e ..>. STRB r0,[r4,#0x3e] + 0x080039d0: 2000 . MOVS r0,#0 + 0x080039d2: e7c3 .. B 0x800395c ; HAL_UART_Init + 8 + $d + 0x080039d4: 08003ae5 .:.. DCD 134232805 + $t + i.HAL_UART_MspDeInit + HAL_UART_MspDeInit + 0x080039d8: b510 .. PUSH {r4,lr} + 0x080039da: 4604 .F MOV r4,r0 + 0x080039dc: 4937 7I LDR r1,[pc,#220] ; [0x8003abc] = 0x40005000 + 0x080039de: 6820 h LDR r0,[r4,#0] + 0x080039e0: 4288 .B CMP r0,r1 + 0x080039e2: d111 .. BNE 0x8003a08 ; HAL_UART_MspDeInit + 48 + 0x080039e4: 4836 6H LDR r0,[pc,#216] ; [0x8003ac0] = 0x40021000 + 0x080039e6: 69c0 .i LDR r0,[r0,#0x1c] + 0x080039e8: f4201080 ... BIC r0,r0,#0x100000 + 0x080039ec: 4934 4I LDR r1,[pc,#208] ; [0x8003ac0] = 0x40021000 + 0x080039ee: 61c8 .a STR r0,[r1,#0x1c] + 0x080039f0: 1489 .. ASRS r1,r1,#18 + 0x080039f2: 4834 4H LDR r0,[pc,#208] ; [0x8003ac4] = 0x40011000 + 0x080039f4: f7fef984 .... BL HAL_GPIO_DeInit ; 0x8001d00 + 0x080039f8: 2104 .! MOVS r1,#4 + 0x080039fa: 4833 3H LDR r0,[pc,#204] ; [0x8003ac8] = 0x40011400 + 0x080039fc: f7fef980 .... BL HAL_GPIO_DeInit ; 0x8001d00 + 0x08003a00: 2035 5 MOVS r0,#0x35 + 0x08003a02: f7fefc5d ..]. BL HAL_NVIC_DisableIRQ ; 0x80022c0 + 0x08003a06: e057 W. B 0x8003ab8 ; HAL_UART_MspDeInit + 224 + 0x08003a08: 4930 0I LDR r1,[pc,#192] ; [0x8003acc] = 0x40013800 + 0x08003a0a: 6820 h LDR r0,[r4,#0] + 0x08003a0c: 4288 .B CMP r0,r1 + 0x08003a0e: d113 .. BNE 0x8003a38 ; HAL_UART_MspDeInit + 96 + 0x08003a10: 482b +H LDR r0,[pc,#172] ; [0x8003ac0] = 0x40021000 + 0x08003a12: 6980 .i LDR r0,[r0,#0x18] + 0x08003a14: f4204080 ..@ BIC r0,r0,#0x4000 + 0x08003a18: 4929 )I LDR r1,[pc,#164] ; [0x8003ac0] = 0x40021000 + 0x08003a1a: 6188 .a STR r0,[r1,#0x18] + 0x08003a1c: 21c0 .! MOVS r1,#0xc0 + 0x08003a1e: 482c ,H LDR r0,[pc,#176] ; [0x8003ad0] = 0x40010c00 + 0x08003a20: f7fef96e ..n. BL HAL_GPIO_DeInit ; 0x8001d00 + 0x08003a24: 6ba0 .k LDR r0,[r4,#0x38] + 0x08003a26: f7fdfec5 .... BL HAL_DMA_DeInit ; 0x80017b4 + 0x08003a2a: 6b60 `k LDR r0,[r4,#0x34] + 0x08003a2c: f7fdfec2 .... BL HAL_DMA_DeInit ; 0x80017b4 + 0x08003a30: 2025 % MOVS r0,#0x25 + 0x08003a32: f7fefc45 ..E. BL HAL_NVIC_DisableIRQ ; 0x80022c0 + 0x08003a36: e03f ?. B 0x8003ab8 ; HAL_UART_MspDeInit + 224 + 0x08003a38: 4926 &I LDR r1,[pc,#152] ; [0x8003ad4] = 0x40004400 + 0x08003a3a: 6820 h LDR r0,[r4,#0] + 0x08003a3c: 4288 .B CMP r0,r1 + 0x08003a3e: d113 .. BNE 0x8003a68 ; HAL_UART_MspDeInit + 144 + 0x08003a40: 481f .H LDR r0,[pc,#124] ; [0x8003ac0] = 0x40021000 + 0x08003a42: 69c0 .i LDR r0,[r0,#0x1c] + 0x08003a44: f4203000 ..0 BIC r0,r0,#0x20000 + 0x08003a48: 491d .I LDR r1,[pc,#116] ; [0x8003ac0] = 0x40021000 + 0x08003a4a: 61c8 .a STR r0,[r1,#0x1c] + 0x08003a4c: 210c .! MOVS r1,#0xc + 0x08003a4e: 4822 "H LDR r0,[pc,#136] ; [0x8003ad8] = 0x40010800 + 0x08003a50: f7fef956 ..V. BL HAL_GPIO_DeInit ; 0x8001d00 + 0x08003a54: 6ba0 .k LDR r0,[r4,#0x38] + 0x08003a56: f7fdfead .... BL HAL_DMA_DeInit ; 0x80017b4 + 0x08003a5a: 6b60 `k LDR r0,[r4,#0x34] + 0x08003a5c: f7fdfeaa .... BL HAL_DMA_DeInit ; 0x80017b4 + 0x08003a60: 2026 & MOVS r0,#0x26 + 0x08003a62: f7fefc2d ..-. BL HAL_NVIC_DisableIRQ ; 0x80022c0 + 0x08003a66: e027 '. B 0x8003ab8 ; HAL_UART_MspDeInit + 224 + 0x08003a68: 491c .I LDR r1,[pc,#112] ; [0x8003adc] = 0x40004800 + 0x08003a6a: 6820 h LDR r0,[r4,#0] + 0x08003a6c: 4288 .B CMP r0,r1 + 0x08003a6e: d123 #. BNE 0x8003ab8 ; HAL_UART_MspDeInit + 224 + 0x08003a70: 4813 .H LDR r0,[pc,#76] ; [0x8003ac0] = 0x40021000 + 0x08003a72: 69c0 .i LDR r0,[r0,#0x1c] + 0x08003a74: f4202080 .. BIC r0,r0,#0x40000 + 0x08003a78: 4911 .I LDR r1,[pc,#68] ; [0x8003ac0] = 0x40021000 + 0x08003a7a: 61c8 .a STR r0,[r1,#0x1c] + 0x08003a7c: f44f6140 O.@a MOV r1,#0xc00 + 0x08003a80: 4813 .H LDR r0,[pc,#76] ; [0x8003ad0] = 0x40010c00 + 0x08003a82: f7fef93d ..=. BL HAL_GPIO_DeInit ; 0x8001d00 + 0x08003a86: 6ba0 .k LDR r0,[r4,#0x38] + 0x08003a88: f7fdfe94 .... BL HAL_DMA_DeInit ; 0x80017b4 + 0x08003a8c: 6b60 `k LDR r0,[r4,#0x34] + 0x08003a8e: f7fdfe91 .... BL HAL_DMA_DeInit ; 0x80017b4 + 0x08003a92: 2027 ' MOVS r0,#0x27 + 0x08003a94: f7fefc14 .... BL HAL_NVIC_DisableIRQ ; 0x80022c0 + 0x08003a98: 4811 .H LDR r0,[pc,#68] ; [0x8003ae0] = 0x2000070c + 0x08003a9a: 6800 .h LDR r0,[r0,#0] + 0x08003a9c: 68c0 .h LDR r0,[r0,#0xc] + 0x08003a9e: f0200020 . . BIC r0,r0,#0x20 + 0x08003aa2: 490f .I LDR r1,[pc,#60] ; [0x8003ae0] = 0x2000070c + 0x08003aa4: 6809 .h LDR r1,[r1,#0] + 0x08003aa6: 60c8 .` STR r0,[r1,#0xc] + 0x08003aa8: 480d .H LDR r0,[pc,#52] ; [0x8003ae0] = 0x2000070c + 0x08003aaa: 6800 .h LDR r0,[r0,#0] + 0x08003aac: 68c0 .h LDR r0,[r0,#0xc] + 0x08003aae: f0200040 .@. BIC r0,r0,#0x40 + 0x08003ab2: 490b .I LDR r1,[pc,#44] ; [0x8003ae0] = 0x2000070c + 0x08003ab4: 6809 .h LDR r1,[r1,#0] + 0x08003ab6: 60c8 .` STR r0,[r1,#0xc] + 0x08003ab8: bd10 .. POP {r4,pc} + $d + 0x08003aba: 0000 .. DCW 0 + 0x08003abc: 40005000 .P.@ DCD 1073762304 + 0x08003ac0: 40021000 ...@ DCD 1073876992 + 0x08003ac4: 40011000 ...@ DCD 1073811456 + 0x08003ac8: 40011400 ...@ DCD 1073812480 + 0x08003acc: 40013800 .8.@ DCD 1073821696 + 0x08003ad0: 40010c00 ...@ DCD 1073810432 + 0x08003ad4: 40004400 .D.@ DCD 1073759232 + 0x08003ad8: 40010800 ...@ DCD 1073809408 + 0x08003adc: 40004800 .H.@ DCD 1073760256 + 0x08003ae0: 2000070c ... DCD 536872716 + $t + i.HAL_UART_MspInit + HAL_UART_MspInit + 0x08003ae4: b510 .. PUSH {r4,lr} + 0x08003ae6: b086 .. SUB sp,sp,#0x18 + 0x08003ae8: 4604 .F MOV r4,r0 + 0x08003aea: 2000 . MOVS r0,#0 + 0x08003aec: 9002 .. STR r0,[sp,#8] + 0x08003aee: 9003 .. STR r0,[sp,#0xc] + 0x08003af0: 9004 .. STR r0,[sp,#0x10] + 0x08003af2: 9005 .. STR r0,[sp,#0x14] + 0x08003af4: 49cf .I LDR r1,[pc,#828] ; [0x8003e34] = 0x40005000 + 0x08003af6: 6820 h LDR r0,[r4,#0] + 0x08003af8: 4288 .B CMP r0,r1 + 0x08003afa: d143 C. BNE 0x8003b84 ; HAL_UART_MspInit + 160 + 0x08003afc: bf00 .. NOP + 0x08003afe: 48ce .H LDR r0,[pc,#824] ; [0x8003e38] = 0x40021000 + 0x08003b00: 69c0 .i LDR r0,[r0,#0x1c] + 0x08003b02: f4401080 @... ORR r0,r0,#0x100000 + 0x08003b06: 49cc .I LDR r1,[pc,#816] ; [0x8003e38] = 0x40021000 + 0x08003b08: 61c8 .a STR r0,[r1,#0x1c] + 0x08003b0a: 4608 .F MOV r0,r1 + 0x08003b0c: 69c0 .i LDR r0,[r0,#0x1c] + 0x08003b0e: f4001080 .... AND r0,r0,#0x100000 + 0x08003b12: 9001 .. STR r0,[sp,#4] + 0x08003b14: bf00 .. NOP + 0x08003b16: bf00 .. NOP + 0x08003b18: bf00 .. NOP + 0x08003b1a: 4608 .F MOV r0,r1 + 0x08003b1c: 6980 .i LDR r0,[r0,#0x18] + 0x08003b1e: f0400010 @... ORR r0,r0,#0x10 + 0x08003b22: 6188 .a STR r0,[r1,#0x18] + 0x08003b24: 4608 .F MOV r0,r1 + 0x08003b26: 6980 .i LDR r0,[r0,#0x18] + 0x08003b28: f0000010 .... AND r0,r0,#0x10 + 0x08003b2c: 9001 .. STR r0,[sp,#4] + 0x08003b2e: bf00 .. NOP + 0x08003b30: bf00 .. NOP + 0x08003b32: bf00 .. NOP + 0x08003b34: 4608 .F MOV r0,r1 + 0x08003b36: 6980 .i LDR r0,[r0,#0x18] + 0x08003b38: f0400020 @. . ORR r0,r0,#0x20 + 0x08003b3c: 6188 .a STR r0,[r1,#0x18] + 0x08003b3e: 4608 .F MOV r0,r1 + 0x08003b40: 6980 .i LDR r0,[r0,#0x18] + 0x08003b42: f0000020 .. . AND r0,r0,#0x20 + 0x08003b46: 9001 .. STR r0,[sp,#4] + 0x08003b48: bf00 .. NOP + 0x08003b4a: bf00 .. NOP + 0x08003b4c: 1488 .. ASRS r0,r1,#18 + 0x08003b4e: 9002 .. STR r0,[sp,#8] + 0x08003b50: 2002 . MOVS r0,#2 + 0x08003b52: 9003 .. STR r0,[sp,#0xc] + 0x08003b54: 2003 . MOVS r0,#3 + 0x08003b56: 9005 .. STR r0,[sp,#0x14] + 0x08003b58: a902 .. ADD r1,sp,#8 + 0x08003b5a: 48b8 .H LDR r0,[pc,#736] ; [0x8003e3c] = 0x40011000 + 0x08003b5c: f7fef96a ..j. BL HAL_GPIO_Init ; 0x8001e34 + 0x08003b60: 2004 . MOVS r0,#4 + 0x08003b62: 9002 .. STR r0,[sp,#8] + 0x08003b64: 2000 . MOVS r0,#0 + 0x08003b66: 9003 .. STR r0,[sp,#0xc] + 0x08003b68: 9004 .. STR r0,[sp,#0x10] + 0x08003b6a: a902 .. ADD r1,sp,#8 + 0x08003b6c: 48b4 .H LDR r0,[pc,#720] ; [0x8003e40] = 0x40011400 + 0x08003b6e: f7fef961 ..a. BL HAL_GPIO_Init ; 0x8001e34 + 0x08003b72: 2200 ." MOVS r2,#0 + 0x08003b74: 2105 .! MOVS r1,#5 + 0x08003b76: 2035 5 MOVS r0,#0x35 + 0x08003b78: f7fefbd4 .... BL HAL_NVIC_SetPriority ; 0x8002324 + 0x08003b7c: 2035 5 MOVS r0,#0x35 + 0x08003b7e: f7fefbc1 .... BL HAL_NVIC_EnableIRQ ; 0x8002304 + 0x08003b82: e155 U. B 0x8003e30 ; HAL_UART_MspInit + 844 + 0x08003b84: 49af .I LDR r1,[pc,#700] ; [0x8003e44] = 0x40013800 + 0x08003b86: 6820 h LDR r0,[r4,#0] + 0x08003b88: 4288 .B CMP r0,r1 + 0x08003b8a: d173 s. BNE 0x8003c74 ; HAL_UART_MspInit + 400 + 0x08003b8c: bf00 .. NOP + 0x08003b8e: 48aa .H LDR r0,[pc,#680] ; [0x8003e38] = 0x40021000 + 0x08003b90: 6980 .i LDR r0,[r0,#0x18] + 0x08003b92: f4404080 @..@ ORR r0,r0,#0x4000 + 0x08003b96: 49a8 .I LDR r1,[pc,#672] ; [0x8003e38] = 0x40021000 + 0x08003b98: 6188 .a STR r0,[r1,#0x18] + 0x08003b9a: 4608 .F MOV r0,r1 + 0x08003b9c: 6980 .i LDR r0,[r0,#0x18] + 0x08003b9e: f4004080 ...@ AND r0,r0,#0x4000 + 0x08003ba2: 9001 .. STR r0,[sp,#4] + 0x08003ba4: bf00 .. NOP + 0x08003ba6: bf00 .. NOP + 0x08003ba8: bf00 .. NOP + 0x08003baa: 4608 .F MOV r0,r1 + 0x08003bac: 6980 .i LDR r0,[r0,#0x18] + 0x08003bae: f0400008 @... ORR r0,r0,#8 + 0x08003bb2: 6188 .a STR r0,[r1,#0x18] + 0x08003bb4: 4608 .F MOV r0,r1 + 0x08003bb6: 6980 .i LDR r0,[r0,#0x18] + 0x08003bb8: f0000008 .... AND r0,r0,#8 + 0x08003bbc: 9001 .. STR r0,[sp,#4] + 0x08003bbe: bf00 .. NOP + 0x08003bc0: bf00 .. NOP + 0x08003bc2: 2040 @ MOVS r0,#0x40 + 0x08003bc4: 9002 .. STR r0,[sp,#8] + 0x08003bc6: 2002 . MOVS r0,#2 + 0x08003bc8: 9003 .. STR r0,[sp,#0xc] + 0x08003bca: 2003 . MOVS r0,#3 + 0x08003bcc: 9005 .. STR r0,[sp,#0x14] + 0x08003bce: a902 .. ADD r1,sp,#8 + 0x08003bd0: 489d .H LDR r0,[pc,#628] ; [0x8003e48] = 0x40010c00 + 0x08003bd2: f7fef92f ../. BL HAL_GPIO_Init ; 0x8001e34 + 0x08003bd6: 2080 . MOVS r0,#0x80 + 0x08003bd8: 9002 .. STR r0,[sp,#8] + 0x08003bda: 2000 . MOVS r0,#0 + 0x08003bdc: 9003 .. STR r0,[sp,#0xc] + 0x08003bde: 9004 .. STR r0,[sp,#0x10] + 0x08003be0: a902 .. ADD r1,sp,#8 + 0x08003be2: 4899 .H LDR r0,[pc,#612] ; [0x8003e48] = 0x40010c00 + 0x08003be4: f7fef926 ..&. BL HAL_GPIO_Init ; 0x8001e34 + 0x08003be8: bf00 .. NOP + 0x08003bea: 4998 .I LDR r1,[pc,#608] ; [0x8003e4c] = 0x40010000 + 0x08003bec: 6848 Hh LDR r0,[r1,#4] + 0x08003bee: f04060e0 @..` ORR r0,r0,#0x7000000 + 0x08003bf2: f0400004 @... ORR r0,r0,#4 + 0x08003bf6: 6048 H` STR r0,[r1,#4] + 0x08003bf8: bf00 .. NOP + 0x08003bfa: 4895 .H LDR r0,[pc,#596] ; [0x8003e50] = 0x40020058 + 0x08003bfc: 4995 .I LDR r1,[pc,#596] ; [0x8003e54] = 0x20000780 + 0x08003bfe: 6008 .` STR r0,[r1,#0] + 0x08003c00: 2000 . MOVS r0,#0 + 0x08003c02: 6048 H` STR r0,[r1,#4] + 0x08003c04: 2100 .! MOVS r1,#0 + 0x08003c06: 4893 .H LDR r0,[pc,#588] ; [0x8003e54] = 0x20000780 + 0x08003c08: 6081 .` STR r1,[r0,#8] + 0x08003c0a: 2180 .! MOVS r1,#0x80 + 0x08003c0c: 60c1 .` STR r1,[r0,#0xc] + 0x08003c0e: 2100 .! MOVS r1,#0 + 0x08003c10: 6101 .a STR r1,[r0,#0x10] + 0x08003c12: 6141 Aa STR r1,[r0,#0x14] + 0x08003c14: 6181 .a STR r1,[r0,#0x18] + 0x08003c16: 61c1 .a STR r1,[r0,#0x1c] + 0x08003c18: f7fdffde .... BL HAL_DMA_Init ; 0x8001bd8 + 0x08003c1c: b108 .. CBZ r0,0x8003c22 ; HAL_UART_MspInit + 318 + 0x08003c1e: f7fdf91a .... BL Error_Handler ; 0x8000e56 + 0x08003c22: bf00 .. NOP + 0x08003c24: 488b .H LDR r0,[pc,#556] ; [0x8003e54] = 0x20000780 + 0x08003c26: 63a0 .c STR r0,[r4,#0x38] + 0x08003c28: 6244 Db STR r4,[r0,#0x24] + 0x08003c2a: bf00 .. NOP + 0x08003c2c: 4888 .H LDR r0,[pc,#544] ; [0x8003e50] = 0x40020058 + 0x08003c2e: 3814 .8 SUBS r0,r0,#0x14 + 0x08003c30: 4989 .I LDR r1,[pc,#548] ; [0x8003e58] = 0x200007c4 + 0x08003c32: 6008 .` STR r0,[r1,#0] + 0x08003c34: 2010 . MOVS r0,#0x10 + 0x08003c36: 6048 H` STR r0,[r1,#4] + 0x08003c38: 2100 .! MOVS r1,#0 + 0x08003c3a: 4887 .H LDR r0,[pc,#540] ; [0x8003e58] = 0x200007c4 + 0x08003c3c: 6081 .` STR r1,[r0,#8] + 0x08003c3e: 2180 .! MOVS r1,#0x80 + 0x08003c40: 60c1 .` STR r1,[r0,#0xc] + 0x08003c42: 2100 .! MOVS r1,#0 + 0x08003c44: 6101 .a STR r1,[r0,#0x10] + 0x08003c46: 6141 Aa STR r1,[r0,#0x14] + 0x08003c48: 6181 .a STR r1,[r0,#0x18] + 0x08003c4a: 61c1 .a STR r1,[r0,#0x1c] + 0x08003c4c: f7fdffc4 .... BL HAL_DMA_Init ; 0x8001bd8 + 0x08003c50: b108 .. CBZ r0,0x8003c56 ; HAL_UART_MspInit + 370 + 0x08003c52: f7fdf900 .... BL Error_Handler ; 0x8000e56 + 0x08003c56: bf00 .. NOP + 0x08003c58: 487f .H LDR r0,[pc,#508] ; [0x8003e58] = 0x200007c4 + 0x08003c5a: 6360 `c STR r0,[r4,#0x34] + 0x08003c5c: 6244 Db STR r4,[r0,#0x24] + 0x08003c5e: bf00 .. NOP + 0x08003c60: 2200 ." MOVS r2,#0 + 0x08003c62: 2105 .! MOVS r1,#5 + 0x08003c64: 2025 % MOVS r0,#0x25 + 0x08003c66: f7fefb5d ..]. BL HAL_NVIC_SetPriority ; 0x8002324 + 0x08003c6a: 2025 % MOVS r0,#0x25 + 0x08003c6c: f7fefb4a ..J. BL HAL_NVIC_EnableIRQ ; 0x8002304 + 0x08003c70: e0de .. B 0x8003e30 ; HAL_UART_MspInit + 844 + 0x08003c72: e7ff .. B 0x8003c74 ; HAL_UART_MspInit + 400 + 0x08003c74: 4979 yI LDR r1,[pc,#484] ; [0x8003e5c] = 0x40004400 + 0x08003c76: 6820 h LDR r0,[r4,#0] + 0x08003c78: 4288 .B CMP r0,r1 + 0x08003c7a: d16a j. BNE 0x8003d52 ; HAL_UART_MspInit + 622 + 0x08003c7c: bf00 .. NOP + 0x08003c7e: 486e nH LDR r0,[pc,#440] ; [0x8003e38] = 0x40021000 + 0x08003c80: 69c0 .i LDR r0,[r0,#0x1c] + 0x08003c82: f4403000 @..0 ORR r0,r0,#0x20000 + 0x08003c86: 496c lI LDR r1,[pc,#432] ; [0x8003e38] = 0x40021000 + 0x08003c88: 61c8 .a STR r0,[r1,#0x1c] + 0x08003c8a: 4608 .F MOV r0,r1 + 0x08003c8c: 69c0 .i LDR r0,[r0,#0x1c] + 0x08003c8e: f4003000 ...0 AND r0,r0,#0x20000 + 0x08003c92: 9001 .. STR r0,[sp,#4] + 0x08003c94: bf00 .. NOP + 0x08003c96: bf00 .. NOP + 0x08003c98: bf00 .. NOP + 0x08003c9a: 4608 .F MOV r0,r1 + 0x08003c9c: 6980 .i LDR r0,[r0,#0x18] + 0x08003c9e: f0400004 @... ORR r0,r0,#4 + 0x08003ca2: 6188 .a STR r0,[r1,#0x18] + 0x08003ca4: 4608 .F MOV r0,r1 + 0x08003ca6: 6980 .i LDR r0,[r0,#0x18] + 0x08003ca8: f0000004 .... AND r0,r0,#4 + 0x08003cac: 9001 .. STR r0,[sp,#4] + 0x08003cae: bf00 .. NOP + 0x08003cb0: bf00 .. NOP + 0x08003cb2: 2004 . MOVS r0,#4 + 0x08003cb4: 9002 .. STR r0,[sp,#8] + 0x08003cb6: 2002 . MOVS r0,#2 + 0x08003cb8: 9003 .. STR r0,[sp,#0xc] + 0x08003cba: 2003 . MOVS r0,#3 + 0x08003cbc: 9005 .. STR r0,[sp,#0x14] + 0x08003cbe: a902 .. ADD r1,sp,#8 + 0x08003cc0: 4867 gH LDR r0,[pc,#412] ; [0x8003e60] = 0x40010800 + 0x08003cc2: f7fef8b7 .... BL HAL_GPIO_Init ; 0x8001e34 + 0x08003cc6: 2008 . MOVS r0,#8 + 0x08003cc8: 9002 .. STR r0,[sp,#8] + 0x08003cca: 2000 . MOVS r0,#0 + 0x08003ccc: 9003 .. STR r0,[sp,#0xc] + 0x08003cce: 9004 .. STR r0,[sp,#0x10] + 0x08003cd0: a902 .. ADD r1,sp,#8 + 0x08003cd2: 4863 cH LDR r0,[pc,#396] ; [0x8003e60] = 0x40010800 + 0x08003cd4: f7fef8ae .... BL HAL_GPIO_Init ; 0x8001e34 + 0x08003cd8: 485d ]H LDR r0,[pc,#372] ; [0x8003e50] = 0x40020058 + 0x08003cda: 3014 .0 ADDS r0,r0,#0x14 + 0x08003cdc: 4961 aI LDR r1,[pc,#388] ; [0x8003e64] = 0x20000808 + 0x08003cde: 6008 .` STR r0,[r1,#0] + 0x08003ce0: 2000 . MOVS r0,#0 + 0x08003ce2: 6048 H` STR r0,[r1,#4] + 0x08003ce4: 2100 .! MOVS r1,#0 + 0x08003ce6: 485f _H LDR r0,[pc,#380] ; [0x8003e64] = 0x20000808 + 0x08003ce8: 6081 .` STR r1,[r0,#8] + 0x08003cea: 2180 .! MOVS r1,#0x80 + 0x08003cec: 60c1 .` STR r1,[r0,#0xc] + 0x08003cee: 2100 .! MOVS r1,#0 + 0x08003cf0: 6101 .a STR r1,[r0,#0x10] + 0x08003cf2: 6141 Aa STR r1,[r0,#0x14] + 0x08003cf4: 6181 .a STR r1,[r0,#0x18] + 0x08003cf6: 61c1 .a STR r1,[r0,#0x1c] + 0x08003cf8: f7fdff6e ..n. BL HAL_DMA_Init ; 0x8001bd8 + 0x08003cfc: b108 .. CBZ r0,0x8003d02 ; HAL_UART_MspInit + 542 + 0x08003cfe: f7fdf8aa .... BL Error_Handler ; 0x8000e56 + 0x08003d02: bf00 .. NOP + 0x08003d04: 4857 WH LDR r0,[pc,#348] ; [0x8003e64] = 0x20000808 + 0x08003d06: 63a0 .c STR r0,[r4,#0x38] + 0x08003d08: 6244 Db STR r4,[r0,#0x24] + 0x08003d0a: bf00 .. NOP + 0x08003d0c: 4850 PH LDR r0,[pc,#320] ; [0x8003e50] = 0x40020058 + 0x08003d0e: 3028 (0 ADDS r0,r0,#0x28 + 0x08003d10: 4955 UI LDR r1,[pc,#340] ; [0x8003e68] = 0x2000084c + 0x08003d12: 6008 .` STR r0,[r1,#0] + 0x08003d14: 2010 . MOVS r0,#0x10 + 0x08003d16: 6048 H` STR r0,[r1,#4] + 0x08003d18: 2100 .! MOVS r1,#0 + 0x08003d1a: 4853 SH LDR r0,[pc,#332] ; [0x8003e68] = 0x2000084c + 0x08003d1c: 6081 .` STR r1,[r0,#8] + 0x08003d1e: 2180 .! MOVS r1,#0x80 + 0x08003d20: 60c1 .` STR r1,[r0,#0xc] + 0x08003d22: 2100 .! MOVS r1,#0 + 0x08003d24: 6101 .a STR r1,[r0,#0x10] + 0x08003d26: 6141 Aa STR r1,[r0,#0x14] + 0x08003d28: 6181 .a STR r1,[r0,#0x18] + 0x08003d2a: 61c1 .a STR r1,[r0,#0x1c] + 0x08003d2c: f7fdff54 ..T. BL HAL_DMA_Init ; 0x8001bd8 + 0x08003d30: b108 .. CBZ r0,0x8003d36 ; HAL_UART_MspInit + 594 + 0x08003d32: f7fdf890 .... BL Error_Handler ; 0x8000e56 + 0x08003d36: bf00 .. NOP + 0x08003d38: 484b KH LDR r0,[pc,#300] ; [0x8003e68] = 0x2000084c + 0x08003d3a: 6360 `c STR r0,[r4,#0x34] + 0x08003d3c: 6244 Db STR r4,[r0,#0x24] + 0x08003d3e: bf00 .. NOP + 0x08003d40: 2200 ." MOVS r2,#0 + 0x08003d42: 2105 .! MOVS r1,#5 + 0x08003d44: 2026 & MOVS r0,#0x26 + 0x08003d46: f7fefaed .... BL HAL_NVIC_SetPriority ; 0x8002324 + 0x08003d4a: 2026 & MOVS r0,#0x26 + 0x08003d4c: f7fefada .... BL HAL_NVIC_EnableIRQ ; 0x8002304 + 0x08003d50: e06e n. B 0x8003e30 ; HAL_UART_MspInit + 844 + 0x08003d52: 4946 FI LDR r1,[pc,#280] ; [0x8003e6c] = 0x40004800 + 0x08003d54: 6820 h LDR r0,[r4,#0] + 0x08003d56: 4288 .B CMP r0,r1 + 0x08003d58: d16a j. BNE 0x8003e30 ; HAL_UART_MspInit + 844 + 0x08003d5a: bf00 .. NOP + 0x08003d5c: 4836 6H LDR r0,[pc,#216] ; [0x8003e38] = 0x40021000 + 0x08003d5e: 69c0 .i LDR r0,[r0,#0x1c] + 0x08003d60: f4402080 @.. ORR r0,r0,#0x40000 + 0x08003d64: 4934 4I LDR r1,[pc,#208] ; [0x8003e38] = 0x40021000 + 0x08003d66: 61c8 .a STR r0,[r1,#0x1c] + 0x08003d68: 4608 .F MOV r0,r1 + 0x08003d6a: 69c0 .i LDR r0,[r0,#0x1c] + 0x08003d6c: f4002080 ... AND r0,r0,#0x40000 + 0x08003d70: 9001 .. STR r0,[sp,#4] + 0x08003d72: bf00 .. NOP + 0x08003d74: bf00 .. NOP + 0x08003d76: bf00 .. NOP + 0x08003d78: 4608 .F MOV r0,r1 + 0x08003d7a: 6980 .i LDR r0,[r0,#0x18] + 0x08003d7c: f0400008 @... ORR r0,r0,#8 + 0x08003d80: 6188 .a STR r0,[r1,#0x18] + 0x08003d82: 4608 .F MOV r0,r1 + 0x08003d84: 6980 .i LDR r0,[r0,#0x18] + 0x08003d86: f0000008 .... AND r0,r0,#8 + 0x08003d8a: 9001 .. STR r0,[sp,#4] + 0x08003d8c: bf00 .. NOP + 0x08003d8e: bf00 .. NOP + 0x08003d90: 1508 .. ASRS r0,r1,#20 + 0x08003d92: 9002 .. STR r0,[sp,#8] + 0x08003d94: 2002 . MOVS r0,#2 + 0x08003d96: 9003 .. STR r0,[sp,#0xc] + 0x08003d98: 2003 . MOVS r0,#3 + 0x08003d9a: 9005 .. STR r0,[sp,#0x14] + 0x08003d9c: a902 .. ADD r1,sp,#8 + 0x08003d9e: 482a *H LDR r0,[pc,#168] ; [0x8003e48] = 0x40010c00 + 0x08003da0: f7fef848 ..H. BL HAL_GPIO_Init ; 0x8001e34 + 0x08003da4: f44f6000 O..` MOV r0,#0x800 + 0x08003da8: 9002 .. STR r0,[sp,#8] + 0x08003daa: 2000 . MOVS r0,#0 + 0x08003dac: 9003 .. STR r0,[sp,#0xc] + 0x08003dae: 9004 .. STR r0,[sp,#0x10] + 0x08003db0: a902 .. ADD r1,sp,#8 + 0x08003db2: 4825 %H LDR r0,[pc,#148] ; [0x8003e48] = 0x40010c00 + 0x08003db4: f7fef83e ..>. BL HAL_GPIO_Init ; 0x8001e34 + 0x08003db8: 4825 %H LDR r0,[pc,#148] ; [0x8003e50] = 0x40020058 + 0x08003dba: 3828 (8 SUBS r0,r0,#0x28 + 0x08003dbc: 492c ,I LDR r1,[pc,#176] ; [0x8003e70] = 0x20000890 + 0x08003dbe: 6008 .` STR r0,[r1,#0] + 0x08003dc0: 2000 . MOVS r0,#0 + 0x08003dc2: 6048 H` STR r0,[r1,#4] + 0x08003dc4: 2100 .! MOVS r1,#0 + 0x08003dc6: 482a *H LDR r0,[pc,#168] ; [0x8003e70] = 0x20000890 + 0x08003dc8: 6081 .` STR r1,[r0,#8] + 0x08003dca: 2180 .! MOVS r1,#0x80 + 0x08003dcc: 60c1 .` STR r1,[r0,#0xc] + 0x08003dce: 2100 .! MOVS r1,#0 + 0x08003dd0: 6101 .a STR r1,[r0,#0x10] + 0x08003dd2: 6141 Aa STR r1,[r0,#0x14] + 0x08003dd4: 6181 .a STR r1,[r0,#0x18] + 0x08003dd6: 61c1 .a STR r1,[r0,#0x1c] + 0x08003dd8: f7fdfefe .... BL HAL_DMA_Init ; 0x8001bd8 + 0x08003ddc: b108 .. CBZ r0,0x8003de2 ; HAL_UART_MspInit + 766 + 0x08003dde: f7fdf83a ..:. BL Error_Handler ; 0x8000e56 + 0x08003de2: bf00 .. NOP + 0x08003de4: 4822 "H LDR r0,[pc,#136] ; [0x8003e70] = 0x20000890 + 0x08003de6: 63a0 .c STR r0,[r4,#0x38] + 0x08003de8: 6244 Db STR r4,[r0,#0x24] + 0x08003dea: bf00 .. NOP + 0x08003dec: 4818 .H LDR r0,[pc,#96] ; [0x8003e50] = 0x40020058 + 0x08003dee: 383c <8 SUBS r0,r0,#0x3c + 0x08003df0: 4920 I LDR r1,[pc,#128] ; [0x8003e74] = 0x200008d4 + 0x08003df2: 6008 .` STR r0,[r1,#0] + 0x08003df4: 2010 . MOVS r0,#0x10 + 0x08003df6: 6048 H` STR r0,[r1,#4] + 0x08003df8: 2100 .! MOVS r1,#0 + 0x08003dfa: 481e .H LDR r0,[pc,#120] ; [0x8003e74] = 0x200008d4 + 0x08003dfc: 6081 .` STR r1,[r0,#8] + 0x08003dfe: 2180 .! MOVS r1,#0x80 + 0x08003e00: 60c1 .` STR r1,[r0,#0xc] + 0x08003e02: 2100 .! MOVS r1,#0 + 0x08003e04: 6101 .a STR r1,[r0,#0x10] + 0x08003e06: 6141 Aa STR r1,[r0,#0x14] + 0x08003e08: 6181 .a STR r1,[r0,#0x18] + 0x08003e0a: 61c1 .a STR r1,[r0,#0x1c] + 0x08003e0c: f7fdfee4 .... BL HAL_DMA_Init ; 0x8001bd8 + 0x08003e10: b108 .. CBZ r0,0x8003e16 ; HAL_UART_MspInit + 818 + 0x08003e12: f7fdf820 .. . BL Error_Handler ; 0x8000e56 + 0x08003e16: bf00 .. NOP + 0x08003e18: 4816 .H LDR r0,[pc,#88] ; [0x8003e74] = 0x200008d4 + 0x08003e1a: 6360 `c STR r0,[r4,#0x34] + 0x08003e1c: 6244 Db STR r4,[r0,#0x24] + 0x08003e1e: bf00 .. NOP + 0x08003e20: 2200 ." MOVS r2,#0 + 0x08003e22: 2105 .! MOVS r1,#5 + 0x08003e24: 2027 ' MOVS r0,#0x27 + 0x08003e26: f7fefa7d ..}. BL HAL_NVIC_SetPriority ; 0x8002324 + 0x08003e2a: 2027 ' MOVS r0,#0x27 + 0x08003e2c: f7fefa6a ..j. BL HAL_NVIC_EnableIRQ ; 0x8002304 + 0x08003e30: b006 .. ADD sp,sp,#0x18 + 0x08003e32: bd10 .. POP {r4,pc} + $d + 0x08003e34: 40005000 .P.@ DCD 1073762304 + 0x08003e38: 40021000 ...@ DCD 1073876992 + 0x08003e3c: 40011000 ...@ DCD 1073811456 + 0x08003e40: 40011400 ...@ DCD 1073812480 + 0x08003e44: 40013800 .8.@ DCD 1073821696 + 0x08003e48: 40010c00 ...@ DCD 1073810432 + 0x08003e4c: 40010000 ...@ DCD 1073807360 + 0x08003e50: 40020058 X..@ DCD 1073872984 + 0x08003e54: 20000780 ... DCD 536872832 + 0x08003e58: 200007c4 ... DCD 536872900 + 0x08003e5c: 40004400 .D.@ DCD 1073759232 + 0x08003e60: 40010800 ...@ DCD 1073809408 + 0x08003e64: 20000808 ... DCD 536872968 + 0x08003e68: 2000084c L.. DCD 536873036 + 0x08003e6c: 40004800 .H.@ DCD 1073760256 + 0x08003e70: 20000890 ... DCD 536873104 + 0x08003e74: 200008d4 ... DCD 536873172 + $t + i.HAL_UART_RegisterCallback + HAL_UART_RegisterCallback + 0x08003e78: b510 .. PUSH {r4,lr} + 0x08003e7a: 4603 .F MOV r3,r0 + 0x08003e7c: 2400 .$ MOVS r4,#0 + 0x08003e7e: b92a *. CBNZ r2,0x8003e8c ; HAL_UART_RegisterCallback + 20 + 0x08003e80: 6c18 .l LDR r0,[r3,#0x40] + 0x08003e82: f0400020 @. . ORR r0,r0,#0x20 + 0x08003e86: 6418 .d STR r0,[r3,#0x40] + 0x08003e88: 2001 . MOVS r0,#1 + 0x08003e8a: bd10 .. POP {r4,pc} + 0x08003e8c: bf00 .. NOP + 0x08003e8e: f893003c ..<. LDRB r0,[r3,#0x3c] + 0x08003e92: 2801 .( CMP r0,#1 + 0x08003e94: d101 .. BNE 0x8003e9a ; HAL_UART_RegisterCallback + 34 + 0x08003e96: 2002 . MOVS r0,#2 + 0x08003e98: e7f7 .. B 0x8003e8a ; HAL_UART_RegisterCallback + 18 + 0x08003e9a: 2001 . MOVS r0,#1 + 0x08003e9c: f883003c ..<. STRB r0,[r3,#0x3c] + 0x08003ea0: bf00 .. NOP + 0x08003ea2: f893003d ..=. LDRB r0,[r3,#0x3d] + 0x08003ea6: 2820 ( CMP r0,#0x20 + 0x08003ea8: d125 %. BNE 0x8003ef6 ; HAL_UART_RegisterCallback + 126 + 0x08003eaa: 290d .) CMP r1,#0xd + 0x08003eac: d21c .. BCS 0x8003ee8 ; HAL_UART_RegisterCallback + 112 + 0x08003eae: e8dff001 .... TBB [pc,r1] + $d + 0x08003eb2: 0907 .. DCW 2311 + 0x08003eb4: 110f0d0b .... DCD 286199051 + 0x08003eb8: 1b1b1513 .... DCD 454759699 + 0x08003ebc: 0019171b .... DCD 1644315 + $t + 0x08003ec0: 645a Zd STR r2,[r3,#0x44] + 0x08003ec2: e017 .. B 0x8003ef4 ; HAL_UART_RegisterCallback + 124 + 0x08003ec4: 649a .d STR r2,[r3,#0x48] + 0x08003ec6: e015 .. B 0x8003ef4 ; HAL_UART_RegisterCallback + 124 + 0x08003ec8: 64da .d STR r2,[r3,#0x4c] + 0x08003eca: e013 .. B 0x8003ef4 ; HAL_UART_RegisterCallback + 124 + 0x08003ecc: 651a .e STR r2,[r3,#0x50] + 0x08003ece: e011 .. B 0x8003ef4 ; HAL_UART_RegisterCallback + 124 + 0x08003ed0: 655a Ze STR r2,[r3,#0x54] + 0x08003ed2: e00f .. B 0x8003ef4 ; HAL_UART_RegisterCallback + 124 + 0x08003ed4: 659a .e STR r2,[r3,#0x58] + 0x08003ed6: e00d .. B 0x8003ef4 ; HAL_UART_RegisterCallback + 124 + 0x08003ed8: 65da .e STR r2,[r3,#0x5c] + 0x08003eda: e00b .. B 0x8003ef4 ; HAL_UART_RegisterCallback + 124 + 0x08003edc: 661a .f STR r2,[r3,#0x60] + 0x08003ede: e009 .. B 0x8003ef4 ; HAL_UART_RegisterCallback + 124 + 0x08003ee0: 66da .f STR r2,[r3,#0x6c] + 0x08003ee2: e007 .. B 0x8003ef4 ; HAL_UART_RegisterCallback + 124 + 0x08003ee4: 671a .g STR r2,[r3,#0x70] + 0x08003ee6: e005 .. B 0x8003ef4 ; HAL_UART_RegisterCallback + 124 + 0x08003ee8: 6c18 .l LDR r0,[r3,#0x40] + 0x08003eea: f0400020 @. . ORR r0,r0,#0x20 + 0x08003eee: 6418 .d STR r0,[r3,#0x40] + 0x08003ef0: 2401 .$ MOVS r4,#1 + 0x08003ef2: bf00 .. NOP + 0x08003ef4: e017 .. B 0x8003f26 ; HAL_UART_RegisterCallback + 174 + 0x08003ef6: f893003d ..=. LDRB r0,[r3,#0x3d] + 0x08003efa: b978 x. CBNZ r0,0x8003f1c ; HAL_UART_RegisterCallback + 164 + 0x08003efc: 290b .) CMP r1,#0xb + 0x08003efe: d002 .. BEQ 0x8003f06 ; HAL_UART_RegisterCallback + 142 + 0x08003f00: 290c .) CMP r1,#0xc + 0x08003f02: d104 .. BNE 0x8003f0e ; HAL_UART_RegisterCallback + 150 + 0x08003f04: e001 .. B 0x8003f0a ; HAL_UART_RegisterCallback + 146 + 0x08003f06: 66da .f STR r2,[r3,#0x6c] + 0x08003f08: e007 .. B 0x8003f1a ; HAL_UART_RegisterCallback + 162 + 0x08003f0a: 671a .g STR r2,[r3,#0x70] + 0x08003f0c: e005 .. B 0x8003f1a ; HAL_UART_RegisterCallback + 162 + 0x08003f0e: 6c18 .l LDR r0,[r3,#0x40] + 0x08003f10: f0400020 @. . ORR r0,r0,#0x20 + 0x08003f14: 6418 .d STR r0,[r3,#0x40] + 0x08003f16: 2401 .$ MOVS r4,#1 + 0x08003f18: bf00 .. NOP + 0x08003f1a: e004 .. B 0x8003f26 ; HAL_UART_RegisterCallback + 174 + 0x08003f1c: 6c18 .l LDR r0,[r3,#0x40] + 0x08003f1e: f0400020 @. . ORR r0,r0,#0x20 + 0x08003f22: 6418 .d STR r0,[r3,#0x40] + 0x08003f24: 2401 .$ MOVS r4,#1 + 0x08003f26: bf00 .. NOP + 0x08003f28: 2000 . MOVS r0,#0 + 0x08003f2a: f883003c ..<. STRB r0,[r3,#0x3c] + 0x08003f2e: bf00 .. NOP + 0x08003f30: 4620 F MOV r0,r4 + 0x08003f32: e7aa .. B 0x8003e8a ; HAL_UART_RegisterCallback + 18 + i.HAL_UART_RxCpltCallback + HAL_UART_RxCpltCallback + 0x08003f34: b570 p. PUSH {r4-r6,lr} + 0x08003f36: 4604 .F MOV r4,r0 + 0x08003f38: 4811 .H LDR r0,[pc,#68] ; [0x8003f80] = 0x20000624 + 0x08003f3a: 4284 .B CMP r4,r0 + 0x08003f3c: d100 .. BNE 0x8003f40 ; HAL_UART_RxCpltCallback + 12 + 0x08003f3e: 4d11 .M LDR r5,[pc,#68] ; [0x8003f84] = 0x20000024 + 0x08003f40: 4811 .H LDR r0,[pc,#68] ; [0x8003f88] = 0x20000698 + 0x08003f42: 4284 .B CMP r4,r0 + 0x08003f44: d100 .. BNE 0x8003f48 ; HAL_UART_RxCpltCallback + 20 + 0x08003f46: 4d11 .M LDR r5,[pc,#68] ; [0x8003f8c] = 0x20000094 + 0x08003f48: 4811 .H LDR r0,[pc,#68] ; [0x8003f90] = 0x2000070c + 0x08003f4a: 4284 .B CMP r4,r0 + 0x08003f4c: d100 .. BNE 0x8003f50 ; HAL_UART_RxCpltCallback + 28 + 0x08003f4e: 4d11 .M LDR r5,[pc,#68] ; [0x8003f94] = 0x20000104 + 0x08003f50: 4811 .H LDR r0,[pc,#68] ; [0x8003f98] = 0x200005b0 + 0x08003f52: 4284 .B CMP r4,r0 + 0x08003f54: d100 .. BNE 0x8003f58 ; HAL_UART_RxCpltCallback + 36 + 0x08003f56: 4d11 .M LDR r5,[pc,#68] ; [0x8003f9c] = 0x20000174 + 0x08003f58: 2600 .& MOVS r6,#0 + 0x08003f5a: e008 .. B 0x8003f6e ; HAL_UART_RxCpltCallback + 58 + 0x08003f5c: f105020c .... ADD r2,r5,#0xc + 0x08003f60: 1991 .. ADDS r1,r2,r6 + 0x08003f62: 2300 .# MOVS r3,#0 + 0x08003f64: 461a .F MOV r2,r3 + 0x08003f66: 6868 hh LDR r0,[r5,#4] + 0x08003f68: f005fb60 ..`. BL xQueueGenericSendFromISR ; 0x800962c + 0x08003f6c: 1c76 v. ADDS r6,r6,#1 + 0x08003f6e: 2e64 d. CMP r6,#0x64 + 0x08003f70: dbf4 .. BLT 0x8003f5c ; HAL_UART_RxCpltCallback + 40 + 0x08003f72: 2264 d" MOVS r2,#0x64 + 0x08003f74: f105010c .... ADD r1,r5,#0xc + 0x08003f78: 6828 (h LDR r0,[r5,#0] + 0x08003f7a: f7fffaf8 .... BL HAL_UARTEx_ReceiveToIdle_DMA ; 0x800356e + 0x08003f7e: bd70 p. POP {r4-r6,pc} + $d + 0x08003f80: 20000624 $.. DCD 536872484 + 0x08003f84: 20000024 $.. DCD 536870948 + 0x08003f88: 20000698 ... DCD 536872600 + 0x08003f8c: 20000094 ... DCD 536871060 + 0x08003f90: 2000070c ... DCD 536872716 + 0x08003f94: 20000104 ... DCD 536871172 + 0x08003f98: 200005b0 ... DCD 536872368 + 0x08003f9c: 20000174 t.. DCD 536871284 + $t + i.HAL_UART_RxHalfCpltCallback + HAL_UART_RxHalfCpltCallback + 0x08003fa0: 4770 pG BX lr + i.HAL_UART_Transmit + HAL_UART_Transmit + 0x08003fa2: e92d4ff8 -..O PUSH {r3-r11,lr} + 0x08003fa6: 4604 .F MOV r4,r0 + 0x08003fa8: 460e .F MOV r6,r1 + 0x08003faa: 4617 .F MOV r7,r2 + 0x08003fac: 4699 .F MOV r9,r3 + 0x08003fae: f04f0a00 O... MOV r10,#0 + 0x08003fb2: f894003d ..=. LDRB r0,[r4,#0x3d] + 0x08003fb6: 2820 ( CMP r0,#0x20 + 0x08003fb8: d15a Z. BNE 0x8004070 ; HAL_UART_Transmit + 206 + 0x08003fba: b106 .. CBZ r6,0x8003fbe ; HAL_UART_Transmit + 28 + 0x08003fbc: b917 .. CBNZ r7,0x8003fc4 ; HAL_UART_Transmit + 34 + 0x08003fbe: 2001 . MOVS r0,#1 + 0x08003fc0: e8bd8ff8 .... POP {r3-r11,pc} + 0x08003fc4: bf00 .. NOP + 0x08003fc6: f894003c ..<. LDRB r0,[r4,#0x3c] + 0x08003fca: 2801 .( CMP r0,#1 + 0x08003fcc: d101 .. BNE 0x8003fd2 ; HAL_UART_Transmit + 48 + 0x08003fce: 2002 . MOVS r0,#2 + 0x08003fd0: e7f6 .. B 0x8003fc0 ; HAL_UART_Transmit + 30 + 0x08003fd2: 2001 . MOVS r0,#1 + 0x08003fd4: f884003c ..<. STRB r0,[r4,#0x3c] + 0x08003fd8: bf00 .. NOP + 0x08003fda: 2000 . MOVS r0,#0 + 0x08003fdc: 6420 d STR r0,[r4,#0x40] + 0x08003fde: 2021 ! MOVS r0,#0x21 + 0x08003fe0: f884003d ..=. STRB r0,[r4,#0x3d] + 0x08003fe4: f7fef8bc .... BL HAL_GetTick ; 0x8002160 + 0x08003fe8: 4682 .F MOV r10,r0 + 0x08003fea: 84a7 .. STRH r7,[r4,#0x24] + 0x08003fec: 84e7 .. STRH r7,[r4,#0x26] + 0x08003fee: 68a0 .h LDR r0,[r4,#8] + 0x08003ff0: f5b05f80 ..._ CMP r0,#0x1000 + 0x08003ff4: d104 .. BNE 0x8004000 ; HAL_UART_Transmit + 94 + 0x08003ff6: 6920 i LDR r0,[r4,#0x10] + 0x08003ff8: b910 .. CBNZ r0,0x8004000 ; HAL_UART_Transmit + 94 + 0x08003ffa: 2500 .% MOVS r5,#0 + 0x08003ffc: 46b0 .F MOV r8,r6 + 0x08003ffe: e002 .. B 0x8004006 ; HAL_UART_Transmit + 100 + 0x08004000: 4635 5F MOV r5,r6 + 0x08004002: f04f0800 O... MOV r8,#0 + 0x08004006: bf00 .. NOP + 0x08004008: 2000 . MOVS r0,#0 + 0x0800400a: f884003c ..<. STRB r0,[r4,#0x3c] + 0x0800400e: bf00 .. NOP + 0x08004010: e01b .. B 0x800404a ; HAL_UART_Transmit + 168 + 0x08004012: 4653 SF MOV r3,r10 + 0x08004014: 2200 ." MOVS r2,#0 + 0x08004016: 2180 .! MOVS r1,#0x80 + 0x08004018: 4620 F MOV r0,r4 + 0x0800401a: f8cd9000 .... STR r9,[sp,#0] + 0x0800401e: f001faf5 .... BL UART_WaitOnFlagUntilTimeout ; 0x800560c + 0x08004022: b108 .. CBZ r0,0x8004028 ; HAL_UART_Transmit + 134 + 0x08004024: 2003 . MOVS r0,#3 + 0x08004026: e7cb .. B 0x8003fc0 ; HAL_UART_Transmit + 30 + 0x08004028: b945 E. CBNZ r5,0x800403c ; HAL_UART_Transmit + 154 + 0x0800402a: f8b80000 .... LDRH r0,[r8,#0] + 0x0800402e: f3c00008 .... UBFX r0,r0,#0,#9 + 0x08004032: 6821 !h LDR r1,[r4,#0] + 0x08004034: 6048 H` STR r0,[r1,#4] + 0x08004036: f1080802 .... ADD r8,r8,#2 + 0x0800403a: e003 .. B 0x8004044 ; HAL_UART_Transmit + 162 + 0x0800403c: 7828 (x LDRB r0,[r5,#0] + 0x0800403e: 6821 !h LDR r1,[r4,#0] + 0x08004040: 6048 H` STR r0,[r1,#4] + 0x08004042: 1c6d m. ADDS r5,r5,#1 + 0x08004044: 8ce0 .. LDRH r0,[r4,#0x26] + 0x08004046: 1e40 @. SUBS r0,r0,#1 + 0x08004048: 84e0 .. STRH r0,[r4,#0x26] + 0x0800404a: 8ce0 .. LDRH r0,[r4,#0x26] + 0x0800404c: 2800 .( CMP r0,#0 + 0x0800404e: d1e0 .. BNE 0x8004012 ; HAL_UART_Transmit + 112 + 0x08004050: 4653 SF MOV r3,r10 + 0x08004052: 2200 ." MOVS r2,#0 + 0x08004054: 2140 @! MOVS r1,#0x40 + 0x08004056: 4620 F MOV r0,r4 + 0x08004058: f8cd9000 .... STR r9,[sp,#0] + 0x0800405c: f001fad6 .... BL UART_WaitOnFlagUntilTimeout ; 0x800560c + 0x08004060: b108 .. CBZ r0,0x8004066 ; HAL_UART_Transmit + 196 + 0x08004062: 2003 . MOVS r0,#3 + 0x08004064: e7ac .. B 0x8003fc0 ; HAL_UART_Transmit + 30 + 0x08004066: 2020 MOVS r0,#0x20 + 0x08004068: f884003d ..=. STRB r0,[r4,#0x3d] + 0x0800406c: 2000 . MOVS r0,#0 + 0x0800406e: e7a7 .. B 0x8003fc0 ; HAL_UART_Transmit + 30 + 0x08004070: 2002 . MOVS r0,#2 + 0x08004072: e7a5 .. B 0x8003fc0 ; HAL_UART_Transmit + 30 + i.HAL_UART_Transmit_DMA + HAL_UART_Transmit_DMA + 0x08004074: b5f7 .. PUSH {r0-r2,r4-r7,lr} + 0x08004076: 4604 .F MOV r4,r0 + 0x08004078: 4615 .F MOV r5,r2 + 0x0800407a: f894003d ..=. LDRB r0,[r4,#0x3d] + 0x0800407e: 2820 ( CMP r0,#0x20 + 0x08004080: d13d =. BNE 0x80040fe ; HAL_UART_Transmit_DMA + 138 + 0x08004082: 9801 .. LDR r0,[sp,#4] + 0x08004084: b100 .. CBZ r0,0x8004088 ; HAL_UART_Transmit_DMA + 20 + 0x08004086: b90d .. CBNZ r5,0x800408c ; HAL_UART_Transmit_DMA + 24 + 0x08004088: 2001 . MOVS r0,#1 + 0x0800408a: bdfe .. POP {r1-r7,pc} + 0x0800408c: bf00 .. NOP + 0x0800408e: f894003c ..<. LDRB r0,[r4,#0x3c] + 0x08004092: 2801 .( CMP r0,#1 + 0x08004094: d101 .. BNE 0x800409a ; HAL_UART_Transmit_DMA + 38 + 0x08004096: 2002 . MOVS r0,#2 + 0x08004098: e7f7 .. B 0x800408a ; HAL_UART_Transmit_DMA + 22 + 0x0800409a: 2001 . MOVS r0,#1 + 0x0800409c: f884003c ..<. STRB r0,[r4,#0x3c] + 0x080040a0: bf00 .. NOP + 0x080040a2: 9801 .. LDR r0,[sp,#4] + 0x080040a4: 6220 b STR r0,[r4,#0x20] + 0x080040a6: 84a5 .. STRH r5,[r4,#0x24] + 0x080040a8: 84e5 .. STRH r5,[r4,#0x26] + 0x080040aa: 2000 . MOVS r0,#0 + 0x080040ac: 6420 d STR r0,[r4,#0x40] + 0x080040ae: 2021 ! MOVS r0,#0x21 + 0x080040b0: f884003d ..=. STRB r0,[r4,#0x3d] + 0x080040b4: 4813 .H LDR r0,[pc,#76] ; [0x8004104] = 0x8005119 + 0x080040b6: 6b61 ak LDR r1,[r4,#0x34] + 0x080040b8: 6288 .b STR r0,[r1,#0x28] + 0x080040ba: 4813 .H LDR r0,[pc,#76] ; [0x8004108] = 0x800514f + 0x080040bc: 6b61 ak LDR r1,[r4,#0x34] + 0x080040be: 62c8 .b STR r0,[r1,#0x2c] + 0x080040c0: 4812 .H LDR r0,[pc,#72] ; [0x800410c] = 0x8005041 + 0x080040c2: 6b61 ak LDR r1,[r4,#0x34] + 0x080040c4: 6308 .c STR r0,[r1,#0x30] + 0x080040c6: 2000 . MOVS r0,#0 + 0x080040c8: 6b61 ak LDR r1,[r4,#0x34] + 0x080040ca: 6348 Hc STR r0,[r1,#0x34] + 0x080040cc: ae01 .. ADD r6,sp,#4 + 0x080040ce: 6823 #h LDR r3,[r4,#0] + 0x080040d0: 1d1a .. ADDS r2,r3,#4 + 0x080040d2: 6831 1h LDR r1,[r6,#0] + 0x080040d4: 462b +F MOV r3,r5 + 0x080040d6: 6b60 `k LDR r0,[r4,#0x34] + 0x080040d8: f7fdfdc4 .... BL HAL_DMA_Start_IT ; 0x8001c64 + 0x080040dc: f06f0040 o.@. MVN r0,#0x40 + 0x080040e0: 6821 !h LDR r1,[r4,#0] + 0x080040e2: 6008 .` STR r0,[r1,#0] + 0x080040e4: bf00 .. NOP + 0x080040e6: 2000 . MOVS r0,#0 + 0x080040e8: f884003c ..<. STRB r0,[r4,#0x3c] + 0x080040ec: bf00 .. NOP + 0x080040ee: 6820 h LDR r0,[r4,#0] + 0x080040f0: 6940 @i LDR r0,[r0,#0x14] + 0x080040f2: f0400080 @... ORR r0,r0,#0x80 + 0x080040f6: 6821 !h LDR r1,[r4,#0] + 0x080040f8: 6148 Ha STR r0,[r1,#0x14] + 0x080040fa: 2000 . MOVS r0,#0 + 0x080040fc: e7c5 .. B 0x800408a ; HAL_UART_Transmit_DMA + 22 + 0x080040fe: 2002 . MOVS r0,#2 + 0x08004100: e7c3 .. B 0x800408a ; HAL_UART_Transmit_DMA + 22 + $d + 0x08004102: 0000 .. DCW 0 + 0x08004104: 08005119 .Q.. DCD 134238489 + 0x08004108: 0800514f OQ.. DCD 134238543 + 0x0800410c: 08005041 AP.. DCD 134238273 + $t + i.HAL_UART_Transmit_IT + HAL_UART_Transmit_IT + 0x08004110: b510 .. PUSH {r4,lr} + 0x08004112: 4603 .F MOV r3,r0 + 0x08004114: f893003d ..=. LDRB r0,[r3,#0x3d] + 0x08004118: 2820 ( CMP r0,#0x20 + 0x0800411a: d123 #. BNE 0x8004164 ; HAL_UART_Transmit_IT + 84 + 0x0800411c: b101 .. CBZ r1,0x8004120 ; HAL_UART_Transmit_IT + 16 + 0x0800411e: b90a .. CBNZ r2,0x8004124 ; HAL_UART_Transmit_IT + 20 + 0x08004120: 2001 . MOVS r0,#1 + 0x08004122: bd10 .. POP {r4,pc} + 0x08004124: bf00 .. NOP + 0x08004126: f893003c ..<. LDRB r0,[r3,#0x3c] + 0x0800412a: 2801 .( CMP r0,#1 + 0x0800412c: d101 .. BNE 0x8004132 ; HAL_UART_Transmit_IT + 34 + 0x0800412e: 2002 . MOVS r0,#2 + 0x08004130: e7f7 .. B 0x8004122 ; HAL_UART_Transmit_IT + 18 + 0x08004132: 2001 . MOVS r0,#1 + 0x08004134: f883003c ..<. STRB r0,[r3,#0x3c] + 0x08004138: bf00 .. NOP + 0x0800413a: 6219 .b STR r1,[r3,#0x20] + 0x0800413c: 849a .. STRH r2,[r3,#0x24] + 0x0800413e: 84da .. STRH r2,[r3,#0x26] + 0x08004140: 2000 . MOVS r0,#0 + 0x08004142: 6418 .d STR r0,[r3,#0x40] + 0x08004144: 2021 ! MOVS r0,#0x21 + 0x08004146: f883003d ..=. STRB r0,[r3,#0x3d] + 0x0800414a: bf00 .. NOP + 0x0800414c: 2000 . MOVS r0,#0 + 0x0800414e: f883003c ..<. STRB r0,[r3,#0x3c] + 0x08004152: bf00 .. NOP + 0x08004154: 6818 .h LDR r0,[r3,#0] + 0x08004156: 68c0 .h LDR r0,[r0,#0xc] + 0x08004158: f0400080 @... ORR r0,r0,#0x80 + 0x0800415c: 681c .h LDR r4,[r3,#0] + 0x0800415e: 60e0 .` STR r0,[r4,#0xc] + 0x08004160: 2000 . MOVS r0,#0 + 0x08004162: e7de .. B 0x8004122 ; HAL_UART_Transmit_IT + 18 + 0x08004164: 2002 . MOVS r0,#2 + 0x08004166: e7dc .. B 0x8004122 ; HAL_UART_Transmit_IT + 18 + i.HAL_UART_TxCpltCallback + HAL_UART_TxCpltCallback + 0x08004168: b570 p. PUSH {r4-r6,lr} + 0x0800416a: 4604 .F MOV r4,r0 + 0x0800416c: 480a .H LDR r0,[pc,#40] ; [0x8004198] = 0x20000624 + 0x0800416e: 4284 .B CMP r4,r0 + 0x08004170: d100 .. BNE 0x8004174 ; HAL_UART_TxCpltCallback + 12 + 0x08004172: 4d0a .M LDR r5,[pc,#40] ; [0x800419c] = 0x20000024 + 0x08004174: 480a .H LDR r0,[pc,#40] ; [0x80041a0] = 0x20000698 + 0x08004176: 4284 .B CMP r4,r0 + 0x08004178: d100 .. BNE 0x800417c ; HAL_UART_TxCpltCallback + 20 + 0x0800417a: 4d0a .M LDR r5,[pc,#40] ; [0x80041a4] = 0x20000094 + 0x0800417c: 480a .H LDR r0,[pc,#40] ; [0x80041a8] = 0x2000070c + 0x0800417e: 4284 .B CMP r4,r0 + 0x08004180: d100 .. BNE 0x8004184 ; HAL_UART_TxCpltCallback + 28 + 0x08004182: 4d0a .M LDR r5,[pc,#40] ; [0x80041ac] = 0x20000104 + 0x08004184: 480a .H LDR r0,[pc,#40] ; [0x80041b0] = 0x200005b0 + 0x08004186: 4284 .B CMP r4,r0 + 0x08004188: d100 .. BNE 0x800418c ; HAL_UART_TxCpltCallback + 36 + 0x0800418a: 4d0a .M LDR r5,[pc,#40] ; [0x80041b4] = 0x20000174 + 0x0800418c: 2100 .! MOVS r1,#0 + 0x0800418e: 68a8 .h LDR r0,[r5,#8] + 0x08004190: f005fac8 .... BL xQueueGiveFromISR ; 0x8009724 + 0x08004194: bd70 p. POP {r4-r6,pc} + $d + 0x08004196: 0000 .. DCW 0 + 0x08004198: 20000624 $.. DCD 536872484 + 0x0800419c: 20000024 $.. DCD 536870948 + 0x080041a0: 20000698 ... DCD 536872600 + 0x080041a4: 20000094 ... DCD 536871060 + 0x080041a8: 2000070c ... DCD 536872716 + 0x080041ac: 20000104 ... DCD 536871172 + 0x080041b0: 200005b0 ... DCD 536872368 + 0x080041b4: 20000174 t.. DCD 536871284 + $t + i.HAL_UART_TxHalfCpltCallback + HAL_UART_TxHalfCpltCallback + 0x080041b8: 4770 pG BX lr + i.HardFault_Handler + HardFault_Handler + 0x080041ba: bf00 .. NOP + 0x080041bc: e7fe .. B 0x80041bc ; HardFault_Handler + 2 + i.I2C_VIRTUAL_DELAY_US + I2C_VIRTUAL_DELAY_US + 0x080041be: b510 .. PUSH {r4,lr} + 0x080041c0: 4604 .F MOV r4,r0 + 0x080041c2: 4620 F MOV r0,r4 + 0x080041c4: f001ff52 ..R. BL delay_us ; 0x800606c + 0x080041c8: bd10 .. POP {r4,pc} + 0x080041ca: 0000 .. MOVS r0,r0 + i.I2C_Virtual_Ack + I2C_Virtual_Ack + 0x080041cc: b510 .. PUSH {r4,lr} + 0x080041ce: 2000 . MOVS r0,#0 + 0x080041d0: 490a .I LDR r1,[pc,#40] ; [0x80041fc] = 0x20000308 + 0x080041d2: 6809 .h LDR r1,[r1,#0] + 0x080041d4: 8008 .. STRH r0,[r1,#0] + 0x080041d6: 2002 . MOVS r0,#2 + 0x080041d8: f7fffff1 .... BL I2C_VIRTUAL_DELAY_US ; 0x80041be + 0x080041dc: 2001 . MOVS r0,#1 + 0x080041de: 4908 .I LDR r1,[pc,#32] ; [0x8004200] = 0x20000310 + 0x080041e0: 6809 .h LDR r1,[r1,#0] + 0x080041e2: 8008 .. STRH r0,[r1,#0] + 0x080041e4: 2005 . MOVS r0,#5 + 0x080041e6: f7ffffea .... BL I2C_VIRTUAL_DELAY_US ; 0x80041be + 0x080041ea: 2000 . MOVS r0,#0 + 0x080041ec: 4904 .I LDR r1,[pc,#16] ; [0x8004200] = 0x20000310 + 0x080041ee: 6809 .h LDR r1,[r1,#0] + 0x080041f0: 8008 .. STRH r0,[r1,#0] + 0x080041f2: 2002 . MOVS r0,#2 + 0x080041f4: f7ffffe3 .... BL I2C_VIRTUAL_DELAY_US ; 0x80041be + 0x080041f8: bd10 .. POP {r4,pc} + $d + 0x080041fa: 0000 .. DCW 0 + 0x080041fc: 20000308 ... DCD 536871688 + 0x08004200: 20000310 ... DCD 536871696 + $t + i.I2C_Virtual_ConfigPort + I2C_Virtual_ConfigPort + 0x08004204: b51f .. PUSH {r0-r4,lr} + 0x08004206: 4604 .F MOV r4,r0 + 0x08004208: 2000 . MOVS r0,#0 + 0x0800420a: 9000 .. STR r0,[sp,#0] + 0x0800420c: 9001 .. STR r0,[sp,#4] + 0x0800420e: 9002 .. STR r0,[sp,#8] + 0x08004210: 9003 .. STR r0,[sp,#0xc] + 0x08004212: 88a0 .. LDRH r0,[r4,#4] + 0x08004214: 9000 .. STR r0,[sp,#0] + 0x08004216: 2011 . MOVS r0,#0x11 + 0x08004218: 9001 .. STR r0,[sp,#4] + 0x0800421a: 2001 . MOVS r0,#1 + 0x0800421c: 9002 .. STR r0,[sp,#8] + 0x0800421e: 2003 . MOVS r0,#3 + 0x08004220: 9003 .. STR r0,[sp,#0xc] + 0x08004222: 4669 iF MOV r1,sp + 0x08004224: 6820 h LDR r0,[r4,#0] + 0x08004226: f7fdfe05 .... BL HAL_GPIO_Init ; 0x8001e34 + 0x0800422a: 89a0 .. LDRH r0,[r4,#0xc] + 0x0800422c: 9000 .. STR r0,[sp,#0] + 0x0800422e: 2001 . MOVS r0,#1 + 0x08004230: 9001 .. STR r0,[sp,#4] + 0x08004232: 9002 .. STR r0,[sp,#8] + 0x08004234: 2003 . MOVS r0,#3 + 0x08004236: 9003 .. STR r0,[sp,#0xc] + 0x08004238: 4669 iF MOV r1,sp + 0x0800423a: 68a0 .h LDR r0,[r4,#8] + 0x0800423c: f7fdfdfa .... BL HAL_GPIO_Init ; 0x8001e34 + 0x08004240: bd1f .. POP {r0-r4,pc} + 0x08004242: 0000 .. MOVS r0,r0 + i.I2C_Virtual_NoAck + I2C_Virtual_NoAck + 0x08004244: b510 .. PUSH {r4,lr} + 0x08004246: 2001 . MOVS r0,#1 + 0x08004248: 490a .I LDR r1,[pc,#40] ; [0x8004274] = 0x20000308 + 0x0800424a: 6809 .h LDR r1,[r1,#0] + 0x0800424c: 8008 .. STRH r0,[r1,#0] + 0x0800424e: 2002 . MOVS r0,#2 + 0x08004250: f7ffffb5 .... BL I2C_VIRTUAL_DELAY_US ; 0x80041be + 0x08004254: 2001 . MOVS r0,#1 + 0x08004256: 4908 .I LDR r1,[pc,#32] ; [0x8004278] = 0x20000310 + 0x08004258: 6809 .h LDR r1,[r1,#0] + 0x0800425a: 8008 .. STRH r0,[r1,#0] + 0x0800425c: 200a . MOVS r0,#0xa + 0x0800425e: f7ffffae .... BL I2C_VIRTUAL_DELAY_US ; 0x80041be + 0x08004262: 2000 . MOVS r0,#0 + 0x08004264: 4904 .I LDR r1,[pc,#16] ; [0x8004278] = 0x20000310 + 0x08004266: 6809 .h LDR r1,[r1,#0] + 0x08004268: 8008 .. STRH r0,[r1,#0] + 0x0800426a: 2002 . MOVS r0,#2 + 0x0800426c: f7ffffa7 .... BL I2C_VIRTUAL_DELAY_US ; 0x80041be + 0x08004270: bd10 .. POP {r4,pc} + $d + 0x08004272: 0000 .. DCW 0 + 0x08004274: 20000308 ... DCD 536871688 + 0x08004278: 20000310 ... DCD 536871696 + $t + i.I2C_Virtual_RcvByte + I2C_Virtual_RcvByte + 0x0800427c: b570 p. PUSH {r4-r6,lr} + 0x0800427e: 2400 .$ MOVS r4,#0 + 0x08004280: 2000 . MOVS r0,#0 + 0x08004282: 4919 .I LDR r1,[pc,#100] ; [0x80042e8] = 0x20000310 + 0x08004284: 6809 .h LDR r1,[r1,#0] + 0x08004286: 8008 .. STRH r0,[r1,#0] + 0x08004288: 2001 . MOVS r0,#1 + 0x0800428a: 4918 .I LDR r1,[pc,#96] ; [0x80042ec] = 0x20000308 + 0x0800428c: 6809 .h LDR r1,[r1,#0] + 0x0800428e: 8008 .. STRH r0,[r1,#0] + 0x08004290: f000f868 ..h. BL I2C_Virtual_SetSDA_In ; 0x8004364 + 0x08004294: 2005 . MOVS r0,#5 + 0x08004296: f7ffff92 .... BL I2C_VIRTUAL_DELAY_US ; 0x80041be + 0x0800429a: 2500 .% MOVS r5,#0 + 0x0800429c: e01b .. B 0x80042d6 ; I2C_Virtual_RcvByte + 90 + 0x0800429e: 2001 . MOVS r0,#1 + 0x080042a0: 4911 .I LDR r1,[pc,#68] ; [0x80042e8] = 0x20000310 + 0x080042a2: 6809 .h LDR r1,[r1,#0] + 0x080042a4: 8008 .. STRH r0,[r1,#0] + 0x080042a6: 2002 . MOVS r0,#2 + 0x080042a8: f7ffff89 .... BL I2C_VIRTUAL_DELAY_US ; 0x80041be + 0x080042ac: 0660 `. LSLS r0,r4,#25 + 0x080042ae: 0e04 .. LSRS r4,r0,#24 + 0x080042b0: 480f .H LDR r0,[pc,#60] ; [0x80042f0] = 0x2000030c + 0x080042b2: 6800 .h LDR r0,[r0,#0] + 0x080042b4: 8800 .. LDRH r0,[r0,#0] + 0x080042b6: 2801 .( CMP r0,#1 + 0x080042b8: d101 .. BNE 0x80042be ; I2C_Virtual_RcvByte + 66 + 0x080042ba: 1c60 `. ADDS r0,r4,#1 + 0x080042bc: b2c4 .. UXTB r4,r0 + 0x080042be: 2002 . MOVS r0,#2 + 0x080042c0: f7ffff7d ..}. BL I2C_VIRTUAL_DELAY_US ; 0x80041be + 0x080042c4: 2000 . MOVS r0,#0 + 0x080042c6: 4908 .I LDR r1,[pc,#32] ; [0x80042e8] = 0x20000310 + 0x080042c8: 6809 .h LDR r1,[r1,#0] + 0x080042ca: 8008 .. STRH r0,[r1,#0] + 0x080042cc: 2005 . MOVS r0,#5 + 0x080042ce: f7ffff76 ..v. BL I2C_VIRTUAL_DELAY_US ; 0x80041be + 0x080042d2: 1c68 h. ADDS r0,r5,#1 + 0x080042d4: b2c5 .. UXTB r5,r0 + 0x080042d6: 2d08 .- CMP r5,#8 + 0x080042d8: dbe1 .. BLT 0x800429e ; I2C_Virtual_RcvByte + 34 + 0x080042da: f000f857 ..W. BL I2C_Virtual_SetSDA_Out ; 0x800438c + 0x080042de: 2002 . MOVS r0,#2 + 0x080042e0: f7ffff6d ..m. BL I2C_VIRTUAL_DELAY_US ; 0x80041be + 0x080042e4: 4620 F MOV r0,r4 + 0x080042e6: bd70 p. POP {r4-r6,pc} + $d + 0x080042e8: 20000310 ... DCD 536871696 + 0x080042ec: 20000308 ... DCD 536871688 + 0x080042f0: 2000030c ... DCD 536871692 + $t + i.I2C_Virtual_SendByte + I2C_Virtual_SendByte + 0x080042f4: b570 p. PUSH {r4-r6,lr} + 0x080042f6: 4605 .F MOV r5,r0 + 0x080042f8: 2000 . MOVS r0,#0 + 0x080042fa: 4918 .I LDR r1,[pc,#96] ; [0x800435c] = 0x20000310 + 0x080042fc: 6809 .h LDR r1,[r1,#0] + 0x080042fe: 8008 .. STRH r0,[r1,#0] + 0x08004300: 2005 . MOVS r0,#5 + 0x08004302: f7ffff5c ..\. BL I2C_VIRTUAL_DELAY_US ; 0x80041be + 0x08004306: 2400 .$ MOVS r4,#0 + 0x08004308: e020 . B 0x800434c ; I2C_Virtual_SendByte + 88 + 0x0800430a: 2004 . MOVS r0,#4 + 0x0800430c: f7ffff57 ..W. BL I2C_VIRTUAL_DELAY_US ; 0x80041be + 0x08004310: fa05f004 .... LSL r0,r5,r4 + 0x08004314: f0000080 .... AND r0,r0,#0x80 + 0x08004318: b120 . CBZ r0,0x8004324 ; I2C_Virtual_SendByte + 48 + 0x0800431a: 2001 . MOVS r0,#1 + 0x0800431c: 4910 .I LDR r1,[pc,#64] ; [0x8004360] = 0x20000308 + 0x0800431e: 6809 .h LDR r1,[r1,#0] + 0x08004320: 8008 .. STRH r0,[r1,#0] + 0x08004322: e003 .. B 0x800432c ; I2C_Virtual_SendByte + 56 + 0x08004324: 2000 . MOVS r0,#0 + 0x08004326: 490e .I LDR r1,[pc,#56] ; [0x8004360] = 0x20000308 + 0x08004328: 6809 .h LDR r1,[r1,#0] + 0x0800432a: 8008 .. STRH r0,[r1,#0] + 0x0800432c: 2005 . MOVS r0,#5 + 0x0800432e: f7ffff46 ..F. BL I2C_VIRTUAL_DELAY_US ; 0x80041be + 0x08004332: 2001 . MOVS r0,#1 + 0x08004334: 4909 .I LDR r1,[pc,#36] ; [0x800435c] = 0x20000310 + 0x08004336: 6809 .h LDR r1,[r1,#0] + 0x08004338: 8008 .. STRH r0,[r1,#0] + 0x0800433a: 2005 . MOVS r0,#5 + 0x0800433c: f7ffff3f ..?. BL I2C_VIRTUAL_DELAY_US ; 0x80041be + 0x08004340: 2000 . MOVS r0,#0 + 0x08004342: 4906 .I LDR r1,[pc,#24] ; [0x800435c] = 0x20000310 + 0x08004344: 6809 .h LDR r1,[r1,#0] + 0x08004346: 8008 .. STRH r0,[r1,#0] + 0x08004348: 1c60 `. ADDS r0,r4,#1 + 0x0800434a: b2c4 .. UXTB r4,r0 + 0x0800434c: 2c08 ., CMP r4,#8 + 0x0800434e: dbdc .. BLT 0x800430a ; I2C_Virtual_SendByte + 22 + 0x08004350: f44f707a O.zp MOV r0,#0x3e8 + 0x08004354: f000f8ea .... BL I2C_Virtual_WaitAck ; 0x800452c + 0x08004358: bd70 p. POP {r4-r6,pc} + $d + 0x0800435a: 0000 .. DCW 0 + 0x0800435c: 20000310 ... DCD 536871696 + 0x08004360: 20000308 ... DCD 536871688 + $t + i.I2C_Virtual_SetSDA_In + I2C_Virtual_SetSDA_In + 0x08004364: b51f .. PUSH {r0-r4,lr} + 0x08004366: 4807 .H LDR r0,[pc,#28] ; [0x8004384] = 0x20000300 + 0x08004368: 8800 .. LDRH r0,[r0,#0] + 0x0800436a: 9000 .. STR r0,[sp,#0] + 0x0800436c: 2000 . MOVS r0,#0 + 0x0800436e: 9001 .. STR r0,[sp,#4] + 0x08004370: 9002 .. STR r0,[sp,#8] + 0x08004372: 2003 . MOVS r0,#3 + 0x08004374: 9003 .. STR r0,[sp,#0xc] + 0x08004376: 4669 iF MOV r1,sp + 0x08004378: 4803 .H LDR r0,[pc,#12] ; [0x8004388] = 0x20000304 + 0x0800437a: 6800 .h LDR r0,[r0,#0] + 0x0800437c: f7fdfd5a ..Z. BL HAL_GPIO_Init ; 0x8001e34 + 0x08004380: bd1f .. POP {r0-r4,pc} + $d + 0x08004382: 0000 .. DCW 0 + 0x08004384: 20000300 ... DCD 536871680 + 0x08004388: 20000304 ... DCD 536871684 + $t + i.I2C_Virtual_SetSDA_Out + I2C_Virtual_SetSDA_Out + 0x0800438c: b51f .. PUSH {r0-r4,lr} + 0x0800438e: 4806 .H LDR r0,[pc,#24] ; [0x80043a8] = 0x20000300 + 0x08004390: 8800 .. LDRH r0,[r0,#0] + 0x08004392: 9000 .. STR r0,[sp,#0] + 0x08004394: 2011 . MOVS r0,#0x11 + 0x08004396: 9001 .. STR r0,[sp,#4] + 0x08004398: 2003 . MOVS r0,#3 + 0x0800439a: 9003 .. STR r0,[sp,#0xc] + 0x0800439c: 4669 iF MOV r1,sp + 0x0800439e: 4803 .H LDR r0,[pc,#12] ; [0x80043ac] = 0x20000304 + 0x080043a0: 6800 .h LDR r0,[r0,#0] + 0x080043a2: f7fdfd47 ..G. BL HAL_GPIO_Init ; 0x8001e34 + 0x080043a6: bd1f .. POP {r0-r4,pc} + $d + 0x080043a8: 20000300 ... DCD 536871680 + 0x080043ac: 20000304 ... DCD 536871684 + $t + i.I2C_Virtual_Start + I2C_Virtual_Start + 0x080043b0: b510 .. PUSH {r4,lr} + 0x080043b2: 2001 . MOVS r0,#1 + 0x080043b4: 4909 .I LDR r1,[pc,#36] ; [0x80043dc] = 0x20000308 + 0x080043b6: 6809 .h LDR r1,[r1,#0] + 0x080043b8: 8008 .. STRH r0,[r1,#0] + 0x080043ba: f7ffff00 .... BL I2C_VIRTUAL_DELAY_US ; 0x80041be + 0x080043be: 2001 . MOVS r0,#1 + 0x080043c0: 4907 .I LDR r1,[pc,#28] ; [0x80043e0] = 0x20000310 + 0x080043c2: 6809 .h LDR r1,[r1,#0] + 0x080043c4: 8008 .. STRH r0,[r1,#0] + 0x080043c6: 200a . MOVS r0,#0xa + 0x080043c8: f7fffef9 .... BL I2C_VIRTUAL_DELAY_US ; 0x80041be + 0x080043cc: 2000 . MOVS r0,#0 + 0x080043ce: 4903 .I LDR r1,[pc,#12] ; [0x80043dc] = 0x20000308 + 0x080043d0: 6809 .h LDR r1,[r1,#0] + 0x080043d2: 8008 .. STRH r0,[r1,#0] + 0x080043d4: 200a . MOVS r0,#0xa + 0x080043d6: f7fffef2 .... BL I2C_VIRTUAL_DELAY_US ; 0x80041be + 0x080043da: bd10 .. POP {r4,pc} + $d + 0x080043dc: 20000308 ... DCD 536871688 + 0x080043e0: 20000310 ... DCD 536871696 + $t + i.I2C_Virtual_Stop + I2C_Virtual_Stop + 0x080043e4: b510 .. PUSH {r4,lr} + 0x080043e6: 2000 . MOVS r0,#0 + 0x080043e8: 490a .I LDR r1,[pc,#40] ; [0x8004414] = 0x20000308 + 0x080043ea: 6809 .h LDR r1,[r1,#0] + 0x080043ec: 8008 .. STRH r0,[r1,#0] + 0x080043ee: 2001 . MOVS r0,#1 + 0x080043f0: f7fffee5 .... BL I2C_VIRTUAL_DELAY_US ; 0x80041be + 0x080043f4: 2001 . MOVS r0,#1 + 0x080043f6: 4908 .I LDR r1,[pc,#32] ; [0x8004418] = 0x20000310 + 0x080043f8: 6809 .h LDR r1,[r1,#0] + 0x080043fa: 8008 .. STRH r0,[r1,#0] + 0x080043fc: 200a . MOVS r0,#0xa + 0x080043fe: f7fffede .... BL I2C_VIRTUAL_DELAY_US ; 0x80041be + 0x08004402: 2001 . MOVS r0,#1 + 0x08004404: 4903 .I LDR r1,[pc,#12] ; [0x8004414] = 0x20000308 + 0x08004406: 6809 .h LDR r1,[r1,#0] + 0x08004408: 8008 .. STRH r0,[r1,#0] + 0x0800440a: 200a . MOVS r0,#0xa + 0x0800440c: f7fffed7 .... BL I2C_VIRTUAL_DELAY_US ; 0x80041be + 0x08004410: bd10 .. POP {r4,pc} + $d + 0x08004412: 0000 .. DCW 0 + 0x08004414: 20000308 ... DCD 536871688 + 0x08004418: 20000310 ... DCD 536871696 + $t + i.I2C_Virtual_SwitchBus + I2C_Virtual_SwitchBus + 0x0800441c: b510 .. PUSH {r4,lr} + 0x0800441e: 4604 .F MOV r4,r0 + 0x08004420: 4620 F MOV r0,r4 + 0x08004422: f7fcfc99 .... BL CompatibleConversionSDA ; 0x8000d58 + 0x08004426: 3841 A8 SUBS r0,r0,#0x41 + 0x08004428: 2805 .( CMP r0,#5 + 0x0800442a: d231 1. BCS 0x8004490 ; I2C_Virtual_SwitchBus + 116 + 0x0800442c: e8dff000 .... TBB [pc,r0] + $d + 0x08004430: 1e150c03 .... DCD 504695811 + 0x08004434: 0027 '. DCW 39 + $t + 0x08004436: 4833 3H LDR r0,[pc,#204] ; [0x8004504] = 0x40010800 + 0x08004438: 4933 3I LDR r1,[pc,#204] ; [0x8004508] = 0x20000304 + 0x0800443a: 6008 .` STR r0,[r1,#0] + 0x0800443c: 1d20 . ADDS r0,r4,#4 + 0x0800443e: 4933 3I LDR r1,[pc,#204] ; [0x800450c] = 0x20000308 + 0x08004440: 6008 .` STR r0,[r1,#0] + 0x08004442: 4933 3I LDR r1,[pc,#204] ; [0x8004510] = 0x2000030c + 0x08004444: 6008 .` STR r0,[r1,#0] + 0x08004446: e024 $. B 0x8004492 ; I2C_Virtual_SwitchBus + 118 + 0x08004448: 4832 2H LDR r0,[pc,#200] ; [0x8004514] = 0x40010c00 + 0x0800444a: 492f /I LDR r1,[pc,#188] ; [0x8004508] = 0x20000304 + 0x0800444c: 6008 .` STR r0,[r1,#0] + 0x0800444e: 1d20 . ADDS r0,r4,#4 + 0x08004450: 492e .I LDR r1,[pc,#184] ; [0x800450c] = 0x20000308 + 0x08004452: 6008 .` STR r0,[r1,#0] + 0x08004454: 492e .I LDR r1,[pc,#184] ; [0x8004510] = 0x2000030c + 0x08004456: 6008 .` STR r0,[r1,#0] + 0x08004458: e01b .. B 0x8004492 ; I2C_Virtual_SwitchBus + 118 + 0x0800445a: 482f /H LDR r0,[pc,#188] ; [0x8004518] = 0x40011000 + 0x0800445c: 492a *I LDR r1,[pc,#168] ; [0x8004508] = 0x20000304 + 0x0800445e: 6008 .` STR r0,[r1,#0] + 0x08004460: 1d20 . ADDS r0,r4,#4 + 0x08004462: 492a *I LDR r1,[pc,#168] ; [0x800450c] = 0x20000308 + 0x08004464: 6008 .` STR r0,[r1,#0] + 0x08004466: 492a *I LDR r1,[pc,#168] ; [0x8004510] = 0x2000030c + 0x08004468: 6008 .` STR r0,[r1,#0] + 0x0800446a: e012 .. B 0x8004492 ; I2C_Virtual_SwitchBus + 118 + 0x0800446c: 482b +H LDR r0,[pc,#172] ; [0x800451c] = 0x40011400 + 0x0800446e: 4926 &I LDR r1,[pc,#152] ; [0x8004508] = 0x20000304 + 0x08004470: 6008 .` STR r0,[r1,#0] + 0x08004472: 1d20 . ADDS r0,r4,#4 + 0x08004474: 4925 %I LDR r1,[pc,#148] ; [0x800450c] = 0x20000308 + 0x08004476: 6008 .` STR r0,[r1,#0] + 0x08004478: 4925 %I LDR r1,[pc,#148] ; [0x8004510] = 0x2000030c + 0x0800447a: 6008 .` STR r0,[r1,#0] + 0x0800447c: e009 .. B 0x8004492 ; I2C_Virtual_SwitchBus + 118 + 0x0800447e: 4828 (H LDR r0,[pc,#160] ; [0x8004520] = 0x40011800 + 0x08004480: 4921 !I LDR r1,[pc,#132] ; [0x8004508] = 0x20000304 + 0x08004482: 6008 .` STR r0,[r1,#0] + 0x08004484: 1d20 . ADDS r0,r4,#4 + 0x08004486: 4921 !I LDR r1,[pc,#132] ; [0x800450c] = 0x20000308 + 0x08004488: 6008 .` STR r0,[r1,#0] + 0x0800448a: 4921 !I LDR r1,[pc,#132] ; [0x8004510] = 0x2000030c + 0x0800448c: 6008 .` STR r0,[r1,#0] + 0x0800448e: e000 .. B 0x8004492 ; I2C_Virtual_SwitchBus + 118 + 0x08004490: bf00 .. NOP + 0x08004492: bf00 .. NOP + 0x08004494: 7921 !y LDRB r1,[r4,#4] + 0x08004496: 2001 . MOVS r0,#1 + 0x08004498: 4088 .@ LSLS r0,r0,r1 + 0x0800449a: 4922 "I LDR r1,[pc,#136] ; [0x8004524] = 0x20000300 + 0x0800449c: 8008 .. STRH r0,[r1,#0] + 0x0800449e: 4620 F MOV r0,r4 + 0x080044a0: f7fcfc2e .... BL CompatibleConversionSCL ; 0x8000d00 + 0x080044a4: 3841 A8 SUBS r0,r0,#0x41 + 0x080044a6: 2807 .( CMP r0,#7 + 0x080044a8: d228 (. BCS 0x80044fc ; I2C_Virtual_SwitchBus + 224 + 0x080044aa: e8dff000 .... TBB [pc,r0] + $d + 0x080044ae: 0904 .. DCW 2308 + 0x080044b0: 1d18130e .... DCD 488117006 + 0x080044b4: 0022 ". DCW 34 + $t + 0x080044b6: f104000c .... ADD r0,r4,#0xc + 0x080044ba: 491b .I LDR r1,[pc,#108] ; [0x8004528] = 0x20000310 + 0x080044bc: 6008 .` STR r0,[r1,#0] + 0x080044be: e01e .. B 0x80044fe ; I2C_Virtual_SwitchBus + 226 + 0x080044c0: f104000c .... ADD r0,r4,#0xc + 0x080044c4: 4918 .I LDR r1,[pc,#96] ; [0x8004528] = 0x20000310 + 0x080044c6: 6008 .` STR r0,[r1,#0] + 0x080044c8: e019 .. B 0x80044fe ; I2C_Virtual_SwitchBus + 226 + 0x080044ca: f104000c .... ADD r0,r4,#0xc + 0x080044ce: 4916 .I LDR r1,[pc,#88] ; [0x8004528] = 0x20000310 + 0x080044d0: 6008 .` STR r0,[r1,#0] + 0x080044d2: e014 .. B 0x80044fe ; I2C_Virtual_SwitchBus + 226 + 0x080044d4: f104000c .... ADD r0,r4,#0xc + 0x080044d8: 4913 .I LDR r1,[pc,#76] ; [0x8004528] = 0x20000310 + 0x080044da: 6008 .` STR r0,[r1,#0] + 0x080044dc: e00f .. B 0x80044fe ; I2C_Virtual_SwitchBus + 226 + 0x080044de: f104000c .... ADD r0,r4,#0xc + 0x080044e2: 4911 .I LDR r1,[pc,#68] ; [0x8004528] = 0x20000310 + 0x080044e4: 6008 .` STR r0,[r1,#0] + 0x080044e6: e00a .. B 0x80044fe ; I2C_Virtual_SwitchBus + 226 + 0x080044e8: f104000c .... ADD r0,r4,#0xc + 0x080044ec: 490e .I LDR r1,[pc,#56] ; [0x8004528] = 0x20000310 + 0x080044ee: 6008 .` STR r0,[r1,#0] + 0x080044f0: e005 .. B 0x80044fe ; I2C_Virtual_SwitchBus + 226 + 0x080044f2: f104000c .... ADD r0,r4,#0xc + 0x080044f6: 490c .I LDR r1,[pc,#48] ; [0x8004528] = 0x20000310 + 0x080044f8: 6008 .` STR r0,[r1,#0] + 0x080044fa: e000 .. B 0x80044fe ; I2C_Virtual_SwitchBus + 226 + 0x080044fc: bf00 .. NOP + 0x080044fe: bf00 .. NOP + 0x08004500: bd10 .. POP {r4,pc} + $d + 0x08004502: 0000 .. DCW 0 + 0x08004504: 40010800 ...@ DCD 1073809408 + 0x08004508: 20000304 ... DCD 536871684 + 0x0800450c: 20000308 ... DCD 536871688 + 0x08004510: 2000030c ... DCD 536871692 + 0x08004514: 40010c00 ...@ DCD 1073810432 + 0x08004518: 40011000 ...@ DCD 1073811456 + 0x0800451c: 40011400 ...@ DCD 1073812480 + 0x08004520: 40011800 ...@ DCD 1073813504 + 0x08004524: 20000300 ... DCD 536871680 + 0x08004528: 20000310 ... DCD 536871696 + $t + i.I2C_Virtual_WaitAck + I2C_Virtual_WaitAck + 0x0800452c: b570 p. PUSH {r4-r6,lr} + 0x0800452e: 4605 .F MOV r5,r0 + 0x08004530: 2400 .$ MOVS r4,#0 + 0x08004532: 2001 . MOVS r0,#1 + 0x08004534: 4910 .I LDR r1,[pc,#64] ; [0x8004578] = 0x20000308 + 0x08004536: 6809 .h LDR r1,[r1,#0] + 0x08004538: 8008 .. STRH r0,[r1,#0] + 0x0800453a: f7ffff13 .... BL I2C_Virtual_SetSDA_In ; 0x8004364 + 0x0800453e: 2005 . MOVS r0,#5 + 0x08004540: f7fffe3d ..=. BL I2C_VIRTUAL_DELAY_US ; 0x80041be + 0x08004544: 2001 . MOVS r0,#1 + 0x08004546: 490d .I LDR r1,[pc,#52] ; [0x800457c] = 0x20000310 + 0x08004548: 6809 .h LDR r1,[r1,#0] + 0x0800454a: 8008 .. STRH r0,[r1,#0] + 0x0800454c: 2005 . MOVS r0,#5 + 0x0800454e: f7fffe36 ..6. BL I2C_VIRTUAL_DELAY_US ; 0x80041be + 0x08004552: 480b .H LDR r0,[pc,#44] ; [0x8004580] = 0x2000030c + 0x08004554: 6800 .h LDR r0,[r0,#0] + 0x08004556: 8800 .. LDRH r0,[r0,#0] + 0x08004558: b908 .. CBNZ r0,0x800455e ; I2C_Virtual_WaitAck + 50 + 0x0800455a: 2401 .$ MOVS r4,#1 + 0x0800455c: e000 .. B 0x8004560 ; I2C_Virtual_WaitAck + 52 + 0x0800455e: 2400 .$ MOVS r4,#0 + 0x08004560: 2000 . MOVS r0,#0 + 0x08004562: 4906 .I LDR r1,[pc,#24] ; [0x800457c] = 0x20000310 + 0x08004564: 6809 .h LDR r1,[r1,#0] + 0x08004566: 8008 .. STRH r0,[r1,#0] + 0x08004568: f7ffff10 .... BL I2C_Virtual_SetSDA_Out ; 0x800438c + 0x0800456c: 2002 . MOVS r0,#2 + 0x0800456e: f7fffe26 ..&. BL I2C_VIRTUAL_DELAY_US ; 0x80041be + 0x08004572: 4620 F MOV r0,r4 + 0x08004574: bd70 p. POP {r4-r6,pc} + $d + 0x08004576: 0000 .. DCW 0 + 0x08004578: 20000308 ... DCD 536871688 + 0x0800457c: 20000310 ... DCD 536871696 + 0x08004580: 2000030c ... DCD 536871692 + $t + i.IS_IRQ + IS_IRQ + 0x08004584: b510 .. PUSH {r4,lr} + 0x08004586: f7fbfe35 ..5. BL vPortGetIPSR ; 0x80001f4 + 0x0800458a: b108 .. CBZ r0,0x8004590 ; IS_IRQ + 12 + 0x0800458c: 2001 . MOVS r0,#1 + 0x0800458e: bd10 .. POP {r4,pc} + 0x08004590: 2000 . MOVS r0,#0 + 0x08004592: e7fc .. B 0x800458e ; IS_IRQ + 10 + i.MX_ADC1_Init + MX_ADC1_Init + 0x08004594: b50e .. PUSH {r1-r3,lr} + 0x08004596: 2000 . MOVS r0,#0 + 0x08004598: 9000 .. STR r0,[sp,#0] + 0x0800459a: 9001 .. STR r0,[sp,#4] + 0x0800459c: 9002 .. STR r0,[sp,#8] + 0x0800459e: 482f /H LDR r0,[pc,#188] ; [0x800465c] = 0x40012400 + 0x080045a0: 492f /I LDR r1,[pc,#188] ; [0x8004660] = 0x20000460 + 0x080045a2: 6008 .` STR r0,[r1,#0] + 0x080045a4: 1581 .. ASRS r1,r0,#22 + 0x080045a6: 482e .H LDR r0,[pc,#184] ; [0x8004660] = 0x20000460 + 0x080045a8: 6081 .` STR r1,[r0,#8] + 0x080045aa: 2100 .! MOVS r1,#0 + 0x080045ac: 7301 .s STRB r1,[r0,#0xc] + 0x080045ae: 7501 .u STRB r1,[r0,#0x14] + 0x080045b0: f44f2160 O.`! MOV r1,#0xe0000 + 0x080045b4: 61c1 .a STR r1,[r0,#0x1c] + 0x080045b6: 2000 . MOVS r0,#0 + 0x080045b8: 4929 )I LDR r1,[pc,#164] ; [0x8004660] = 0x20000460 + 0x080045ba: 6048 H` STR r0,[r1,#4] + 0x080045bc: 2106 .! MOVS r1,#6 + 0x080045be: 4828 (H LDR r0,[pc,#160] ; [0x8004660] = 0x20000460 + 0x080045c0: 6101 .a STR r1,[r0,#0x10] + 0x080045c2: f7fcfdd3 .... BL HAL_ADC_Init ; 0x800116c + 0x080045c6: b108 .. CBZ r0,0x80045cc ; MX_ADC1_Init + 56 + 0x080045c8: f7fcfc45 ..E. BL Error_Handler ; 0x8000e56 + 0x080045cc: 2000 . MOVS r0,#0 + 0x080045ce: 9000 .. STR r0,[sp,#0] + 0x080045d0: 2001 . MOVS r0,#1 + 0x080045d2: 9001 .. STR r0,[sp,#4] + 0x080045d4: 2000 . MOVS r0,#0 + 0x080045d6: 9002 .. STR r0,[sp,#8] + 0x080045d8: 4669 iF MOV r1,sp + 0x080045da: 4821 !H LDR r0,[pc,#132] ; [0x8004660] = 0x20000460 + 0x080045dc: f7fcfd16 .... BL HAL_ADC_ConfigChannel ; 0x800100c + 0x080045e0: b108 .. CBZ r0,0x80045e6 ; MX_ADC1_Init + 82 + 0x080045e2: f7fcfc38 ..8. BL Error_Handler ; 0x8000e56 + 0x080045e6: 2008 . MOVS r0,#8 + 0x080045e8: 9000 .. STR r0,[sp,#0] + 0x080045ea: 2002 . MOVS r0,#2 + 0x080045ec: 9001 .. STR r0,[sp,#4] + 0x080045ee: 4669 iF MOV r1,sp + 0x080045f0: 481b .H LDR r0,[pc,#108] ; [0x8004660] = 0x20000460 + 0x080045f2: f7fcfd0b .... BL HAL_ADC_ConfigChannel ; 0x800100c + 0x080045f6: b108 .. CBZ r0,0x80045fc ; MX_ADC1_Init + 104 + 0x080045f8: f7fcfc2d ..-. BL Error_Handler ; 0x8000e56 + 0x080045fc: 2009 . MOVS r0,#9 + 0x080045fe: 9000 .. STR r0,[sp,#0] + 0x08004600: 2003 . MOVS r0,#3 + 0x08004602: 9001 .. STR r0,[sp,#4] + 0x08004604: 4669 iF MOV r1,sp + 0x08004606: 4816 .H LDR r0,[pc,#88] ; [0x8004660] = 0x20000460 + 0x08004608: f7fcfd00 .... BL HAL_ADC_ConfigChannel ; 0x800100c + 0x0800460c: b108 .. CBZ r0,0x8004612 ; MX_ADC1_Init + 126 + 0x0800460e: f7fcfc22 ..". BL Error_Handler ; 0x8000e56 + 0x08004612: 200d . MOVS r0,#0xd + 0x08004614: 9000 .. STR r0,[sp,#0] + 0x08004616: 2004 . MOVS r0,#4 + 0x08004618: 9001 .. STR r0,[sp,#4] + 0x0800461a: 4669 iF MOV r1,sp + 0x0800461c: 4810 .H LDR r0,[pc,#64] ; [0x8004660] = 0x20000460 + 0x0800461e: f7fcfcf5 .... BL HAL_ADC_ConfigChannel ; 0x800100c + 0x08004622: b108 .. CBZ r0,0x8004628 ; MX_ADC1_Init + 148 + 0x08004624: f7fcfc17 .... BL Error_Handler ; 0x8000e56 + 0x08004628: 200e . MOVS r0,#0xe + 0x0800462a: 9000 .. STR r0,[sp,#0] + 0x0800462c: 2005 . MOVS r0,#5 + 0x0800462e: 9001 .. STR r0,[sp,#4] + 0x08004630: 4669 iF MOV r1,sp + 0x08004632: 480b .H LDR r0,[pc,#44] ; [0x8004660] = 0x20000460 + 0x08004634: f7fcfcea .... BL HAL_ADC_ConfigChannel ; 0x800100c + 0x08004638: b108 .. CBZ r0,0x800463e ; MX_ADC1_Init + 170 + 0x0800463a: f7fcfc0c .... BL Error_Handler ; 0x8000e56 + 0x0800463e: 200f . MOVS r0,#0xf + 0x08004640: 9000 .. STR r0,[sp,#0] + 0x08004642: 2006 . MOVS r0,#6 + 0x08004644: 9001 .. STR r0,[sp,#4] + 0x08004646: 4669 iF MOV r1,sp + 0x08004648: 4805 .H LDR r0,[pc,#20] ; [0x8004660] = 0x20000460 + 0x0800464a: f7fcfcdf .... BL HAL_ADC_ConfigChannel ; 0x800100c + 0x0800464e: b108 .. CBZ r0,0x8004654 ; MX_ADC1_Init + 192 + 0x08004650: f7fcfc01 .... BL Error_Handler ; 0x8000e56 + 0x08004654: 4802 .H LDR r0,[pc,#8] ; [0x8004660] = 0x20000460 + 0x08004656: f7fcfc4d ..M. BL HAL_ADCEx_Calibration_Start ; 0x8000ef4 + 0x0800465a: bd0e .. POP {r1-r3,pc} + $d + 0x0800465c: 40012400 .$.@ DCD 1073816576 + 0x08004660: 20000460 `.. DCD 536872032 + $t + i.MX_CAN1_Init + MX_CAN1_Init + 0x08004664: b510 .. PUSH {r4,lr} + 0x08004666: 480b .H LDR r0,[pc,#44] ; [0x8004694] = 0x40006400 + 0x08004668: 490b .I LDR r1,[pc,#44] ; [0x8004698] = 0x200004d4 + 0x0800466a: 6008 .` STR r0,[r1,#0] + 0x0800466c: 2010 . MOVS r0,#0x10 + 0x0800466e: 6048 H` STR r0,[r1,#4] + 0x08004670: 2100 .! MOVS r1,#0 + 0x08004672: 4809 .H LDR r0,[pc,#36] ; [0x8004698] = 0x200004d4 + 0x08004674: 6081 .` STR r1,[r0,#8] + 0x08004676: 60c1 .` STR r1,[r0,#0xc] + 0x08004678: 6101 .a STR r1,[r0,#0x10] + 0x0800467a: 6141 Aa STR r1,[r0,#0x14] + 0x0800467c: 7601 .v STRB r1,[r0,#0x18] + 0x0800467e: 7641 Av STRB r1,[r0,#0x19] + 0x08004680: 7681 .v STRB r1,[r0,#0x1a] + 0x08004682: 76c1 .v STRB r1,[r0,#0x1b] + 0x08004684: 7701 .w STRB r1,[r0,#0x1c] + 0x08004686: 7741 Aw STRB r1,[r0,#0x1d] + 0x08004688: f7fcfe96 .... BL HAL_CAN_Init ; 0x80013b8 + 0x0800468c: b108 .. CBZ r0,0x8004692 ; MX_CAN1_Init + 46 + 0x0800468e: f7fcfbe2 .... BL Error_Handler ; 0x8000e56 + 0x08004692: bd10 .. POP {r4,pc} + $d + 0x08004694: 40006400 .d.@ DCD 1073767424 + 0x08004698: 200004d4 ... DCD 536872148 + $t + i.MX_DMA_Init + MX_DMA_Init + 0x0800469c: b508 .. PUSH {r3,lr} + 0x0800469e: bf00 .. NOP + 0x080046a0: 4822 "H LDR r0,[pc,#136] ; [0x800472c] = 0x40021000 + 0x080046a2: 6940 @i LDR r0,[r0,#0x14] + 0x080046a4: f0400001 @... ORR r0,r0,#1 + 0x080046a8: 4920 I LDR r1,[pc,#128] ; [0x800472c] = 0x40021000 + 0x080046aa: 6148 Ha STR r0,[r1,#0x14] + 0x080046ac: 4608 .F MOV r0,r1 + 0x080046ae: 6940 @i LDR r0,[r0,#0x14] + 0x080046b0: f0000001 .... AND r0,r0,#1 + 0x080046b4: 9000 .. STR r0,[sp,#0] + 0x080046b6: bf00 .. NOP + 0x080046b8: bf00 .. NOP + 0x080046ba: 2200 ." MOVS r2,#0 + 0x080046bc: 2105 .! MOVS r1,#5 + 0x080046be: 200b . MOVS r0,#0xb + 0x080046c0: f7fdfe30 ..0. BL HAL_NVIC_SetPriority ; 0x8002324 + 0x080046c4: 200b . MOVS r0,#0xb + 0x080046c6: f7fdfe1d .... BL HAL_NVIC_EnableIRQ ; 0x8002304 + 0x080046ca: 2200 ." MOVS r2,#0 + 0x080046cc: 2105 .! MOVS r1,#5 + 0x080046ce: 200c . MOVS r0,#0xc + 0x080046d0: f7fdfe28 ..(. BL HAL_NVIC_SetPriority ; 0x8002324 + 0x080046d4: 200c . MOVS r0,#0xc + 0x080046d6: f7fdfe15 .... BL HAL_NVIC_EnableIRQ ; 0x8002304 + 0x080046da: 2200 ." MOVS r2,#0 + 0x080046dc: 2105 .! MOVS r1,#5 + 0x080046de: 200d . MOVS r0,#0xd + 0x080046e0: f7fdfe20 .. . BL HAL_NVIC_SetPriority ; 0x8002324 + 0x080046e4: 200d . MOVS r0,#0xd + 0x080046e6: f7fdfe0d .... BL HAL_NVIC_EnableIRQ ; 0x8002304 + 0x080046ea: 2200 ." MOVS r2,#0 + 0x080046ec: 2105 .! MOVS r1,#5 + 0x080046ee: 200e . MOVS r0,#0xe + 0x080046f0: f7fdfe18 .... BL HAL_NVIC_SetPriority ; 0x8002324 + 0x080046f4: 200e . MOVS r0,#0xe + 0x080046f6: f7fdfe05 .... BL HAL_NVIC_EnableIRQ ; 0x8002304 + 0x080046fa: 2200 ." MOVS r2,#0 + 0x080046fc: 2105 .! MOVS r1,#5 + 0x080046fe: 200f . MOVS r0,#0xf + 0x08004700: f7fdfe10 .... BL HAL_NVIC_SetPriority ; 0x8002324 + 0x08004704: 200f . MOVS r0,#0xf + 0x08004706: f7fdfdfd .... BL HAL_NVIC_EnableIRQ ; 0x8002304 + 0x0800470a: 2200 ." MOVS r2,#0 + 0x0800470c: 2105 .! MOVS r1,#5 + 0x0800470e: 2010 . MOVS r0,#0x10 + 0x08004710: f7fdfe08 .... BL HAL_NVIC_SetPriority ; 0x8002324 + 0x08004714: 2010 . MOVS r0,#0x10 + 0x08004716: f7fdfdf5 .... BL HAL_NVIC_EnableIRQ ; 0x8002304 + 0x0800471a: 2200 ." MOVS r2,#0 + 0x0800471c: 2105 .! MOVS r1,#5 + 0x0800471e: 2011 . MOVS r0,#0x11 + 0x08004720: f7fdfe00 .... BL HAL_NVIC_SetPriority ; 0x8002324 + 0x08004724: 2011 . MOVS r0,#0x11 + 0x08004726: f7fdfded .... BL HAL_NVIC_EnableIRQ ; 0x8002304 + 0x0800472a: bd08 .. POP {r3,pc} + $d + 0x0800472c: 40021000 ...@ DCD 1073876992 + $t + i.MX_FREERTOS_Init + MX_FREERTOS_Init + 0x08004730: b510 .. PUSH {r4,lr} + 0x08004732: 2001 . MOVS r0,#1 + 0x08004734: f004fdaa .... BL xQueueCreateMutex ; 0x800928c + 0x08004738: 4917 .I LDR r1,[pc,#92] ; [0x8004798] = 0x20000000 + 0x0800473a: 6008 .` STR r0,[r1,#0] + 0x0800473c: 2300 .# MOVS r3,#0 + 0x0800473e: f44f5296 O..R MOV r2,#0x12c0 + 0x08004742: 2103 .! MOVS r1,#3 + 0x08004744: 4618 .F MOV r0,r3 + 0x08004746: f001ff49 ..I. BL eMBMasterInit ; 0x80065dc + 0x0800474a: f001fcef .... BL eMBMasterEnable ; 0x800612c + 0x0800474e: 4a13 .J LDR r2,[pc,#76] ; [0x800479c] = 0x800a318 + 0x08004750: 2100 .! MOVS r1,#0 + 0x08004752: 4813 .H LDR r0,[pc,#76] ; [0x80047a0] = 0x8004b59 + 0x08004754: f002fbf6 .... BL osThreadNew ; 0x8006f44 + 0x08004758: 4912 .I LDR r1,[pc,#72] ; [0x80047a4] = 0x20000018 + 0x0800475a: 6008 .` STR r0,[r1,#0] + 0x0800475c: 4a12 .J LDR r2,[pc,#72] ; [0x80047a8] = 0x800a33c + 0x0800475e: 2100 .! MOVS r1,#0 + 0x08004760: 4812 .H LDR r0,[pc,#72] ; [0x80047ac] = 0x8004fc1 + 0x08004762: f002fbef .... BL osThreadNew ; 0x8006f44 + 0x08004766: 4912 .I LDR r1,[pc,#72] ; [0x80047b0] = 0x2000001c + 0x08004768: 6008 .` STR r0,[r1,#0] + 0x0800476a: 4a12 .J LDR r2,[pc,#72] ; [0x80047b4] = 0x800a360 + 0x0800476c: 2100 .! MOVS r1,#0 + 0x0800476e: 4812 .H LDR r0,[pc,#72] ; [0x80047b8] = 0x8004f7d + 0x08004770: f002fbe8 .... BL osThreadNew ; 0x8006f44 + 0x08004774: 4911 .I LDR r1,[pc,#68] ; [0x80047bc] = 0x20000020 + 0x08004776: 6008 .` STR r0,[r1,#0] + 0x08004778: 4a11 .J LDR r2,[pc,#68] ; [0x80047c0] = 0x800a288 + 0x0800477a: 2100 .! MOVS r1,#0 + 0x0800477c: 4811 .H LDR r0,[pc,#68] ; [0x80047c4] = 0x8004a4d + 0x0800477e: f002fbe1 .... BL osThreadNew ; 0x8006f44 + 0x08004782: 4911 .I LDR r1,[pc,#68] ; [0x80047c8] = 0x20000008 + 0x08004784: 6008 .` STR r0,[r1,#0] + 0x08004786: 4a11 .J LDR r2,[pc,#68] ; [0x80047cc] = 0x800a2f4 + 0x08004788: 2100 .! MOVS r1,#0 + 0x0800478a: 4811 .H LDR r0,[pc,#68] ; [0x80047d0] = 0x8004b89 + 0x0800478c: f002fbda .... BL osThreadNew ; 0x8006f44 + 0x08004790: 4910 .I LDR r1,[pc,#64] ; [0x80047d4] = 0x20000014 + 0x08004792: 6008 .` STR r0,[r1,#0] + 0x08004794: bd10 .. POP {r4,pc} + $d + 0x08004796: 0000 .. DCW 0 + 0x08004798: 20000000 ... DCD 536870912 + 0x0800479c: 0800a318 .... DCD 134259480 + 0x080047a0: 08004b59 YK.. DCD 134237017 + 0x080047a4: 20000018 ... DCD 536870936 + 0x080047a8: 0800a33c <... DCD 134259516 + 0x080047ac: 08004fc1 .O.. DCD 134238145 + 0x080047b0: 2000001c ... DCD 536870940 + 0x080047b4: 0800a360 `... DCD 134259552 + 0x080047b8: 08004f7d }O.. DCD 134238077 + 0x080047bc: 20000020 .. DCD 536870944 + 0x080047c0: 0800a288 .... DCD 134259336 + 0x080047c4: 08004a4d MJ.. DCD 134236749 + 0x080047c8: 20000008 ... DCD 536870920 + 0x080047cc: 0800a2f4 .... DCD 134259444 + 0x080047d0: 08004b89 .K.. DCD 134237065 + 0x080047d4: 20000014 ... DCD 536870932 + $t + i.MX_GPIO_Init + MX_GPIO_Init + 0x080047d8: b500 .. PUSH {lr} + 0x080047da: b085 .. SUB sp,sp,#0x14 + 0x080047dc: 2000 . MOVS r0,#0 + 0x080047de: 9001 .. STR r0,[sp,#4] + 0x080047e0: 9002 .. STR r0,[sp,#8] + 0x080047e2: 9003 .. STR r0,[sp,#0xc] + 0x080047e4: 9004 .. STR r0,[sp,#0x10] + 0x080047e6: bf00 .. NOP + 0x080047e8: 4841 AH LDR r0,[pc,#260] ; [0x80048f0] = 0x40021000 + 0x080047ea: 6980 .i LDR r0,[r0,#0x18] + 0x080047ec: f0400020 @. . ORR r0,r0,#0x20 + 0x080047f0: 493f ?I LDR r1,[pc,#252] ; [0x80048f0] = 0x40021000 + 0x080047f2: 6188 .a STR r0,[r1,#0x18] + 0x080047f4: 4608 .F MOV r0,r1 + 0x080047f6: 6980 .i LDR r0,[r0,#0x18] + 0x080047f8: f0000020 .. . AND r0,r0,#0x20 + 0x080047fc: 9000 .. STR r0,[sp,#0] + 0x080047fe: bf00 .. NOP + 0x08004800: bf00 .. NOP + 0x08004802: bf00 .. NOP + 0x08004804: 4608 .F MOV r0,r1 + 0x08004806: 6980 .i LDR r0,[r0,#0x18] + 0x08004808: f0400010 @... ORR r0,r0,#0x10 + 0x0800480c: 6188 .a STR r0,[r1,#0x18] + 0x0800480e: 4608 .F MOV r0,r1 + 0x08004810: 6980 .i LDR r0,[r0,#0x18] + 0x08004812: f0000010 .... AND r0,r0,#0x10 + 0x08004816: 9000 .. STR r0,[sp,#0] + 0x08004818: bf00 .. NOP + 0x0800481a: bf00 .. NOP + 0x0800481c: bf00 .. NOP + 0x0800481e: 4608 .F MOV r0,r1 + 0x08004820: 6980 .i LDR r0,[r0,#0x18] + 0x08004822: f0400004 @... ORR r0,r0,#4 + 0x08004826: 6188 .a STR r0,[r1,#0x18] + 0x08004828: 4608 .F MOV r0,r1 + 0x0800482a: 6980 .i LDR r0,[r0,#0x18] + 0x0800482c: f0000004 .... AND r0,r0,#4 + 0x08004830: 9000 .. STR r0,[sp,#0] + 0x08004832: bf00 .. NOP + 0x08004834: bf00 .. NOP + 0x08004836: bf00 .. NOP + 0x08004838: 4608 .F MOV r0,r1 + 0x0800483a: 6980 .i LDR r0,[r0,#0x18] + 0x0800483c: f0400008 @... ORR r0,r0,#8 + 0x08004840: 6188 .a STR r0,[r1,#0x18] + 0x08004842: 4608 .F MOV r0,r1 + 0x08004844: 6980 .i LDR r0,[r0,#0x18] + 0x08004846: f0000008 .... AND r0,r0,#8 + 0x0800484a: 9000 .. STR r0,[sp,#0] + 0x0800484c: bf00 .. NOP + 0x0800484e: bf00 .. NOP + 0x08004850: 2200 ." MOVS r2,#0 + 0x08004852: 21f0 .! MOVS r1,#0xf0 + 0x08004854: 4827 'H LDR r0,[pc,#156] ; [0x80048f4] = 0x40010800 + 0x08004856: f7fdfc7d ..}. BL HAL_GPIO_WritePin ; 0x8002154 + 0x0800485a: 2200 ." MOVS r2,#0 + 0x0800485c: f2480104 H... MOV r1,#0x8004 + 0x08004860: 4825 %H LDR r0,[pc,#148] ; [0x80048f8] = 0x40010c00 + 0x08004862: f7fdfc77 ..w. BL HAL_GPIO_WritePin ; 0x8002154 + 0x08004866: 2200 ." MOVS r2,#0 + 0x08004868: f44f7130 O.0q MOV r1,#0x2c0 + 0x0800486c: 4823 #H LDR r0,[pc,#140] ; [0x80048fc] = 0x40011000 + 0x0800486e: f7fdfc71 ..q. BL HAL_GPIO_WritePin ; 0x8002154 + 0x08004872: 20f0 . MOVS r0,#0xf0 + 0x08004874: 9001 .. STR r0,[sp,#4] + 0x08004876: 2001 . MOVS r0,#1 + 0x08004878: 9002 .. STR r0,[sp,#8] + 0x0800487a: 2000 . MOVS r0,#0 + 0x0800487c: 9003 .. STR r0,[sp,#0xc] + 0x0800487e: 2002 . MOVS r0,#2 + 0x08004880: 9004 .. STR r0,[sp,#0x10] + 0x08004882: a901 .. ADD r1,sp,#4 + 0x08004884: 481b .H LDR r0,[pc,#108] ; [0x80048f4] = 0x40010800 + 0x08004886: f7fdfad5 .... BL HAL_GPIO_Init ; 0x8001e34 + 0x0800488a: f2480004 H... MOV r0,#0x8004 + 0x0800488e: 9001 .. STR r0,[sp,#4] + 0x08004890: 2001 . MOVS r0,#1 + 0x08004892: 9002 .. STR r0,[sp,#8] + 0x08004894: 2000 . MOVS r0,#0 + 0x08004896: 9003 .. STR r0,[sp,#0xc] + 0x08004898: 2002 . MOVS r0,#2 + 0x0800489a: 9004 .. STR r0,[sp,#0x10] + 0x0800489c: a901 .. ADD r1,sp,#4 + 0x0800489e: 4816 .H LDR r0,[pc,#88] ; [0x80048f8] = 0x40010c00 + 0x080048a0: f7fdfac8 .... BL HAL_GPIO_Init ; 0x8001e34 + 0x080048a4: 2040 @ MOVS r0,#0x40 + 0x080048a6: 9001 .. STR r0,[sp,#4] + 0x080048a8: 2001 . MOVS r0,#1 + 0x080048aa: 9002 .. STR r0,[sp,#8] + 0x080048ac: 2000 . MOVS r0,#0 + 0x080048ae: 9003 .. STR r0,[sp,#0xc] + 0x080048b0: 2002 . MOVS r0,#2 + 0x080048b2: 9004 .. STR r0,[sp,#0x10] + 0x080048b4: a901 .. ADD r1,sp,#4 + 0x080048b6: 4811 .H LDR r0,[pc,#68] ; [0x80048fc] = 0x40011000 + 0x080048b8: f7fdfabc .... BL HAL_GPIO_Init ; 0x8001e34 + 0x080048bc: 2080 . MOVS r0,#0x80 + 0x080048be: 9001 .. STR r0,[sp,#4] + 0x080048c0: 2001 . MOVS r0,#1 + 0x080048c2: 9002 .. STR r0,[sp,#8] + 0x080048c4: 9003 .. STR r0,[sp,#0xc] + 0x080048c6: 2002 . MOVS r0,#2 + 0x080048c8: 9004 .. STR r0,[sp,#0x10] + 0x080048ca: a901 .. ADD r1,sp,#4 + 0x080048cc: 480b .H LDR r0,[pc,#44] ; [0x80048fc] = 0x40011000 + 0x080048ce: f7fdfab1 .... BL HAL_GPIO_Init ; 0x8001e34 + 0x080048d2: f44f7000 O..p MOV r0,#0x200 + 0x080048d6: 9001 .. STR r0,[sp,#4] + 0x080048d8: 2001 . MOVS r0,#1 + 0x080048da: 9002 .. STR r0,[sp,#8] + 0x080048dc: 2002 . MOVS r0,#2 + 0x080048de: 9003 .. STR r0,[sp,#0xc] + 0x080048e0: 9004 .. STR r0,[sp,#0x10] + 0x080048e2: a901 .. ADD r1,sp,#4 + 0x080048e4: 4805 .H LDR r0,[pc,#20] ; [0x80048fc] = 0x40011000 + 0x080048e6: f7fdfaa5 .... BL HAL_GPIO_Init ; 0x8001e34 + 0x080048ea: b005 .. ADD sp,sp,#0x14 + 0x080048ec: bd00 .. POP {pc} + $d + 0x080048ee: 0000 .. DCW 0 + 0x080048f0: 40021000 ...@ DCD 1073876992 + 0x080048f4: 40010800 ...@ DCD 1073809408 + 0x080048f8: 40010c00 ...@ DCD 1073810432 + 0x080048fc: 40011000 ...@ DCD 1073811456 + $t + i.MX_TIM4_Init + MX_TIM4_Init + 0x08004900: b500 .. PUSH {lr} + 0x08004902: b087 .. SUB sp,sp,#0x1c + 0x08004904: 2000 . MOVS r0,#0 + 0x08004906: 9003 .. STR r0,[sp,#0xc] + 0x08004908: 9004 .. STR r0,[sp,#0x10] + 0x0800490a: 9005 .. STR r0,[sp,#0x14] + 0x0800490c: 9006 .. STR r0,[sp,#0x18] + 0x0800490e: 9001 .. STR r0,[sp,#4] + 0x08004910: 9002 .. STR r0,[sp,#8] + 0x08004912: 4814 .H LDR r0,[pc,#80] ; [0x8004964] = 0x40000800 + 0x08004914: 4914 .I LDR r1,[pc,#80] ; [0x8004968] = 0x200004fc + 0x08004916: 6008 .` STR r0,[r1,#0] + 0x08004918: 2000 . MOVS r0,#0 + 0x0800491a: 6048 H` STR r0,[r1,#4] + 0x0800491c: 2100 .! MOVS r1,#0 + 0x0800491e: 4812 .H LDR r0,[pc,#72] ; [0x8004968] = 0x200004fc + 0x08004920: 6081 .` STR r1,[r0,#8] + 0x08004922: f64f71ff O..q MOV r1,#0xffff + 0x08004926: 60c1 .` STR r1,[r0,#0xc] + 0x08004928: 2100 .! MOVS r1,#0 + 0x0800492a: 6101 .a STR r1,[r0,#0x10] + 0x0800492c: 6181 .a STR r1,[r0,#0x18] + 0x0800492e: f7fefc09 .... BL HAL_TIM_Base_Init ; 0x8003144 + 0x08004932: b108 .. CBZ r0,0x8004938 ; MX_TIM4_Init + 56 + 0x08004934: f7fcfa8f .... BL Error_Handler ; 0x8000e56 + 0x08004938: f44f5080 O..P MOV r0,#0x1000 + 0x0800493c: 9003 .. STR r0,[sp,#0xc] + 0x0800493e: a903 .. ADD r1,sp,#0xc + 0x08004940: 4809 .H LDR r0,[pc,#36] ; [0x8004968] = 0x200004fc + 0x08004942: f7fefc9f .... BL HAL_TIM_ConfigClockSource ; 0x8003284 + 0x08004946: b108 .. CBZ r0,0x800494c ; MX_TIM4_Init + 76 + 0x08004948: f7fcfa85 .... BL Error_Handler ; 0x8000e56 + 0x0800494c: 2000 . MOVS r0,#0 + 0x0800494e: 9001 .. STR r0,[sp,#4] + 0x08004950: 9002 .. STR r0,[sp,#8] + 0x08004952: a901 .. ADD r1,sp,#4 + 0x08004954: 4804 .H LDR r0,[pc,#16] ; [0x8004968] = 0x200004fc + 0x08004956: f7fefbad .... BL HAL_TIMEx_MasterConfigSynchronization ; 0x80030b4 + 0x0800495a: b108 .. CBZ r0,0x8004960 ; MX_TIM4_Init + 96 + 0x0800495c: f7fcfa7b ..{. BL Error_Handler ; 0x8000e56 + 0x08004960: b007 .. ADD sp,sp,#0x1c + 0x08004962: bd00 .. POP {pc} + $d + 0x08004964: 40000800 ...@ DCD 1073743872 + 0x08004968: 200004fc ... DCD 536872188 + $t + i.MX_UART5_Init + MX_UART5_Init + 0x0800496c: b510 .. PUSH {r4,lr} + 0x0800496e: 480b .H LDR r0,[pc,#44] ; [0x800499c] = 0x40005000 + 0x08004970: 490b .I LDR r1,[pc,#44] ; [0x80049a0] = 0x200005b0 + 0x08004972: 6008 .` STR r0,[r1,#0] + 0x08004974: f44f30e1 O..0 MOV r0,#0x1c200 + 0x08004978: 6048 H` STR r0,[r1,#4] + 0x0800497a: 2100 .! MOVS r1,#0 + 0x0800497c: 4808 .H LDR r0,[pc,#32] ; [0x80049a0] = 0x200005b0 + 0x0800497e: 6081 .` STR r1,[r0,#8] + 0x08004980: 60c1 .` STR r1,[r0,#0xc] + 0x08004982: 6101 .a STR r1,[r0,#0x10] + 0x08004984: 210c .! MOVS r1,#0xc + 0x08004986: 6141 Aa STR r1,[r0,#0x14] + 0x08004988: 2100 .! MOVS r1,#0 + 0x0800498a: 6181 .a STR r1,[r0,#0x18] + 0x0800498c: 61c1 .a STR r1,[r0,#0x1c] + 0x0800498e: f7feffe1 .... BL HAL_UART_Init ; 0x8003954 + 0x08004992: b108 .. CBZ r0,0x8004998 ; MX_UART5_Init + 44 + 0x08004994: f7fcfa5f .._. BL Error_Handler ; 0x8000e56 + 0x08004998: bd10 .. POP {r4,pc} + $d + 0x0800499a: 0000 .. DCW 0 + 0x0800499c: 40005000 .P.@ DCD 1073762304 + 0x080049a0: 200005b0 ... DCD 536872368 + $t + i.MX_USART1_UART_Init + MX_USART1_UART_Init + 0x080049a4: b510 .. PUSH {r4,lr} + 0x080049a6: 480b .H LDR r0,[pc,#44] ; [0x80049d4] = 0x40013800 + 0x080049a8: 490b .I LDR r1,[pc,#44] ; [0x80049d8] = 0x20000624 + 0x080049aa: 6008 .` STR r0,[r1,#0] + 0x080049ac: f44f30e1 O..0 MOV r0,#0x1c200 + 0x080049b0: 6048 H` STR r0,[r1,#4] + 0x080049b2: 2100 .! MOVS r1,#0 + 0x080049b4: 4808 .H LDR r0,[pc,#32] ; [0x80049d8] = 0x20000624 + 0x080049b6: 6081 .` STR r1,[r0,#8] + 0x080049b8: 60c1 .` STR r1,[r0,#0xc] + 0x080049ba: 6101 .a STR r1,[r0,#0x10] + 0x080049bc: 210c .! MOVS r1,#0xc + 0x080049be: 6141 Aa STR r1,[r0,#0x14] + 0x080049c0: 2100 .! MOVS r1,#0 + 0x080049c2: 6181 .a STR r1,[r0,#0x18] + 0x080049c4: 61c1 .a STR r1,[r0,#0x1c] + 0x080049c6: f7feffc5 .... BL HAL_UART_Init ; 0x8003954 + 0x080049ca: b108 .. CBZ r0,0x80049d0 ; MX_USART1_UART_Init + 44 + 0x080049cc: f7fcfa43 ..C. BL Error_Handler ; 0x8000e56 + 0x080049d0: bd10 .. POP {r4,pc} + $d + 0x080049d2: 0000 .. DCW 0 + 0x080049d4: 40013800 .8.@ DCD 1073821696 + 0x080049d8: 20000624 $.. DCD 536872484 + $t + i.MX_USART2_UART_Init + MX_USART2_UART_Init + 0x080049dc: b510 .. PUSH {r4,lr} + 0x080049de: 480b .H LDR r0,[pc,#44] ; [0x8004a0c] = 0x40004400 + 0x080049e0: 490b .I LDR r1,[pc,#44] ; [0x8004a10] = 0x20000698 + 0x080049e2: 6008 .` STR r0,[r1,#0] + 0x080049e4: f44f30e1 O..0 MOV r0,#0x1c200 + 0x080049e8: 6048 H` STR r0,[r1,#4] + 0x080049ea: 2100 .! MOVS r1,#0 + 0x080049ec: 4808 .H LDR r0,[pc,#32] ; [0x8004a10] = 0x20000698 + 0x080049ee: 6081 .` STR r1,[r0,#8] + 0x080049f0: 60c1 .` STR r1,[r0,#0xc] + 0x080049f2: 6101 .a STR r1,[r0,#0x10] + 0x080049f4: 210c .! MOVS r1,#0xc + 0x080049f6: 6141 Aa STR r1,[r0,#0x14] + 0x080049f8: 2100 .! MOVS r1,#0 + 0x080049fa: 6181 .a STR r1,[r0,#0x18] + 0x080049fc: 61c1 .a STR r1,[r0,#0x1c] + 0x080049fe: f7feffa9 .... BL HAL_UART_Init ; 0x8003954 + 0x08004a02: b108 .. CBZ r0,0x8004a08 ; MX_USART2_UART_Init + 44 + 0x08004a04: f7fcfa27 ..'. BL Error_Handler ; 0x8000e56 + 0x08004a08: bd10 .. POP {r4,pc} + $d + 0x08004a0a: 0000 .. DCW 0 + 0x08004a0c: 40004400 .D.@ DCD 1073759232 + 0x08004a10: 20000698 ... DCD 536872600 + $t + i.MX_USART3_UART_Init + MX_USART3_UART_Init + 0x08004a14: b510 .. PUSH {r4,lr} + 0x08004a16: 480b .H LDR r0,[pc,#44] ; [0x8004a44] = 0x40004800 + 0x08004a18: 490b .I LDR r1,[pc,#44] ; [0x8004a48] = 0x2000070c + 0x08004a1a: 6008 .` STR r0,[r1,#0] + 0x08004a1c: f44f5096 O..P MOV r0,#0x12c0 + 0x08004a20: 6048 H` STR r0,[r1,#4] + 0x08004a22: 2100 .! MOVS r1,#0 + 0x08004a24: 4808 .H LDR r0,[pc,#32] ; [0x8004a48] = 0x2000070c + 0x08004a26: 6081 .` STR r1,[r0,#8] + 0x08004a28: 60c1 .` STR r1,[r0,#0xc] + 0x08004a2a: 6101 .a STR r1,[r0,#0x10] + 0x08004a2c: 210c .! MOVS r1,#0xc + 0x08004a2e: 6141 Aa STR r1,[r0,#0x14] + 0x08004a30: 2100 .! MOVS r1,#0 + 0x08004a32: 6181 .a STR r1,[r0,#0x18] + 0x08004a34: 61c1 .a STR r1,[r0,#0x1c] + 0x08004a36: f7feff8d .... BL HAL_UART_Init ; 0x8003954 + 0x08004a3a: b108 .. CBZ r0,0x8004a40 ; MX_USART3_UART_Init + 44 + 0x08004a3c: f7fcfa0b .... BL Error_Handler ; 0x8000e56 + 0x08004a40: bd10 .. POP {r4,pc} + $d + 0x08004a42: 0000 .. DCW 0 + 0x08004a44: 40004800 .H.@ DCD 1073760256 + 0x08004a48: 2000070c ... DCD 536872716 + $t + i.MasterTask + MasterTask + 0x08004a4c: b510 .. PUSH {r4,lr} + 0x08004a4e: 4604 .F MOV r4,r0 + 0x08004a50: bf00 .. NOP + 0x08004a52: f001fe21 ..!. BL eMBMasterPoll ; 0x8006698 + 0x08004a56: bf00 .. NOP + 0x08004a58: 2164 d! MOVS r1,#0x64 + 0x08004a5a: 480a .H LDR r0,[pc,#40] ; [0x8004a84] = 0x20000000 + 0x08004a5c: 6800 .h LDR r0,[r0,#0] + 0x08004a5e: f004ff85 .... BL xQueueSemaphoreTake ; 0x800996c + 0x08004a62: b900 .. CBNZ r0,0x8004a66 ; MasterTask + 26 + 0x08004a64: bd10 .. POP {r4,pc} + 0x08004a66: a008 .. ADR r0,{pc}+0x22 ; 0x8004a88 + 0x08004a68: f000fe62 ..b. BL __0printf ; 0x8005730 + 0x08004a6c: 2300 .# MOVS r3,#0 + 0x08004a6e: 461a .F MOV r2,r3 + 0x08004a70: 4619 .F MOV r1,r3 + 0x08004a72: 4804 .H LDR r0,[pc,#16] ; [0x8004a84] = 0x20000000 + 0x08004a74: 6800 .h LDR r0,[r0,#0] + 0x08004a76: f004fd05 .... BL xQueueGenericSend ; 0x8009484 + 0x08004a7a: bf00 .. NOP + 0x08004a7c: 2064 d MOVS r0,#0x64 + 0x08004a7e: f003fc55 ..U. BL vTaskDelay ; 0x800832c + 0x08004a82: e7e6 .. B 0x8004a52 ; MasterTask + 6 + $d + 0x08004a84: 20000000 ... DCD 536870912 + 0x08004a88: 7473614d Mast DCD 1953718605 + 0x08004a8c: 61547265 erTa DCD 1632924261 + 0x08004a90: 0a0d6b73 sk.. DCD 168651635 + 0x08004a94: 00000000 .... DCD 0 + $t + i.Master_RxCpltCallback + Master_RxCpltCallback + 0x08004a98: b538 8. PUSH {r3-r5,lr} + 0x08004a9a: 4604 .F MOV r4,r0 + 0x08004a9c: f04f30ff O..0 MOV r0,#0xffffffff + 0x08004aa0: 9000 .. STR r0,[sp,#0] + 0x08004aa2: e00b .. B 0x8004abc ; Master_RxCpltCallback + 36 + 0x08004aa4: f003f8ea .... BL stm32_getc ; 0x8007c7c + 0x08004aa8: 9000 .. STR r0,[sp,#0] + 0x08004aaa: 9800 .. LDR r0,[sp,#0] + 0x08004aac: 1c40 @. ADDS r0,r0,#1 + 0x08004aae: b900 .. CBNZ r0,0x8004ab2 ; Master_RxCpltCallback + 26 + 0x08004ab0: e005 .. B 0x8004abe ; Master_RxCpltCallback + 38 + 0x08004ab2: 2201 ." MOVS r2,#1 + 0x08004ab4: 4669 iF MOV r1,sp + 0x08004ab6: 4804 .H LDR r0,[pc,#16] ; [0x8004ac8] = 0x20000400 + 0x08004ab8: f000f80c .... BL Put_in_fifo ; 0x8004ad4 + 0x08004abc: e7f2 .. B 0x8004aa4 ; Master_RxCpltCallback + 12 + 0x08004abe: bf00 .. NOP + 0x08004ac0: f002fffa .... BL prvvUARTRxISR ; 0x8007ab8 + 0x08004ac4: bd38 8. POP {r3-r5,pc} + $d + 0x08004ac6: 0000 .. DCW 0 + 0x08004ac8: 20000400 ... DCD 536871936 + $t + i.MemManage_Handler + MemManage_Handler + 0x08004acc: bf00 .. NOP + 0x08004ace: e7fe .. B 0x8004ace ; MemManage_Handler + 2 + i.NMI_Handler + NMI_Handler + 0x08004ad0: bf00 .. NOP + 0x08004ad2: e7fe .. B 0x8004ad2 ; NMI_Handler + 2 + i.Put_in_fifo + Put_in_fifo + 0x08004ad4: b530 0. PUSH {r4,r5,lr} + 0x08004ad6: bf00 .. NOP + 0x08004ad8: 2350 P# MOVS r3,#0x50 + 0x08004ada: f3838811 .... MSR BASEPRI,r3 + 0x08004ade: f3bf8f4f ..O. DSB + 0x08004ae2: f3bf8f6f ..o. ISB + 0x08004ae6: bf00 .. NOP + 0x08004ae8: e019 .. B 0x8004b1e ; Put_in_fifo + 74 + 0x08004aea: 780b .x LDRB r3,[r1,#0] + 0x08004aec: 8885 .. LDRH r5,[r0,#4] + 0x08004aee: 6804 .h LDR r4,[r0,#0] + 0x08004af0: 5563 cU STRB r3,[r4,r5] + 0x08004af2: 8883 .. LDRH r3,[r0,#4] + 0x08004af4: 1c5b [. ADDS r3,r3,#1 + 0x08004af6: 8083 .. STRH r3,[r0,#4] + 0x08004af8: 8883 .. LDRH r3,[r0,#4] + 0x08004afa: f5b37f84 .... CMP r3,#0x108 + 0x08004afe: dd01 .. BLE 0x8004b04 ; Put_in_fifo + 48 + 0x08004b00: 2300 .# MOVS r3,#0 + 0x08004b02: 8083 .. STRH r3,[r0,#4] + 0x08004b04: 8883 .. LDRH r3,[r0,#4] + 0x08004b06: 88c4 .. LDRH r4,[r0,#6] + 0x08004b08: 42a3 .B CMP r3,r4 + 0x08004b0a: d108 .. BNE 0x8004b1e ; Put_in_fifo + 74 + 0x08004b0c: 88c3 .. LDRH r3,[r0,#6] + 0x08004b0e: 1c5b [. ADDS r3,r3,#1 + 0x08004b10: 80c3 .. STRH r3,[r0,#6] + 0x08004b12: 88c3 .. LDRH r3,[r0,#6] + 0x08004b14: f5b37f84 .... CMP r3,#0x108 + 0x08004b18: dd01 .. BLE 0x8004b1e ; Put_in_fifo + 74 + 0x08004b1a: 2300 .# MOVS r3,#0 + 0x08004b1c: 80c3 .. STRH r3,[r0,#6] + 0x08004b1e: 1e13 .. SUBS r3,r2,#0 + 0x08004b20: f1a20201 .... SUB r2,r2,#1 + 0x08004b24: d1e1 .. BNE 0x8004aea ; Put_in_fifo + 22 + 0x08004b26: bf00 .. NOP + 0x08004b28: f3838811 .... MSR BASEPRI,r3 + 0x08004b2c: bf00 .. NOP + 0x08004b2e: bd30 0. POP {r4,r5,pc} + i.RCC_Delay + RCC_Delay + 0x08004b30: b508 .. PUSH {r3,lr} + 0x08004b32: 4908 .I LDR r1,[pc,#32] ; [0x8004b54] = 0x20000254 + 0x08004b34: 6809 .h LDR r1,[r1,#0] + 0x08004b36: 08c9 .. LSRS r1,r1,#3 + 0x08004b38: f44f727a O.zr MOV r2,#0x3e8 + 0x08004b3c: fbb1f1f2 .... UDIV r1,r1,r2 + 0x08004b40: 4341 AC MULS r1,r0,r1 + 0x08004b42: 9100 .. STR r1,[sp,#0] + 0x08004b44: bf00 .. NOP + 0x08004b46: bf00 .. NOP + 0x08004b48: 9900 .. LDR r1,[sp,#0] + 0x08004b4a: 1e4a J. SUBS r2,r1,#1 + 0x08004b4c: 9200 .. STR r2,[sp,#0] + 0x08004b4e: 2900 .) CMP r1,#0 + 0x08004b50: d1f9 .. BNE 0x8004b46 ; RCC_Delay + 22 + 0x08004b52: bd08 .. POP {r3,pc} + $d + 0x08004b54: 20000254 T.. DCD 536871508 + $t + i.StartDefaultTask + StartDefaultTask + 0x08004b58: bf00 .. NOP + 0x08004b5a: 4809 .H LDR r0,[pc,#36] ; [0x8004b80] = 0x7a120 + 0x08004b5c: f001fa86 .... BL delay_us ; 0x800606c + 0x08004b60: 2200 ." MOVS r2,#0 + 0x08004b62: f44f7100 O..q MOV r1,#0x200 + 0x08004b66: 4807 .H LDR r0,[pc,#28] ; [0x8004b84] = 0x40011000 + 0x08004b68: f7fdfaf4 .... BL HAL_GPIO_WritePin ; 0x8002154 + 0x08004b6c: f44f70fa O..p MOV r0,#0x1f4 + 0x08004b70: f003fbdc .... BL vTaskDelay ; 0x800832c + 0x08004b74: 2201 ." MOVS r2,#1 + 0x08004b76: 0251 Q. LSLS r1,r2,#9 + 0x08004b78: 4802 .H LDR r0,[pc,#8] ; [0x8004b84] = 0x40011000 + 0x08004b7a: f7fdfaeb .... BL HAL_GPIO_WritePin ; 0x8002154 + 0x08004b7e: e7ec .. B 0x8004b5a ; StartDefaultTask + 2 + $d + 0x08004b80: 0007a120 ... DCD 500000 + 0x08004b84: 40011000 ...@ DCD 1073811456 + $t + i.StartReadTask + StartReadTask + 0x08004b88: e92d41f0 -..A PUSH {r4-r8,lr} + 0x08004b8c: 4680 .F MOV r8,r0 + 0x08004b8e: bf00 .. NOP + 0x08004b90: 2501 .% MOVS r5,#1 + 0x08004b92: 2648 H& MOVS r6,#0x48 + 0x08004b94: 2708 .' MOVS r7,#8 + 0x08004b96: 2004 . MOVS r0,#4 + 0x08004b98: 493f ?I LDR r1,[pc,#252] ; [0x8004c98] = 0x20000004 + 0x08004b9a: 7008 .p STRB r0,[r1,#0] + 0x08004b9c: 2364 d# MOVS r3,#0x64 + 0x08004b9e: 463a :F MOV r2,r7 + 0x08004ba0: 4631 1F MOV r1,r6 + 0x08004ba2: 4628 (F MOV r0,r5 + 0x08004ba4: f002f90a .... BL eMBMasterReqReadHoldingRegister ; 0x8006dbc + 0x08004ba8: 493c . LDRB r0,[r4,#0x3e] + 0x08005070: 2822 "( CMP r0,#0x22 + 0x08005072: d105 .. BNE 0x8005080 ; UART_DMAError + 64 + 0x08005074: b126 &. CBZ r6,0x8005080 ; UART_DMAError + 64 + 0x08005076: 2000 . MOVS r0,#0 + 0x08005078: 85e0 .. STRH r0,[r4,#0x2e] + 0x0800507a: 4620 F MOV r0,r4 + 0x0800507c: f000f86e ..n. BL UART_EndRxTransfer ; 0x800515c + 0x08005080: 6c20 l LDR r0,[r4,#0x40] + 0x08005082: f0400010 @... ORR r0,r0,#0x10 + 0x08005086: 6420 d STR r0,[r4,#0x40] + 0x08005088: 4620 F MOV r0,r4 + 0x0800508a: 6d61 am LDR r1,[r4,#0x54] + 0x0800508c: 4788 .G BLX r1 + 0x0800508e: bd70 p. POP {r4-r6,pc} + i.UART_DMAReceiveCplt + UART_DMAReceiveCplt + 0x08005090: b570 p. PUSH {r4-r6,lr} + 0x08005092: 4605 .F MOV r5,r0 + 0x08005094: 6a6c lj LDR r4,[r5,#0x24] + 0x08005096: 6828 (h LDR r0,[r5,#0] + 0x08005098: 6800 .h LDR r0,[r0,#0] + 0x0800509a: f0000020 .. . AND r0,r0,#0x20 + 0x0800509e: b9f8 .. CBNZ r0,0x80050e0 ; UART_DMAReceiveCplt + 80 + 0x080050a0: 2000 . MOVS r0,#0 + 0x080050a2: 85e0 .. STRH r0,[r4,#0x2e] + 0x080050a4: 6820 h LDR r0,[r4,#0] + 0x080050a6: 68c0 .h LDR r0,[r0,#0xc] + 0x080050a8: f4207080 ..p BIC r0,r0,#0x100 + 0x080050ac: 6821 !h LDR r1,[r4,#0] + 0x080050ae: 60c8 .` STR r0,[r1,#0xc] + 0x080050b0: 6820 h LDR r0,[r4,#0] + 0x080050b2: 6940 @i LDR r0,[r0,#0x14] + 0x080050b4: f0200001 ... BIC r0,r0,#1 + 0x080050b8: 6821 !h LDR r1,[r4,#0] + 0x080050ba: 6148 Ha STR r0,[r1,#0x14] + 0x080050bc: 6820 h LDR r0,[r4,#0] + 0x080050be: 6940 @i LDR r0,[r0,#0x14] + 0x080050c0: f0200040 .@. BIC r0,r0,#0x40 + 0x080050c4: 6821 !h LDR r1,[r4,#0] + 0x080050c6: 6148 Ha STR r0,[r1,#0x14] + 0x080050c8: 2020 MOVS r0,#0x20 + 0x080050ca: f884003e ..>. STRB r0,[r4,#0x3e] + 0x080050ce: 6b20 k LDR r0,[r4,#0x30] + 0x080050d0: 2801 .( CMP r0,#1 + 0x080050d2: d105 .. BNE 0x80050e0 ; UART_DMAReceiveCplt + 80 + 0x080050d4: 6820 h LDR r0,[r4,#0] + 0x080050d6: 68c0 .h LDR r0,[r0,#0xc] + 0x080050d8: f0200010 ... BIC r0,r0,#0x10 + 0x080050dc: 6821 !h LDR r1,[r4,#0] + 0x080050de: 60c8 .` STR r0,[r1,#0xc] + 0x080050e0: 6b20 k LDR r0,[r4,#0x30] + 0x080050e2: 2801 .( CMP r0,#1 + 0x080050e4: d104 .. BNE 0x80050f0 ; UART_DMAReceiveCplt + 96 + 0x080050e6: 8da1 .. LDRH r1,[r4,#0x2c] + 0x080050e8: 4620 F MOV r0,r4 + 0x080050ea: 6ea2 .n LDR r2,[r4,#0x68] + 0x080050ec: 4790 .G BLX r2 + 0x080050ee: e002 .. B 0x80050f6 ; UART_DMAReceiveCplt + 102 + 0x080050f0: 4620 F MOV r0,r4 + 0x080050f2: 6d21 !m LDR r1,[r4,#0x50] + 0x080050f4: 4788 .G BLX r1 + 0x080050f6: bd70 p. POP {r4-r6,pc} + i.UART_DMARxHalfCplt + UART_DMARxHalfCplt + 0x080050f8: b570 p. PUSH {r4-r6,lr} + 0x080050fa: 4605 .F MOV r5,r0 + 0x080050fc: 6a6c lj LDR r4,[r5,#0x24] + 0x080050fe: 6b20 k LDR r0,[r4,#0x30] + 0x08005100: 2801 .( CMP r0,#1 + 0x08005102: d105 .. BNE 0x8005110 ; UART_DMARxHalfCplt + 24 + 0x08005104: 8da0 .. LDRH r0,[r4,#0x2c] + 0x08005106: 0841 A. LSRS r1,r0,#1 + 0x08005108: 4620 F MOV r0,r4 + 0x0800510a: 6ea2 .n LDR r2,[r4,#0x68] + 0x0800510c: 4790 .G BLX r2 + 0x0800510e: e002 .. B 0x8005116 ; UART_DMARxHalfCplt + 30 + 0x08005110: 4620 F MOV r0,r4 + 0x08005112: 6ce1 .l LDR r1,[r4,#0x4c] + 0x08005114: 4788 .G BLX r1 + 0x08005116: bd70 p. POP {r4-r6,pc} + i.UART_DMATransmitCplt + UART_DMATransmitCplt + 0x08005118: b570 p. PUSH {r4-r6,lr} + 0x0800511a: 4605 .F MOV r5,r0 + 0x0800511c: 6a6c lj LDR r4,[r5,#0x24] + 0x0800511e: 6828 (h LDR r0,[r5,#0] + 0x08005120: 6800 .h LDR r0,[r0,#0] + 0x08005122: f0000020 .. . AND r0,r0,#0x20 + 0x08005126: b970 p. CBNZ r0,0x8005146 ; UART_DMATransmitCplt + 46 + 0x08005128: 2000 . MOVS r0,#0 + 0x0800512a: 84e0 .. STRH r0,[r4,#0x26] + 0x0800512c: 6820 h LDR r0,[r4,#0] + 0x0800512e: 6940 @i LDR r0,[r0,#0x14] + 0x08005130: f0200080 ... BIC r0,r0,#0x80 + 0x08005134: 6821 !h LDR r1,[r4,#0] + 0x08005136: 6148 Ha STR r0,[r1,#0x14] + 0x08005138: 6820 h LDR r0,[r4,#0] + 0x0800513a: 68c0 .h LDR r0,[r0,#0xc] + 0x0800513c: f0400040 @.@. ORR r0,r0,#0x40 + 0x08005140: 6821 !h LDR r1,[r4,#0] + 0x08005142: 60c8 .` STR r0,[r1,#0xc] + 0x08005144: e002 .. B 0x800514c ; UART_DMATransmitCplt + 52 + 0x08005146: 4620 F MOV r0,r4 + 0x08005148: 6ca1 .l LDR r1,[r4,#0x48] + 0x0800514a: 4788 .G BLX r1 + 0x0800514c: bd70 p. POP {r4-r6,pc} + i.UART_DMATxHalfCplt + UART_DMATxHalfCplt + 0x0800514e: b570 p. PUSH {r4-r6,lr} + 0x08005150: 4604 .F MOV r4,r0 + 0x08005152: 6a65 ej LDR r5,[r4,#0x24] + 0x08005154: 4628 (F MOV r0,r5 + 0x08005156: 6c69 il LDR r1,[r5,#0x44] + 0x08005158: 4788 .G BLX r1 + 0x0800515a: bd70 p. POP {r4-r6,pc} + i.UART_EndRxTransfer + UART_EndRxTransfer + 0x0800515c: 6801 .h LDR r1,[r0,#0] + 0x0800515e: 68c9 .h LDR r1,[r1,#0xc] + 0x08005160: f4217190 !..q BIC r1,r1,#0x120 + 0x08005164: 6802 .h LDR r2,[r0,#0] + 0x08005166: 60d1 .` STR r1,[r2,#0xc] + 0x08005168: 6801 .h LDR r1,[r0,#0] + 0x0800516a: 6949 Ii LDR r1,[r1,#0x14] + 0x0800516c: f0210101 !... BIC r1,r1,#1 + 0x08005170: 6802 .h LDR r2,[r0,#0] + 0x08005172: 6151 Qa STR r1,[r2,#0x14] + 0x08005174: 6b01 .k LDR r1,[r0,#0x30] + 0x08005176: 2901 .) CMP r1,#1 + 0x08005178: d105 .. BNE 0x8005186 ; UART_EndRxTransfer + 42 + 0x0800517a: 6801 .h LDR r1,[r0,#0] + 0x0800517c: 68c9 .h LDR r1,[r1,#0xc] + 0x0800517e: f0210110 !... BIC r1,r1,#0x10 + 0x08005182: 6802 .h LDR r2,[r0,#0] + 0x08005184: 60d1 .` STR r1,[r2,#0xc] + 0x08005186: 2120 ! MOVS r1,#0x20 + 0x08005188: f880103e ..>. STRB r1,[r0,#0x3e] + 0x0800518c: 2100 .! MOVS r1,#0 + 0x0800518e: 6301 .c STR r1,[r0,#0x30] + 0x08005190: 4770 pG BX lr + i.UART_EndTransmit_IT + UART_EndTransmit_IT + 0x08005192: b510 .. PUSH {r4,lr} + 0x08005194: 4604 .F MOV r4,r0 + 0x08005196: 6820 h LDR r0,[r4,#0] + 0x08005198: 68c0 .h LDR r0,[r0,#0xc] + 0x0800519a: f0200040 .@. BIC r0,r0,#0x40 + 0x0800519e: 6821 !h LDR r1,[r4,#0] + 0x080051a0: 60c8 .` STR r0,[r1,#0xc] + 0x080051a2: 2020 MOVS r0,#0x20 + 0x080051a4: f884003d ..=. STRB r0,[r4,#0x3d] + 0x080051a8: 4620 F MOV r0,r4 + 0x080051aa: 6ca1 .l LDR r1,[r4,#0x48] + 0x080051ac: 4788 .G BLX r1 + 0x080051ae: 2000 . MOVS r0,#0 + 0x080051b0: bd10 .. POP {r4,pc} + i.UART_EndTxTransfer + UART_EndTxTransfer + 0x080051b2: 6801 .h LDR r1,[r0,#0] + 0x080051b4: 68c9 .h LDR r1,[r1,#0xc] + 0x080051b6: f02101c0 !... BIC r1,r1,#0xc0 + 0x080051ba: 6802 .h LDR r2,[r0,#0] + 0x080051bc: 60d1 .` STR r1,[r2,#0xc] + 0x080051be: 2120 ! MOVS r1,#0x20 + 0x080051c0: f880103d ..=. STRB r1,[r0,#0x3d] + 0x080051c4: 4770 pG BX lr + i.UART_Flush + UART_Flush + 0x080051c6: b5f8 .. PUSH {r3-r7,lr} + 0x080051c8: 4604 .F MOV r4,r0 + 0x080051ca: 6966 fi LDR r6,[r4,#0x14] + 0x080051cc: 2500 .% MOVS r5,#0 + 0x080051ce: e008 .. B 0x80051e2 ; UART_Flush + 28 + 0x080051d0: 2200 ." MOVS r2,#0 + 0x080051d2: 4669 iF MOV r1,sp + 0x080051d4: 6870 ph LDR r0,[r6,#4] + 0x080051d6: f004fb15 .... BL xQueueReceive ; 0x8009804 + 0x080051da: 2801 .( CMP r0,#1 + 0x080051dc: d000 .. BEQ 0x80051e0 ; UART_Flush + 26 + 0x080051de: e001 .. B 0x80051e4 ; UART_Flush + 30 + 0x080051e0: 1c6d m. ADDS r5,r5,#1 + 0x080051e2: e7f5 .. B 0x80051d0 ; UART_Flush + 10 + 0x080051e4: bf00 .. NOP + 0x080051e6: 4628 (F MOV r0,r5 + 0x080051e8: bdf8 .. POP {r3-r7,pc} + i.UART_GetData + UART_GetData + 0x080051ea: e92d41f0 -..A PUSH {r4-r8,lr} + 0x080051ee: 4604 .F MOV r4,r0 + 0x080051f0: 460d .F MOV r5,r1 + 0x080051f2: 4616 .F MOV r6,r2 + 0x080051f4: 6967 gi LDR r7,[r4,#0x14] + 0x080051f6: 4632 2F MOV r2,r6 + 0x080051f8: 4629 )F MOV r1,r5 + 0x080051fa: 6878 xh LDR r0,[r7,#4] + 0x080051fc: f004fb02 .... BL xQueueReceive ; 0x8009804 + 0x08005200: 2801 .( CMP r0,#1 + 0x08005202: d102 .. BNE 0x800520a ; UART_GetData + 32 + 0x08005204: 2000 . MOVS r0,#0 + 0x08005206: e8bd81f0 .... POP {r4-r8,pc} + 0x0800520a: f04f30ff O..0 MOV r0,#0xffffffff + 0x0800520e: e7fa .. B 0x8005206 ; UART_GetData + 28 + i.UART_InitCallbacksToDefault + UART_InitCallbacksToDefault + 0x08005210: 4909 .I LDR r1,[pc,#36] ; [0x8005238] = 0x80041b9 + 0x08005212: 6441 Ad STR r1,[r0,#0x44] + 0x08005214: 4909 .I LDR r1,[pc,#36] ; [0x800523c] = 0x8004169 + 0x08005216: 6481 .d STR r1,[r0,#0x48] + 0x08005218: 4909 .I LDR r1,[pc,#36] ; [0x8005240] = 0x8003fa1 + 0x0800521a: 64c1 .d STR r1,[r0,#0x4c] + 0x0800521c: 4909 .I LDR r1,[pc,#36] ; [0x8005244] = 0x8003f35 + 0x0800521e: 6501 .e STR r1,[r0,#0x50] + 0x08005220: 4909 .I LDR r1,[pc,#36] ; [0x8005248] = 0x80036a5 + 0x08005222: 6541 Ae STR r1,[r0,#0x54] + 0x08005224: 4909 .I LDR r1,[pc,#36] ; [0x800524c] = 0x8003655 + 0x08005226: 6581 .e STR r1,[r0,#0x58] + 0x08005228: 4909 .I LDR r1,[pc,#36] ; [0x8005250] = 0x8003659 + 0x0800522a: 65c1 .e STR r1,[r0,#0x5c] + 0x0800522c: 4909 .I LDR r1,[pc,#36] ; [0x8005254] = 0x8003657 + 0x0800522e: 6601 .f STR r1,[r0,#0x60] + 0x08005230: 4909 .I LDR r1,[pc,#36] ; [0x8005258] = 0x80035e1 + 0x08005232: 6681 .f STR r1,[r0,#0x68] + 0x08005234: 4770 pG BX lr + $d + 0x08005236: 0000 .. DCW 0 + 0x08005238: 080041b9 .A.. DCD 134234553 + 0x0800523c: 08004169 iA.. DCD 134234473 + 0x08005240: 08003fa1 .?.. DCD 134234017 + 0x08005244: 08003f35 5?.. DCD 134233909 + 0x08005248: 080036a5 .6.. DCD 134231717 + 0x0800524c: 08003655 U6.. DCD 134231637 + 0x08005250: 08003659 Y6.. DCD 134231641 + 0x08005254: 08003657 W6.. DCD 134231639 + 0x08005258: 080035e1 .5.. DCD 134231521 + $t + i.UART_Receive_IT + UART_Receive_IT + 0x0800525c: b5f8 .. PUSH {r3-r7,lr} + 0x0800525e: 4604 .F MOV r4,r0 + 0x08005260: f894003e ..>. LDRB r0,[r4,#0x3e] + 0x08005264: 2822 "( CMP r0,#0x22 + 0x08005266: d169 i. BNE 0x800533c ; UART_Receive_IT + 224 + 0x08005268: 68a0 .h LDR r0,[r4,#8] + 0x0800526a: f5b05f80 ..._ CMP r0,#0x1000 + 0x0800526e: d10c .. BNE 0x800528a ; UART_Receive_IT + 46 + 0x08005270: 6920 i LDR r0,[r4,#0x10] + 0x08005272: b950 P. CBNZ r0,0x800528a ; UART_Receive_IT + 46 + 0x08005274: 2500 .% MOVS r5,#0 + 0x08005276: 6aa6 .j LDR r6,[r4,#0x28] + 0x08005278: 6820 h LDR r0,[r4,#0] + 0x0800527a: 6840 @h LDR r0,[r0,#4] + 0x0800527c: f3c00008 .... UBFX r0,r0,#0,#9 + 0x08005280: 8030 0. STRH r0,[r6,#0] + 0x08005282: 6aa0 .j LDR r0,[r4,#0x28] + 0x08005284: 1c80 .. ADDS r0,r0,#2 + 0x08005286: 62a0 .b STR r0,[r4,#0x28] + 0x08005288: e015 .. B 0x80052b6 ; UART_Receive_IT + 90 + 0x0800528a: 6aa5 .j LDR r5,[r4,#0x28] + 0x0800528c: 2600 .& MOVS r6,#0 + 0x0800528e: 68a0 .h LDR r0,[r4,#8] + 0x08005290: f5b05f80 ..._ CMP r0,#0x1000 + 0x08005294: d003 .. BEQ 0x800529e ; UART_Receive_IT + 66 + 0x08005296: 68a0 .h LDR r0,[r4,#8] + 0x08005298: b928 (. CBNZ r0,0x80052a6 ; UART_Receive_IT + 74 + 0x0800529a: 6920 i LDR r0,[r4,#0x10] + 0x0800529c: b918 .. CBNZ r0,0x80052a6 ; UART_Receive_IT + 74 + 0x0800529e: 6820 h LDR r0,[r4,#0] + 0x080052a0: 6840 @h LDR r0,[r0,#4] + 0x080052a2: 7028 (p STRB r0,[r5,#0] + 0x080052a4: e004 .. B 0x80052b0 ; UART_Receive_IT + 84 + 0x080052a6: 6820 h LDR r0,[r4,#0] + 0x080052a8: 6840 @h LDR r0,[r0,#4] + 0x080052aa: f000007f .... AND r0,r0,#0x7f + 0x080052ae: 7028 (p STRB r0,[r5,#0] + 0x080052b0: 6aa0 .j LDR r0,[r4,#0x28] + 0x080052b2: 1c40 @. ADDS r0,r0,#1 + 0x080052b4: 62a0 .b STR r0,[r4,#0x28] + 0x080052b6: 8de0 .. LDRH r0,[r4,#0x2e] + 0x080052b8: 1e40 @. SUBS r0,r0,#1 + 0x080052ba: b280 .. UXTH r0,r0 + 0x080052bc: 85e0 .. STRH r0,[r4,#0x2e] + 0x080052be: bba8 .. CBNZ r0,0x800532c ; UART_Receive_IT + 208 + 0x080052c0: 6820 h LDR r0,[r4,#0] + 0x080052c2: 68c0 .h LDR r0,[r0,#0xc] + 0x080052c4: f0200020 . . BIC r0,r0,#0x20 + 0x080052c8: 6821 !h LDR r1,[r4,#0] + 0x080052ca: 60c8 .` STR r0,[r1,#0xc] + 0x080052cc: 6820 h LDR r0,[r4,#0] + 0x080052ce: 68c0 .h LDR r0,[r0,#0xc] + 0x080052d0: f4207080 ..p BIC r0,r0,#0x100 + 0x080052d4: 6821 !h LDR r1,[r4,#0] + 0x080052d6: 60c8 .` STR r0,[r1,#0xc] + 0x080052d8: 6820 h LDR r0,[r4,#0] + 0x080052da: 6940 @i LDR r0,[r0,#0x14] + 0x080052dc: f0200001 ... BIC r0,r0,#1 + 0x080052e0: 6821 !h LDR r1,[r4,#0] + 0x080052e2: 6148 Ha STR r0,[r1,#0x14] + 0x080052e4: 2020 MOVS r0,#0x20 + 0x080052e6: f884003e ..>. STRB r0,[r4,#0x3e] + 0x080052ea: 6b20 k LDR r0,[r4,#0x30] + 0x080052ec: 2801 .( CMP r0,#1 + 0x080052ee: d11e .. BNE 0x800532e ; UART_Receive_IT + 210 + 0x080052f0: 2000 . MOVS r0,#0 + 0x080052f2: 6320 c STR r0,[r4,#0x30] + 0x080052f4: 6820 h LDR r0,[r4,#0] + 0x080052f6: 68c0 .h LDR r0,[r0,#0xc] + 0x080052f8: f0200010 ... BIC r0,r0,#0x10 + 0x080052fc: 6821 !h LDR r1,[r4,#0] + 0x080052fe: 60c8 .` STR r0,[r1,#0xc] + 0x08005300: 6820 h LDR r0,[r4,#0] + 0x08005302: 6800 .h LDR r0,[r0,#0] + 0x08005304: f0000010 .... AND r0,r0,#0x10 + 0x08005308: 2810 .( CMP r0,#0x10 + 0x0800530a: d10a .. BNE 0x8005322 ; UART_Receive_IT + 198 + 0x0800530c: bf00 .. NOP + 0x0800530e: 2000 . MOVS r0,#0 + 0x08005310: 9000 .. STR r0,[sp,#0] + 0x08005312: 6820 h LDR r0,[r4,#0] + 0x08005314: 6800 .h LDR r0,[r0,#0] + 0x08005316: 9000 .. STR r0,[sp,#0] + 0x08005318: 6820 h LDR r0,[r4,#0] + 0x0800531a: 6840 @h LDR r0,[r0,#4] + 0x0800531c: 9000 .. STR r0,[sp,#0] + 0x0800531e: bf00 .. NOP + 0x08005320: bf00 .. NOP + 0x08005322: 8da1 .. LDRH r1,[r4,#0x2c] + 0x08005324: 4620 F MOV r0,r4 + 0x08005326: 6ea2 .n LDR r2,[r4,#0x68] + 0x08005328: 4790 .G BLX r2 + 0x0800532a: e003 .. B 0x8005334 ; UART_Receive_IT + 216 + 0x0800532c: e004 .. B 0x8005338 ; UART_Receive_IT + 220 + 0x0800532e: 4620 F MOV r0,r4 + 0x08005330: 6d21 !m LDR r1,[r4,#0x50] + 0x08005332: 4788 .G BLX r1 + 0x08005334: 2000 . MOVS r0,#0 + 0x08005336: bdf8 .. POP {r3-r7,pc} + 0x08005338: 2000 . MOVS r0,#0 + 0x0800533a: e7fc .. B 0x8005336 ; UART_Receive_IT + 218 + 0x0800533c: 2002 . MOVS r0,#2 + 0x0800533e: e7fa .. B 0x8005336 ; UART_Receive_IT + 218 + i.UART_Rx_Start + UART_Rx_Start + 0x08005340: e92d47f0 -..G PUSH {r4-r10,lr} + 0x08005344: 4605 .F MOV r5,r0 + 0x08005346: 460f .F MOV r7,r1 + 0x08005348: 4690 .F MOV r8,r2 + 0x0800534a: 4699 .F MOV r9,r3 + 0x0800534c: 9e08 .. LDR r6,[sp,#0x20] + 0x0800534e: 696c li LDR r4,[r5,#0x14] + 0x08005350: 6860 `h LDR r0,[r4,#4] + 0x08005352: b988 .. CBNZ r0,0x8005378 ; UART_Rx_Start + 56 + 0x08005354: 2200 ." MOVS r2,#0 + 0x08005356: 2101 .! MOVS r1,#1 + 0x08005358: 20c8 . MOVS r0,#0xc8 + 0x0800535a: f003ffa8 .... BL xQueueGenericCreate ; 0x80092ae + 0x0800535e: 6060 `` STR r0,[r4,#4] + 0x08005360: 2203 ." MOVS r2,#3 + 0x08005362: 2100 .! MOVS r1,#0 + 0x08005364: 2001 . MOVS r0,#1 + 0x08005366: f003ffa2 .... BL xQueueGenericCreate ; 0x80092ae + 0x0800536a: 60a0 .` STR r0,[r4,#8] + 0x0800536c: 2264 d" MOVS r2,#0x64 + 0x0800536e: f104010c .... ADD r1,r4,#0xc + 0x08005372: 6820 h LDR r0,[r4,#0] + 0x08005374: f7fef8fb .... BL HAL_UARTEx_ReceiveToIdle_DMA ; 0x800356e + 0x08005378: 2000 . MOVS r0,#0 + 0x0800537a: e8bd87f0 .... POP {r4-r10,pc} + i.UART_Rx_Start_IT + UART_Rx_Start_IT + 0x0800537e: e92d47f0 -..G PUSH {r4-r10,lr} + 0x08005382: 4605 .F MOV r5,r0 + 0x08005384: 460f .F MOV r7,r1 + 0x08005386: 4690 .F MOV r8,r2 + 0x08005388: 4699 .F MOV r9,r3 + 0x0800538a: 9e08 .. LDR r6,[sp,#0x20] + 0x0800538c: 696c li LDR r4,[r5,#0x14] + 0x0800538e: 6860 `h LDR r0,[r4,#4] + 0x08005390: b978 x. CBNZ r0,0x80053b2 ; UART_Rx_Start_IT + 52 + 0x08005392: 6860 `h LDR r0,[r4,#4] + 0x08005394: b928 (. CBNZ r0,0x80053a2 ; UART_Rx_Start_IT + 36 + 0x08005396: 2200 ." MOVS r2,#0 + 0x08005398: 2101 .! MOVS r1,#1 + 0x0800539a: 2064 d MOVS r0,#0x64 + 0x0800539c: f003ff87 .... BL xQueueGenericCreate ; 0x80092ae + 0x080053a0: 6060 `` STR r0,[r4,#4] + 0x080053a2: 68a0 .h LDR r0,[r4,#8] + 0x080053a4: b928 (. CBNZ r0,0x80053b2 ; UART_Rx_Start_IT + 52 + 0x080053a6: 2203 ." MOVS r2,#3 + 0x080053a8: 2100 .! MOVS r1,#0 + 0x080053aa: 2001 . MOVS r0,#1 + 0x080053ac: f003ff7f .... BL xQueueGenericCreate ; 0x80092ae + 0x080053b0: 60a0 .` STR r0,[r4,#8] + 0x080053b2: 2000 . MOVS r0,#0 + 0x080053b4: e8bd87f0 .... POP {r4-r10,pc} + i.UART_Send + UART_Send + 0x080053b8: e92d41f0 -..A PUSH {r4-r8,lr} + 0x080053bc: 4604 .F MOV r4,r0 + 0x080053be: 4688 .F MOV r8,r1 + 0x080053c0: 4615 .F MOV r5,r2 + 0x080053c2: 461e .F MOV r6,r3 + 0x080053c4: 6967 gi LDR r7,[r4,#0x14] + 0x080053c6: b2aa .. UXTH r2,r5 + 0x080053c8: 4641 AF MOV r1,r8 + 0x080053ca: 6838 8h LDR r0,[r7,#0] + 0x080053cc: f7fefe52 ..R. BL HAL_UART_Transmit_DMA ; 0x8004074 + 0x080053d0: 4631 1F MOV r1,r6 + 0x080053d2: 68b8 .h LDR r0,[r7,#8] + 0x080053d4: f004faca .... BL xQueueSemaphoreTake ; 0x800996c + 0x080053d8: 2801 .( CMP r0,#1 + 0x080053da: d102 .. BNE 0x80053e2 ; UART_Send + 42 + 0x080053dc: 2000 . MOVS r0,#0 + 0x080053de: e8bd81f0 .... POP {r4-r8,pc} + 0x080053e2: f04f30ff O..0 MOV r0,#0xffffffff + 0x080053e6: e7fa .. B 0x80053de ; UART_Send + 38 + i.UART_Send_IT + UART_Send_IT + 0x080053e8: e92d41f0 -..A PUSH {r4-r8,lr} + 0x080053ec: 4604 .F MOV r4,r0 + 0x080053ee: 4688 .F MOV r8,r1 + 0x080053f0: 4615 .F MOV r5,r2 + 0x080053f2: 461e .F MOV r6,r3 + 0x080053f4: 6967 gi LDR r7,[r4,#0x14] + 0x080053f6: b2aa .. UXTH r2,r5 + 0x080053f8: 4641 AF MOV r1,r8 + 0x080053fa: 6838 8h LDR r0,[r7,#0] + 0x080053fc: f7fefe88 .... BL HAL_UART_Transmit_IT ; 0x8004110 + 0x08005400: 4631 1F MOV r1,r6 + 0x08005402: 68b8 .h LDR r0,[r7,#8] + 0x08005404: f004fab2 .... BL xQueueSemaphoreTake ; 0x800996c + 0x08005408: 2801 .( CMP r0,#1 + 0x0800540a: d102 .. BNE 0x8005412 ; UART_Send_IT + 42 + 0x0800540c: 2000 . MOVS r0,#0 + 0x0800540e: e8bd81f0 .... POP {r4-r8,pc} + 0x08005412: f04f30ff O..0 MOV r0,#0xffffffff + 0x08005416: e7fa .. B 0x800540e ; UART_Send_IT + 38 + i.UART_SetConfig + UART_SetConfig + 0x08005418: b570 p. PUSH {r4-r6,lr} + 0x0800541a: 4604 .F MOV r4,r0 + 0x0800541c: 6821 !h LDR r1,[r4,#0] + 0x0800541e: 6909 .i LDR r1,[r1,#0x10] + 0x08005420: f4215140 !.@Q BIC r1,r1,#0x3000 + 0x08005424: 68e2 .h LDR r2,[r4,#0xc] + 0x08005426: 4311 .C ORRS r1,r1,r2 + 0x08005428: 6822 "h LDR r2,[r4,#0] + 0x0800542a: 6111 .a STR r1,[r2,#0x10] + 0x0800542c: 6922 "i LDR r2,[r4,#0x10] + 0x0800542e: 68a1 .h LDR r1,[r4,#8] + 0x08005430: 4311 .C ORRS r1,r1,r2 + 0x08005432: 6962 bi LDR r2,[r4,#0x14] + 0x08005434: ea410502 A... ORR r5,r1,r2 + 0x08005438: 6821 !h LDR r1,[r4,#0] + 0x0800543a: 68c9 .h LDR r1,[r1,#0xc] + 0x0800543c: f241620c A..b MOV r2,#0x160c + 0x08005440: 4391 .C BICS r1,r1,r2 + 0x08005442: 4329 )C ORRS r1,r1,r5 + 0x08005444: 6822 "h LDR r2,[r4,#0] + 0x08005446: 60d1 .` STR r1,[r2,#0xc] + 0x08005448: 6821 !h LDR r1,[r4,#0] + 0x0800544a: 6949 Ii LDR r1,[r1,#0x14] + 0x0800544c: f4217140 !.@q BIC r1,r1,#0x300 + 0x08005450: 69a2 .i LDR r2,[r4,#0x18] + 0x08005452: 4311 .C ORRS r1,r1,r2 + 0x08005454: 6822 "h LDR r2,[r4,#0] + 0x08005456: 6151 Qa STR r1,[r2,#0x14] + 0x08005458: 4a2d -J LDR r2,[pc,#180] ; [0x8005510] = 0x40013800 + 0x0800545a: 6821 !h LDR r1,[r4,#0] + 0x0800545c: 4291 .B CMP r1,r2 + 0x0800545e: d102 .. BNE 0x8005466 ; UART_SetConfig + 78 + 0x08005460: f7fdfacc .... BL HAL_RCC_GetPCLK2Freq ; 0x80029fc + 0x08005464: e001 .. B 0x800546a ; UART_SetConfig + 82 + 0x08005466: f7fdfab9 .... BL HAL_RCC_GetPCLK1Freq ; 0x80029dc + 0x0800546a: eb0001c0 .... ADD r1,r0,r0,LSL #3 + 0x0800546e: eb011100 .... ADD r1,r1,r0,LSL #4 + 0x08005472: 6862 bh LDR r2,[r4,#4] + 0x08005474: 0092 .. LSLS r2,r2,#2 + 0x08005476: fbb1f1f2 .... UDIV r1,r1,r2 + 0x0800547a: eb0002c0 .... ADD r2,r0,r0,LSL #3 + 0x0800547e: eb021200 .... ADD r2,r2,r0,LSL #4 + 0x08005482: 6863 ch LDR r3,[r4,#4] + 0x08005484: 009b .. LSLS r3,r3,#2 + 0x08005486: fbb2f2f3 .... UDIV r2,r2,r3 + 0x0800548a: 2364 d# MOVS r3,#0x64 + 0x0800548c: fbb2f2f3 .... UDIV r2,r2,r3 + 0x08005490: eb0203c2 .... ADD r3,r2,r2,LSL #3 + 0x08005494: eb031202 .... ADD r2,r3,r2,LSL #4 + 0x08005498: eba10182 .... SUB r1,r1,r2,LSL #2 + 0x0800549c: 2232 2" MOVS r2,#0x32 + 0x0800549e: eb021101 .... ADD r1,r2,r1,LSL #4 + 0x080054a2: 2264 d" MOVS r2,#0x64 + 0x080054a4: fbb1f1f2 .... UDIV r1,r1,r2 + 0x080054a8: f00101f0 .... AND r1,r1,#0xf0 + 0x080054ac: eb0002c0 .... ADD r2,r0,r0,LSL #3 + 0x080054b0: eb021200 .... ADD r2,r2,r0,LSL #4 + 0x080054b4: 6863 ch LDR r3,[r4,#4] + 0x080054b6: 009b .. LSLS r3,r3,#2 + 0x080054b8: fbb2f2f3 .... UDIV r2,r2,r3 + 0x080054bc: 2364 d# MOVS r3,#0x64 + 0x080054be: fbb2f2f3 .... UDIV r2,r2,r3 + 0x080054c2: eb011202 .... ADD r2,r1,r2,LSL #4 + 0x080054c6: eb0001c0 .... ADD r1,r0,r0,LSL #3 + 0x080054ca: eb011100 .... ADD r1,r1,r0,LSL #4 + 0x080054ce: 6863 ch LDR r3,[r4,#4] + 0x080054d0: 009b .. LSLS r3,r3,#2 + 0x080054d2: fbb1f1f3 .... UDIV r1,r1,r3 + 0x080054d6: eb0003c0 .... ADD r3,r0,r0,LSL #3 + 0x080054da: eb031300 .... ADD r3,r3,r0,LSL #4 + 0x080054de: 6866 fh LDR r6,[r4,#4] + 0x080054e0: 00b6 .. LSLS r6,r6,#2 + 0x080054e2: fbb3f3f6 .... UDIV r3,r3,r6 + 0x080054e6: 2664 d& MOVS r6,#0x64 + 0x080054e8: fbb3f3f6 .... UDIV r3,r3,r6 + 0x080054ec: eb0306c3 .... ADD r6,r3,r3,LSL #3 + 0x080054f0: eb061303 .... ADD r3,r6,r3,LSL #4 + 0x080054f4: eba10183 .... SUB r1,r1,r3,LSL #2 + 0x080054f8: 2332 2# MOVS r3,#0x32 + 0x080054fa: eb031101 .... ADD r1,r3,r1,LSL #4 + 0x080054fe: 2364 d# MOVS r3,#0x64 + 0x08005500: fbb1f1f3 .... UDIV r1,r1,r3 + 0x08005504: f001010f .... AND r1,r1,#0xf + 0x08005508: 4411 .D ADD r1,r1,r2 + 0x0800550a: 6822 "h LDR r2,[r4,#0] + 0x0800550c: 6091 .` STR r1,[r2,#8] + 0x0800550e: bd70 p. POP {r4-r6,pc} + $d + 0x08005510: 40013800 .8.@ DCD 1073821696 + $t + i.UART_Start_Receive_DMA + UART_Start_Receive_DMA + 0x08005514: b577 w. PUSH {r0-r2,r4-r6,lr} + 0x08005516: b081 .. SUB sp,sp,#4 + 0x08005518: 4604 .F MOV r4,r0 + 0x0800551a: 4615 .F MOV r5,r2 + 0x0800551c: 9802 .. LDR r0,[sp,#8] + 0x0800551e: 62a0 .b STR r0,[r4,#0x28] + 0x08005520: 85a5 .. STRH r5,[r4,#0x2c] + 0x08005522: 2000 . MOVS r0,#0 + 0x08005524: 6420 d STR r0,[r4,#0x40] + 0x08005526: 2022 " MOVS r0,#0x22 + 0x08005528: f884003e ..>. STRB r0,[r4,#0x3e] + 0x0800552c: 481c .H LDR r0,[pc,#112] ; [0x80055a0] = 0x8005091 + 0x0800552e: 6ba1 .k LDR r1,[r4,#0x38] + 0x08005530: 6288 .b STR r0,[r1,#0x28] + 0x08005532: 481c .H LDR r0,[pc,#112] ; [0x80055a4] = 0x80050f9 + 0x08005534: 6ba1 .k LDR r1,[r4,#0x38] + 0x08005536: 62c8 .b STR r0,[r1,#0x2c] + 0x08005538: 481b .H LDR r0,[pc,#108] ; [0x80055a8] = 0x8005041 + 0x0800553a: 6ba1 .k LDR r1,[r4,#0x38] + 0x0800553c: 6308 .c STR r0,[r1,#0x30] + 0x0800553e: 2000 . MOVS r0,#0 + 0x08005540: 6ba1 .k LDR r1,[r4,#0x38] + 0x08005542: 6348 Hc STR r0,[r1,#0x34] + 0x08005544: ae02 .. ADD r6,sp,#8 + 0x08005546: 6832 2h LDR r2,[r6,#0] + 0x08005548: 6823 #h LDR r3,[r4,#0] + 0x0800554a: 1d19 .. ADDS r1,r3,#4 + 0x0800554c: 462b +F MOV r3,r5 + 0x0800554e: 6ba0 .k LDR r0,[r4,#0x38] + 0x08005550: f7fcfb88 .... BL HAL_DMA_Start_IT ; 0x8001c64 + 0x08005554: bf00 .. NOP + 0x08005556: 2000 . MOVS r0,#0 + 0x08005558: 9000 .. STR r0,[sp,#0] + 0x0800555a: 6820 h LDR r0,[r4,#0] + 0x0800555c: 6800 .h LDR r0,[r0,#0] + 0x0800555e: 9000 .. STR r0,[sp,#0] + 0x08005560: 6820 h LDR r0,[r4,#0] + 0x08005562: 6840 @h LDR r0,[r0,#4] + 0x08005564: 9000 .. STR r0,[sp,#0] + 0x08005566: bf00 .. NOP + 0x08005568: bf00 .. NOP + 0x0800556a: bf00 .. NOP + 0x0800556c: 2000 . MOVS r0,#0 + 0x0800556e: f884003c ..<. STRB r0,[r4,#0x3c] + 0x08005572: bf00 .. NOP + 0x08005574: 6820 h LDR r0,[r4,#0] + 0x08005576: 68c0 .h LDR r0,[r0,#0xc] + 0x08005578: f4407080 @..p ORR r0,r0,#0x100 + 0x0800557c: 6821 !h LDR r1,[r4,#0] + 0x0800557e: 60c8 .` STR r0,[r1,#0xc] + 0x08005580: 6820 h LDR r0,[r4,#0] + 0x08005582: 6940 @i LDR r0,[r0,#0x14] + 0x08005584: f0400001 @... ORR r0,r0,#1 + 0x08005588: 6821 !h LDR r1,[r4,#0] + 0x0800558a: 6148 Ha STR r0,[r1,#0x14] + 0x0800558c: 6820 h LDR r0,[r4,#0] + 0x0800558e: 6940 @i LDR r0,[r0,#0x14] + 0x08005590: f0400040 @.@. ORR r0,r0,#0x40 + 0x08005594: 6821 !h LDR r1,[r4,#0] + 0x08005596: 6148 Ha STR r0,[r1,#0x14] + 0x08005598: 2000 . MOVS r0,#0 + 0x0800559a: b004 .. ADD sp,sp,#0x10 + 0x0800559c: bd70 p. POP {r4-r6,pc} + $d + 0x0800559e: 0000 .. DCW 0 + 0x080055a0: 08005091 .P.. DCD 134238353 + 0x080055a4: 080050f9 .P.. DCD 134238457 + 0x080055a8: 08005041 AP.. DCD 134238273 + $t + i.UART_Transmit_IT + UART_Transmit_IT + 0x080055ac: 4601 .F MOV r1,r0 + 0x080055ae: f891003d ..=. LDRB r0,[r1,#0x3d] + 0x080055b2: 2821 !( CMP r0,#0x21 + 0x080055b4: d128 (. BNE 0x8005608 ; UART_Transmit_IT + 92 + 0x080055b6: 6888 .h LDR r0,[r1,#8] + 0x080055b8: f5b05f80 ..._ CMP r0,#0x1000 + 0x080055bc: d10b .. BNE 0x80055d6 ; UART_Transmit_IT + 42 + 0x080055be: 6908 .i LDR r0,[r1,#0x10] + 0x080055c0: b948 H. CBNZ r0,0x80055d6 ; UART_Transmit_IT + 42 + 0x080055c2: 6a0a .j LDR r2,[r1,#0x20] + 0x080055c4: 8810 .. LDRH r0,[r2,#0] + 0x080055c6: f3c00008 .... UBFX r0,r0,#0,#9 + 0x080055ca: 680b .h LDR r3,[r1,#0] + 0x080055cc: 6058 X` STR r0,[r3,#4] + 0x080055ce: 6a08 .j LDR r0,[r1,#0x20] + 0x080055d0: 1c80 .. ADDS r0,r0,#2 + 0x080055d2: 6208 .b STR r0,[r1,#0x20] + 0x080055d4: e005 .. B 0x80055e2 ; UART_Transmit_IT + 54 + 0x080055d6: 6a0b .j LDR r3,[r1,#0x20] + 0x080055d8: 1c58 X. ADDS r0,r3,#1 + 0x080055da: 6208 .b STR r0,[r1,#0x20] + 0x080055dc: 7818 .x LDRB r0,[r3,#0] + 0x080055de: 680b .h LDR r3,[r1,#0] + 0x080055e0: 6058 X` STR r0,[r3,#4] + 0x080055e2: 8cc8 .. LDRH r0,[r1,#0x26] + 0x080055e4: 1e40 @. SUBS r0,r0,#1 + 0x080055e6: b280 .. UXTH r0,r0 + 0x080055e8: 84c8 .. STRH r0,[r1,#0x26] + 0x080055ea: b958 X. CBNZ r0,0x8005604 ; UART_Transmit_IT + 88 + 0x080055ec: 6808 .h LDR r0,[r1,#0] + 0x080055ee: 68c0 .h LDR r0,[r0,#0xc] + 0x080055f0: f0200080 ... BIC r0,r0,#0x80 + 0x080055f4: 680b .h LDR r3,[r1,#0] + 0x080055f6: 60d8 .` STR r0,[r3,#0xc] + 0x080055f8: 6808 .h LDR r0,[r1,#0] + 0x080055fa: 68c0 .h LDR r0,[r0,#0xc] + 0x080055fc: f0400040 @.@. ORR r0,r0,#0x40 + 0x08005600: 680b .h LDR r3,[r1,#0] + 0x08005602: 60d8 .` STR r0,[r3,#0xc] + 0x08005604: 2000 . MOVS r0,#0 + 0x08005606: 4770 pG BX lr + 0x08005608: 2002 . MOVS r0,#2 + 0x0800560a: e7fc .. B 0x8005606 ; UART_Transmit_IT + 90 + i.UART_WaitOnFlagUntilTimeout + UART_WaitOnFlagUntilTimeout + 0x0800560c: e92d41f0 -..A PUSH {r4-r8,lr} + 0x08005610: 4604 .F MOV r4,r0 + 0x08005612: 460d .F MOV r5,r1 + 0x08005614: 4617 .F MOV r7,r2 + 0x08005616: 4698 .F MOV r8,r3 + 0x08005618: 9e06 .. LDR r6,[sp,#0x18] + 0x0800561a: e021 !. B 0x8005660 ; UART_WaitOnFlagUntilTimeout + 84 + 0x0800561c: 1c70 p. ADDS r0,r6,#1 + 0x0800561e: b1f8 .. CBZ r0,0x8005660 ; UART_WaitOnFlagUntilTimeout + 84 + 0x08005620: b12e .. CBZ r6,0x800562e ; UART_WaitOnFlagUntilTimeout + 34 + 0x08005622: f7fcfd9d .... BL HAL_GetTick ; 0x8002160 + 0x08005626: eba00008 .... SUB r0,r0,r8 + 0x0800562a: 42b0 .B CMP r0,r6 + 0x0800562c: d918 .. BLS 0x8005660 ; UART_WaitOnFlagUntilTimeout + 84 + 0x0800562e: 6820 h LDR r0,[r4,#0] + 0x08005630: 68c0 .h LDR r0,[r0,#0xc] + 0x08005632: f42070d0 ..p BIC r0,r0,#0x1a0 + 0x08005636: 6821 !h LDR r1,[r4,#0] + 0x08005638: 60c8 .` STR r0,[r1,#0xc] + 0x0800563a: 6820 h LDR r0,[r4,#0] + 0x0800563c: 6940 @i LDR r0,[r0,#0x14] + 0x0800563e: f0200001 ... BIC r0,r0,#1 + 0x08005642: 6821 !h LDR r1,[r4,#0] + 0x08005644: 6148 Ha STR r0,[r1,#0x14] + 0x08005646: 2020 MOVS r0,#0x20 + 0x08005648: f884003d ..=. STRB r0,[r4,#0x3d] + 0x0800564c: f884003e ..>. STRB r0,[r4,#0x3e] + 0x08005650: bf00 .. NOP + 0x08005652: 2000 . MOVS r0,#0 + 0x08005654: f884003c ..<. STRB r0,[r4,#0x3c] + 0x08005658: bf00 .. NOP + 0x0800565a: 2003 . MOVS r0,#3 + 0x0800565c: e8bd81f0 .... POP {r4-r8,pc} + 0x08005660: 6820 h LDR r0,[r4,#0] + 0x08005662: 6800 .h LDR r0,[r0,#0] + 0x08005664: 4028 (@ ANDS r0,r0,r5 + 0x08005666: 42a8 .B CMP r0,r5 + 0x08005668: d101 .. BNE 0x800566e ; UART_WaitOnFlagUntilTimeout + 98 + 0x0800566a: 2001 . MOVS r0,#1 + 0x0800566c: e000 .. B 0x8005670 ; UART_WaitOnFlagUntilTimeout + 100 + 0x0800566e: 2000 . MOVS r0,#0 + 0x08005670: 42b8 .B CMP r0,r7 + 0x08005672: d0d3 .. BEQ 0x800561c ; UART_WaitOnFlagUntilTimeout + 16 + 0x08005674: 2000 . MOVS r0,#0 + 0x08005676: e7f1 .. B 0x800565c ; UART_WaitOnFlagUntilTimeout + 80 + i.USART1_IRQHandler + USART1_IRQHandler + 0x08005678: b510 .. PUSH {r4,lr} + 0x0800567a: 4802 .H LDR r0,[pc,#8] ; [0x8005684] = 0x20000624 + 0x0800567c: f7fef844 ..D. BL HAL_UART_IRQHandler ; 0x8003708 + 0x08005680: bd10 .. POP {r4,pc} + $d + 0x08005682: 0000 .. DCW 0 + 0x08005684: 20000624 $.. DCD 536872484 + $t + i.USART2_IRQHandler + USART2_IRQHandler + 0x08005688: b510 .. PUSH {r4,lr} + 0x0800568a: 4802 .H LDR r0,[pc,#8] ; [0x8005694] = 0x20000698 + 0x0800568c: f7fef83c ..<. BL HAL_UART_IRQHandler ; 0x8003708 + 0x08005690: bd10 .. POP {r4,pc} + $d + 0x08005692: 0000 .. DCW 0 + 0x08005694: 20000698 ... DCD 536872600 + $t + i.USART3_IRQHandler + USART3_IRQHandler + 0x08005698: b508 .. PUSH {r3,lr} + 0x0800569a: 481c .H LDR r0,[pc,#112] ; [0x800570c] = 0x2000070c + 0x0800569c: 6800 .h LDR r0,[r0,#0] + 0x0800569e: 6800 .h LDR r0,[r0,#0] + 0x080056a0: f0000020 .. . AND r0,r0,#0x20 + 0x080056a4: 2820 ( CMP r0,#0x20 + 0x080056a6: d107 .. BNE 0x80056b8 ; USART3_IRQHandler + 32 + 0x080056a8: 4818 .H LDR r0,[pc,#96] ; [0x800570c] = 0x2000070c + 0x080056aa: 6d01 .m LDR r1,[r0,#0x50] + 0x080056ac: 4788 .G BLX r1 + 0x080056ae: f06f0020 o. . MVN r0,#0x20 + 0x080056b2: 4916 .I LDR r1,[pc,#88] ; [0x800570c] = 0x2000070c + 0x080056b4: 6809 .h LDR r1,[r1,#0] + 0x080056b6: 6008 .` STR r0,[r1,#0] + 0x080056b8: 4814 .H LDR r0,[pc,#80] ; [0x800570c] = 0x2000070c + 0x080056ba: 6800 .h LDR r0,[r0,#0] + 0x080056bc: 6800 .h LDR r0,[r0,#0] + 0x080056be: f0000008 .... AND r0,r0,#8 + 0x080056c2: 2808 .( CMP r0,#8 + 0x080056c4: d112 .. BNE 0x80056ec ; USART3_IRQHandler + 84 + 0x080056c6: 4911 .I LDR r1,[pc,#68] ; [0x800570c] = 0x2000070c + 0x080056c8: 6809 .h LDR r1,[r1,#0] + 0x080056ca: 6849 Ih LDR r1,[r1,#4] + 0x080056cc: f3c10008 .... UBFX r0,r1,#0,#9 + 0x080056d0: bf00 .. NOP + 0x080056d2: 2100 .! MOVS r1,#0 + 0x080056d4: 9100 .. STR r1,[sp,#0] + 0x080056d6: 490d .I LDR r1,[pc,#52] ; [0x800570c] = 0x2000070c + 0x080056d8: 6809 .h LDR r1,[r1,#0] + 0x080056da: 6809 .h LDR r1,[r1,#0] + 0x080056dc: 9100 .. STR r1,[sp,#0] + 0x080056de: 490b .I LDR r1,[pc,#44] ; [0x800570c] = 0x2000070c + 0x080056e0: 6809 .h LDR r1,[r1,#0] + 0x080056e2: 6849 Ih LDR r1,[r1,#4] + 0x080056e4: 9100 .. STR r1,[sp,#0] + 0x080056e6: bf00 .. NOP + 0x080056e8: bf00 .. NOP + 0x080056ea: bf00 .. NOP + 0x080056ec: 4807 .H LDR r0,[pc,#28] ; [0x800570c] = 0x2000070c + 0x080056ee: 6800 .h LDR r0,[r0,#0] + 0x080056f0: 6800 .h LDR r0,[r0,#0] + 0x080056f2: f0000040 ..@. AND r0,r0,#0x40 + 0x080056f6: 2840 @( CMP r0,#0x40 + 0x080056f8: d103 .. BNE 0x8005702 ; USART3_IRQHandler + 106 + 0x080056fa: 43c0 .C MVNS r0,r0 + 0x080056fc: 4903 .I LDR r1,[pc,#12] ; [0x800570c] = 0x2000070c + 0x080056fe: 6809 .h LDR r1,[r1,#0] + 0x08005700: 6008 .` STR r0,[r1,#0] + 0x08005702: 4802 .H LDR r0,[pc,#8] ; [0x800570c] = 0x2000070c + 0x08005704: f7fef800 .... BL HAL_UART_IRQHandler ; 0x8003708 + 0x08005708: bd08 .. POP {r3,pc} + $d + 0x0800570a: 0000 .. DCW 0 + 0x0800570c: 2000070c ... DCD 536872716 + $t + i.UsageFault_Handler + UsageFault_Handler + 0x08005710: bf00 .. NOP + 0x08005712: e7fe .. B 0x8005712 ; UsageFault_Handler + 2 + i.__0fprintf + __0fprintf + __1fprintf + __2fprintf + __c89fprintf + fprintf + 0x08005714: b40f .. PUSH {r0-r3} + 0x08005716: 4602 .F MOV r2,r0 + 0x08005718: b510 .. PUSH {r4,lr} + 0x0800571a: a904 .. ADD r1,sp,#0x10 + 0x0800571c: 4b03 .K LDR r3,[pc,#12] ; [0x800572c] = 0x8006e6d + 0x0800571e: 9803 .. LDR r0,[sp,#0xc] + 0x08005720: f000f90c .... BL _printf_core ; 0x800593c + 0x08005724: bc10 .. POP {r4} + 0x08005726: f85dfb14 ]... LDR pc,[sp],#0x14 + $d + 0x0800572a: 0000 .. DCW 0 + 0x0800572c: 08006e6d mn.. DCD 134245997 + $t + i.__0printf + __0printf + __1printf + __2printf + __c89printf + printf + 0x08005730: b40f .. PUSH {r0-r3} + 0x08005732: 4b05 .K LDR r3,[pc,#20] ; [0x8005748] = 0x8006e6d + 0x08005734: b510 .. PUSH {r4,lr} + 0x08005736: a903 .. ADD r1,sp,#0xc + 0x08005738: 4a04 .J LDR r2,[pc,#16] ; [0x800574c] = 0x20000424 + 0x0800573a: 9802 .. LDR r0,[sp,#8] + 0x0800573c: f000f8fe .... BL _printf_core ; 0x800593c + 0x08005740: bc10 .. POP {r4} + 0x08005742: f85dfb14 ]... LDR pc,[sp],#0x14 + $d + 0x08005746: 0000 .. DCW 0 + 0x08005748: 08006e6d mn.. DCD 134245997 + 0x0800574c: 20000424 $.. DCD 536871972 + $t + i.__NVIC_GetPriorityGrouping + __NVIC_GetPriorityGrouping + 0x08005750: 4802 .H LDR r0,[pc,#8] ; [0x800575c] = 0xe000ed0c + 0x08005752: 6800 .h LDR r0,[r0,#0] + 0x08005754: f3c02002 ... UBFX r0,r0,#8,#3 + 0x08005758: 4770 pG BX lr + $d + 0x0800575a: 0000 .. DCW 0 + 0x0800575c: e000ed0c .... DCD 3758157068 + $t + i.__NVIC_SetPriority + __NVIC_SetPriority + 0x08005760: b510 .. PUSH {r4,lr} + 0x08005762: 2800 .( CMP r0,#0 + 0x08005764: db04 .. BLT 0x8005770 ; __NVIC_SetPriority + 16 + 0x08005766: 070a .. LSLS r2,r1,#28 + 0x08005768: 0e13 .. LSRS r3,r2,#24 + 0x0800576a: 4a05 .J LDR r2,[pc,#20] ; [0x8005780] = 0xe000e400 + 0x0800576c: 5413 .T STRB r3,[r2,r0] + 0x0800576e: e006 .. B 0x800577e ; __NVIC_SetPriority + 30 + 0x08005770: 070a .. LSLS r2,r1,#28 + 0x08005772: 0e14 .. LSRS r4,r2,#24 + 0x08005774: 4a03 .J LDR r2,[pc,#12] ; [0x8005784] = 0xe000ed18 + 0x08005776: f000030f .... AND r3,r0,#0xf + 0x0800577a: 1f1b .. SUBS r3,r3,#4 + 0x0800577c: 54d4 .T STRB r4,[r2,r3] + 0x0800577e: bd10 .. POP {r4,pc} + $d + 0x08005780: e000e400 .... DCD 3758154752 + 0x08005784: e000ed18 .... DCD 3758157080 + $t + i.__get_BASEPRI + __get_BASEPRI + 0x08005788: f3ef8011 .... MRS r0,BASEPRI + 0x0800578c: 4770 pG BX lr + i.__get_IPSR + __get_IPSR + 0x0800578e: f3ef8005 .... MRS r0,IPSR + 0x08005792: 4770 pG BX lr + i.__get_PRIMASK + __get_PRIMASK + 0x08005794: f3ef8010 .... MRS r0,PRIMASK + 0x08005798: 4770 pG BX lr + i.__scatterload_copy + __scatterload_copy + 0x0800579a: e002 .. B 0x80057a2 ; __scatterload_copy + 8 + 0x0800579c: c808 .. LDM r0!,{r3} + 0x0800579e: 1f12 .. SUBS r2,r2,#4 + 0x080057a0: c108 .. STM r1!,{r3} + 0x080057a2: 2a00 .* CMP r2,#0 + 0x080057a4: d1fa .. BNE 0x800579c ; __scatterload_copy + 2 + 0x080057a6: 4770 pG BX lr + i.__scatterload_null + __scatterload_null + 0x080057a8: 4770 pG BX lr + i.__scatterload_zeroinit + __scatterload_zeroinit + 0x080057aa: 2000 . MOVS r0,#0 + 0x080057ac: e001 .. B 0x80057b2 ; __scatterload_zeroinit + 8 + 0x080057ae: c101 .. STM r1!,{r0} + 0x080057b0: 1f12 .. SUBS r2,r2,#4 + 0x080057b2: 2a00 .* CMP r2,#0 + 0x080057b4: d1fb .. BNE 0x80057ae ; __scatterload_zeroinit + 4 + 0x080057b6: 4770 pG BX lr + i._fp_digits + _fp_digits + 0x080057b8: e92d5fff -.._ PUSH {r0-r12,lr} + 0x080057bc: b082 .. SUB sp,sp,#8 + 0x080057be: 2100 .! MOVS r1,#0 + 0x080057c0: e9dd3004 ...0 LDRD r3,r0,[sp,#0x10] + 0x080057c4: 0d02 .. LSRS r2,r0,#20 + 0x080057c6: f8ddb040 ..@. LDR r11,[sp,#0x40] + 0x080057ca: 4303 .C ORRS r3,r3,r0 + 0x080057cc: d018 .. BEQ 0x8005800 ; _fp_digits + 72 + 0x080057ce: f6445010 D..P MOV r0,#0x4d10 + 0x080057d2: f2a232ff ...2 SUB r2,r2,#0x3ff + 0x080057d6: 4342 BC MULS r2,r0,r2 + 0x080057d8: 1415 .. ASRS r5,r2,#16 + 0x080057da: 9811 .. LDR r0,[sp,#0x44] + 0x080057dc: 2801 .( CMP r0,#1 + 0x080057de: d01f .. BEQ 0x8005820 ; _fp_digits + 104 + 0x080057e0: eba5000b .... SUB r0,r5,r11 + 0x080057e4: 1c40 @. ADDS r0,r0,#1 + 0x080057e6: ea5f0a00 _... MOVS r10,r0 + 0x080057ea: f04f0600 O... MOV r6,#0 + 0x080057ee: 4f4e NO LDR r7,[pc,#312] ; [0x8005928] = 0x40140000 + 0x080057f0: f8df9138 ..8. LDR r9,[pc,#312] ; [0x800592c] = 0x3ff00000 + 0x080057f4: 46b0 .F MOV r8,r6 + 0x080057f6: 4650 PF MOV r0,r10 + 0x080057f8: d515 .. BPL 0x8005826 ; _fp_digits + 110 + 0x080057fa: f1ca0400 .... RSB r4,r10,#0 + 0x080057fe: e013 .. B 0x8005828 ; _fp_digits + 112 + 0x08005800: 9811 .. LDR r0,[sp,#0x44] + 0x08005802: 2401 .$ MOVS r4,#1 + 0x08005804: a34a J. ADR r3,{pc}+0x12c ; 0x8005930 + 0x08005806: 2801 .( CMP r0,#1 + 0x08005808: d101 .. BNE 0x800580e ; _fp_digits + 86 + 0x0800580a: ea6f010b o... MVN r1,r11 + 0x0800580e: 9802 .. LDR r0,[sp,#8] + 0x08005810: 9a11 .. LDR r2,[sp,#0x44] + 0x08005812: e9c03100 ...1 STRD r3,r1,[r0,#0] + 0x08005816: e9c04202 ...B STRD r4,r2,[r0,#8] + 0x0800581a: b006 .. ADD sp,sp,#0x18 + 0x0800581c: e8bd9ff0 .... POP {r4-r12,pc} + 0x08005820: f1cb0000 .... RSB r0,r11,#0 + 0x08005824: e7df .. B 0x80057e6 ; _fp_digits + 46 + 0x08005826: 4604 .F MOV r4,r0 + 0x08005828: 2100 .! MOVS r1,#0 + 0x0800582a: 4a40 @J LDR r2,[pc,#256] ; [0x800592c] = 0x3ff00000 + 0x0800582c: 1849 I. ADDS r1,r1,r1 + 0x0800582e: eb425004 B..P ADC r0,r2,r4,LSL #20 + 0x08005832: e9cd1000 .... STRD r1,r0,[sp,#0] + 0x08005836: e012 .. B 0x800585e ; _fp_digits + 166 + 0x08005838: 07e0 .. LSLS r0,r4,#31 + 0x0800583a: d007 .. BEQ 0x800584c ; _fp_digits + 148 + 0x0800583c: 4632 2F MOV r2,r6 + 0x0800583e: 463b ;F MOV r3,r7 + 0x08005840: 4640 @F MOV r0,r8 + 0x08005842: 4649 IF MOV r1,r9 + 0x08005844: f7fafd5f .._. BL __aeabi_dmul ; 0x8000306 + 0x08005848: 4680 .F MOV r8,r0 + 0x0800584a: 4689 .F MOV r9,r1 + 0x0800584c: 4632 2F MOV r2,r6 + 0x0800584e: 463b ;F MOV r3,r7 + 0x08005850: 4610 .F MOV r0,r2 + 0x08005852: 4619 .F MOV r1,r3 + 0x08005854: f7fafd57 ..W. BL __aeabi_dmul ; 0x8000306 + 0x08005858: 4606 .F MOV r6,r0 + 0x0800585a: 460f .F MOV r7,r1 + 0x0800585c: 1064 d. ASRS r4,r4,#1 + 0x0800585e: 2c00 ., CMP r4,#0 + 0x08005860: d1ea .. BNE 0x8005838 ; _fp_digits + 128 + 0x08005862: e9dd0104 .... LDRD r0,r1,[sp,#0x10] + 0x08005866: e9dd2300 ...# LDRD r2,r3,[sp,#0] + 0x0800586a: f1ba0f00 .... CMP r10,#0 + 0x0800586e: da06 .. BGE 0x800587e ; _fp_digits + 198 + 0x08005870: f7fafd49 ..I. BL __aeabi_dmul ; 0x8000306 + 0x08005874: 4642 BF MOV r2,r8 + 0x08005876: 464b KF MOV r3,r9 + 0x08005878: f7fafd45 ..E. BL __aeabi_dmul ; 0x8000306 + 0x0800587c: e005 .. B 0x800588a ; _fp_digits + 210 + 0x0800587e: f7faff46 ..F. BL __aeabi_ddiv ; 0x800070e + 0x08005882: 4642 BF MOV r2,r8 + 0x08005884: 464b KF MOV r3,r9 + 0x08005886: f7faff42 ..B. BL __aeabi_ddiv ; 0x800070e + 0x0800588a: 4604 .F MOV r4,r0 + 0x0800588c: 460e .F MOV r6,r1 + 0x0800588e: 2200 ." MOVS r2,#0 + 0x08005890: 4b28 (K LDR r3,[pc,#160] ; [0x8005934] = 0x43f00000 + 0x08005892: f7faffc3 .... BL __aeabi_cdrcmple ; 0x800081c + 0x08005896: d803 .. BHI 0x80058a0 ; _fp_digits + 232 + 0x08005898: f04f30ff O..0 MOV r0,#0xffffffff + 0x0800589c: 4601 .F MOV r1,r0 + 0x0800589e: e007 .. B 0x80058b0 ; _fp_digits + 248 + 0x080058a0: 2200 ." MOVS r2,#0 + 0x080058a2: 4b25 %K LDR r3,[pc,#148] ; [0x8005938] = 0x3fe00000 + 0x080058a4: 4620 F MOV r0,r4 + 0x080058a6: 4631 1F MOV r1,r6 + 0x080058a8: f7fafe8a .... BL __aeabi_dadd ; 0x80005c0 + 0x080058ac: f7faff9e .... BL __aeabi_d2ulz ; 0x80007ec + 0x080058b0: 2410 .$ MOVS r4,#0x10 + 0x080058b2: e009 .. B 0x80058c8 ; _fp_digits + 272 + 0x080058b4: 2c00 ., CMP r4,#0 + 0x080058b6: db0a .. BLT 0x80058ce ; _fp_digits + 278 + 0x080058b8: 220a ." MOVS r2,#0xa + 0x080058ba: 2300 .# MOVS r3,#0 + 0x080058bc: f7fafcb0 .... BL __aeabi_uldivmod ; 0x8000220 + 0x080058c0: 9b03 .. LDR r3,[sp,#0xc] + 0x080058c2: 3230 02 ADDS r2,r2,#0x30 + 0x080058c4: 551a .U STRB r2,[r3,r4] + 0x080058c6: 1e64 d. SUBS r4,r4,#1 + 0x080058c8: ea500201 P... ORRS r2,r0,r1 + 0x080058cc: d1f2 .. BNE 0x80058b4 ; _fp_digits + 252 + 0x080058ce: 1c64 d. ADDS r4,r4,#1 + 0x080058d0: 9a03 .. LDR r2,[sp,#0xc] + 0x080058d2: f1c40311 .... RSB r3,r4,#0x11 + 0x080058d6: 4414 .D ADD r4,r4,r2 + 0x080058d8: 9a11 .. LDR r2,[sp,#0x44] + 0x080058da: 2a01 .* CMP r2,#1 + 0x080058dc: d003 .. BEQ 0x80058e6 ; _fp_digits + 302 + 0x080058de: 2201 ." MOVS r2,#1 + 0x080058e0: 4308 .C ORRS r0,r0,r1 + 0x080058e2: d10d .. BNE 0x8005900 ; _fp_digits + 328 + 0x080058e4: e00a .. B 0x80058fc ; _fp_digits + 324 + 0x080058e6: 4308 .C ORRS r0,r0,r1 + 0x080058e8: d004 .. BEQ 0x80058f4 ; _fp_digits + 316 + 0x080058ea: 2000 . MOVS r0,#0 + 0x080058ec: f04f0b11 O... MOV r11,#0x11 + 0x080058f0: 9011 .. STR r0,[sp,#0x44] + 0x080058f2: e772 r. B 0x80057da ; _fp_digits + 34 + 0x080058f4: eba3050b .... SUB r5,r3,r11 + 0x080058f8: 1e6d m. SUBS r5,r5,#1 + 0x080058fa: e00d .. B 0x8005918 ; _fp_digits + 352 + 0x080058fc: 455b [E CMP r3,r11 + 0x080058fe: dd04 .. BLE 0x800590a ; _fp_digits + 338 + 0x08005900: f04f0200 O... MOV r2,#0 + 0x08005904: f1050501 .... ADD r5,r5,#1 + 0x08005908: e004 .. B 0x8005914 ; _fp_digits + 348 + 0x0800590a: da03 .. BGE 0x8005914 ; _fp_digits + 348 + 0x0800590c: f04f0200 O... MOV r2,#0 + 0x08005910: f1a50501 .... SUB r5,r5,#1 + 0x08005914: 2a00 .* CMP r2,#0 + 0x08005916: d0ec .. BEQ 0x80058f2 ; _fp_digits + 314 + 0x08005918: 9802 .. LDR r0,[sp,#8] + 0x0800591a: 9911 .. LDR r1,[sp,#0x44] + 0x0800591c: e9c03102 ...1 STRD r3,r1,[r0,#8] + 0x08005920: e9c04500 ...E STRD r4,r5,[r0,#0] + 0x08005924: e779 y. B 0x800581a ; _fp_digits + 98 + $d + 0x08005926: 0000 .. DCW 0 + 0x08005928: 40140000 ...@ DCD 1075052544 + 0x0800592c: 3ff00000 ...? DCD 1072693248 + 0x08005930: 00000030 0... DCD 48 + 0x08005934: 43f00000 ...C DCD 1139802112 + 0x08005938: 3fe00000 ...? DCD 1071644672 + $t + i._printf_core + _printf_core + 0x0800593c: e92d4fff -..O PUSH {r0-r11,lr} + 0x08005940: b095 .. SUB sp,sp,#0x54 + 0x08005942: 469b .F MOV r11,r3 + 0x08005944: 4689 .F MOV r9,r1 + 0x08005946: 4606 .F MOV r6,r0 + 0x08005948: 2500 .% MOVS r5,#0 + 0x0800594a: e20f .. B 0x8005d6c ; _printf_core + 1072 + 0x0800594c: 2825 %( CMP r0,#0x25 + 0x0800594e: d177 w. BNE 0x8005a40 ; _printf_core + 260 + 0x08005950: 2400 .$ MOVS r4,#0 + 0x08005952: 4627 'F MOV r7,r4 + 0x08005954: 4af8 .J LDR r2,[pc,#992] ; [0x8005d38] = 0x12809 + 0x08005956: 2101 .! MOVS r1,#1 + 0x08005958: 9405 .. STR r4,[sp,#0x14] + 0x0800595a: e000 .. B 0x800595e ; _printf_core + 34 + 0x0800595c: 4304 .C ORRS r4,r4,r0 + 0x0800595e: f8163f01 ...? LDRB r3,[r6,#1]! + 0x08005962: 3b20 ; SUBS r3,r3,#0x20 + 0x08005964: fa01f003 .... LSL r0,r1,r3 + 0x08005968: 4210 .B TST r0,r2 + 0x0800596a: d1f7 .. BNE 0x800595c ; _printf_core + 32 + 0x0800596c: 7830 0x LDRB r0,[r6,#0] + 0x0800596e: 282a *( CMP r0,#0x2a + 0x08005970: d011 .. BEQ 0x8005996 ; _printf_core + 90 + 0x08005972: f06f032f o./. MVN r3,#0x2f + 0x08005976: 7830 0x LDRB r0,[r6,#0] + 0x08005978: f1a00230 ..0. SUB r2,r0,#0x30 + 0x0800597c: 2a09 .* CMP r2,#9 + 0x0800597e: d816 .. BHI 0x80059ae ; _printf_core + 114 + 0x08005980: 9a05 .. LDR r2,[sp,#0x14] + 0x08005982: f0440402 D... ORR r4,r4,#2 + 0x08005986: eb020282 .... ADD r2,r2,r2,LSL #2 + 0x0800598a: eb030242 ..B. ADD r2,r3,r2,LSL #1 + 0x0800598e: 4410 .D ADD r0,r0,r2 + 0x08005990: 1c76 v. ADDS r6,r6,#1 + 0x08005992: 9005 .. STR r0,[sp,#0x14] + 0x08005994: e7ef .. B 0x8005976 ; _printf_core + 58 + 0x08005996: f8592b04 Y..+ LDR r2,[r9],#4 + 0x0800599a: 9205 .. STR r2,[sp,#0x14] + 0x0800599c: 2a00 .* CMP r2,#0 + 0x0800599e: da03 .. BGE 0x80059a8 ; _printf_core + 108 + 0x080059a0: 4250 PB RSBS r0,r2,#0 + 0x080059a2: f4445400 D..T ORR r4,r4,#0x2000 + 0x080059a6: 9005 .. STR r0,[sp,#0x14] + 0x080059a8: f0440402 D... ORR r4,r4,#2 + 0x080059ac: 1c76 v. ADDS r6,r6,#1 + 0x080059ae: 7830 0x LDRB r0,[r6,#0] + 0x080059b0: 282e .( CMP r0,#0x2e + 0x080059b2: d116 .. BNE 0x80059e2 ; _printf_core + 166 + 0x080059b4: f8160f01 .... LDRB r0,[r6,#1]! + 0x080059b8: f0440404 D... ORR r4,r4,#4 + 0x080059bc: 282a *( CMP r0,#0x2a + 0x080059be: d00d .. BEQ 0x80059dc ; _printf_core + 160 + 0x080059c0: f06f022f o./. MVN r2,#0x2f + 0x080059c4: 7830 0x LDRB r0,[r6,#0] + 0x080059c6: f1a00330 ..0. SUB r3,r0,#0x30 + 0x080059ca: 2b09 .+ CMP r3,#9 + 0x080059cc: d809 .. BHI 0x80059e2 ; _printf_core + 166 + 0x080059ce: eb070387 .... ADD r3,r7,r7,LSL #2 + 0x080059d2: eb020343 ..C. ADD r3,r2,r3,LSL #1 + 0x080059d6: 18c7 .. ADDS r7,r0,r3 + 0x080059d8: 1c76 v. ADDS r6,r6,#1 + 0x080059da: e7f3 .. B 0x80059c4 ; _printf_core + 136 + 0x080059dc: f8597b04 Y..{ LDR r7,[r9],#4 + 0x080059e0: 1c76 v. ADDS r6,r6,#1 + 0x080059e2: 7830 0x LDRB r0,[r6,#0] + 0x080059e4: 286c l( CMP r0,#0x6c + 0x080059e6: d00f .. BEQ 0x8005a08 ; _printf_core + 204 + 0x080059e8: dc06 .. BGT 0x80059f8 ; _printf_core + 188 + 0x080059ea: 284c L( CMP r0,#0x4c + 0x080059ec: d017 .. BEQ 0x8005a1e ; _printf_core + 226 + 0x080059ee: 2868 h( CMP r0,#0x68 + 0x080059f0: d00d .. BEQ 0x8005a0e ; _printf_core + 210 + 0x080059f2: 286a j( CMP r0,#0x6a + 0x080059f4: d114 .. BNE 0x8005a20 ; _printf_core + 228 + 0x080059f6: e004 .. B 0x8005a02 ; _printf_core + 198 + 0x080059f8: 2874 t( CMP r0,#0x74 + 0x080059fa: d010 .. BEQ 0x8005a1e ; _printf_core + 226 + 0x080059fc: 287a z( CMP r0,#0x7a + 0x080059fe: d10f .. BNE 0x8005a20 ; _printf_core + 228 + 0x08005a00: e00d .. B 0x8005a1e ; _printf_core + 226 + 0x08005a02: f4441400 D... ORR r4,r4,#0x200000 + 0x08005a06: e00a .. B 0x8005a1e ; _printf_core + 226 + 0x08005a08: f4441480 D... ORR r4,r4,#0x100000 + 0x08005a0c: e001 .. B 0x8005a12 ; _printf_core + 214 + 0x08005a0e: f4441440 D.@. ORR r4,r4,#0x300000 + 0x08005a12: 7872 rx LDRB r2,[r6,#1] + 0x08005a14: 4282 .B CMP r2,r0 + 0x08005a16: d102 .. BNE 0x8005a1e ; _printf_core + 226 + 0x08005a18: f5041480 .... ADD r4,r4,#0x100000 + 0x08005a1c: 1c76 v. ADDS r6,r6,#1 + 0x08005a1e: 1c76 v. ADDS r6,r6,#1 + 0x08005a20: 7830 0x LDRB r0,[r6,#0] + 0x08005a22: 2866 f( CMP r0,#0x66 + 0x08005a24: d00b .. BEQ 0x8005a3e ; _printf_core + 258 + 0x08005a26: dc13 .. BGT 0x8005a50 ; _printf_core + 276 + 0x08005a28: 2858 X( CMP r0,#0x58 + 0x08005a2a: d077 w. BEQ 0x8005b1c ; _printf_core + 480 + 0x08005a2c: dc09 .. BGT 0x8005a42 ; _printf_core + 262 + 0x08005a2e: 2800 .( CMP r0,#0 + 0x08005a30: d075 u. BEQ 0x8005b1e ; _printf_core + 482 + 0x08005a32: 2845 E( CMP r0,#0x45 + 0x08005a34: d0f6 .. BEQ 0x8005a24 ; _printf_core + 232 + 0x08005a36: 2846 F( CMP r0,#0x46 + 0x08005a38: d0f4 .. BEQ 0x8005a24 ; _printf_core + 232 + 0x08005a3a: 2847 G( CMP r0,#0x47 + 0x08005a3c: d11a .. BNE 0x8005a74 ; _printf_core + 312 + 0x08005a3e: e19d .. B 0x8005d7c ; _printf_core + 1088 + 0x08005a40: e018 .. B 0x8005a74 ; _printf_core + 312 + 0x08005a42: 2863 c( CMP r0,#0x63 + 0x08005a44: d035 5. BEQ 0x8005ab2 ; _printf_core + 374 + 0x08005a46: 2864 d( CMP r0,#0x64 + 0x08005a48: d079 y. BEQ 0x8005b3e ; _printf_core + 514 + 0x08005a4a: 2865 e( CMP r0,#0x65 + 0x08005a4c: d112 .. BNE 0x8005a74 ; _printf_core + 312 + 0x08005a4e: e195 .. B 0x8005d7c ; _printf_core + 1088 + 0x08005a50: 2870 p( CMP r0,#0x70 + 0x08005a52: d073 s. BEQ 0x8005b3c ; _printf_core + 512 + 0x08005a54: dc08 .. BGT 0x8005a68 ; _printf_core + 300 + 0x08005a56: 2867 g( CMP r0,#0x67 + 0x08005a58: d0f1 .. BEQ 0x8005a3e ; _printf_core + 258 + 0x08005a5a: 2869 i( CMP r0,#0x69 + 0x08005a5c: d06f o. BEQ 0x8005b3e ; _printf_core + 514 + 0x08005a5e: 286e n( CMP r0,#0x6e + 0x08005a60: d00d .. BEQ 0x8005a7e ; _printf_core + 322 + 0x08005a62: 286f o( CMP r0,#0x6f + 0x08005a64: d106 .. BNE 0x8005a74 ; _printf_core + 312 + 0x08005a66: e0b5 .. B 0x8005bd4 ; _printf_core + 664 + 0x08005a68: 2873 s( CMP r0,#0x73 + 0x08005a6a: d02c ,. BEQ 0x8005ac6 ; _printf_core + 394 + 0x08005a6c: 2875 u( CMP r0,#0x75 + 0x08005a6e: d075 u. BEQ 0x8005b5c ; _printf_core + 544 + 0x08005a70: 2878 x( CMP r0,#0x78 + 0x08005a72: d074 t. BEQ 0x8005b5e ; _printf_core + 546 + 0x08005a74: 465a ZF MOV r2,r11 + 0x08005a76: 9917 .. LDR r1,[sp,#0x5c] + 0x08005a78: 4790 .G BLX r2 + 0x08005a7a: 1c6d m. ADDS r5,r5,#1 + 0x08005a7c: e175 u. B 0x8005d6a ; _printf_core + 1070 + 0x08005a7e: f3c45002 ...P UBFX r0,r4,#20,#3 + 0x08005a82: 2802 .( CMP r0,#2 + 0x08005a84: d009 .. BEQ 0x8005a9a ; _printf_core + 350 + 0x08005a86: 2803 .( CMP r0,#3 + 0x08005a88: d00d .. BEQ 0x8005aa6 ; _printf_core + 362 + 0x08005a8a: f8d91000 .... LDR r1,[r9,#0] + 0x08005a8e: 2804 .( CMP r0,#4 + 0x08005a90: d00d .. BEQ 0x8005aae ; _printf_core + 370 + 0x08005a92: 600d .` STR r5,[r1,#0] + 0x08005a94: f1090904 .... ADD r9,r9,#4 + 0x08005a98: e167 g. B 0x8005d6a ; _printf_core + 1070 + 0x08005a9a: f8d91000 .... LDR r1,[r9,#0] + 0x08005a9e: 17ea .. ASRS r2,r5,#31 + 0x08005aa0: e9c15200 ...R STRD r5,r2,[r1,#0] + 0x08005aa4: e7f6 .. B 0x8005a94 ; _printf_core + 344 + 0x08005aa6: f8d91000 .... LDR r1,[r9,#0] + 0x08005aaa: 800d .. STRH r5,[r1,#0] + 0x08005aac: e7f2 .. B 0x8005a94 ; _printf_core + 344 + 0x08005aae: 700d .p STRB r5,[r1,#0] + 0x08005ab0: e7f0 .. B 0x8005a94 ; _printf_core + 344 + 0x08005ab2: f8191b04 .... LDRB r1,[r9],#4 + 0x08005ab6: f88d1000 .... STRB r1,[sp,#0] + 0x08005aba: 2000 . MOVS r0,#0 + 0x08005abc: f88d0001 .... STRB r0,[sp,#1] + 0x08005ac0: 46ea .F MOV r10,sp + 0x08005ac2: 2001 . MOVS r0,#1 + 0x08005ac4: e003 .. B 0x8005ace ; _printf_core + 402 + 0x08005ac6: f859ab04 Y... LDR r10,[r9],#4 + 0x08005aca: f04f30ff O..0 MOV r0,#0xffffffff + 0x08005ace: 0761 a. LSLS r1,r4,#29 + 0x08005ad0: f04f0100 O... MOV r1,#0 + 0x08005ad4: d402 .. BMI 0x8005adc ; _printf_core + 416 + 0x08005ad6: e00d .. B 0x8005af4 ; _printf_core + 440 + 0x08005ad8: f1080101 .... ADD r1,r8,#1 + 0x08005adc: 4688 .F MOV r8,r1 + 0x08005ade: 42b9 .B CMP r1,r7 + 0x08005ae0: da0f .. BGE 0x8005b02 ; _printf_core + 454 + 0x08005ae2: 4580 .E CMP r8,r0 + 0x08005ae4: dbf8 .. BLT 0x8005ad8 ; _printf_core + 412 + 0x08005ae6: f81a1008 .... LDRB r1,[r10,r8] + 0x08005aea: 2900 .) CMP r1,#0 + 0x08005aec: d1f4 .. BNE 0x8005ad8 ; _printf_core + 412 + 0x08005aee: e008 .. B 0x8005b02 ; _printf_core + 454 + 0x08005af0: f1080101 .... ADD r1,r8,#1 + 0x08005af4: 4688 .F MOV r8,r1 + 0x08005af6: 4281 .B CMP r1,r0 + 0x08005af8: dbfa .. BLT 0x8005af0 ; _printf_core + 436 + 0x08005afa: f81a1008 .... LDRB r1,[r10,r8] + 0x08005afe: 2900 .) CMP r1,#0 + 0x08005b00: d1f6 .. BNE 0x8005af0 ; _printf_core + 436 + 0x08005b02: 9805 .. LDR r0,[sp,#0x14] + 0x08005b04: 465b [F MOV r3,r11 + 0x08005b06: eba00708 .... SUB r7,r0,r8 + 0x08005b0a: 4621 !F MOV r1,r4 + 0x08005b0c: 4638 8F MOV r0,r7 + 0x08005b0e: 9a17 .. LDR r2,[sp,#0x5c] + 0x08005b10: f000fa94 .... BL _printf_pre_padding ; 0x800603c + 0x08005b14: 4428 (D ADD r0,r0,r5 + 0x08005b16: eb000508 .... ADD r5,r0,r8 + 0x08005b1a: e007 .. B 0x8005b2c ; _printf_core + 496 + 0x08005b1c: e04d M. B 0x8005bba ; _printf_core + 638 + 0x08005b1e: e129 ). B 0x8005d74 ; _printf_core + 1080 + 0x08005b20: e00d .. B 0x8005b3e ; _printf_core + 514 + 0x08005b22: f81a0b01 .... LDRB r0,[r10],#1 + 0x08005b26: 465a ZF MOV r2,r11 + 0x08005b28: 9917 .. LDR r1,[sp,#0x5c] + 0x08005b2a: 4790 .G BLX r2 + 0x08005b2c: f1b80801 .... SUBS r8,r8,#1 + 0x08005b30: d2f7 .. BCS 0x8005b22 ; _printf_core + 486 + 0x08005b32: 465b [F MOV r3,r11 + 0x08005b34: 4621 !F MOV r1,r4 + 0x08005b36: 4638 8F MOV r0,r7 + 0x08005b38: 9a17 .. LDR r2,[sp,#0x5c] + 0x08005b3a: e113 .. B 0x8005d64 ; _printf_core + 1064 + 0x08005b3c: e042 B. B 0x8005bc4 ; _printf_core + 648 + 0x08005b3e: 220a ." MOVS r2,#0xa + 0x08005b40: 9200 .. STR r2,[sp,#0] + 0x08005b42: f3c45202 ...R UBFX r2,r4,#20,#3 + 0x08005b46: f04f0a00 O... MOV r10,#0 + 0x08005b4a: 2a02 .* CMP r2,#2 + 0x08005b4c: d008 .. BEQ 0x8005b60 ; _printf_core + 548 + 0x08005b4e: f859cb04 Y... LDR r12,[r9],#4 + 0x08005b52: 2a03 .* CMP r2,#3 + 0x08005b54: ea4f71ec O..q ASR r1,r12,#31 + 0x08005b58: d00a .. BEQ 0x8005b70 ; _printf_core + 564 + 0x08005b5a: e00d .. B 0x8005b78 ; _printf_core + 572 + 0x08005b5c: e029 ). B 0x8005bb2 ; _printf_core + 630 + 0x08005b5e: e02a *. B 0x8005bb6 ; _printf_core + 634 + 0x08005b60: f1090107 .... ADD r1,r9,#7 + 0x08005b64: f0210207 !... BIC r2,r1,#7 + 0x08005b68: e8f2c102 .... LDRD r12,r1,[r2],#8 + 0x08005b6c: 4691 .F MOV r9,r2 + 0x08005b6e: e009 .. B 0x8005b84 ; _printf_core + 584 + 0x08005b70: fa0ffc8c .... SXTH r12,r12 + 0x08005b74: ea4f71ec O..q ASR r1,r12,#31 + 0x08005b78: 2a04 .* CMP r2,#4 + 0x08005b7a: d103 .. BNE 0x8005b84 ; _printf_core + 584 + 0x08005b7c: fa4ffc8c O... SXTB r12,r12 + 0x08005b80: ea4f71ec O..q ASR r1,r12,#31 + 0x08005b84: 2900 .) CMP r1,#0 + 0x08005b86: da07 .. BGE 0x8005b98 ; _printf_core + 604 + 0x08005b88: 460a .F MOV r2,r1 + 0x08005b8a: 2100 .! MOVS r1,#0 + 0x08005b8c: f1dc0c00 .... RSBS r12,r12,#0 + 0x08005b90: eb610102 a... SBC r1,r1,r2 + 0x08005b94: 222d -" MOVS r2,#0x2d + 0x08005b96: e002 .. B 0x8005b9e ; _printf_core + 610 + 0x08005b98: 0522 ". LSLS r2,r4,#20 + 0x08005b9a: d504 .. BPL 0x8005ba6 ; _printf_core + 618 + 0x08005b9c: 222b +" MOVS r2,#0x2b + 0x08005b9e: f88d2004 ... STRB r2,[sp,#4] + 0x08005ba2: 2201 ." MOVS r2,#1 + 0x08005ba4: e003 .. B 0x8005bae ; _printf_core + 626 + 0x08005ba6: 07e2 .. LSLS r2,r4,#31 + 0x08005ba8: d001 .. BEQ 0x8005bae ; _printf_core + 626 + 0x08005baa: 2220 " MOVS r2,#0x20 + 0x08005bac: e7f7 .. B 0x8005b9e ; _printf_core + 610 + 0x08005bae: 4690 .F MOV r8,r2 + 0x08005bb0: e059 Y. B 0x8005c66 ; _printf_core + 810 + 0x08005bb2: 210a .! MOVS r1,#0xa + 0x08005bb4: e002 .. B 0x8005bbc ; _printf_core + 640 + 0x08005bb6: 2210 ." MOVS r2,#0x10 + 0x08005bb8: e00d .. B 0x8005bd6 ; _printf_core + 666 + 0x08005bba: 2110 .! MOVS r1,#0x10 + 0x08005bbc: f04f0a00 O... MOV r10,#0 + 0x08005bc0: 9100 .. STR r1,[sp,#0] + 0x08005bc2: e00b .. B 0x8005bdc ; _printf_core + 672 + 0x08005bc4: 2210 ." MOVS r2,#0x10 + 0x08005bc6: f04f0a00 O... MOV r10,#0 + 0x08005bca: f0440404 D... ORR r4,r4,#4 + 0x08005bce: 2708 .' MOVS r7,#8 + 0x08005bd0: 9200 .. STR r2,[sp,#0] + 0x08005bd2: e003 .. B 0x8005bdc ; _printf_core + 672 + 0x08005bd4: 2208 ." MOVS r2,#8 + 0x08005bd6: f04f0a00 O... MOV r10,#0 + 0x08005bda: 9200 .. STR r2,[sp,#0] + 0x08005bdc: f3c45202 ...R UBFX r2,r4,#20,#3 + 0x08005be0: 2a02 .* CMP r2,#2 + 0x08005be2: d005 .. BEQ 0x8005bf0 ; _printf_core + 692 + 0x08005be4: f859cb04 Y... LDR r12,[r9],#4 + 0x08005be8: 2100 .! MOVS r1,#0 + 0x08005bea: 2a03 .* CMP r2,#3 + 0x08005bec: d008 .. BEQ 0x8005c00 ; _printf_core + 708 + 0x08005bee: e009 .. B 0x8005c04 ; _printf_core + 712 + 0x08005bf0: f1090107 .... ADD r1,r9,#7 + 0x08005bf4: f0210207 !... BIC r2,r1,#7 + 0x08005bf8: e8f2c102 .... LDRD r12,r1,[r2],#8 + 0x08005bfc: 4691 .F MOV r9,r2 + 0x08005bfe: e005 .. B 0x8005c0c ; _printf_core + 720 + 0x08005c00: fa1ffc8c .... UXTH r12,r12 + 0x08005c04: 2a04 .* CMP r2,#4 + 0x08005c06: d101 .. BNE 0x8005c0c ; _printf_core + 720 + 0x08005c08: f00c0cff .... AND r12,r12,#0xff + 0x08005c0c: f04f0800 O... MOV r8,#0 + 0x08005c10: 0722 ". LSLS r2,r4,#28 + 0x08005c12: d528 (. BPL 0x8005c66 ; _printf_core + 810 + 0x08005c14: 2870 p( CMP r0,#0x70 + 0x08005c16: d006 .. BEQ 0x8005c26 ; _printf_core + 746 + 0x08005c18: 9b00 .. LDR r3,[sp,#0] + 0x08005c1a: f0830310 .... EOR r3,r3,#0x10 + 0x08005c1e: ea53030a S... ORRS r3,r3,r10 + 0x08005c22: d005 .. BEQ 0x8005c30 ; _printf_core + 756 + 0x08005c24: e00e .. B 0x8005c44 ; _printf_core + 776 + 0x08005c26: 2240 @" MOVS r2,#0x40 + 0x08005c28: f88d2004 ... STRB r2,[sp,#4] + 0x08005c2c: 2201 ." MOVS r2,#1 + 0x08005c2e: e008 .. B 0x8005c42 ; _printf_core + 774 + 0x08005c30: ea5c0201 \... ORRS r2,r12,r1 + 0x08005c34: d006 .. BEQ 0x8005c44 ; _printf_core + 776 + 0x08005c36: 2230 0" MOVS r2,#0x30 + 0x08005c38: f88d2004 ... STRB r2,[sp,#4] + 0x08005c3c: f88d0005 .... STRB r0,[sp,#5] + 0x08005c40: 2202 ." MOVS r2,#2 + 0x08005c42: 4690 .F MOV r8,r2 + 0x08005c44: 9b00 .. LDR r3,[sp,#0] + 0x08005c46: f0830308 .... EOR r3,r3,#8 + 0x08005c4a: ea53030a S... ORRS r3,r3,r10 + 0x08005c4e: d10a .. BNE 0x8005c66 ; _printf_core + 810 + 0x08005c50: ea5c0201 \... ORRS r2,r12,r1 + 0x08005c54: d101 .. BNE 0x8005c5a ; _printf_core + 798 + 0x08005c56: 0762 b. LSLS r2,r4,#29 + 0x08005c58: d505 .. BPL 0x8005c66 ; _printf_core + 810 + 0x08005c5a: 2230 0" MOVS r2,#0x30 + 0x08005c5c: f88d2004 ... STRB r2,[sp,#4] + 0x08005c60: f04f0801 O... MOV r8,#1 + 0x08005c64: 1e7f .. SUBS r7,r7,#1 + 0x08005c66: 2858 X( CMP r0,#0x58 + 0x08005c68: d004 .. BEQ 0x8005c74 ; _printf_core + 824 + 0x08005c6a: a034 4. ADR r0,{pc}+0xd2 ; 0x8005d3c + 0x08005c6c: 9003 .. STR r0,[sp,#0xc] + 0x08005c6e: a80e .. ADD r0,sp,#0x38 + 0x08005c70: 9002 .. STR r0,[sp,#8] + 0x08005c72: e00d .. B 0x8005c90 ; _printf_core + 852 + 0x08005c74: a036 6. ADR r0,{pc}+0xdc ; 0x8005d50 + 0x08005c76: e7f9 .. B 0x8005c6c ; _printf_core + 816 + 0x08005c78: 4653 SF MOV r3,r10 + 0x08005c7a: 4660 `F MOV r0,r12 + 0x08005c7c: 9a00 .. LDR r2,[sp,#0] + 0x08005c7e: f7fafacf .... BL __aeabi_uldivmod ; 0x8000220 + 0x08005c82: 4684 .F MOV r12,r0 + 0x08005c84: 9803 .. LDR r0,[sp,#0xc] + 0x08005c86: 5c82 .\ LDRB r2,[r0,r2] + 0x08005c88: 9802 .. LDR r0,[sp,#8] + 0x08005c8a: 1e40 @. SUBS r0,r0,#1 + 0x08005c8c: 9002 .. STR r0,[sp,#8] + 0x08005c8e: 7002 .p STRB r2,[r0,#0] + 0x08005c90: ea5c0001 \... ORRS r0,r12,r1 + 0x08005c94: d1f0 .. BNE 0x8005c78 ; _printf_core + 828 + 0x08005c96: 9802 .. LDR r0,[sp,#8] + 0x08005c98: a906 .. ADD r1,sp,#0x18 + 0x08005c9a: 1a08 .. SUBS r0,r1,r0 + 0x08005c9c: f1000a20 .. . ADD r10,r0,#0x20 + 0x08005ca0: 0760 `. LSLS r0,r4,#29 + 0x08005ca2: d502 .. BPL 0x8005caa ; _printf_core + 878 + 0x08005ca4: f4243480 $..4 BIC r4,r4,#0x10000 + 0x08005ca8: e000 .. B 0x8005cac ; _printf_core + 880 + 0x08005caa: 2701 .' MOVS r7,#1 + 0x08005cac: 4557 WE CMP r7,r10 + 0x08005cae: dd02 .. BLE 0x8005cb6 ; _printf_core + 890 + 0x08005cb0: eba7000a .... SUB r0,r7,r10 + 0x08005cb4: e000 .. B 0x8005cb8 ; _printf_core + 892 + 0x08005cb6: 2000 . MOVS r0,#0 + 0x08005cb8: eb00010a .... ADD r1,r0,r10 + 0x08005cbc: 9000 .. STR r0,[sp,#0] + 0x08005cbe: 9805 .. LDR r0,[sp,#0x14] + 0x08005cc0: 4441 AD ADD r1,r1,r8 + 0x08005cc2: 1a40 @. SUBS r0,r0,r1 + 0x08005cc4: 9005 .. STR r0,[sp,#0x14] + 0x08005cc6: 03e0 .. LSLS r0,r4,#15 + 0x08005cc8: d406 .. BMI 0x8005cd8 ; _printf_core + 924 + 0x08005cca: 465b [F MOV r3,r11 + 0x08005ccc: 4621 !F MOV r1,r4 + 0x08005cce: 9a17 .. LDR r2,[sp,#0x5c] + 0x08005cd0: 9805 .. LDR r0,[sp,#0x14] + 0x08005cd2: f000f9b3 .... BL _printf_pre_padding ; 0x800603c + 0x08005cd6: 4405 .D ADD r5,r5,r0 + 0x08005cd8: 2700 .' MOVS r7,#0 + 0x08005cda: e006 .. B 0x8005cea ; _printf_core + 942 + 0x08005cdc: a801 .. ADD r0,sp,#4 + 0x08005cde: 465a ZF MOV r2,r11 + 0x08005ce0: 5dc0 .] LDRB r0,[r0,r7] + 0x08005ce2: 9917 .. LDR r1,[sp,#0x5c] + 0x08005ce4: 4790 .G BLX r2 + 0x08005ce6: 1c6d m. ADDS r5,r5,#1 + 0x08005ce8: 1c7f .. ADDS r7,r7,#1 + 0x08005cea: 4547 GE CMP r7,r8 + 0x08005cec: dbf6 .. BLT 0x8005cdc ; _printf_core + 928 + 0x08005cee: 03e0 .. LSLS r0,r4,#15 + 0x08005cf0: d50c .. BPL 0x8005d0c ; _printf_core + 976 + 0x08005cf2: 465b [F MOV r3,r11 + 0x08005cf4: 4621 !F MOV r1,r4 + 0x08005cf6: 9a17 .. LDR r2,[sp,#0x5c] + 0x08005cf8: 9805 .. LDR r0,[sp,#0x14] + 0x08005cfa: f000f99f .... BL _printf_pre_padding ; 0x800603c + 0x08005cfe: 4405 .D ADD r5,r5,r0 + 0x08005d00: e004 .. B 0x8005d0c ; _printf_core + 976 + 0x08005d02: 2030 0 MOVS r0,#0x30 + 0x08005d04: 465a ZF MOV r2,r11 + 0x08005d06: 9917 .. LDR r1,[sp,#0x5c] + 0x08005d08: 4790 .G BLX r2 + 0x08005d0a: 1c6d m. ADDS r5,r5,#1 + 0x08005d0c: 9900 .. LDR r1,[sp,#0] + 0x08005d0e: 1e48 H. SUBS r0,r1,#1 + 0x08005d10: 9000 .. STR r0,[sp,#0] + 0x08005d12: 2900 .) CMP r1,#0 + 0x08005d14: dcf5 .. BGT 0x8005d02 ; _printf_core + 966 + 0x08005d16: e008 .. B 0x8005d2a ; _printf_core + 1006 + 0x08005d18: 9802 .. LDR r0,[sp,#8] + 0x08005d1a: 9902 .. LDR r1,[sp,#8] + 0x08005d1c: 465a ZF MOV r2,r11 + 0x08005d1e: 7800 .x LDRB r0,[r0,#0] + 0x08005d20: 1c49 I. ADDS r1,r1,#1 + 0x08005d22: 9102 .. STR r1,[sp,#8] + 0x08005d24: 9917 .. LDR r1,[sp,#0x5c] + 0x08005d26: 4790 .G BLX r2 + 0x08005d28: 1c6d m. ADDS r5,r5,#1 + 0x08005d2a: f1ba0100 .... SUBS r1,r10,#0 + 0x08005d2e: f1aa0a01 .... SUB r10,r10,#1 + 0x08005d32: dcf1 .. BGT 0x8005d18 ; _printf_core + 988 + 0x08005d34: e165 e. B 0x8006002 ; _printf_core + 1734 + $d + 0x08005d36: 0000 .. DCW 0 + 0x08005d38: 00012809 .(.. DCD 75785 + 0x08005d3c: 33323130 0123 DCD 858927408 + 0x08005d40: 37363534 4567 DCD 926299444 + 0x08005d44: 62613938 89ab DCD 1650538808 + 0x08005d48: 66656463 cdef DCD 1717920867 + 0x08005d4c: 00000000 .... DCD 0 + 0x08005d50: 33323130 0123 DCD 858927408 + 0x08005d54: 37363534 4567 DCD 926299444 + 0x08005d58: 42413938 89AB DCD 1111570744 + 0x08005d5c: 46454443 CDEF DCD 1178944579 + 0x08005d60: 00000000 .... DCD 0 + $t + 0x08005d64: f000f958 ..X. BL _printf_post_padding ; 0x8006018 + 0x08005d68: 4405 .D ADD r5,r5,r0 + 0x08005d6a: 1c76 v. ADDS r6,r6,#1 + 0x08005d6c: 7830 0x LDRB r0,[r6,#0] + 0x08005d6e: 2800 .( CMP r0,#0 + 0x08005d70: f47fadec .... BNE 0x800594c ; _printf_core + 16 + 0x08005d74: b019 .. ADD sp,sp,#0x64 + 0x08005d76: 4628 (F MOV r0,r5 + 0x08005d78: e8bd8ff0 .... POP {r4-r11,pc} + 0x08005d7c: 0762 b. LSLS r2,r4,#29 + 0x08005d7e: d400 .. BMI 0x8005d82 ; _printf_core + 1094 + 0x08005d80: 2706 .' MOVS r7,#6 + 0x08005d82: f1090207 .... ADD r2,r9,#7 + 0x08005d86: f0220c07 "... BIC r12,r2,#7 + 0x08005d8a: e8fc2302 ...# LDRD r2,r3,[r12],#8 + 0x08005d8e: 46e1 .F MOV r9,r12 + 0x08005d90: f0034800 ...H AND r8,r3,#0x80000000 + 0x08005d94: ea5f0c08 _... MOVS r12,r8 + 0x08005d98: d002 .. BEQ 0x8005da0 ; _printf_core + 1124 + 0x08005d9a: f20f2c70 ..p, ADR.W r12,{pc}+0x272 ; 0x800600c + 0x08005d9e: e00d .. B 0x8005dbc ; _printf_core + 1152 + 0x08005da0: ea5f5c04 _..\ LSLS r12,r4,#20 + 0x08005da4: d502 .. BPL 0x8005dac ; _printf_core + 1136 + 0x08005da6: f20f2c68 ..h, ADR.W r12,{pc}+0x26a ; 0x8006010 + 0x08005daa: e007 .. B 0x8005dbc ; _printf_core + 1152 + 0x08005dac: ea5f7cc4 _..| LSLS r12,r4,#31 + 0x08005db0: d002 .. BEQ 0x8005db8 ; _printf_core + 1148 + 0x08005db2: f20f2c60 ..`, ADR.W r12,{pc}+0x262 ; 0x8006014 + 0x08005db6: e001 .. B 0x8005dbc ; _printf_core + 1152 + 0x08005db8: f2af0c70 ..p. ADR r12,{pc}-0x6c ; 0x8005d4c + 0x08005dbc: f04f38ff O..8 MOV r8,#0xffffffff + 0x08005dc0: f0234300 #..C BIC r3,r3,#0x80000000 + 0x08005dc4: f8cdc050 ..P. STR r12,[sp,#0x50] + 0x08005dc8: 2865 e( CMP r0,#0x65 + 0x08005dca: d00c .. BEQ 0x8005de6 ; _printf_core + 1194 + 0x08005dcc: dc06 .. BGT 0x8005ddc ; _printf_core + 1184 + 0x08005dce: 2845 E( CMP r0,#0x45 + 0x08005dd0: d009 .. BEQ 0x8005de6 ; _printf_core + 1194 + 0x08005dd2: 2846 F( CMP r0,#0x46 + 0x08005dd4: d01d .. BEQ 0x8005e12 ; _printf_core + 1238 + 0x08005dd6: 2847 G( CMP r0,#0x47 + 0x08005dd8: d13d =. BNE 0x8005e56 ; _printf_core + 1306 + 0x08005dda: e03d =. B 0x8005e58 ; _printf_core + 1308 + 0x08005ddc: 2866 f( CMP r0,#0x66 + 0x08005dde: d018 .. BEQ 0x8005e12 ; _printf_core + 1238 + 0x08005de0: 2867 g( CMP r0,#0x67 + 0x08005de2: d17e ~. BNE 0x8005ee2 ; _printf_core + 1446 + 0x08005de4: e038 8. B 0x8005e58 ; _printf_core + 1308 + 0x08005de6: 2100 .! MOVS r1,#0 + 0x08005de8: 2f11 ./ CMP r7,#0x11 + 0x08005dea: db01 .. BLT 0x8005df0 ; _printf_core + 1204 + 0x08005dec: 2011 . MOVS r0,#0x11 + 0x08005dee: e000 .. B 0x8005df2 ; _printf_core + 1206 + 0x08005df0: 1c78 x. ADDS r0,r7,#1 + 0x08005df2: e9cd0100 .... STRD r0,r1,[sp,#0] + 0x08005df6: a906 .. ADD r1,sp,#0x18 + 0x08005df8: a80e .. ADD r0,sp,#0x38 + 0x08005dfa: f7fffcdd .... BL _fp_digits ; 0x80057b8 + 0x08005dfe: e9dd010f .... LDRD r0,r1,[sp,#0x3c] + 0x08005e02: 9a0e .. LDR r2,[sp,#0x38] + 0x08005e04: 9103 .. STR r1,[sp,#0xc] + 0x08005e06: 2100 .! MOVS r1,#0 + 0x08005e08: 9200 .. STR r2,[sp,#0] + 0x08005e0a: f1070a01 .... ADD r10,r7,#1 + 0x08005e0e: 9104 .. STR r1,[sp,#0x10] + 0x08005e10: e04d M. B 0x8005eae ; _printf_core + 1394 + 0x08005e12: f04f4000 O..@ MOV r0,#0x80000000 + 0x08005e16: 9700 .. STR r7,[sp,#0] + 0x08005e18: e9cd1001 .... STRD r1,r0,[sp,#4] + 0x08005e1c: a906 .. ADD r1,sp,#0x18 + 0x08005e1e: a80e .. ADD r0,sp,#0x38 + 0x08005e20: f7fffcca .... BL _fp_digits ; 0x80057b8 + 0x08005e24: e9dd020f .... LDRD r0,r2,[sp,#0x3c] + 0x08005e28: 9203 .. STR r2,[sp,#0xc] + 0x08005e2a: 9b0e .. LDR r3,[sp,#0x38] + 0x08005e2c: 9911 .. LDR r1,[sp,#0x44] + 0x08005e2e: 2200 ." MOVS r2,#0 + 0x08005e30: f8dda00c .... LDR r10,[sp,#0xc] + 0x08005e34: 9300 .. STR r3,[sp,#0] + 0x08005e36: 9204 .. STR r2,[sp,#0x10] + 0x08005e38: b911 .. CBNZ r1,0x8005e40 ; _printf_core + 1284 + 0x08005e3a: 1c79 y. ADDS r1,r7,#1 + 0x08005e3c: eb000a01 .... ADD r10,r0,r1 + 0x08005e40: ebb7000a .... SUBS r0,r7,r10 + 0x08005e44: d404 .. BMI 0x8005e50 ; _printf_core + 1300 + 0x08005e46: f1c030ff ...0 RSB r0,r0,#0xffffffff + 0x08005e4a: f1070a01 .... ADD r10,r7,#1 + 0x08005e4e: 9004 .. STR r0,[sp,#0x10] + 0x08005e50: ebaa0007 .... SUB r0,r10,r7 + 0x08005e54: 9001 .. STR r0,[sp,#4] + 0x08005e56: e044 D. B 0x8005ee2 ; _printf_core + 1446 + 0x08005e58: 2f01 ./ CMP r7,#1 + 0x08005e5a: da00 .. BGE 0x8005e5e ; _printf_core + 1314 + 0x08005e5c: 2701 .' MOVS r7,#1 + 0x08005e5e: 2100 .! MOVS r1,#0 + 0x08005e60: 2f11 ./ CMP r7,#0x11 + 0x08005e62: dd01 .. BLE 0x8005e68 ; _printf_core + 1324 + 0x08005e64: 2011 . MOVS r0,#0x11 + 0x08005e66: e000 .. B 0x8005e6a ; _printf_core + 1326 + 0x08005e68: 4638 8F MOV r0,r7 + 0x08005e6a: e9cd0100 .... STRD r0,r1,[sp,#0] + 0x08005e6e: a906 .. ADD r1,sp,#0x18 + 0x08005e70: a80e .. ADD r0,sp,#0x38 + 0x08005e72: f7fffca1 .... BL _fp_digits ; 0x80057b8 + 0x08005e76: e9dd010f .... LDRD r0,r1,[sp,#0x3c] + 0x08005e7a: 9a0e .. LDR r2,[sp,#0x38] + 0x08005e7c: 9103 .. STR r1,[sp,#0xc] + 0x08005e7e: 2100 .! MOVS r1,#0 + 0x08005e80: 9104 .. STR r1,[sp,#0x10] + 0x08005e82: 9200 .. STR r2,[sp,#0] + 0x08005e84: 46ba .F MOV r10,r7 + 0x08005e86: 0721 !. LSLS r1,r4,#28 + 0x08005e88: d40c .. BMI 0x8005ea4 ; _printf_core + 1384 + 0x08005e8a: 9903 .. LDR r1,[sp,#0xc] + 0x08005e8c: 4551 QE CMP r1,r10 + 0x08005e8e: da00 .. BGE 0x8005e92 ; _printf_core + 1366 + 0x08005e90: 468a .F MOV r10,r1 + 0x08005e92: f1ba0f01 .... CMP r10,#1 + 0x08005e96: dd05 .. BLE 0x8005ea4 ; _printf_core + 1384 + 0x08005e98: 9a00 .. LDR r2,[sp,#0] + 0x08005e9a: f1aa0101 .... SUB r1,r10,#1 + 0x08005e9e: 5c51 Q\ LDRB r1,[r2,r1] + 0x08005ea0: 2930 0) CMP r1,#0x30 + 0x08005ea2: d008 .. BEQ 0x8005eb6 ; _printf_core + 1402 + 0x08005ea4: 42b8 .B CMP r0,r7 + 0x08005ea6: da02 .. BGE 0x8005eae ; _printf_core + 1394 + 0x08005ea8: f1100f04 .... CMN r0,#4 + 0x08005eac: da06 .. BGE 0x8005ebc ; _printf_core + 1408 + 0x08005eae: 2101 .! MOVS r1,#1 + 0x08005eb0: e9cd1001 .... STRD r1,r0,[sp,#4] + 0x08005eb4: e015 .. B 0x8005ee2 ; _printf_core + 1446 + 0x08005eb6: f1aa0101 .... SUB r1,r10,#1 + 0x08005eba: e7e9 .. B 0x8005e90 ; _printf_core + 1364 + 0x08005ebc: 2800 .( CMP r0,#0 + 0x08005ebe: dc05 .. BGT 0x8005ecc ; _printf_core + 1424 + 0x08005ec0: 9904 .. LDR r1,[sp,#0x10] + 0x08005ec2: 4401 .D ADD r1,r1,r0 + 0x08005ec4: 9104 .. STR r1,[sp,#0x10] + 0x08005ec6: ebaa0100 .... SUB r1,r10,r0 + 0x08005eca: e002 .. B 0x8005ed2 ; _printf_core + 1430 + 0x08005ecc: 1c41 A. ADDS r1,r0,#1 + 0x08005ece: 4551 QE CMP r1,r10 + 0x08005ed0: dd00 .. BLE 0x8005ed4 ; _printf_core + 1432 + 0x08005ed2: 468a .F MOV r10,r1 + 0x08005ed4: 9904 .. LDR r1,[sp,#0x10] + 0x08005ed6: 1a40 @. SUBS r0,r0,r1 + 0x08005ed8: 1c40 @. ADDS r0,r0,#1 + 0x08005eda: 9001 .. STR r0,[sp,#4] + 0x08005edc: f04f4000 O..@ MOV r0,#0x80000000 + 0x08005ee0: 9002 .. STR r0,[sp,#8] + 0x08005ee2: 0720 . LSLS r0,r4,#28 + 0x08005ee4: d404 .. BMI 0x8005ef0 ; _printf_core + 1460 + 0x08005ee6: 9801 .. LDR r0,[sp,#4] + 0x08005ee8: 4550 PE CMP r0,r10 + 0x08005eea: db01 .. BLT 0x8005ef0 ; _printf_core + 1460 + 0x08005eec: f8cd8004 .... STR r8,[sp,#4] + 0x08005ef0: 2000 . MOVS r0,#0 + 0x08005ef2: f88d004f ..O. STRB r0,[sp,#0x4f] + 0x08005ef6: 9802 .. LDR r0,[sp,#8] + 0x08005ef8: f10d074f ..O. ADD r7,sp,#0x4f + 0x08005efc: f1b04f00 ...O CMP r0,#0x80000000 + 0x08005f00: d025 %. BEQ 0x8005f4e ; _printf_core + 1554 + 0x08005f02: 202b + MOVS r0,#0x2b + 0x08005f04: 900e .. STR r0,[sp,#0x38] + 0x08005f06: 9802 .. LDR r0,[sp,#8] + 0x08005f08: f04f0802 O... MOV r8,#2 + 0x08005f0c: 2800 .( CMP r0,#0 + 0x08005f0e: da0c .. BGE 0x8005f2a ; _printf_core + 1518 + 0x08005f10: 4240 @B RSBS r0,r0,#0 + 0x08005f12: 9002 .. STR r0,[sp,#8] + 0x08005f14: 202d - MOVS r0,#0x2d + 0x08005f16: 900e .. STR r0,[sp,#0x38] + 0x08005f18: e007 .. B 0x8005f2a ; _printf_core + 1518 + 0x08005f1a: 210a .! MOVS r1,#0xa + 0x08005f1c: 9802 .. LDR r0,[sp,#8] + 0x08005f1e: f7fafa96 .... BL __aeabi_uidiv ; 0x800044e + 0x08005f22: 3130 01 ADDS r1,r1,#0x30 + 0x08005f24: 9002 .. STR r0,[sp,#8] + 0x08005f26: f8071d01 .... STRB r1,[r7,#-1]! + 0x08005f2a: f1b80100 .... SUBS r1,r8,#0 + 0x08005f2e: f1a80801 .... SUB r8,r8,#1 + 0x08005f32: dcf2 .. BGT 0x8005f1a ; _printf_core + 1502 + 0x08005f34: 9802 .. LDR r0,[sp,#8] + 0x08005f36: 2800 .( CMP r0,#0 + 0x08005f38: d1ef .. BNE 0x8005f1a ; _printf_core + 1502 + 0x08005f3a: 1e79 y. SUBS r1,r7,#1 + 0x08005f3c: 980e .. LDR r0,[sp,#0x38] + 0x08005f3e: 7008 .p STRB r0,[r1,#0] + 0x08005f40: 7830 0x LDRB r0,[r6,#0] + 0x08005f42: f0000020 .. . AND r0,r0,#0x20 + 0x08005f46: f0400045 @.E. ORR r0,r0,#0x45 + 0x08005f4a: f8070d02 .... STRB r0,[r7,#-2]! + 0x08005f4e: a812 .. ADD r0,sp,#0x48 + 0x08005f50: 1bc0 .. SUBS r0,r0,r7 + 0x08005f52: f1000807 .... ADD r8,r0,#7 + 0x08005f56: 9814 .. LDR r0,[sp,#0x50] + 0x08005f58: 7800 .x LDRB r0,[r0,#0] + 0x08005f5a: b100 .. CBZ r0,0x8005f5e ; _printf_core + 1570 + 0x08005f5c: 2001 . MOVS r0,#1 + 0x08005f5e: eb00010a .... ADD r1,r0,r10 + 0x08005f62: 9801 .. LDR r0,[sp,#4] + 0x08005f64: eb0171e0 ...q ADD r1,r1,r0,ASR #31 + 0x08005f68: 9805 .. LDR r0,[sp,#0x14] + 0x08005f6a: 4441 AD ADD r1,r1,r8 + 0x08005f6c: 1a40 @. SUBS r0,r0,r1 + 0x08005f6e: 1e40 @. SUBS r0,r0,#1 + 0x08005f70: 9005 .. STR r0,[sp,#0x14] + 0x08005f72: 03e0 .. LSLS r0,r4,#15 + 0x08005f74: d406 .. BMI 0x8005f84 ; _printf_core + 1608 + 0x08005f76: 465b [F MOV r3,r11 + 0x08005f78: 4621 !F MOV r1,r4 + 0x08005f7a: 9a17 .. LDR r2,[sp,#0x5c] + 0x08005f7c: 9805 .. LDR r0,[sp,#0x14] + 0x08005f7e: f000f85d ..]. BL _printf_pre_padding ; 0x800603c + 0x08005f82: 4405 .D ADD r5,r5,r0 + 0x08005f84: 9814 .. LDR r0,[sp,#0x50] + 0x08005f86: 7800 .x LDRB r0,[r0,#0] + 0x08005f88: b118 .. CBZ r0,0x8005f92 ; _printf_core + 1622 + 0x08005f8a: 465a ZF MOV r2,r11 + 0x08005f8c: 9917 .. LDR r1,[sp,#0x5c] + 0x08005f8e: 4790 .G BLX r2 + 0x08005f90: 1c6d m. ADDS r5,r5,#1 + 0x08005f92: 03e0 .. LSLS r0,r4,#15 + 0x08005f94: d524 $. BPL 0x8005fe0 ; _printf_core + 1700 + 0x08005f96: 465b [F MOV r3,r11 + 0x08005f98: 4621 !F MOV r1,r4 + 0x08005f9a: 9a17 .. LDR r2,[sp,#0x5c] + 0x08005f9c: 9805 .. LDR r0,[sp,#0x14] + 0x08005f9e: f000f84d ..M. BL _printf_pre_padding ; 0x800603c + 0x08005fa2: 4405 .D ADD r5,r5,r0 + 0x08005fa4: e01c .. B 0x8005fe0 ; _printf_core + 1700 + 0x08005fa6: 9804 .. LDR r0,[sp,#0x10] + 0x08005fa8: 2800 .( CMP r0,#0 + 0x08005faa: db07 .. BLT 0x8005fbc ; _printf_core + 1664 + 0x08005fac: e9dd0103 .... LDRD r0,r1,[sp,#0xc] + 0x08005fb0: 4288 .B CMP r0,r1 + 0x08005fb2: dd03 .. BLE 0x8005fbc ; _printf_core + 1664 + 0x08005fb4: 9800 .. LDR r0,[sp,#0] + 0x08005fb6: 5c40 @\ LDRB r0,[r0,r1] + 0x08005fb8: 9917 .. LDR r1,[sp,#0x5c] + 0x08005fba: e001 .. B 0x8005fc0 ; _printf_core + 1668 + 0x08005fbc: 9917 .. LDR r1,[sp,#0x5c] + 0x08005fbe: 2030 0 MOVS r0,#0x30 + 0x08005fc0: 465a ZF MOV r2,r11 + 0x08005fc2: 4790 .G BLX r2 + 0x08005fc4: 9804 .. LDR r0,[sp,#0x10] + 0x08005fc6: f1050501 .... ADD r5,r5,#1 + 0x08005fca: 1c40 @. ADDS r0,r0,#1 + 0x08005fcc: 9004 .. STR r0,[sp,#0x10] + 0x08005fce: 9801 .. LDR r0,[sp,#4] + 0x08005fd0: 1e40 @. SUBS r0,r0,#1 + 0x08005fd2: 9001 .. STR r0,[sp,#4] + 0x08005fd4: d104 .. BNE 0x8005fe0 ; _printf_core + 1700 + 0x08005fd6: 202e . MOVS r0,#0x2e + 0x08005fd8: 465a ZF MOV r2,r11 + 0x08005fda: 9917 .. LDR r1,[sp,#0x5c] + 0x08005fdc: 4790 .G BLX r2 + 0x08005fde: 1c6d m. ADDS r5,r5,#1 + 0x08005fe0: f1ba0100 .... SUBS r1,r10,#0 + 0x08005fe4: f1aa0a01 .... SUB r10,r10,#1 + 0x08005fe8: dcdd .. BGT 0x8005fa6 ; _printf_core + 1642 + 0x08005fea: e005 .. B 0x8005ff8 ; _printf_core + 1724 + 0x08005fec: f8170b01 .... LDRB r0,[r7],#1 + 0x08005ff0: 465a ZF MOV r2,r11 + 0x08005ff2: 9917 .. LDR r1,[sp,#0x5c] + 0x08005ff4: 4790 .G BLX r2 + 0x08005ff6: 1c6d m. ADDS r5,r5,#1 + 0x08005ff8: f1b80100 .... SUBS r1,r8,#0 + 0x08005ffc: f1a80801 .... SUB r8,r8,#1 + 0x08006000: dcf4 .. BGT 0x8005fec ; _printf_core + 1712 + 0x08006002: 465b [F MOV r3,r11 + 0x08006004: 4621 !F MOV r1,r4 + 0x08006006: 9a17 .. LDR r2,[sp,#0x5c] + 0x08006008: 9805 .. LDR r0,[sp,#0x14] + 0x0800600a: e6ab .. B 0x8005d64 ; _printf_core + 1064 + $d + 0x0800600c: 0000002d -... DCD 45 + 0x08006010: 0000002b +... DCD 43 + 0x08006014: 00000020 ... DCD 32 + $t + i._printf_post_padding + _printf_post_padding + 0x08006018: e92d41f0 -..A PUSH {r4-r8,lr} + 0x0800601c: 4604 .F MOV r4,r0 + 0x0800601e: 2500 .% MOVS r5,#0 + 0x08006020: 461e .F MOV r6,r3 + 0x08006022: 4617 .F MOV r7,r2 + 0x08006024: 0488 .. LSLS r0,r1,#18 + 0x08006026: d404 .. BMI 0x8006032 ; _printf_post_padding + 26 + 0x08006028: e005 .. B 0x8006036 ; _printf_post_padding + 30 + 0x0800602a: 4639 9F MOV r1,r7 + 0x0800602c: 2020 MOVS r0,#0x20 + 0x0800602e: 47b0 .G BLX r6 + 0x08006030: 1c6d m. ADDS r5,r5,#1 + 0x08006032: 1e64 d. SUBS r4,r4,#1 + 0x08006034: d5f9 .. BPL 0x800602a ; _printf_post_padding + 18 + 0x08006036: 4628 (F MOV r0,r5 + 0x08006038: e8bd81f0 .... POP {r4-r8,pc} + i._printf_pre_padding + _printf_pre_padding + 0x0800603c: e92d41f0 -..A PUSH {r4-r8,lr} + 0x08006040: 4604 .F MOV r4,r0 + 0x08006042: 2500 .% MOVS r5,#0 + 0x08006044: 461e .F MOV r6,r3 + 0x08006046: 4690 .F MOV r8,r2 + 0x08006048: 03c8 .. LSLS r0,r1,#15 + 0x0800604a: d501 .. BPL 0x8006050 ; _printf_pre_padding + 20 + 0x0800604c: 2730 0' MOVS r7,#0x30 + 0x0800604e: e000 .. B 0x8006052 ; _printf_pre_padding + 22 + 0x08006050: 2720 ' MOVS r7,#0x20 + 0x08006052: 0488 .. LSLS r0,r1,#18 + 0x08006054: d504 .. BPL 0x8006060 ; _printf_pre_padding + 36 + 0x08006056: e005 .. B 0x8006064 ; _printf_pre_padding + 40 + 0x08006058: 4641 AF MOV r1,r8 + 0x0800605a: 4638 8F MOV r0,r7 + 0x0800605c: 47b0 .G BLX r6 + 0x0800605e: 1c6d m. ADDS r5,r5,#1 + 0x08006060: 1e64 d. SUBS r4,r4,#1 + 0x08006062: d5f9 .. BPL 0x8006058 ; _printf_pre_padding + 28 + 0x08006064: 4628 (F MOV r0,r5 + 0x08006066: e8bd81f0 .... POP {r4-r8,pc} + 0x0800606a: 0000 .. MOVS r0,r0 + i.delay_us + delay_us + 0x0800606c: b501 .. PUSH {r0,lr} + 0x0800606e: b086 .. SUB sp,sp,#0x18 + 0x08006070: 2000 . MOVS r0,#0 + 0x08006072: 9001 .. STR r0,[sp,#4] + 0x08006074: f04f20e0 O.. MOV r0,#0xe000e000 + 0x08006078: 6900 .i LDR r0,[r0,#0x10] + 0x0800607a: f0000001 .... AND r0,r0,#1 + 0x0800607e: b908 .. CBNZ r0,0x8006084 ; delay_us + 24 + 0x08006080: f002f8c8 .... BL vPortSetupTimerInterrupt ; 0x8008214 + 0x08006084: f04f20e0 O.. MOV r0,#0xe000e000 + 0x08006088: 6940 @i LDR r0,[r0,#0x14] + 0x0800608a: 9002 .. STR r0,[sp,#8] + 0x0800608c: 481b .H LDR r0,[pc,#108] ; [0x80060fc] = 0x20000254 + 0x0800608e: 6800 .h LDR r0,[r0,#0] + 0x08006090: 491b .I LDR r1,[pc,#108] ; [0x8006100] = 0xf4240 + 0x08006092: fbb0f0f1 .... UDIV r0,r0,r1 + 0x08006096: 9906 .. LDR r1,[sp,#0x18] + 0x08006098: 4348 HC MULS r0,r1,r0 + 0x0800609a: 9005 .. STR r0,[sp,#0x14] + 0x0800609c: f002fb0c .... BL vTaskSuspendAll ; 0x80086b8 + 0x080060a0: f04f20e0 O.. MOV r0,#0xe000e000 + 0x080060a4: 6980 .i LDR r0,[r0,#0x18] + 0x080060a6: 9004 .. STR r0,[sp,#0x10] + 0x080060a8: e021 !. B 0x80060ee ; delay_us + 130 + 0x080060aa: f04f20e0 O.. MOV r0,#0xe000e000 + 0x080060ae: 6980 .i LDR r0,[r0,#0x18] + 0x080060b0: 9003 .. STR r0,[sp,#0xc] + 0x080060b2: e9dd0103 .... LDRD r0,r1,[sp,#0xc] + 0x080060b6: 4288 .B CMP r0,r1 + 0x080060b8: d019 .. BEQ 0x80060ee ; delay_us + 130 + 0x080060ba: e9dd0103 .... LDRD r0,r1,[sp,#0xc] + 0x080060be: 4288 .B CMP r0,r1 + 0x080060c0: d206 .. BCS 0x80060d0 ; delay_us + 100 + 0x080060c2: e9dd1003 .... LDRD r1,r0,[sp,#0xc] + 0x080060c6: 1a40 @. SUBS r0,r0,r1 + 0x080060c8: 9901 .. LDR r1,[sp,#4] + 0x080060ca: 4408 .D ADD r0,r0,r1 + 0x080060cc: 9001 .. STR r0,[sp,#4] + 0x080060ce: e007 .. B 0x80060e0 ; delay_us + 116 + 0x080060d0: e9dd0102 .... LDRD r0,r1,[sp,#8] + 0x080060d4: 1a40 @. SUBS r0,r0,r1 + 0x080060d6: 9904 .. LDR r1,[sp,#0x10] + 0x080060d8: 4408 .D ADD r0,r0,r1 + 0x080060da: 9901 .. LDR r1,[sp,#4] + 0x080060dc: 4408 .D ADD r0,r0,r1 + 0x080060de: 9001 .. STR r0,[sp,#4] + 0x080060e0: 9803 .. LDR r0,[sp,#0xc] + 0x080060e2: 9004 .. STR r0,[sp,#0x10] + 0x080060e4: 9905 .. LDR r1,[sp,#0x14] + 0x080060e6: 9801 .. LDR r0,[sp,#4] + 0x080060e8: 4288 .B CMP r0,r1 + 0x080060ea: d300 .. BCC 0x80060ee ; delay_us + 130 + 0x080060ec: e000 .. B 0x80060f0 ; delay_us + 132 + 0x080060ee: e7dc .. B 0x80060aa ; delay_us + 62 + 0x080060f0: bf00 .. NOP + 0x080060f2: f003ff93 .... BL xTaskResumeAll ; 0x800a01c + 0x080060f6: b007 .. ADD sp,sp,#0x1c + 0x080060f8: bd00 .. POP {pc} + $d + 0x080060fa: 0000 .. DCW 0 + 0x080060fc: 20000254 T.. DCD 536871508 + 0x08006100: 000f4240 @B.. DCD 1000000 + $t + i.eMBFuncReportSlaveID + eMBFuncReportSlaveID + 0x08006104: b570 p. PUSH {r4-r6,lr} + 0x08006106: 4605 .F MOV r5,r0 + 0x08006108: 460c .F MOV r4,r1 + 0x0800610a: 4806 .H LDR r0,[pc,#24] ; [0x8006124] = 0x200003de + 0x0800610c: 8802 .. LDRH r2,[r0,#0] + 0x0800610e: 4906 .I LDR r1,[pc,#24] ; [0x8006128] = 0x200035af + 0x08006110: 1c68 h. ADDS r0,r5,#1 + 0x08006112: f7faf8c6 .... BL __aeabi_memcpy ; 0x80002a2 + 0x08006116: 4803 .H LDR r0,[pc,#12] ; [0x8006124] = 0x200003de + 0x08006118: 8800 .. LDRH r0,[r0,#0] + 0x0800611a: 1c40 @. ADDS r0,r0,#1 + 0x0800611c: 8020 . STRH r0,[r4,#0] + 0x0800611e: 2000 . MOVS r0,#0 + 0x08006120: bd70 p. POP {r4-r6,pc} + $d + 0x08006122: 0000 .. DCW 0 + 0x08006124: 200003de ... DCD 536871902 + 0x08006128: 200035af .5. DCD 536884655 + $t + i.eMBMasterEnable + eMBMasterEnable + 0x0800612c: b510 .. PUSH {r4,lr} + 0x0800612e: 2400 .$ MOVS r4,#0 + 0x08006130: 4806 .H LDR r0,[pc,#24] ; [0x800614c] = 0x2000031b + 0x08006132: 7800 .x LDRB r0,[r0,#0] + 0x08006134: 2801 .( CMP r0,#1 + 0x08006136: d106 .. BNE 0x8006146 ; eMBMasterEnable + 26 + 0x08006138: 4805 .H LDR r0,[pc,#20] ; [0x8006150] = 0x20000320 + 0x0800613a: 6800 .h LDR r0,[r0,#0] + 0x0800613c: 4780 .G BLX r0 + 0x0800613e: 2000 . MOVS r0,#0 + 0x08006140: 4902 .I LDR r1,[pc,#8] ; [0x800614c] = 0x2000031b + 0x08006142: 7008 .p STRB r0,[r1,#0] + 0x08006144: e000 .. B 0x8006148 ; eMBMasterEnable + 28 + 0x08006146: 2406 .$ MOVS r4,#6 + 0x08006148: 4620 F MOV r0,r4 + 0x0800614a: bd10 .. POP {r4,pc} + $d + 0x0800614c: 2000031b ... DCD 536871707 + 0x08006150: 20000320 .. DCD 536871712 + $t + i.eMBMasterFuncReadCoils + eMBMasterFuncReadCoils + 0x08006154: e92d4ff8 -..O PUSH {r3-r11,lr} + 0x08006158: 4605 .F MOV r5,r0 + 0x0800615a: 4689 .F MOV r9,r1 + 0x0800615c: f04f0a00 O... MOV r10,#0 + 0x08006160: f002ffb0 .... BL xMBMasterRequestIsBroadcast ; 0x80090c4 + 0x08006164: b100 .. CBZ r0,0x8006168 ; eMBMasterFuncReadCoils + 20 + 0x08006166: e03e >. B 0x80061e6 ; eMBMasterFuncReadCoils + 146 + 0x08006168: f8b90000 .... LDRH r0,[r9,#0] + 0x0800616c: 2802 .( CMP r0,#2 + 0x0800616e: db38 8. BLT 0x80061e2 ; eMBMasterFuncReadCoils + 142 + 0x08006170: 4668 hF MOV r0,sp + 0x08006172: f001fe7d ..}. BL vMBMasterGetPDUSndBuf ; 0x8007e70 + 0x08006176: 9800 .. LDR r0,[sp,#0] + 0x08006178: 7840 @x LDRB r0,[r0,#1] + 0x0800617a: 0206 .. LSLS r6,r0,#8 + 0x0800617c: 9800 .. LDR r0,[sp,#0] + 0x0800617e: 7880 .x LDRB r0,[r0,#2] + 0x08006180: 4306 .C ORRS r6,r6,r0 + 0x08006182: 1c70 p. ADDS r0,r6,#1 + 0x08006184: b286 .. UXTH r6,r0 + 0x08006186: 9800 .. LDR r0,[sp,#0] + 0x08006188: 78c0 .x LDRB r0,[r0,#3] + 0x0800618a: 0204 .. LSLS r4,r0,#8 + 0x0800618c: 9800 .. LDR r0,[sp,#0] + 0x0800618e: 7900 .y LDRB r0,[r0,#4] + 0x08006190: 4304 .C ORRS r4,r4,r0 + 0x08006192: f0040007 .... AND r0,r4,#7 + 0x08006196: b138 8. CBZ r0,0x80061a8 ; eMBMasterFuncReadCoils + 84 + 0x08006198: 4620 F MOV r0,r4 + 0x0800619a: 17e1 .. ASRS r1,r4,#31 + 0x0800619c: eb047151 ..Qq ADD r1,r4,r1,LSR #29 + 0x080061a0: 10c9 .. ASRS r1,r1,#3 + 0x080061a2: 1c49 I. ADDS r1,r1,#1 + 0x080061a4: b2cf .. UXTB r7,r1 + 0x080061a6: e005 .. B 0x80061b4 ; eMBMasterFuncReadCoils + 96 + 0x080061a8: 4620 F MOV r0,r4 + 0x080061aa: 17e1 .. ASRS r1,r4,#31 + 0x080061ac: eb047151 ..Qq ADD r1,r4,r1,LSR #29 + 0x080061b0: f3c107c7 .... UBFX r7,r1,#3,#8 + 0x080061b4: 2c01 ., CMP r4,#1 + 0x080061b6: db11 .. BLT 0x80061dc ; eMBMasterFuncReadCoils + 136 + 0x080061b8: 7868 hx LDRB r0,[r5,#1] + 0x080061ba: 42b8 .B CMP r0,r7 + 0x080061bc: d10e .. BNE 0x80061dc ; eMBMasterFuncReadCoils + 136 + 0x080061be: 2300 .# MOVS r3,#0 + 0x080061c0: 4622 "F MOV r2,r4 + 0x080061c2: 4631 1F MOV r1,r6 + 0x080061c4: 1ca8 .. ADDS r0,r5,#2 + 0x080061c6: f000fc23 ..#. BL eMBMasterRegCoilsCB ; 0x8006a10 + 0x080061ca: 4680 .F MOV r8,r0 + 0x080061cc: f1b80f00 .... CMP r8,#0 + 0x080061d0: d009 .. BEQ 0x80061e6 ; eMBMasterFuncReadCoils + 146 + 0x080061d2: 4640 @F MOV r0,r8 + 0x080061d4: f001fc57 ..W. BL prveMBError2Exception ; 0x8007a86 + 0x080061d8: 4682 .F MOV r10,r0 + 0x080061da: e004 .. B 0x80061e6 ; eMBMasterFuncReadCoils + 146 + 0x080061dc: f04f0a03 O... MOV r10,#3 + 0x080061e0: e001 .. B 0x80061e6 ; eMBMasterFuncReadCoils + 146 + 0x080061e2: f04f0a03 O... MOV r10,#3 + 0x080061e6: 4650 PF MOV r0,r10 + 0x080061e8: e8bd8ff8 .... POP {r3-r11,pc} + i.eMBMasterFuncReadDiscreteInputs + eMBMasterFuncReadDiscreteInputs + 0x080061ec: e92d4ff8 -..O PUSH {r3-r11,lr} + 0x080061f0: 4605 .F MOV r5,r0 + 0x080061f2: 4689 .F MOV r9,r1 + 0x080061f4: f04f0a00 O... MOV r10,#0 + 0x080061f8: f002ff64 ..d. BL xMBMasterRequestIsBroadcast ; 0x80090c4 + 0x080061fc: b100 .. CBZ r0,0x8006200 ; eMBMasterFuncReadDiscreteInputs + 20 + 0x080061fe: e03d =. B 0x800627c ; eMBMasterFuncReadDiscreteInputs + 144 + 0x08006200: f8b90000 .... LDRH r0,[r9,#0] + 0x08006204: 2802 .( CMP r0,#2 + 0x08006206: db37 7. BLT 0x8006278 ; eMBMasterFuncReadDiscreteInputs + 140 + 0x08006208: 4668 hF MOV r0,sp + 0x0800620a: f001fe31 ..1. BL vMBMasterGetPDUSndBuf ; 0x8007e70 + 0x0800620e: 9800 .. LDR r0,[sp,#0] + 0x08006210: 7840 @x LDRB r0,[r0,#1] + 0x08006212: 0206 .. LSLS r6,r0,#8 + 0x08006214: 9800 .. LDR r0,[sp,#0] + 0x08006216: 7880 .x LDRB r0,[r0,#2] + 0x08006218: 4306 .C ORRS r6,r6,r0 + 0x0800621a: 1c70 p. ADDS r0,r6,#1 + 0x0800621c: b286 .. UXTH r6,r0 + 0x0800621e: 9800 .. LDR r0,[sp,#0] + 0x08006220: 78c0 .x LDRB r0,[r0,#3] + 0x08006222: 0204 .. LSLS r4,r0,#8 + 0x08006224: 9800 .. LDR r0,[sp,#0] + 0x08006226: 7900 .y LDRB r0,[r0,#4] + 0x08006228: 4304 .C ORRS r4,r4,r0 + 0x0800622a: f0040007 .... AND r0,r4,#7 + 0x0800622e: b138 8. CBZ r0,0x8006240 ; eMBMasterFuncReadDiscreteInputs + 84 + 0x08006230: 4620 F MOV r0,r4 + 0x08006232: 17e1 .. ASRS r1,r4,#31 + 0x08006234: eb047151 ..Qq ADD r1,r4,r1,LSR #29 + 0x08006238: 10c9 .. ASRS r1,r1,#3 + 0x0800623a: 1c49 I. ADDS r1,r1,#1 + 0x0800623c: b2cf .. UXTB r7,r1 + 0x0800623e: e005 .. B 0x800624c ; eMBMasterFuncReadDiscreteInputs + 96 + 0x08006240: 4620 F MOV r0,r4 + 0x08006242: 17e1 .. ASRS r1,r4,#31 + 0x08006244: eb047151 ..Qq ADD r1,r4,r1,LSR #29 + 0x08006248: f3c107c7 .... UBFX r7,r1,#3,#8 + 0x0800624c: 2c01 ., CMP r4,#1 + 0x0800624e: db10 .. BLT 0x8006272 ; eMBMasterFuncReadDiscreteInputs + 134 + 0x08006250: 7868 hx LDRB r0,[r5,#1] + 0x08006252: 42b8 .B CMP r0,r7 + 0x08006254: d10d .. BNE 0x8006272 ; eMBMasterFuncReadDiscreteInputs + 134 + 0x08006256: 4622 "F MOV r2,r4 + 0x08006258: 4631 1F MOV r1,r6 + 0x0800625a: 1ca8 .. ADDS r0,r5,#2 + 0x0800625c: f000fc78 ..x. BL eMBMasterRegDiscreteCB ; 0x8006b50 + 0x08006260: 4680 .F MOV r8,r0 + 0x08006262: f1b80f00 .... CMP r8,#0 + 0x08006266: d009 .. BEQ 0x800627c ; eMBMasterFuncReadDiscreteInputs + 144 + 0x08006268: 4640 @F MOV r0,r8 + 0x0800626a: f001fc0c .... BL prveMBError2Exception ; 0x8007a86 + 0x0800626e: 4682 .F MOV r10,r0 + 0x08006270: e004 .. B 0x800627c ; eMBMasterFuncReadDiscreteInputs + 144 + 0x08006272: f04f0a03 O... MOV r10,#3 + 0x08006276: e001 .. B 0x800627c ; eMBMasterFuncReadDiscreteInputs + 144 + 0x08006278: f04f0a03 O... MOV r10,#3 + 0x0800627c: 4650 PF MOV r0,r10 + 0x0800627e: e8bd8ff8 .... POP {r3-r11,pc} + 0x08006282: 0000 .. MOVS r0,r0 + i.eMBMasterFuncReadHoldingRegister + eMBMasterFuncReadHoldingRegister + 0x08006284: e92d43f8 -..C PUSH {r3-r9,lr} + 0x08006288: 4605 .F MOV r5,r0 + 0x0800628a: 4688 .F MOV r8,r1 + 0x0800628c: f04f0900 O... MOV r9,#0 + 0x08006290: f002ff18 .... BL xMBMasterRequestIsBroadcast ; 0x80090c4 + 0x08006294: b100 .. CBZ r0,0x8006298 ; eMBMasterFuncReadHoldingRegister + 20 + 0x08006296: e02e .. B 0x80062f6 ; eMBMasterFuncReadHoldingRegister + 114 + 0x08006298: f8b80000 .... LDRH r0,[r8,#0] + 0x0800629c: 2802 .( CMP r0,#2 + 0x0800629e: db28 (. BLT 0x80062f2 ; eMBMasterFuncReadHoldingRegister + 110 + 0x080062a0: 4668 hF MOV r0,sp + 0x080062a2: f001fde5 .... BL vMBMasterGetPDUSndBuf ; 0x8007e70 + 0x080062a6: 9800 .. LDR r0,[sp,#0] + 0x080062a8: 7840 @x LDRB r0,[r0,#1] + 0x080062aa: 0206 .. LSLS r6,r0,#8 + 0x080062ac: 9800 .. LDR r0,[sp,#0] + 0x080062ae: 7880 .x LDRB r0,[r0,#2] + 0x080062b0: 4306 .C ORRS r6,r6,r0 + 0x080062b2: 1c70 p. ADDS r0,r6,#1 + 0x080062b4: b286 .. UXTH r6,r0 + 0x080062b6: 9800 .. LDR r0,[sp,#0] + 0x080062b8: 78c0 .x LDRB r0,[r0,#3] + 0x080062ba: 0204 .. LSLS r4,r0,#8 + 0x080062bc: 9800 .. LDR r0,[sp,#0] + 0x080062be: 7900 .y LDRB r0,[r0,#4] + 0x080062c0: 4304 .C ORRS r4,r4,r0 + 0x080062c2: 2c01 ., CMP r4,#1 + 0x080062c4: db12 .. BLT 0x80062ec ; eMBMasterFuncReadHoldingRegister + 104 + 0x080062c6: 480d .H LDR r0,[pc,#52] ; [0x80062fc] = 0x20000004 + 0x080062c8: 7800 .x LDRB r0,[r0,#0] + 0x080062ca: 4360 `C MULS r0,r4,r0 + 0x080062cc: 7869 ix LDRB r1,[r5,#1] + 0x080062ce: 4288 .B CMP r0,r1 + 0x080062d0: d10c .. BNE 0x80062ec ; eMBMasterFuncReadHoldingRegister + 104 + 0x080062d2: 2300 .# MOVS r3,#0 + 0x080062d4: 4622 "F MOV r2,r4 + 0x080062d6: 4631 1F MOV r1,r6 + 0x080062d8: 1ca8 .. ADDS r0,r5,#2 + 0x080062da: f000fca3 .... BL eMBMasterRegHoldingCB ; 0x8006c24 + 0x080062de: 4607 .F MOV r7,r0 + 0x080062e0: b14f O. CBZ r7,0x80062f6 ; eMBMasterFuncReadHoldingRegister + 114 + 0x080062e2: 4638 8F MOV r0,r7 + 0x080062e4: f001fbcf .... BL prveMBError2Exception ; 0x8007a86 + 0x080062e8: 4681 .F MOV r9,r0 + 0x080062ea: e004 .. B 0x80062f6 ; eMBMasterFuncReadHoldingRegister + 114 + 0x080062ec: f04f0903 O... MOV r9,#3 + 0x080062f0: e001 .. B 0x80062f6 ; eMBMasterFuncReadHoldingRegister + 114 + 0x080062f2: f04f0903 O... MOV r9,#3 + 0x080062f6: 4648 HF MOV r0,r9 + 0x080062f8: e8bd83f8 .... POP {r3-r9,pc} + $d + 0x080062fc: 20000004 ... DCD 536870916 + $t + i.eMBMasterFuncReadInputRegister + eMBMasterFuncReadInputRegister + 0x08006300: e92d43f8 -..C PUSH {r3-r9,lr} + 0x08006304: 4605 .F MOV r5,r0 + 0x08006306: 4688 .F MOV r8,r1 + 0x08006308: f04f0900 O... MOV r9,#0 + 0x0800630c: f002feda .... BL xMBMasterRequestIsBroadcast ; 0x80090c4 + 0x08006310: b100 .. CBZ r0,0x8006314 ; eMBMasterFuncReadInputRegister + 20 + 0x08006312: e02b +. B 0x800636c ; eMBMasterFuncReadInputRegister + 108 + 0x08006314: f8b80000 .... LDRH r0,[r8,#0] + 0x08006318: 2802 .( CMP r0,#2 + 0x0800631a: db25 %. BLT 0x8006368 ; eMBMasterFuncReadInputRegister + 104 + 0x0800631c: 4668 hF MOV r0,sp + 0x0800631e: f001fda7 .... BL vMBMasterGetPDUSndBuf ; 0x8007e70 + 0x08006322: 9800 .. LDR r0,[sp,#0] + 0x08006324: 7840 @x LDRB r0,[r0,#1] + 0x08006326: 0206 .. LSLS r6,r0,#8 + 0x08006328: 9800 .. LDR r0,[sp,#0] + 0x0800632a: 7880 .x LDRB r0,[r0,#2] + 0x0800632c: 4306 .C ORRS r6,r6,r0 + 0x0800632e: 1c70 p. ADDS r0,r6,#1 + 0x08006330: b286 .. UXTH r6,r0 + 0x08006332: 9800 .. LDR r0,[sp,#0] + 0x08006334: 78c0 .x LDRB r0,[r0,#3] + 0x08006336: 0204 .. LSLS r4,r0,#8 + 0x08006338: 9800 .. LDR r0,[sp,#0] + 0x0800633a: 7900 .y LDRB r0,[r0,#4] + 0x0800633c: 4304 .C ORRS r4,r4,r0 + 0x0800633e: 2c01 ., CMP r4,#1 + 0x08006340: db0f .. BLT 0x8006362 ; eMBMasterFuncReadInputRegister + 98 + 0x08006342: 0060 `. LSLS r0,r4,#1 + 0x08006344: 7869 ix LDRB r1,[r5,#1] + 0x08006346: 4288 .B CMP r0,r1 + 0x08006348: d10b .. BNE 0x8006362 ; eMBMasterFuncReadInputRegister + 98 + 0x0800634a: 4622 "F MOV r2,r4 + 0x0800634c: 4631 1F MOV r1,r6 + 0x0800634e: 1ca8 .. ADDS r0,r5,#2 + 0x08006350: f000fcf2 .... BL eMBMasterRegInputCB ; 0x8006d38 + 0x08006354: 4607 .F MOV r7,r0 + 0x08006356: b14f O. CBZ r7,0x800636c ; eMBMasterFuncReadInputRegister + 108 + 0x08006358: 4638 8F MOV r0,r7 + 0x0800635a: f001fb94 .... BL prveMBError2Exception ; 0x8007a86 + 0x0800635e: 4681 .F MOV r9,r0 + 0x08006360: e004 .. B 0x800636c ; eMBMasterFuncReadInputRegister + 108 + 0x08006362: f04f0903 O... MOV r9,#3 + 0x08006366: e001 .. B 0x800636c ; eMBMasterFuncReadInputRegister + 108 + 0x08006368: f04f0903 O... MOV r9,#3 + 0x0800636c: 4648 HF MOV r0,r9 + 0x0800636e: e8bd83f8 .... POP {r3-r9,pc} + i.eMBMasterFuncReadWriteMultipleHoldingRegister + eMBMasterFuncReadWriteMultipleHoldingRegister + 0x08006372: e92d4ff8 -..O PUSH {r3-r11,lr} + 0x08006376: 4605 .F MOV r5,r0 + 0x08006378: 4689 .F MOV r9,r1 + 0x0800637a: f04f0b00 O... MOV r11,#0 + 0x0800637e: f002fea1 .... BL xMBMasterRequestIsBroadcast ; 0x80090c4 + 0x08006382: b100 .. CBZ r0,0x8006386 ; eMBMasterFuncReadWriteMultipleHoldingRegister + 20 + 0x08006384: e044 D. B 0x8006410 ; eMBMasterFuncReadWriteMultipleHoldingRegister + 158 + 0x08006386: f8b90000 .... LDRH r0,[r9,#0] + 0x0800638a: 2802 .( CMP r0,#2 + 0x0800638c: db40 @. BLT 0x8006410 ; eMBMasterFuncReadWriteMultipleHoldingRegister + 158 + 0x0800638e: 4668 hF MOV r0,sp + 0x08006390: f001fd6e ..n. BL vMBMasterGetPDUSndBuf ; 0x8007e70 + 0x08006394: 9800 .. LDR r0,[sp,#0] + 0x08006396: 7840 @x LDRB r0,[r0,#1] + 0x08006398: 0206 .. LSLS r6,r0,#8 + 0x0800639a: 9800 .. LDR r0,[sp,#0] + 0x0800639c: 7880 .x LDRB r0,[r0,#2] + 0x0800639e: 4306 .C ORRS r6,r6,r0 + 0x080063a0: 1c70 p. ADDS r0,r6,#1 + 0x080063a2: b286 .. UXTH r6,r0 + 0x080063a4: 9800 .. LDR r0,[sp,#0] + 0x080063a6: 78c0 .x LDRB r0,[r0,#3] + 0x080063a8: 0207 .. LSLS r7,r0,#8 + 0x080063aa: 9800 .. LDR r0,[sp,#0] + 0x080063ac: 7900 .y LDRB r0,[r0,#4] + 0x080063ae: 4307 .C ORRS r7,r7,r0 + 0x080063b0: 9800 .. LDR r0,[sp,#0] + 0x080063b2: 7940 @y LDRB r0,[r0,#5] + 0x080063b4: ea4f2800 O..( LSL r8,r0,#8 + 0x080063b8: 9800 .. LDR r0,[sp,#0] + 0x080063ba: 7980 .y LDRB r0,[r0,#6] + 0x080063bc: ea400808 @... ORR r8,r0,r8 + 0x080063c0: f1080001 .... ADD r0,r8,#1 + 0x080063c4: fa1ff880 .... UXTH r8,r0 + 0x080063c8: 9800 .. LDR r0,[sp,#0] + 0x080063ca: 79c0 .y LDRB r0,[r0,#7] + 0x080063cc: ea4f2a00 O..* LSL r10,r0,#8 + 0x080063d0: 9800 .. LDR r0,[sp,#0] + 0x080063d2: 7a00 .z LDRB r0,[r0,#8] + 0x080063d4: ea400a0a @... ORR r10,r0,r10 + 0x080063d8: 0078 x. LSLS r0,r7,#1 + 0x080063da: 7869 ix LDRB r1,[r5,#1] + 0x080063dc: 4288 .B CMP r0,r1 + 0x080063de: d115 .. BNE 0x800640c ; eMBMasterFuncReadWriteMultipleHoldingRegister + 154 + 0x080063e0: 2301 .# MOVS r3,#1 + 0x080063e2: 4652 RF MOV r2,r10 + 0x080063e4: 4641 AF MOV r1,r8 + 0x080063e6: 9800 .. LDR r0,[sp,#0] + 0x080063e8: 300a .0 ADDS r0,r0,#0xa + 0x080063ea: f000fc1b .... BL eMBMasterRegHoldingCB ; 0x8006c24 + 0x080063ee: 4604 .F MOV r4,r0 + 0x080063f0: b934 4. CBNZ r4,0x8006400 ; eMBMasterFuncReadWriteMultipleHoldingRegister + 142 + 0x080063f2: 2300 .# MOVS r3,#0 + 0x080063f4: 463a :F MOV r2,r7 + 0x080063f6: 4631 1F MOV r1,r6 + 0x080063f8: 1ca8 .. ADDS r0,r5,#2 + 0x080063fa: f000fc13 .... BL eMBMasterRegHoldingCB ; 0x8006c24 + 0x080063fe: 4604 .F MOV r4,r0 + 0x08006400: b134 4. CBZ r4,0x8006410 ; eMBMasterFuncReadWriteMultipleHoldingRegister + 158 + 0x08006402: 4620 F MOV r0,r4 + 0x08006404: f001fb3f ..?. BL prveMBError2Exception ; 0x8007a86 + 0x08006408: 4683 .F MOV r11,r0 + 0x0800640a: e001 .. B 0x8006410 ; eMBMasterFuncReadWriteMultipleHoldingRegister + 158 + 0x0800640c: f04f0b03 O... MOV r11,#3 + 0x08006410: 4658 XF MOV r0,r11 + 0x08006412: e8bd8ff8 .... POP {r3-r11,pc} + i.eMBMasterFuncWriteCoil + eMBMasterFuncWriteCoil + 0x08006416: e92d43f8 -..C PUSH {r3-r9,lr} + 0x0800641a: 4604 .F MOV r4,r0 + 0x0800641c: 460f .F MOV r7,r1 + 0x0800641e: f04f0800 O... MOV r8,#0 + 0x08006422: 8838 8. LDRH r0,[r7,#0] + 0x08006424: 2805 .( CMP r0,#5 + 0x08006426: d129 ). BNE 0x800647c ; eMBMasterFuncWriteCoil + 102 + 0x08006428: 7860 `x LDRB r0,[r4,#1] + 0x0800642a: 0205 .. LSLS r5,r0,#8 + 0x0800642c: 78a0 .x LDRB r0,[r4,#2] + 0x0800642e: 4305 .C ORRS r5,r5,r0 + 0x08006430: 1c68 h. ADDS r0,r5,#1 + 0x08006432: b285 .. UXTH r5,r0 + 0x08006434: 7920 y LDRB r0,[r4,#4] + 0x08006436: b9f0 .. CBNZ r0,0x8006476 ; eMBMasterFuncWriteCoil + 96 + 0x08006438: 78e0 .x LDRB r0,[r4,#3] + 0x0800643a: 28ff .( CMP r0,#0xff + 0x0800643c: d001 .. BEQ 0x8006442 ; eMBMasterFuncWriteCoil + 44 + 0x0800643e: 78e0 .x LDRB r0,[r4,#3] + 0x08006440: b9c8 .. CBNZ r0,0x8006476 ; eMBMasterFuncWriteCoil + 96 + 0x08006442: 2000 . MOVS r0,#0 + 0x08006444: f88d0001 .... STRB r0,[sp,#1] + 0x08006448: 78e0 .x LDRB r0,[r4,#3] + 0x0800644a: 28ff .( CMP r0,#0xff + 0x0800644c: d103 .. BNE 0x8006456 ; eMBMasterFuncWriteCoil + 64 + 0x0800644e: 2001 . MOVS r0,#1 + 0x08006450: f88d0000 .... STRB r0,[sp,#0] + 0x08006454: e002 .. B 0x800645c ; eMBMasterFuncWriteCoil + 70 + 0x08006456: 2000 . MOVS r0,#0 + 0x08006458: f88d0000 .... STRB r0,[sp,#0] + 0x0800645c: 2301 .# MOVS r3,#1 + 0x0800645e: 461a .F MOV r2,r3 + 0x08006460: 4629 )F MOV r1,r5 + 0x08006462: 4668 hF MOV r0,sp + 0x08006464: f000fad4 .... BL eMBMasterRegCoilsCB ; 0x8006a10 + 0x08006468: 4606 .F MOV r6,r0 + 0x0800646a: b14e N. CBZ r6,0x8006480 ; eMBMasterFuncWriteCoil + 106 + 0x0800646c: 4630 0F MOV r0,r6 + 0x0800646e: f001fb0a .... BL prveMBError2Exception ; 0x8007a86 + 0x08006472: 4680 .F MOV r8,r0 + 0x08006474: e004 .. B 0x8006480 ; eMBMasterFuncWriteCoil + 106 + 0x08006476: f04f0803 O... MOV r8,#3 + 0x0800647a: e001 .. B 0x8006480 ; eMBMasterFuncWriteCoil + 106 + 0x0800647c: f04f0803 O... MOV r8,#3 + 0x08006480: 4640 @F MOV r0,r8 + 0x08006482: e8bd83f8 .... POP {r3-r9,pc} + i.eMBMasterFuncWriteHoldingRegister + eMBMasterFuncWriteHoldingRegister + 0x08006486: e92d41f0 -..A PUSH {r4-r8,lr} + 0x0800648a: 4604 .F MOV r4,r0 + 0x0800648c: 460f .F MOV r7,r1 + 0x0800648e: f04f0800 O... MOV r8,#0 + 0x08006492: 8838 8. LDRH r0,[r7,#0] + 0x08006494: 2805 .( CMP r0,#5 + 0x08006496: d112 .. BNE 0x80064be ; eMBMasterFuncWriteHoldingRegister + 56 + 0x08006498: 7860 `x LDRB r0,[r4,#1] + 0x0800649a: 0205 .. LSLS r5,r0,#8 + 0x0800649c: 78a0 .x LDRB r0,[r4,#2] + 0x0800649e: 4305 .C ORRS r5,r5,r0 + 0x080064a0: 1c68 h. ADDS r0,r5,#1 + 0x080064a2: b285 .. UXTH r5,r0 + 0x080064a4: 2301 .# MOVS r3,#1 + 0x080064a6: 461a .F MOV r2,r3 + 0x080064a8: 4629 )F MOV r1,r5 + 0x080064aa: 1ce0 .. ADDS r0,r4,#3 + 0x080064ac: f000fbba .... BL eMBMasterRegHoldingCB ; 0x8006c24 + 0x080064b0: 4606 .F MOV r6,r0 + 0x080064b2: b136 6. CBZ r6,0x80064c2 ; eMBMasterFuncWriteHoldingRegister + 60 + 0x080064b4: 4630 0F MOV r0,r6 + 0x080064b6: f001fae6 .... BL prveMBError2Exception ; 0x8007a86 + 0x080064ba: 4680 .F MOV r8,r0 + 0x080064bc: e001 .. B 0x80064c2 ; eMBMasterFuncWriteHoldingRegister + 60 + 0x080064be: f04f0803 O... MOV r8,#3 + 0x080064c2: 4640 @F MOV r0,r8 + 0x080064c4: e8bd81f0 .... POP {r4-r8,pc} + i.eMBMasterFuncWriteMultipleCoils + eMBMasterFuncWriteMultipleCoils + 0x080064c8: e92d4ff8 -..O PUSH {r3-r11,lr} + 0x080064cc: 4605 .F MOV r5,r0 + 0x080064ce: 4689 .F MOV r9,r1 + 0x080064d0: f04f0b00 O... MOV r11,#0 + 0x080064d4: f8b90000 .... LDRH r0,[r9,#0] + 0x080064d8: 2805 .( CMP r0,#5 + 0x080064da: d003 .. BEQ 0x80064e4 ; eMBMasterFuncWriteMultipleCoils + 28 + 0x080064dc: f002fdf2 .... BL xMBMasterRequestIsBroadcast ; 0x80090c4 + 0x080064e0: 2800 .( CMP r0,#0 + 0x080064e2: d037 7. BEQ 0x8006554 ; eMBMasterFuncWriteMultipleCoils + 140 + 0x080064e4: 4668 hF MOV r0,sp + 0x080064e6: f001fcc3 .... BL vMBMasterGetPDUSndBuf ; 0x8007e70 + 0x080064ea: 7868 hx LDRB r0,[r5,#1] + 0x080064ec: 0206 .. LSLS r6,r0,#8 + 0x080064ee: 78a8 .x LDRB r0,[r5,#2] + 0x080064f0: 4306 .C ORRS r6,r6,r0 + 0x080064f2: 1c70 p. ADDS r0,r6,#1 + 0x080064f4: b286 .. UXTH r6,r0 + 0x080064f6: 78e8 .x LDRB r0,[r5,#3] + 0x080064f8: 0204 .. LSLS r4,r0,#8 + 0x080064fa: 7928 (y LDRB r0,[r5,#4] + 0x080064fc: 4304 .C ORRS r4,r4,r0 + 0x080064fe: 9800 .. LDR r0,[sp,#0] + 0x08006500: f890a005 .... LDRB r10,[r0,#5] + 0x08006504: f0040007 .... AND r0,r4,#7 + 0x08006508: b138 8. CBZ r0,0x800651a ; eMBMasterFuncWriteMultipleCoils + 82 + 0x0800650a: 4620 F MOV r0,r4 + 0x0800650c: 17e1 .. ASRS r1,r4,#31 + 0x0800650e: eb047151 ..Qq ADD r1,r4,r1,LSR #29 + 0x08006512: 10c9 .. ASRS r1,r1,#3 + 0x08006514: 1c49 I. ADDS r1,r1,#1 + 0x08006516: b2cf .. UXTB r7,r1 + 0x08006518: e005 .. B 0x8006526 ; eMBMasterFuncWriteMultipleCoils + 94 + 0x0800651a: 4620 F MOV r0,r4 + 0x0800651c: 17e1 .. ASRS r1,r4,#31 + 0x0800651e: eb047151 ..Qq ADD r1,r4,r1,LSR #29 + 0x08006522: f3c107c7 .... UBFX r7,r1,#3,#8 + 0x08006526: 2c01 ., CMP r4,#1 + 0x08006528: db11 .. BLT 0x800654e ; eMBMasterFuncWriteMultipleCoils + 134 + 0x0800652a: 4557 WE CMP r7,r10 + 0x0800652c: d10f .. BNE 0x800654e ; eMBMasterFuncWriteMultipleCoils + 134 + 0x0800652e: 2301 .# MOVS r3,#1 + 0x08006530: 4622 "F MOV r2,r4 + 0x08006532: 4631 1F MOV r1,r6 + 0x08006534: 9800 .. LDR r0,[sp,#0] + 0x08006536: 1d80 .. ADDS r0,r0,#6 + 0x08006538: f000fa6a ..j. BL eMBMasterRegCoilsCB ; 0x8006a10 + 0x0800653c: 4680 .F MOV r8,r0 + 0x0800653e: f1b80f00 .... CMP r8,#0 + 0x08006542: d009 .. BEQ 0x8006558 ; eMBMasterFuncWriteMultipleCoils + 144 + 0x08006544: 4640 @F MOV r0,r8 + 0x08006546: f001fa9e .... BL prveMBError2Exception ; 0x8007a86 + 0x0800654a: 4683 .F MOV r11,r0 + 0x0800654c: e004 .. B 0x8006558 ; eMBMasterFuncWriteMultipleCoils + 144 + 0x0800654e: f04f0b03 O... MOV r11,#3 + 0x08006552: e001 .. B 0x8006558 ; eMBMasterFuncWriteMultipleCoils + 144 + 0x08006554: f04f0b03 O... MOV r11,#3 + 0x08006558: 4658 XF MOV r0,r11 + 0x0800655a: e8bd8ff8 .... POP {r3-r11,pc} + i.eMBMasterFuncWriteMultipleHoldingRegister + eMBMasterFuncWriteMultipleHoldingRegister + 0x0800655e: e92d4ff8 -..O PUSH {r3-r11,lr} + 0x08006562: 4682 .F MOV r10,r0 + 0x08006564: 460f .F MOV r7,r1 + 0x08006566: f04f0900 O... MOV r9,#0 + 0x0800656a: 8838 8. LDRH r0,[r7,#0] + 0x0800656c: 2805 .( CMP r0,#5 + 0x0800656e: d002 .. BEQ 0x8006576 ; eMBMasterFuncWriteMultipleHoldingRegister + 24 + 0x08006570: f002fda8 .... BL xMBMasterRequestIsBroadcast ; 0x80090c4 + 0x08006574: b338 8. CBZ r0,0x80065c6 ; eMBMasterFuncWriteMultipleHoldingRegister + 104 + 0x08006576: 4668 hF MOV r0,sp + 0x08006578: f001fc7a ..z. BL vMBMasterGetPDUSndBuf ; 0x8007e70 + 0x0800657c: 9800 .. LDR r0,[sp,#0] + 0x0800657e: 7840 @x LDRB r0,[r0,#1] + 0x08006580: 0204 .. LSLS r4,r0,#8 + 0x08006582: 9800 .. LDR r0,[sp,#0] + 0x08006584: 7880 .x LDRB r0,[r0,#2] + 0x08006586: 4304 .C ORRS r4,r4,r0 + 0x08006588: 1c60 `. ADDS r0,r4,#1 + 0x0800658a: b284 .. UXTH r4,r0 + 0x0800658c: 9800 .. LDR r0,[sp,#0] + 0x0800658e: 78c0 .x LDRB r0,[r0,#3] + 0x08006590: 0205 .. LSLS r5,r0,#8 + 0x08006592: 9800 .. LDR r0,[sp,#0] + 0x08006594: 7900 .y LDRB r0,[r0,#4] + 0x08006596: 4305 .C ORRS r5,r5,r0 + 0x08006598: 9800 .. LDR r0,[sp,#0] + 0x0800659a: f8908005 .... LDRB r8,[r0,#5] + 0x0800659e: 0068 h. LSLS r0,r5,#1 + 0x080065a0: 4540 @E CMP r0,r8 + 0x080065a2: d10d .. BNE 0x80065c0 ; eMBMasterFuncWriteMultipleHoldingRegister + 98 + 0x080065a4: 2301 .# MOVS r3,#1 + 0x080065a6: 462a *F MOV r2,r5 + 0x080065a8: 4621 !F MOV r1,r4 + 0x080065aa: 9800 .. LDR r0,[sp,#0] + 0x080065ac: 1d80 .. ADDS r0,r0,#6 + 0x080065ae: f000fb39 ..9. BL eMBMasterRegHoldingCB ; 0x8006c24 + 0x080065b2: 4606 .F MOV r6,r0 + 0x080065b4: b14e N. CBZ r6,0x80065ca ; eMBMasterFuncWriteMultipleHoldingRegister + 108 + 0x080065b6: 4630 0F MOV r0,r6 + 0x080065b8: f001fa65 ..e. BL prveMBError2Exception ; 0x8007a86 + 0x080065bc: 4681 .F MOV r9,r0 + 0x080065be: e004 .. B 0x80065ca ; eMBMasterFuncWriteMultipleHoldingRegister + 108 + 0x080065c0: f04f0903 O... MOV r9,#3 + 0x080065c4: e001 .. B 0x80065ca ; eMBMasterFuncWriteMultipleHoldingRegister + 108 + 0x080065c6: f04f0903 O... MOV r9,#3 + 0x080065ca: 4648 HF MOV r0,r9 + 0x080065cc: e8bd8ff8 .... POP {r3-r11,pc} + i.eMBMasterGetErrorType + eMBMasterGetErrorType + 0x080065d0: 4801 .H LDR r0,[pc,#4] ; [0x80065d8] = 0x2000031a + 0x080065d2: 7800 .x LDRB r0,[r0,#0] + 0x080065d4: 4770 pG BX lr + $d + 0x080065d6: 0000 .. DCW 0 + 0x080065d8: 2000031a ... DCD 536871706 + $t + i.eMBMasterInit + eMBMasterInit + 0x080065dc: e92d41f0 -..A PUSH {r4-r8,lr} + 0x080065e0: 4604 .F MOV r4,r0 + 0x080065e2: 460d .F MOV r5,r1 + 0x080065e4: 4616 .F MOV r6,r2 + 0x080065e6: 461f .F MOV r7,r3 + 0x080065e8: f04f0800 O... MOV r8,#0 + 0x080065ec: b9f4 .. CBNZ r4,0x800662c ; eMBMasterInit + 80 + 0x080065ee: 481a .H LDR r0,[pc,#104] ; [0x8006658] = 0x80069d5 + 0x080065f0: 491a .I LDR r1,[pc,#104] ; [0x800665c] = 0x20000320 + 0x080065f2: 6008 .` STR r0,[r1,#0] + 0x080065f4: 481a .H LDR r0,[pc,#104] ; [0x8006660] = 0x80069f9 + 0x080065f6: 491b .I LDR r1,[pc,#108] ; [0x8006664] = 0x20000324 + 0x080065f8: 6008 .` STR r0,[r1,#0] + 0x080065fa: 481b .H LDR r0,[pc,#108] ; [0x8006668] = 0x800693d + 0x080065fc: 491b .I LDR r1,[pc,#108] ; [0x800666c] = 0x2000031c + 0x080065fe: 6008 .` STR r0,[r1,#0] + 0x08006600: 481b .H LDR r0,[pc,#108] ; [0x8006670] = 0x80068ed + 0x08006602: 491c .I LDR r1,[pc,#112] ; [0x8006674] = 0x20000328 + 0x08006604: 6008 .` STR r0,[r1,#0] + 0x08006606: 2000 . MOVS r0,#0 + 0x08006608: 491b .I LDR r1,[pc,#108] ; [0x8006678] = 0x2000032c + 0x0800660a: 6008 .` STR r0,[r1,#0] + 0x0800660c: 481b .H LDR r0,[pc,#108] ; [0x800667c] = 0x8008f0d + 0x0800660e: 491c .I LDR r1,[pc,#112] ; [0x8006680] = 0x20000330 + 0x08006610: 6008 .` STR r0,[r1,#0] + 0x08006612: 481c .H LDR r0,[pc,#112] ; [0x8006684] = 0x8009035 + 0x08006614: 491c .I LDR r1,[pc,#112] ; [0x8006688] = 0x20000334 + 0x08006616: 6008 .` STR r0,[r1,#0] + 0x08006618: 481c .H LDR r0,[pc,#112] ; [0x800668c] = 0x8008fa1 + 0x0800661a: 491d .I LDR r1,[pc,#116] ; [0x8006690] = 0x20000338 + 0x0800661c: 6008 .` STR r0,[r1,#0] + 0x0800661e: 463a :F MOV r2,r7 + 0x08006620: 4631 1F MOV r1,r6 + 0x08006622: 4628 (F MOV r0,r5 + 0x08006624: f000f938 ..8. BL eMBMasterRTUInit ; 0x8006898 + 0x08006628: 4680 .F MOV r8,r0 + 0x0800662a: e002 .. B 0x8006632 ; eMBMasterInit + 86 + 0x0800662c: f04f0802 O... MOV r8,#2 + 0x08006630: bf00 .. NOP + 0x08006632: bf00 .. NOP + 0x08006634: f1b80f00 .... CMP r8,#0 + 0x08006638: d10a .. BNE 0x8006650 ; eMBMasterInit + 116 + 0x0800663a: f002fa1d .... BL xMBMasterPortEventInit ; 0x8008a78 + 0x0800663e: b910 .. CBNZ r0,0x8006646 ; eMBMasterInit + 106 + 0x08006640: f04f0803 O... MOV r8,#3 + 0x08006644: e002 .. B 0x800664c ; eMBMasterInit + 112 + 0x08006646: 2001 . MOVS r0,#1 + 0x08006648: 4912 .I LDR r1,[pc,#72] ; [0x8006694] = 0x2000031b + 0x0800664a: 7008 .p STRB r0,[r1,#0] + 0x0800664c: f001fc16 .... BL vMBMasterOsResInit ; 0x8007e7c + 0x08006650: 4640 @F MOV r0,r8 + 0x08006652: e8bd81f0 .... POP {r4-r8,pc} + $d + 0x08006656: 0000 .. DCW 0 + 0x08006658: 080069d5 .i.. DCD 134244821 + 0x0800665c: 20000320 .. DCD 536871712 + 0x08006660: 080069f9 .i.. DCD 134244857 + 0x08006664: 20000324 $.. DCD 536871716 + 0x08006668: 0800693d =i.. DCD 134244669 + 0x0800666c: 2000031c ... DCD 536871708 + 0x08006670: 080068ed .h.. DCD 134244589 + 0x08006674: 20000328 (.. DCD 536871720 + 0x08006678: 2000032c ,.. DCD 536871724 + 0x0800667c: 08008f0d .... DCD 134254349 + 0x08006680: 20000330 0.. DCD 536871728 + 0x08006684: 08009035 5... DCD 134254645 + 0x08006688: 20000334 4.. DCD 536871732 + 0x0800668c: 08008fa1 .... DCD 134254497 + 0x08006690: 20000338 8.. DCD 536871736 + 0x08006694: 2000031b ... DCD 536871707 + $t + i.eMBMasterPoll + eMBMasterPoll + 0x08006698: e92d43f8 -..C PUSH {r3-r9,lr} + 0x0800669c: 2700 .' MOVS r7,#0 + 0x0800669e: 4875 uH LDR r0,[pc,#468] ; [0x8006874] = 0x2000031b + 0x080066a0: 7800 .x LDRB r0,[r0,#0] + 0x080066a2: b130 0. CBZ r0,0x80066b2 ; eMBMasterPoll + 26 + 0x080066a4: 4873 sH LDR r0,[pc,#460] ; [0x8006874] = 0x2000031b + 0x080066a6: 7800 .x LDRB r0,[r0,#0] + 0x080066a8: 2803 .( CMP r0,#3 + 0x080066aa: d002 .. BEQ 0x80066b2 ; eMBMasterPoll + 26 + 0x080066ac: 2006 . MOVS r0,#6 + 0x080066ae: e8bd83f8 .... POP {r3-r9,pc} + 0x080066b2: 4668 hF MOV r0,sp + 0x080066b4: f002f9b2 .... BL xMBMasterPortEventGet ; 0x8008a1c + 0x080066b8: 2800 .( CMP r0,#0 + 0x080066ba: d077 w. BEQ 0x80067ac ; eMBMasterPoll + 276 + 0x080066bc: f8bd0000 .... LDRH r0,[sp,#0] + 0x080066c0: 2804 .( CMP r0,#4 + 0x080066c2: d029 ). BEQ 0x8006718 ; eMBMasterPoll + 128 + 0x080066c4: dc04 .. BGT 0x80066d0 ; eMBMasterPoll + 56 + 0x080066c6: 2801 .( CMP r0,#1 + 0x080066c8: d007 .. BEQ 0x80066da ; eMBMasterPoll + 66 + 0x080066ca: 2802 .( CMP r0,#2 + 0x080066cc: d16f o. BNE 0x80067ae ; eMBMasterPoll + 278 + 0x080066ce: e00a .. B 0x80066e6 ; eMBMasterPoll + 78 + 0x080066d0: 2808 .( CMP r0,#8 + 0x080066d2: d06d m. BEQ 0x80067b0 ; eMBMasterPoll + 280 + 0x080066d4: 2810 .( CMP r0,#0x10 + 0x080066d6: d1f9 .. BNE 0x80066cc ; eMBMasterPoll + 52 + 0x080066d8: e090 .. B 0x80067fc ; eMBMasterPoll + 356 + 0x080066da: 2003 . MOVS r0,#3 + 0x080066dc: 4965 eI LDR r1,[pc,#404] ; [0x8006874] = 0x2000031b + 0x080066de: 7008 .p STRB r0,[r1,#0] + 0x080066e0: f001fcdc .... BL vMBMasterRunResRelease ; 0x800809c + 0x080066e4: e0c2 .. B 0x800686c ; eMBMasterPoll + 468 + 0x080066e6: 4a64 dJ LDR r2,[pc,#400] ; [0x8006878] = 0x200003ca + 0x080066e8: 4964 dI LDR r1,[pc,#400] ; [0x800687c] = 0x200003c4 + 0x080066ea: 4865 eH LDR r0,[pc,#404] ; [0x8006880] = 0x200003c8 + 0x080066ec: 4b65 eK LDR r3,[pc,#404] ; [0x8006884] = 0x20000328 + 0x080066ee: 681b .h LDR r3,[r3,#0] + 0x080066f0: 4798 .G BLX r3 + 0x080066f2: 4607 .F MOV r7,r0 + 0x080066f4: b94f O. CBNZ r7,0x800670a ; eMBMasterPoll + 114 + 0x080066f6: f001faeb .... BL ucMBMasterGetDestAddress ; 0x8007cd0 + 0x080066fa: 4961 aI LDR r1,[pc,#388] ; [0x8006880] = 0x200003c8 + 0x080066fc: 7809 .x LDRB r1,[r1,#0] + 0x080066fe: 4288 .B CMP r0,r1 + 0x08006700: d103 .. BNE 0x800670a ; eMBMasterPoll + 114 + 0x08006702: 2004 . MOVS r0,#4 + 0x08006704: f002fa12 .... BL xMBMasterPortEventPost ; 0x8008b2c + 0x08006708: e005 .. B 0x8006716 ; eMBMasterPoll + 126 + 0x0800670a: 2001 . MOVS r0,#1 + 0x0800670c: f001fce4 .... BL vMBMasterSetErrorType ; 0x80080d8 + 0x08006710: 2010 . MOVS r0,#0x10 + 0x08006712: f002fa0b .... BL xMBMasterPortEventPost ; 0x8008b2c + 0x08006716: e0a9 .. B 0x800686c ; eMBMasterPoll + 468 + 0x08006718: 4858 XH LDR r0,[pc,#352] ; [0x800687c] = 0x200003c4 + 0x0800671a: 6800 .h LDR r0,[r0,#0] + 0x0800671c: 7800 .x LDRB r0,[r0,#0] + 0x0800671e: 495a ZI LDR r1,[pc,#360] ; [0x8006888] = 0x200003c9 + 0x08006720: 7008 .p STRB r0,[r1,#0] + 0x08006722: 2001 . MOVS r0,#1 + 0x08006724: 4959 YI LDR r1,[pc,#356] ; [0x800688c] = 0x200003cc + 0x08006726: 7008 .p STRB r0,[r1,#0] + 0x08006728: 4857 WH LDR r0,[pc,#348] ; [0x8006888] = 0x200003c9 + 0x0800672a: 7800 .x LDRB r0,[r0,#0] + 0x0800672c: 11c0 .. ASRS r0,r0,#7 + 0x0800672e: b120 . CBZ r0,0x800673a ; eMBMasterPoll + 162 + 0x08006730: 4852 RH LDR r0,[pc,#328] ; [0x800687c] = 0x200003c4 + 0x08006732: 6800 .h LDR r0,[r0,#0] + 0x08006734: 7840 @x LDRB r0,[r0,#1] + 0x08006736: 7008 .p STRB r0,[r1,#0] + 0x08006738: e03f ?. B 0x80067ba ; eMBMasterPoll + 290 + 0x0800673a: 2400 .$ MOVS r4,#0 + 0x0800673c: e03a :. B 0x80067b4 ; eMBMasterPoll + 284 + 0x0800673e: 4854 TH LDR r0,[pc,#336] ; [0x8006890] = 0x20000344 + 0x08006740: f8100034 ..4. LDRB r0,[r0,r4,LSL #3] + 0x08006744: b900 .. CBNZ r0,0x8006748 ; eMBMasterPoll + 176 + 0x08006746: e037 7. B 0x80067b8 ; eMBMasterPoll + 288 + 0x08006748: 4851 QH LDR r0,[pc,#324] ; [0x8006890] = 0x20000344 + 0x0800674a: f8100034 ..4. LDRB r0,[r0,r4,LSL #3] + 0x0800674e: 494e NI LDR r1,[pc,#312] ; [0x8006888] = 0x200003c9 + 0x08006750: 7809 .x LDRB r1,[r1,#0] + 0x08006752: 4288 .B CMP r0,r1 + 0x08006754: d12d -. BNE 0x80067b2 ; eMBMasterPoll + 282 + 0x08006756: 2001 . MOVS r0,#1 + 0x08006758: f001fcac .... BL vMBMasterSetCBRunInMasterMode ; 0x80080b4 + 0x0800675c: f002fcb2 .... BL xMBMasterRequestIsBroadcast ; 0x80090c4 + 0x08006760: b1b0 .. CBZ r0,0x8006790 ; eMBMasterPoll + 248 + 0x08006762: f001fad7 .... BL usMBMasterGetPDUSndLength ; 0x8007d14 + 0x08006766: 4944 DI LDR r1,[pc,#272] ; [0x8006878] = 0x200003ca + 0x08006768: 8008 .. STRH r0,[r1,#0] + 0x0800676a: 2501 .% MOVS r5,#1 + 0x0800676c: e00d .. B 0x800678a ; eMBMasterPoll + 242 + 0x0800676e: b2e8 .. UXTB r0,r5 + 0x08006770: f001fcac .... BL vMBMasterSetDestAddress ; 0x80080cc + 0x08006774: 4846 FH LDR r0,[pc,#280] ; [0x8006890] = 0x20000344 + 0x08006776: eb0000c4 .... ADD r0,r0,r4,LSL #3 + 0x0800677a: 493f ?I LDR r1,[pc,#252] ; [0x8006878] = 0x200003ca + 0x0800677c: 6842 Bh LDR r2,[r0,#4] + 0x0800677e: 483f ?H LDR r0,[pc,#252] ; [0x800687c] = 0x200003c4 + 0x08006780: 6800 .h LDR r0,[r0,#0] + 0x08006782: 4790 .G BLX r2 + 0x08006784: 4941 AI LDR r1,[pc,#260] ; [0x800688c] = 0x200003cc + 0x08006786: 7008 .p STRB r0,[r1,#0] + 0x08006788: 1c6d m. ADDS r5,r5,#1 + 0x0800678a: 2d10 .- CMP r5,#0x10 + 0x0800678c: ddef .. BLE 0x800676e ; eMBMasterPoll + 214 + 0x0800678e: e009 .. B 0x80067a4 ; eMBMasterPoll + 268 + 0x08006790: 483f ?H LDR r0,[pc,#252] ; [0x8006890] = 0x20000344 + 0x08006792: eb0000c4 .... ADD r0,r0,r4,LSL #3 + 0x08006796: 4938 8I LDR r1,[pc,#224] ; [0x8006878] = 0x200003ca + 0x08006798: 6842 Bh LDR r2,[r0,#4] + 0x0800679a: 4838 8H LDR r0,[pc,#224] ; [0x800687c] = 0x200003c4 + 0x0800679c: 6800 .h LDR r0,[r0,#0] + 0x0800679e: 4790 .G BLX r2 + 0x080067a0: 493a :I LDR r1,[pc,#232] ; [0x800688c] = 0x200003cc + 0x080067a2: 7008 .p STRB r0,[r1,#0] + 0x080067a4: 2000 . MOVS r0,#0 + 0x080067a6: f001fc85 .... BL vMBMasterSetCBRunInMasterMode ; 0x80080b4 + 0x080067aa: e005 .. B 0x80067b8 ; eMBMasterPoll + 288 + 0x080067ac: e05f _. B 0x800686e ; eMBMasterPoll + 470 + 0x080067ae: e05c \. B 0x800686a ; eMBMasterPoll + 466 + 0x080067b0: e012 .. B 0x80067d8 ; eMBMasterPoll + 320 + 0x080067b2: 1c64 d. ADDS r4,r4,#1 + 0x080067b4: 2c10 ., CMP r4,#0x10 + 0x080067b6: dbc2 .. BLT 0x800673e ; eMBMasterPoll + 166 + 0x080067b8: bf00 .. NOP + 0x080067ba: 4834 4H LDR r0,[pc,#208] ; [0x800688c] = 0x200003cc + 0x080067bc: 7800 .x LDRB r0,[r0,#0] + 0x080067be: b130 0. CBZ r0,0x80067ce ; eMBMasterPoll + 310 + 0x080067c0: 2002 . MOVS r0,#2 + 0x080067c2: f001fc89 .... BL vMBMasterSetErrorType ; 0x80080d8 + 0x080067c6: 2010 . MOVS r0,#0x10 + 0x080067c8: f002f9b0 .... BL xMBMasterPortEventPost ; 0x8008b2c + 0x080067cc: e003 .. B 0x80067d6 ; eMBMasterPoll + 318 + 0x080067ce: f001fb1f .... BL vMBMasterCBRequestScuuess ; 0x8007e10 + 0x080067d2: f001fc63 ..c. BL vMBMasterRunResRelease ; 0x800809c + 0x080067d6: e049 I. B 0x800686c ; eMBMasterPoll + 468 + 0x080067d8: 4828 (H LDR r0,[pc,#160] ; [0x800687c] = 0x200003c4 + 0x080067da: f001fb49 ..I. BL vMBMasterGetPDUSndBuf ; 0x8007e70 + 0x080067de: f001fa99 .... BL usMBMasterGetPDUSndLength ; 0x8007d14 + 0x080067e2: 4680 .F MOV r8,r0 + 0x080067e4: f001fa74 ..t. BL ucMBMasterGetDestAddress ; 0x8007cd0 + 0x080067e8: 4681 .F MOV r9,r0 + 0x080067ea: 4642 BF MOV r2,r8 + 0x080067ec: 4823 #H LDR r0,[pc,#140] ; [0x800687c] = 0x200003c4 + 0x080067ee: 6801 .h LDR r1,[r0,#0] + 0x080067f0: 4648 HF MOV r0,r9 + 0x080067f2: 4b28 (K LDR r3,[pc,#160] ; [0x8006894] = 0x2000031c + 0x080067f4: 681b .h LDR r3,[r3,#0] + 0x080067f6: 4798 .G BLX r3 + 0x080067f8: 4607 .F MOV r7,r0 + 0x080067fa: e037 7. B 0x800686c ; eMBMasterPoll + 468 + 0x080067fc: f7fffee8 .... BL eMBMasterGetErrorType ; 0x80065d0 + 0x08006800: 4606 .F MOV r6,r0 + 0x08006802: 481e .H LDR r0,[pc,#120] ; [0x800687c] = 0x200003c4 + 0x08006804: f001fb34 ..4. BL vMBMasterGetPDUSndBuf ; 0x8007e70 + 0x08006808: b126 &. CBZ r6,0x8006814 ; eMBMasterPoll + 380 + 0x0800680a: 2e01 .. CMP r6,#1 + 0x0800680c: d00f .. BEQ 0x800682e ; eMBMasterPoll + 406 + 0x0800680e: 2e02 .. CMP r6,#2 + 0x08006810: d127 '. BNE 0x8006862 ; eMBMasterPoll + 458 + 0x08006812: e019 .. B 0x8006848 ; eMBMasterPoll + 432 + 0x08006814: f001fa7e ..~. BL usMBMasterGetPDUSndLength ; 0x8007d14 + 0x08006818: 4680 .F MOV r8,r0 + 0x0800681a: f001fa59 ..Y. BL ucMBMasterGetDestAddress ; 0x8007cd0 + 0x0800681e: 4681 .F MOV r9,r0 + 0x08006820: 4642 BF MOV r2,r8 + 0x08006822: 4816 .H LDR r0,[pc,#88] ; [0x800687c] = 0x200003c4 + 0x08006824: 6801 .h LDR r1,[r0,#0] + 0x08006826: 4648 HF MOV r0,r9 + 0x08006828: f001fb16 .... BL vMBMasterErrorCBRespondTimeout ; 0x8007e58 + 0x0800682c: e019 .. B 0x8006862 ; eMBMasterPoll + 458 + 0x0800682e: f001fa71 ..q. BL usMBMasterGetPDUSndLength ; 0x8007d14 + 0x08006832: 4680 .F MOV r8,r0 + 0x08006834: f001fa4c ..L. BL ucMBMasterGetDestAddress ; 0x8007cd0 + 0x08006838: 4681 .F MOV r9,r0 + 0x0800683a: 4642 BF MOV r2,r8 + 0x0800683c: 480f .H LDR r0,[pc,#60] ; [0x800687c] = 0x200003c4 + 0x0800683e: 6801 .h LDR r1,[r0,#0] + 0x08006840: 4648 HF MOV r0,r9 + 0x08006842: f001fafd .... BL vMBMasterErrorCBReceiveData ; 0x8007e40 + 0x08006846: e00c .. B 0x8006862 ; eMBMasterPoll + 458 + 0x08006848: f001fa64 ..d. BL usMBMasterGetPDUSndLength ; 0x8007d14 + 0x0800684c: 4680 .F MOV r8,r0 + 0x0800684e: f001fa3f ..?. BL ucMBMasterGetDestAddress ; 0x8007cd0 + 0x08006852: 4681 .F MOV r9,r0 + 0x08006854: 4642 BF MOV r2,r8 + 0x08006856: 4809 .H LDR r0,[pc,#36] ; [0x800687c] = 0x200003c4 + 0x08006858: 6801 .h LDR r1,[r0,#0] + 0x0800685a: 4648 HF MOV r0,r9 + 0x0800685c: f001fae2 .... BL vMBMasterErrorCBExecuteFunction ; 0x8007e24 + 0x08006860: bf00 .. NOP + 0x08006862: bf00 .. NOP + 0x08006864: f001fc1a .... BL vMBMasterRunResRelease ; 0x800809c + 0x08006868: e000 .. B 0x800686c ; eMBMasterPoll + 468 + 0x0800686a: bf00 .. NOP + 0x0800686c: bf00 .. NOP + 0x0800686e: 2000 . MOVS r0,#0 + 0x08006870: e71d .. B 0x80066ae ; eMBMasterPoll + 22 + $d + 0x08006872: 0000 .. DCW 0 + 0x08006874: 2000031b ... DCD 536871707 + 0x08006878: 200003ca ... DCD 536871882 + 0x0800687c: 200003c4 ... DCD 536871876 + 0x08006880: 200003c8 ... DCD 536871880 + 0x08006884: 20000328 (.. DCD 536871720 + 0x08006888: 200003c9 ... DCD 536871881 + 0x0800688c: 200003cc ... DCD 536871884 + 0x08006890: 20000344 D.. DCD 536871748 + 0x08006894: 2000031c ... DCD 536871708 + $t + i.eMBMasterRTUInit + eMBMasterRTUInit + 0x08006898: e92d41f0 -..A PUSH {r4-r8,lr} + 0x0800689c: 4607 .F MOV r7,r0 + 0x0800689e: 460c .F MOV r4,r1 + 0x080068a0: 4616 .F MOV r6,r2 + 0x080068a2: f04f0800 O... MOV r8,#0 + 0x080068a6: f7fafad2 .... BL EnterCriticalSection ; 0x8000e4e + 0x080068aa: 4633 3F MOV r3,r6 + 0x080068ac: 2208 ." MOVS r2,#8 + 0x080068ae: 4621 !F MOV r1,r4 + 0x080068b0: 4638 8F MOV r0,r7 + 0x080068b2: f002f97f .... BL xMBMasterPortSerialInit ; 0x8008bb4 + 0x080068b6: b910 .. CBNZ r0,0x80068be ; eMBMasterRTUInit + 38 + 0x080068b8: f04f0803 O... MOV r8,#3 + 0x080068bc: e00e .. B 0x80068dc ; eMBMasterRTUInit + 68 + 0x080068be: f5b44f96 ...O CMP r4,#0x4b00 + 0x080068c2: d901 .. BLS 0x80068c8 ; eMBMasterRTUInit + 48 + 0x080068c4: 2523 #% MOVS r5,#0x23 + 0x080068c6: e003 .. B 0x80068d0 ; eMBMasterRTUInit + 56 + 0x080068c8: 0060 `. LSLS r0,r4,#1 + 0x080068ca: 4907 .I LDR r1,[pc,#28] ; [0x80068e8] = 0x177fa0 + 0x080068cc: fbb1f5f0 .... UDIV r5,r1,r0 + 0x080068d0: b2a8 .. UXTH r0,r5 + 0x080068d2: f002faa5 .... BL xMBMasterPortTimersInit ; 0x8008e20 + 0x080068d6: b908 .. CBNZ r0,0x80068dc ; eMBMasterRTUInit + 68 + 0x080068d8: f04f0803 O... MOV r8,#3 + 0x080068dc: f7fafabe .... BL ExitCriticalSection ; 0x8000e5c + 0x080068e0: 4640 @F MOV r0,r8 + 0x080068e2: e8bd81f0 .... POP {r4-r8,pc} + $d + 0x080068e6: 0000 .. DCW 0 + 0x080068e8: 00177fa0 .... DCD 1540000 + $t + i.eMBMasterRTUReceive + eMBMasterRTUReceive + 0x080068ec: e92d41f0 -..A PUSH {r4-r8,lr} + 0x080068f0: 4604 .F MOV r4,r0 + 0x080068f2: 460d .F MOV r5,r1 + 0x080068f4: 4616 .F MOV r6,r2 + 0x080068f6: 2700 .' MOVS r7,#0 + 0x080068f8: f7fafaa9 .... BL EnterCriticalSection ; 0x8000e4e + 0x080068fc: 480d .H LDR r0,[pc,#52] ; [0x8006934] = 0x200003da + 0x080068fe: 8800 .. LDRH r0,[r0,#0] + 0x08006900: 2804 .( CMP r0,#4 + 0x08006902: db10 .. BLT 0x8006926 ; eMBMasterRTUReceive + 58 + 0x08006904: 480b .H LDR r0,[pc,#44] ; [0x8006934] = 0x200003da + 0x08006906: 8801 .. LDRH r1,[r0,#0] + 0x08006908: 480b .H LDR r0,[pc,#44] ; [0x8006938] = 0x200034af + 0x0800690a: f001f9e7 .... BL usMBCRC16 ; 0x8007cdc + 0x0800690e: b950 P. CBNZ r0,0x8006926 ; eMBMasterRTUReceive + 58 + 0x08006910: 4809 .H LDR r0,[pc,#36] ; [0x8006938] = 0x200034af + 0x08006912: 7800 .x LDRB r0,[r0,#0] + 0x08006914: 7020 p STRB r0,[r4,#0] + 0x08006916: 4807 .H LDR r0,[pc,#28] ; [0x8006934] = 0x200003da + 0x08006918: 8800 .. LDRH r0,[r0,#0] + 0x0800691a: 1ec0 .. SUBS r0,r0,#3 + 0x0800691c: 8030 0. STRH r0,[r6,#0] + 0x0800691e: 4806 .H LDR r0,[pc,#24] ; [0x8006938] = 0x200034af + 0x08006920: 1c40 @. ADDS r0,r0,#1 + 0x08006922: 6028 (` STR r0,[r5,#0] + 0x08006924: e000 .. B 0x8006928 ; eMBMasterRTUReceive + 60 + 0x08006926: 2705 .' MOVS r7,#5 + 0x08006928: f7fafa98 .... BL ExitCriticalSection ; 0x8000e5c + 0x0800692c: 4638 8F MOV r0,r7 + 0x0800692e: e8bd81f0 .... POP {r4-r8,pc} + $d + 0x08006932: 0000 .. DCW 0 + 0x08006934: 200003da ... DCD 536871898 + 0x08006938: 200034af .4. DCD 536884399 + $t + i.eMBMasterRTUSend + eMBMasterRTUSend + 0x0800693c: e92d41f0 -..A PUSH {r4-r8,lr} + 0x08006940: 4604 .F MOV r4,r0 + 0x08006942: 460e .F MOV r6,r1 + 0x08006944: 4617 .F MOV r7,r2 + 0x08006946: f04f0800 O... MOV r8,#0 + 0x0800694a: 2c10 ., CMP r4,#0x10 + 0x0800694c: dd02 .. BLE 0x8006954 ; eMBMasterRTUSend + 24 + 0x0800694e: 2002 . MOVS r0,#2 + 0x08006950: e8bd81f0 .... POP {r4-r8,pc} + 0x08006954: f7fafa7b ..{. BL EnterCriticalSection ; 0x8000e4e + 0x08006958: 4819 .H LDR r0,[pc,#100] ; [0x80069c0] = 0x200003d1 + 0x0800695a: 7800 .x LDRB r0,[r0,#0] + 0x0800695c: 2801 .( CMP r0,#1 + 0x0800695e: d129 ). BNE 0x80069b4 ; eMBMasterRTUSend + 120 + 0x08006960: 1e70 p. SUBS r0,r6,#1 + 0x08006962: 4918 .I LDR r1,[pc,#96] ; [0x80069c4] = 0x200003d4 + 0x08006964: 6008 .` STR r0,[r1,#0] + 0x08006966: 2001 . MOVS r0,#1 + 0x08006968: 4917 .I LDR r1,[pc,#92] ; [0x80069c8] = 0x200003d8 + 0x0800696a: 8008 .. STRH r0,[r1,#0] + 0x0800696c: 4815 .H LDR r0,[pc,#84] ; [0x80069c4] = 0x200003d4 + 0x0800696e: 6800 .h LDR r0,[r0,#0] + 0x08006970: 7004 .p STRB r4,[r0,#0] + 0x08006972: 4608 .F MOV r0,r1 + 0x08006974: 8800 .. LDRH r0,[r0,#0] + 0x08006976: 4438 8D ADD r0,r0,r7 + 0x08006978: 8008 .. STRH r0,[r1,#0] + 0x0800697a: 4608 .F MOV r0,r1 + 0x0800697c: 8801 .. LDRH r1,[r0,#0] + 0x0800697e: 4811 .H LDR r0,[pc,#68] ; [0x80069c4] = 0x200003d4 + 0x08006980: 6800 .h LDR r0,[r0,#0] + 0x08006982: f001f9ab .... BL usMBCRC16 ; 0x8007cdc + 0x08006986: 4605 .F MOV r5,r0 + 0x08006988: 490f .I LDR r1,[pc,#60] ; [0x80069c8] = 0x200003d8 + 0x0800698a: 8808 .. LDRH r0,[r1,#0] + 0x0800698c: 1c41 A. ADDS r1,r0,#1 + 0x0800698e: 4b0e .K LDR r3,[pc,#56] ; [0x80069c8] = 0x200003d8 + 0x08006990: 8019 .. STRH r1,[r3,#0] + 0x08006992: 490e .I LDR r1,[pc,#56] ; [0x80069cc] = 0x200033b2 + 0x08006994: 540d .T STRB r5,[r1,r0] + 0x08006996: 122a *. ASRS r2,r5,#8 + 0x08006998: 4619 .F MOV r1,r3 + 0x0800699a: 8808 .. LDRH r0,[r1,#0] + 0x0800699c: 1c41 A. ADDS r1,r0,#1 + 0x0800699e: 8019 .. STRH r1,[r3,#0] + 0x080069a0: 490a .I LDR r1,[pc,#40] ; [0x80069cc] = 0x200033b2 + 0x080069a2: 540a .T STRB r2,[r1,r0] + 0x080069a4: 2001 . MOVS r0,#1 + 0x080069a6: 490a .I LDR r1,[pc,#40] ; [0x80069d0] = 0x200003d0 + 0x080069a8: 7008 .p STRB r0,[r1,#0] + 0x080069aa: 2101 .! MOVS r1,#1 + 0x080069ac: 2000 . MOVS r0,#0 + 0x080069ae: f001fa71 ..q. BL vMBMasterPortSerialEnable ; 0x8007e94 + 0x080069b2: e001 .. B 0x80069b8 ; eMBMasterRTUSend + 124 + 0x080069b4: f04f0805 O... MOV r8,#5 + 0x080069b8: f7fafa50 ..P. BL ExitCriticalSection ; 0x8000e5c + 0x080069bc: 4640 @F MOV r0,r8 + 0x080069be: e7c7 .. B 0x8006950 ; eMBMasterRTUSend + 20 + $d + 0x080069c0: 200003d1 ... DCD 536871889 + 0x080069c4: 200003d4 ... DCD 536871892 + 0x080069c8: 200003d8 ... DCD 536871896 + 0x080069cc: 200033b2 .3. DCD 536884146 + 0x080069d0: 200003d0 ... DCD 536871888 + $t + i.eMBMasterRTUStart + eMBMasterRTUStart + 0x080069d4: b510 .. PUSH {r4,lr} + 0x080069d6: f7fafa3a ..:. BL EnterCriticalSection ; 0x8000e4e + 0x080069da: 2000 . MOVS r0,#0 + 0x080069dc: 4905 .I LDR r1,[pc,#20] ; [0x80069f4] = 0x200003d1 + 0x080069de: 7008 .p STRB r0,[r1,#0] + 0x080069e0: 2100 .! MOVS r1,#0 + 0x080069e2: 2001 . MOVS r0,#1 + 0x080069e4: f001fa56 ..V. BL vMBMasterPortSerialEnable ; 0x8007e94 + 0x080069e8: f001fb2e .... BL vMBMasterPortTimersT35Enable ; 0x8008048 + 0x080069ec: f7fafa36 ..6. BL ExitCriticalSection ; 0x8000e5c + 0x080069f0: bd10 .. POP {r4,pc} + $d + 0x080069f2: 0000 .. DCW 0 + 0x080069f4: 200003d1 ... DCD 536871889 + $t + i.eMBMasterRTUStop + eMBMasterRTUStop + 0x080069f8: b510 .. PUSH {r4,lr} + 0x080069fa: f7fafa28 ..(. BL EnterCriticalSection ; 0x8000e4e + 0x080069fe: 2100 .! MOVS r1,#0 + 0x08006a00: 4608 .F MOV r0,r1 + 0x08006a02: f001fa47 ..G. BL vMBMasterPortSerialEnable ; 0x8007e94 + 0x08006a06: f001fae5 .... BL vMBMasterPortTimersDisable ; 0x8007fd4 + 0x08006a0a: f7fafa27 ..'. BL ExitCriticalSection ; 0x8000e5c + 0x08006a0e: bd10 .. POP {r4,pc} + i.eMBMasterRegCoilsCB + eMBMasterRegCoilsCB + 0x08006a10: e92d5fff -.._ PUSH {r0-r12,lr} + 0x08006a14: 4605 .F MOV r5,r0 + 0x08006a16: 460e .F MOV r6,r1 + 0x08006a18: 4614 .F MOV r4,r2 + 0x08006a1a: 469a .F MOV r10,r3 + 0x08006a1c: 2000 . MOVS r0,#0 + 0x08006a1e: 9003 .. STR r0,[sp,#0xc] + 0x08006a20: 4620 F MOV r0,r4 + 0x08006a22: 17e1 .. ASRS r1,r4,#31 + 0x08006a24: eb047151 ..Qq ADD r1,r4,r1,LSR #29 + 0x08006a28: 10c9 .. ASRS r1,r1,#3 + 0x08006a2a: 1c49 I. ADDS r1,r1,#1 + 0x08006a2c: fa1ff881 .... UXTH r8,r1 + 0x08006a30: f001f94e ..N. BL ucMBMasterGetDestAddress ; 0x8007cd0 + 0x08006a34: 1e40 @. SUBS r0,r0,#1 + 0x08006a36: 4944 DI LDR r1,[pc,#272] ; [0x8006b48] = 0x20003650 + 0x08006a38: eb0109c0 .... ADD r9,r1,r0,LSL #3 + 0x08006a3c: 2000 . MOVS r0,#0 + 0x08006a3e: 9002 .. STR r0,[sp,#8] + 0x08006a40: 2040 @ MOVS r0,#0x40 + 0x08006a42: 9001 .. STR r0,[sp,#4] + 0x08006a44: 4841 AH LDR r0,[pc,#260] ; [0x8006b4c] = 0x200003e2 + 0x08006a46: 8800 .. LDRH r0,[r0,#0] + 0x08006a48: 9000 .. STR r0,[sp,#0] + 0x08006a4a: f04f0a01 O... MOV r10,#1 + 0x08006a4e: 1e70 p. SUBS r0,r6,#1 + 0x08006a50: b286 .. UXTH r6,r0 + 0x08006a52: 9802 .. LDR r0,[sp,#8] + 0x08006a54: 4286 .B CMP r6,r0 + 0x08006a56: db71 q. BLT 0x8006b3c ; eMBMasterRegCoilsCB + 300 + 0x08006a58: 1932 2. ADDS r2,r6,r4 + 0x08006a5a: e9dd1001 .... LDRD r1,r0,[sp,#4] + 0x08006a5e: 4408 .D ADD r0,r0,r1 + 0x08006a60: 4282 .B CMP r2,r0 + 0x08006a62: dc6b k. BGT 0x8006b3c ; eMBMasterRegCoilsCB + 300 + 0x08006a64: 9900 .. LDR r1,[sp,#0] + 0x08006a66: 1a71 q. SUBS r1,r6,r1 + 0x08006a68: b288 .. UXTH r0,r1 + 0x08006a6a: 17c1 .. ASRS r1,r0,#31 + 0x08006a6c: eb007151 ..Qq ADD r1,r0,r1,LSR #29 + 0x08006a70: 10cf .. ASRS r7,r1,#3 + 0x08006a72: 9900 .. LDR r1,[sp,#0] + 0x08006a74: 1a71 q. SUBS r1,r6,r1 + 0x08006a76: b288 .. UXTH r0,r1 + 0x08006a78: 17c1 .. ASRS r1,r0,#31 + 0x08006a7a: eb007151 ..Qq ADD r1,r0,r1,LSR #29 + 0x08006a7e: 10c9 .. ASRS r1,r1,#3 + 0x08006a80: eba001c1 .... SUB r1,r0,r1,LSL #3 + 0x08006a84: fa1ffb81 .... UXTH r11,r1 + 0x08006a88: f1ba0f00 .... CMP r10,#0 + 0x08006a8c: d003 .. BEQ 0x8006a96 ; eMBMasterRegCoilsCB + 134 + 0x08006a8e: f1ba0f01 .... CMP r10,#1 + 0x08006a92: d151 Q. BNE 0x8006b38 ; eMBMasterRegCoilsCB + 296 + 0x08006a94: e026 &. B 0x8006ae4 ; eMBMasterRegCoilsCB + 212 + 0x08006a96: e00e .. B 0x8006ab6 ; eMBMasterRegCoilsCB + 166 + 0x08006a98: 4639 9F MOV r1,r7 + 0x08006a9a: 1c7a z. ADDS r2,r7,#1 + 0x08006a9c: b297 .. UXTH r7,r2 + 0x08006a9e: eb010009 .... ADD r0,r1,r9 + 0x08006aa2: 2208 ." MOVS r2,#8 + 0x08006aa4: 4659 YF MOV r1,r11 + 0x08006aa6: f002fb2f ../. BL xMBUtilGetBits ; 0x8009108 + 0x08006aaa: f8050b01 .... STRB r0,[r5],#1 + 0x08006aae: f1a80001 .... SUB r0,r8,#1 + 0x08006ab2: fa1ff880 .... UXTH r8,r0 + 0x08006ab6: f1b80f00 .... CMP r8,#0 + 0x08006aba: dced .. BGT 0x8006a98 ; eMBMasterRegCoilsCB + 136 + 0x08006abc: 1e6d m. SUBS r5,r5,#1 + 0x08006abe: 4620 F MOV r0,r4 + 0x08006ac0: 17e1 .. ASRS r1,r4,#31 + 0x08006ac2: eb047151 ..Qq ADD r1,r4,r1,LSR #29 + 0x08006ac6: 10c9 .. ASRS r1,r1,#3 + 0x08006ac8: eba401c1 .... SUB r1,r4,r1,LSL #3 + 0x08006acc: b28c .. UXTH r4,r1 + 0x08006ace: 7828 (x LDRB r0,[r5,#0] + 0x08006ad0: f1c40108 .... RSB r1,r4,#8 + 0x08006ad4: 4088 .@ LSLS r0,r0,r1 + 0x08006ad6: 7028 (p STRB r0,[r5,#0] + 0x08006ad8: 7828 (x LDRB r0,[r5,#0] + 0x08006ada: f1c40108 .... RSB r1,r4,#8 + 0x08006ade: 4108 .A ASRS r0,r0,r1 + 0x08006ae0: 7028 (p STRB r0,[r5,#0] + 0x08006ae2: e029 ). B 0x8006b38 ; eMBMasterRegCoilsCB + 296 + 0x08006ae4: e00e .. B 0x8006b04 ; eMBMasterRegCoilsCB + 244 + 0x08006ae6: f8153b01 ...; LDRB r3,[r5],#1 + 0x08006aea: 4639 9F MOV r1,r7 + 0x08006aec: 1c7a z. ADDS r2,r7,#1 + 0x08006aee: b297 .. UXTH r7,r2 + 0x08006af0: eb010009 .... ADD r0,r1,r9 + 0x08006af4: 2208 ." MOVS r2,#8 + 0x08006af6: 4659 YF MOV r1,r11 + 0x08006af8: f002fb1b .... BL xMBUtilSetBits ; 0x8009132 + 0x08006afc: f1a80001 .... SUB r0,r8,#1 + 0x08006b00: fa1ff880 .... UXTH r8,r0 + 0x08006b04: f1b80f01 .... CMP r8,#1 + 0x08006b08: dced .. BGT 0x8006ae6 ; eMBMasterRegCoilsCB + 214 + 0x08006b0a: 4620 F MOV r0,r4 + 0x08006b0c: 17e1 .. ASRS r1,r4,#31 + 0x08006b0e: eb047151 ..Qq ADD r1,r4,r1,LSR #29 + 0x08006b12: 10c9 .. ASRS r1,r1,#3 + 0x08006b14: eba401c1 .... SUB r1,r4,r1,LSL #3 + 0x08006b18: b28c .. UXTH r4,r1 + 0x08006b1a: b164 d. CBZ r4,0x8006b36 ; eMBMasterRegCoilsCB + 294 + 0x08006b1c: f8153b01 ...; LDRB r3,[r5],#1 + 0x08006b20: b2e2 .. UXTB r2,r4 + 0x08006b22: 4639 9F MOV r1,r7 + 0x08006b24: f1070c01 .... ADD r12,r7,#1 + 0x08006b28: fa1ff78c .... UXTH r7,r12 + 0x08006b2c: eb010009 .... ADD r0,r1,r9 + 0x08006b30: 4659 YF MOV r1,r11 + 0x08006b32: f002fafe .... BL xMBUtilSetBits ; 0x8009132 + 0x08006b36: bf00 .. NOP + 0x08006b38: e002 .. B 0x8006b40 ; eMBMasterRegCoilsCB + 304 + 0x08006b3a: e7ff .. B 0x8006b3c ; eMBMasterRegCoilsCB + 300 + 0x08006b3c: 2001 . MOVS r0,#1 + 0x08006b3e: 9003 .. STR r0,[sp,#0xc] + 0x08006b40: 9803 .. LDR r0,[sp,#0xc] + 0x08006b42: b004 .. ADD sp,sp,#0x10 + 0x08006b44: e8bd9ff0 .... POP {r4-r12,pc} + $d + 0x08006b48: 20003650 P6. DCD 536884816 + 0x08006b4c: 200003e2 ... DCD 536871906 + $t + i.eMBMasterRegDiscreteCB + eMBMasterRegDiscreteCB + 0x08006b50: e92d4ffe -..O PUSH {r1-r11,lr} + 0x08006b54: 4606 .F MOV r6,r0 + 0x08006b56: 460d .F MOV r5,r1 + 0x08006b58: 4614 .F MOV r4,r2 + 0x08006b5a: 2000 . MOVS r0,#0 + 0x08006b5c: 9002 .. STR r0,[sp,#8] + 0x08006b5e: 4620 F MOV r0,r4 + 0x08006b60: 17e1 .. ASRS r1,r4,#31 + 0x08006b62: eb047151 ..Qq ADD r1,r4,r1,LSR #29 + 0x08006b66: 10c9 .. ASRS r1,r1,#3 + 0x08006b68: 1c49 I. ADDS r1,r1,#1 + 0x08006b6a: fa1ff981 .... UXTH r9,r1 + 0x08006b6e: f001f8af .... BL ucMBMasterGetDestAddress ; 0x8007cd0 + 0x08006b72: 1e40 @. SUBS r0,r0,#1 + 0x08006b74: 4929 )I LDR r1,[pc,#164] ; [0x8006c1c] = 0x200035d0 + 0x08006b76: eb010ac0 .... ADD r10,r1,r0,LSL #3 + 0x08006b7a: f04f0b00 O... MOV r11,#0 + 0x08006b7e: 2040 @ MOVS r0,#0x40 + 0x08006b80: 9001 .. STR r0,[sp,#4] + 0x08006b82: 4827 'H LDR r0,[pc,#156] ; [0x8006c20] = 0x200003e0 + 0x08006b84: 8800 .. LDRH r0,[r0,#0] + 0x08006b86: 9000 .. STR r0,[sp,#0] + 0x08006b88: 1e68 h. SUBS r0,r5,#1 + 0x08006b8a: b285 .. UXTH r5,r0 + 0x08006b8c: 455d ]E CMP r5,r11 + 0x08006b8e: db40 @. BLT 0x8006c12 ; eMBMasterRegDiscreteCB + 194 + 0x08006b90: 1929 ). ADDS r1,r5,r4 + 0x08006b92: 9801 .. LDR r0,[sp,#4] + 0x08006b94: 4458 XD ADD r0,r0,r11 + 0x08006b96: 4281 .B CMP r1,r0 + 0x08006b98: dc3b ;. BGT 0x8006c12 ; eMBMasterRegDiscreteCB + 194 + 0x08006b9a: 9900 .. LDR r1,[sp,#0] + 0x08006b9c: 1a69 i. SUBS r1,r5,r1 + 0x08006b9e: b288 .. UXTH r0,r1 + 0x08006ba0: 17c1 .. ASRS r1,r0,#31 + 0x08006ba2: eb007151 ..Qq ADD r1,r0,r1,LSR #29 + 0x08006ba6: 10cf .. ASRS r7,r1,#3 + 0x08006ba8: 9900 .. LDR r1,[sp,#0] + 0x08006baa: 1a69 i. SUBS r1,r5,r1 + 0x08006bac: b288 .. UXTH r0,r1 + 0x08006bae: 17c1 .. ASRS r1,r0,#31 + 0x08006bb0: eb007151 ..Qq ADD r1,r0,r1,LSR #29 + 0x08006bb4: 10c9 .. ASRS r1,r1,#3 + 0x08006bb6: eba001c1 .... SUB r1,r0,r1,LSL #3 + 0x08006bba: fa1ff881 .... UXTH r8,r1 + 0x08006bbe: e00e .. B 0x8006bde ; eMBMasterRegDiscreteCB + 142 + 0x08006bc0: f8163b01 ...; LDRB r3,[r6],#1 + 0x08006bc4: 4639 9F MOV r1,r7 + 0x08006bc6: 1c7a z. ADDS r2,r7,#1 + 0x08006bc8: b297 .. UXTH r7,r2 + 0x08006bca: eb01000a .... ADD r0,r1,r10 + 0x08006bce: 2208 ." MOVS r2,#8 + 0x08006bd0: 4641 AF MOV r1,r8 + 0x08006bd2: f002faae .... BL xMBUtilSetBits ; 0x8009132 + 0x08006bd6: f1a90001 .... SUB r0,r9,#1 + 0x08006bda: fa1ff980 .... UXTH r9,r0 + 0x08006bde: f1b90f01 .... CMP r9,#1 + 0x08006be2: dced .. BGT 0x8006bc0 ; eMBMasterRegDiscreteCB + 112 + 0x08006be4: 4620 F MOV r0,r4 + 0x08006be6: 17e1 .. ASRS r1,r4,#31 + 0x08006be8: eb047151 ..Qq ADD r1,r4,r1,LSR #29 + 0x08006bec: 10c9 .. ASRS r1,r1,#3 + 0x08006bee: eba401c1 .... SUB r1,r4,r1,LSL #3 + 0x08006bf2: b28c .. UXTH r4,r1 + 0x08006bf4: b17c |. CBZ r4,0x8006c16 ; eMBMasterRegDiscreteCB + 198 + 0x08006bf6: f8163b01 ...; LDRB r3,[r6],#1 + 0x08006bfa: b2e2 .. UXTB r2,r4 + 0x08006bfc: 4639 9F MOV r1,r7 + 0x08006bfe: f1070c01 .... ADD r12,r7,#1 + 0x08006c02: fa1ff78c .... UXTH r7,r12 + 0x08006c06: eb01000a .... ADD r0,r1,r10 + 0x08006c0a: 4641 AF MOV r1,r8 + 0x08006c0c: f002fa91 .... BL xMBUtilSetBits ; 0x8009132 + 0x08006c10: e001 .. B 0x8006c16 ; eMBMasterRegDiscreteCB + 198 + 0x08006c12: 2001 . MOVS r0,#1 + 0x08006c14: 9002 .. STR r0,[sp,#8] + 0x08006c16: 9802 .. LDR r0,[sp,#8] + 0x08006c18: e8bd8ffe .... POP {r1-r11,pc} + $d + 0x08006c1c: 200035d0 .5. DCD 536884688 + 0x08006c20: 200003e0 ... DCD 536871904 + $t + i.eMBMasterRegHoldingCB + eMBMasterRegHoldingCB + 0x08006c24: e92d5ffc -.._ PUSH {r2-r12,lr} + 0x08006c28: 4604 .F MOV r4,r0 + 0x08006c2a: 4688 .F MOV r8,r1 + 0x08006c2c: 4617 .F MOV r7,r2 + 0x08006c2e: 2000 . MOVS r0,#0 + 0x08006c30: 9001 .. STR r0,[sp,#4] + 0x08006c32: f001f84d ..M. BL ucMBMasterGetDestAddress ; 0x8007cd0 + 0x08006c36: 1e40 @. SUBS r0,r0,#1 + 0x08006c38: eb0001c0 .... ADD r1,r0,r0,LSL #3 + 0x08006c3c: eb011000 .... ADD r0,r1,r0,LSL #4 + 0x08006c40: 493a :I LDR r1,[pc,#232] ; [0x8006d2c] = 0x20004350 + 0x08006c42: eb011600 .... ADD r6,r1,r0,LSL #4 + 0x08006c46: f04f0a00 O... MOV r10,#0 + 0x08006c4a: f04f0b64 O.d. MOV r11,#0x64 + 0x08006c4e: 4838 8H LDR r0,[pc,#224] ; [0x8006d30] = 0x200003e6 + 0x08006c50: 8800 .. LDRH r0,[r0,#0] + 0x08006c52: 9000 .. STR r0,[sp,#0] + 0x08006c54: f04f0901 O... MOV r9,#1 + 0x08006c58: f1a80001 .... SUB r0,r8,#1 + 0x08006c5c: fa1ff880 .... UXTH r8,r0 + 0x08006c60: 45d0 .E CMP r8,r10 + 0x08006c62: db5e ^. BLT 0x8006d22 ; eMBMasterRegHoldingCB + 254 + 0x08006c64: eb080007 .... ADD r0,r8,r7 + 0x08006c68: eb0a010b .... ADD r1,r10,r11 + 0x08006c6c: 4288 .B CMP r0,r1 + 0x08006c6e: dc58 X. BGT 0x8006d22 ; eMBMasterRegHoldingCB + 254 + 0x08006c70: 9800 .. LDR r0,[sp,#0] + 0x08006c72: eba80000 .... SUB r0,r8,r0 + 0x08006c76: b285 .. UXTH r5,r0 + 0x08006c78: f1b90f00 .... CMP r9,#0 + 0x08006c7c: d003 .. BEQ 0x8006c86 ; eMBMasterRegHoldingCB + 98 + 0x08006c7e: f1b90f01 .... CMP r9,#1 + 0x08006c82: d14d M. BNE 0x8006d20 ; eMBMasterRegHoldingCB + 252 + 0x08006c84: e010 .. B 0x8006ca8 ; eMBMasterRegHoldingCB + 132 + 0x08006c86: e00c .. B 0x8006ca2 ; eMBMasterRegHoldingCB + 126 + 0x08006c88: f8360025 6.%. LDRH r0,[r6,r5,LSL #2] + 0x08006c8c: 0a00 .. LSRS r0,r0,#8 + 0x08006c8e: f8040b01 .... STRB r0,[r4],#1 + 0x08006c92: f8160025 ..%. LDRB r0,[r6,r5,LSL #2] + 0x08006c96: f8040b01 .... STRB r0,[r4],#1 + 0x08006c9a: 1c68 h. ADDS r0,r5,#1 + 0x08006c9c: b285 .. UXTH r5,r0 + 0x08006c9e: 1e78 x. SUBS r0,r7,#1 + 0x08006ca0: b287 .. UXTH r7,r0 + 0x08006ca2: 2f00 ./ CMP r7,#0 + 0x08006ca4: dcf0 .. BGT 0x8006c88 ; eMBMasterRegHoldingCB + 100 + 0x08006ca6: e03b ;. B 0x8006d20 ; eMBMasterRegHoldingCB + 252 + 0x08006ca8: e037 7. B 0x8006d1a ; eMBMasterRegHoldingCB + 246 + 0x08006caa: 4822 "H LDR r0,[pc,#136] ; [0x8006d34] = 0x20000004 + 0x08006cac: 7800 .x LDRB r0,[r0,#0] + 0x08006cae: 2802 .( CMP r0,#2 + 0x08006cb0: d10f .. BNE 0x8006cd2 ; eMBMasterRegHoldingCB + 174 + 0x08006cb2: f8141b01 .... LDRB r1,[r4],#1 + 0x08006cb6: 0208 .. LSLS r0,r1,#8 + 0x08006cb8: f8460025 F.%. STR r0,[r6,r5,LSL #2] + 0x08006cbc: f8140b01 .... LDRB r0,[r4],#1 + 0x08006cc0: f8561025 V.%. LDR r1,[r6,r5,LSL #2] + 0x08006cc4: 4308 .C ORRS r0,r0,r1 + 0x08006cc6: f8460025 F.%. STR r0,[r6,r5,LSL #2] + 0x08006cca: 1c68 h. ADDS r0,r5,#1 + 0x08006ccc: b285 .. UXTH r5,r0 + 0x08006cce: 1e78 x. SUBS r0,r7,#1 + 0x08006cd0: b287 .. UXTH r7,r0 + 0x08006cd2: 4818 .H LDR r0,[pc,#96] ; [0x8006d34] = 0x20000004 + 0x08006cd4: 7800 .x LDRB r0,[r0,#0] + 0x08006cd6: 2804 .( CMP r0,#4 + 0x08006cd8: d11f .. BNE 0x8006d1a ; eMBMasterRegHoldingCB + 246 + 0x08006cda: f8141b01 .... LDRB r1,[r4],#1 + 0x08006cde: 0608 .. LSLS r0,r1,#24 + 0x08006ce0: f8460025 F.%. STR r0,[r6,r5,LSL #2] + 0x08006ce4: f8141b01 .... LDRB r1,[r4],#1 + 0x08006ce8: f8560025 V.%. LDR r0,[r6,r5,LSL #2] + 0x08006cec: ea404001 @..@ ORR r0,r0,r1,LSL #16 + 0x08006cf0: f8460025 F.%. STR r0,[r6,r5,LSL #2] + 0x08006cf4: f8141b01 .... LDRB r1,[r4],#1 + 0x08006cf8: f8560025 V.%. LDR r0,[r6,r5,LSL #2] + 0x08006cfc: ea402001 @.. ORR r0,r0,r1,LSL #8 + 0x08006d00: f8460025 F.%. STR r0,[r6,r5,LSL #2] + 0x08006d04: f8140b01 .... LDRB r0,[r4],#1 + 0x08006d08: f8561025 V.%. LDR r1,[r6,r5,LSL #2] + 0x08006d0c: 4308 .C ORRS r0,r0,r1 + 0x08006d0e: f8460025 F.%. STR r0,[r6,r5,LSL #2] + 0x08006d12: 1c68 h. ADDS r0,r5,#1 + 0x08006d14: b285 .. UXTH r5,r0 + 0x08006d16: 1e78 x. SUBS r0,r7,#1 + 0x08006d18: b287 .. UXTH r7,r0 + 0x08006d1a: 2f00 ./ CMP r7,#0 + 0x08006d1c: dcc5 .. BGT 0x8006caa ; eMBMasterRegHoldingCB + 134 + 0x08006d1e: bf00 .. NOP + 0x08006d20: e001 .. B 0x8006d26 ; eMBMasterRegHoldingCB + 258 + 0x08006d22: 2001 . MOVS r0,#1 + 0x08006d24: 9001 .. STR r0,[sp,#4] + 0x08006d26: 9801 .. LDR r0,[sp,#4] + 0x08006d28: e8bd9ffc .... POP {r2-r12,pc} + $d + 0x08006d2c: 20004350 PC. DCD 536888144 + 0x08006d30: 200003e6 ... DCD 536871910 + 0x08006d34: 20000004 ... DCD 536870916 + $t + i.eMBMasterRegInputCB + eMBMasterRegInputCB + 0x08006d38: e92d4ff8 -..O PUSH {r3-r11,lr} + 0x08006d3c: 4604 .F MOV r4,r0 + 0x08006d3e: 460d .F MOV r5,r1 + 0x08006d40: 4617 .F MOV r7,r2 + 0x08006d42: 2000 . MOVS r0,#0 + 0x08006d44: 9000 .. STR r0,[sp,#0] + 0x08006d46: f000ffc3 .... BL ucMBMasterGetDestAddress ; 0x8007cd0 + 0x08006d4a: 1e40 @. SUBS r0,r0,#1 + 0x08006d4c: eb0001c0 .... ADD r1,r0,r0,LSL #3 + 0x08006d50: eb011000 .... ADD r0,r1,r0,LSL #4 + 0x08006d54: 4917 .I LDR r1,[pc,#92] ; [0x8006db4] = 0x200036d0 + 0x08006d56: eb0108c0 .... ADD r8,r1,r0,LSL #3 + 0x08006d5a: f04f0900 O... MOV r9,#0 + 0x08006d5e: f04f0a64 O.d. MOV r10,#0x64 + 0x08006d62: 4815 .H LDR r0,[pc,#84] ; [0x8006db8] = 0x200003e4 + 0x08006d64: f8b0b000 .... LDRH r11,[r0,#0] + 0x08006d68: 1e68 h. SUBS r0,r5,#1 + 0x08006d6a: b285 .. UXTH r5,r0 + 0x08006d6c: 454d ME CMP r5,r9 + 0x08006d6e: db1b .. BLT 0x8006da8 ; eMBMasterRegInputCB + 112 + 0x08006d70: 19e8 .. ADDS r0,r5,r7 + 0x08006d72: eb09010a .... ADD r1,r9,r10 + 0x08006d76: 4288 .B CMP r0,r1 + 0x08006d78: dc16 .. BGT 0x8006da8 ; eMBMasterRegInputCB + 112 + 0x08006d7a: eba5000b .... SUB r0,r5,r11 + 0x08006d7e: b286 .. UXTH r6,r0 + 0x08006d80: e00f .. B 0x8006da2 ; eMBMasterRegInputCB + 106 + 0x08006d82: f8141b01 .... LDRB r1,[r4],#1 + 0x08006d86: 0208 .. LSLS r0,r1,#8 + 0x08006d88: f8280016 (... STRH r0,[r8,r6,LSL #1] + 0x08006d8c: f8140b01 .... LDRB r0,[r4],#1 + 0x08006d90: f8381016 8... LDRH r1,[r8,r6,LSL #1] + 0x08006d94: 4308 .C ORRS r0,r0,r1 + 0x08006d96: f8280016 (... STRH r0,[r8,r6,LSL #1] + 0x08006d9a: 1c70 p. ADDS r0,r6,#1 + 0x08006d9c: b286 .. UXTH r6,r0 + 0x08006d9e: 1e78 x. SUBS r0,r7,#1 + 0x08006da0: b287 .. UXTH r7,r0 + 0x08006da2: 2f00 ./ CMP r7,#0 + 0x08006da4: dced .. BGT 0x8006d82 ; eMBMasterRegInputCB + 74 + 0x08006da6: e001 .. B 0x8006dac ; eMBMasterRegInputCB + 116 + 0x08006da8: 2001 . MOVS r0,#1 + 0x08006daa: 9000 .. STR r0,[sp,#0] + 0x08006dac: 9800 .. LDR r0,[sp,#0] + 0x08006dae: e8bd8ff8 .... POP {r3-r11,pc} + $d + 0x08006db2: 0000 .. DCW 0 + 0x08006db4: 200036d0 .6. DCD 536884944 + 0x08006db8: 200003e4 ... DCD 536871908 + $t + i.eMBMasterReqReadHoldingRegister + eMBMasterReqReadHoldingRegister + 0x08006dbc: e92d43f8 -..C PUSH {r3-r9,lr} + 0x08006dc0: 4606 .F MOV r6,r0 + 0x08006dc2: 460c .F MOV r4,r1 + 0x08006dc4: 4615 .F MOV r5,r2 + 0x08006dc6: 461f .F MOV r7,r3 + 0x08006dc8: f04f0800 O... MOV r8,#0 + 0x08006dcc: 2e10 .. CMP r6,#0x10 + 0x08006dce: dd02 .. BLE 0x8006dd6 ; eMBMasterReqReadHoldingRegister + 26 + 0x08006dd0: f04f0802 O... MOV r8,#2 + 0x08006dd4: e022 ". B 0x8006e1c ; eMBMasterReqReadHoldingRegister + 96 + 0x08006dd6: 4638 8F MOV r0,r7 + 0x08006dd8: f002f97a ..z. BL xMBMasterRunResTake ; 0x80090d0 + 0x08006ddc: b910 .. CBNZ r0,0x8006de4 ; eMBMasterReqReadHoldingRegister + 40 + 0x08006dde: f04f0805 O... MOV r8,#5 + 0x08006de2: e01b .. B 0x8006e1c ; eMBMasterReqReadHoldingRegister + 96 + 0x08006de4: 4668 hF MOV r0,sp + 0x08006de6: f001f843 ..C. BL vMBMasterGetPDUSndBuf ; 0x8007e70 + 0x08006dea: 4630 0F MOV r0,r6 + 0x08006dec: f001f96e ..n. BL vMBMasterSetDestAddress ; 0x80080cc + 0x08006df0: 2003 . MOVS r0,#3 + 0x08006df2: 9900 .. LDR r1,[sp,#0] + 0x08006df4: 7008 .p STRB r0,[r1,#0] + 0x08006df6: 1220 . ASRS r0,r4,#8 + 0x08006df8: 9900 .. LDR r1,[sp,#0] + 0x08006dfa: 7048 Hp STRB r0,[r1,#1] + 0x08006dfc: 9900 .. LDR r1,[sp,#0] + 0x08006dfe: 708c .p STRB r4,[r1,#2] + 0x08006e00: 1228 (. ASRS r0,r5,#8 + 0x08006e02: 9900 .. LDR r1,[sp,#0] + 0x08006e04: 70c8 .p STRB r0,[r1,#3] + 0x08006e06: 9900 .. LDR r1,[sp,#0] + 0x08006e08: 710d .q STRB r5,[r1,#4] + 0x08006e0a: 2005 . MOVS r0,#5 + 0x08006e0c: f001f96a ..j. BL vMBMasterSetPDUSndLength ; 0x80080e4 + 0x08006e10: 2008 . MOVS r0,#8 + 0x08006e12: f001fe8b .... BL xMBMasterPortEventPost ; 0x8008b2c + 0x08006e16: f000f805 .... BL eMBMasterWaitRequestFinish ; 0x8006e24 + 0x08006e1a: 4680 .F MOV r8,r0 + 0x08006e1c: 4640 @F MOV r0,r8 + 0x08006e1e: e8bd83f8 .... POP {r3-r9,pc} + 0x08006e22: 0000 .. MOVS r0,r0 + i.eMBMasterWaitRequestFinish + eMBMasterWaitRequestFinish + 0x08006e24: b538 8. PUSH {r3-r5,lr} + 0x08006e26: 2400 .$ MOVS r4,#0 + 0x08006e28: 1e60 `. SUBS r0,r4,#1 + 0x08006e2a: 2300 .# MOVS r3,#0 + 0x08006e2c: 2201 ." MOVS r2,#1 + 0x08006e2e: f44f71f0 O..q MOV r1,#0x1e0 + 0x08006e32: 9000 .. STR r0,[sp,#0] + 0x08006e34: 480c .H LDR r0,[pc,#48] ; [0x8006e68] = 0x200003fc + 0x08006e36: 6800 .h LDR r0,[r0,#0] + 0x08006e38: f001fd44 ..D. BL xEventGroupWaitBits ; 0x80088c4 + 0x08006e3c: 4605 .F MOV r5,r0 + 0x08006e3e: 2d20 - CMP r5,#0x20 + 0x08006e40: d007 .. BEQ 0x8006e52 ; eMBMasterWaitRequestFinish + 46 + 0x08006e42: 2d40 @- CMP r5,#0x40 + 0x08006e44: d006 .. BEQ 0x8006e54 ; eMBMasterWaitRequestFinish + 48 + 0x08006e46: 2d80 .- CMP r5,#0x80 + 0x08006e48: d006 .. BEQ 0x8006e58 ; eMBMasterWaitRequestFinish + 52 + 0x08006e4a: f5b57f80 .... CMP r5,#0x100 + 0x08006e4e: d107 .. BNE 0x8006e60 ; eMBMasterWaitRequestFinish + 60 + 0x08006e50: e004 .. B 0x8006e5c ; eMBMasterWaitRequestFinish + 56 + 0x08006e52: e005 .. B 0x8006e60 ; eMBMasterWaitRequestFinish + 60 + 0x08006e54: 2404 .$ MOVS r4,#4 + 0x08006e56: e003 .. B 0x8006e60 ; eMBMasterWaitRequestFinish + 60 + 0x08006e58: 2403 .$ MOVS r4,#3 + 0x08006e5a: e001 .. B 0x8006e60 ; eMBMasterWaitRequestFinish + 60 + 0x08006e5c: 2406 .$ MOVS r4,#6 + 0x08006e5e: bf00 .. NOP + 0x08006e60: bf00 .. NOP + 0x08006e62: 4620 F MOV r0,r4 + 0x08006e64: bd38 8. POP {r3-r5,pc} + $d + 0x08006e66: 0000 .. DCW 0 + 0x08006e68: 200003fc ... DCD 536871932 + $t + i.fputc + fputc + 0x08006e6c: b513 .. PUSH {r0,r1,r4,lr} + 0x08006e6e: 460c .F MOV r4,r1 + 0x08006e70: 23c8 .# MOVS r3,#0xc8 + 0x08006e72: 2201 ." MOVS r2,#1 + 0x08006e74: 4669 iF MOV r1,sp + 0x08006e76: 4802 .H LDR r0,[pc,#8] ; [0x8006e80] = 0x20000698 + 0x08006e78: f7fdf893 .... BL HAL_UART_Transmit ; 0x8003fa2 + 0x08006e7c: 9800 .. LDR r0,[sp,#0] + 0x08006e7e: bd1c .. POP {r2-r4,pc} + $d + 0x08006e80: 20000698 ... DCD 536872600 + $t + i.main + main + 0x08006e84: f7fbf97e ..~. BL HAL_Init ; 0x8002184 + 0x08006e88: f7fdff66 ..f. BL SystemClock_Config ; 0x8004d58 + 0x08006e8c: f7fdfca4 .... BL MX_GPIO_Init ; 0x80047d8 + 0x08006e90: f7fdfc04 .... BL MX_DMA_Init ; 0x800469c + 0x08006e94: f7fdfd86 .... BL MX_USART1_UART_Init ; 0x80049a4 + 0x08006e98: f7fdfd32 ..2. BL MX_TIM4_Init ; 0x8004900 + 0x08006e9c: f7fdfbe2 .... BL MX_CAN1_Init ; 0x8004664 + 0x08006ea0: f7fdfd64 ..d. BL MX_UART5_Init ; 0x800496c + 0x08006ea4: f7fdfd9a .... BL MX_USART2_UART_Init ; 0x80049dc + 0x08006ea8: f7fdfb74 ..t. BL MX_ADC1_Init ; 0x8004594 + 0x08006eac: f7fdfdb2 .... BL MX_USART3_UART_Init ; 0x8004a14 + 0x08006eb0: f000f806 .... BL osKernelInitialize ; 0x8006ec0 + 0x08006eb4: f7fdfc3c ..<. BL MX_FREERTOS_Init ; 0x8004730 + 0x08006eb8: f000f822 ..". BL osKernelStart ; 0x8006f00 + 0x08006ebc: bf00 .. NOP + 0x08006ebe: e7fe .. B 0x8006ebe ; main + 58 + i.osKernelInitialize + osKernelInitialize + 0x08006ec0: b510 .. PUSH {r4,lr} + 0x08006ec2: f7fefc64 ..d. BL __get_IPSR ; 0x800578e + 0x08006ec6: b948 H. CBNZ r0,0x8006edc ; osKernelInitialize + 28 + 0x08006ec8: f7fefc64 ..d. BL __get_PRIMASK ; 0x8005794 + 0x08006ecc: b930 0. CBNZ r0,0x8006edc ; osKernelInitialize + 28 + 0x08006ece: 480b .H LDR r0,[pc,#44] ; [0x8006efc] = 0x200002a8 + 0x08006ed0: 6800 .h LDR r0,[r0,#0] + 0x08006ed2: 2802 .( CMP r0,#2 + 0x08006ed4: d105 .. BNE 0x8006ee2 ; osKernelInitialize + 34 + 0x08006ed6: f7fefc57 ..W. BL __get_BASEPRI ; 0x8005788 + 0x08006eda: b110 .. CBZ r0,0x8006ee2 ; osKernelInitialize + 34 + 0x08006edc: f06f0405 o... MVN r4,#5 + 0x08006ee0: e009 .. B 0x8006ef6 ; osKernelInitialize + 54 + 0x08006ee2: 4806 .H LDR r0,[pc,#24] ; [0x8006efc] = 0x200002a8 + 0x08006ee4: 6800 .h LDR r0,[r0,#0] + 0x08006ee6: b920 . CBNZ r0,0x8006ef2 ; osKernelInitialize + 50 + 0x08006ee8: 2001 . MOVS r0,#1 + 0x08006eea: 4904 .I LDR r1,[pc,#16] ; [0x8006efc] = 0x200002a8 + 0x08006eec: 6008 .` STR r0,[r1,#0] + 0x08006eee: 2400 .$ MOVS r4,#0 + 0x08006ef0: e001 .. B 0x8006ef6 ; osKernelInitialize + 54 + 0x08006ef2: f04f34ff O..4 MOV r4,#0xffffffff + 0x08006ef6: 4620 F MOV r0,r4 + 0x08006ef8: bd10 .. POP {r4,pc} + $d + 0x08006efa: 0000 .. DCW 0 + 0x08006efc: 200002a8 ... DCD 536871592 + $t + i.osKernelStart + osKernelStart + 0x08006f00: b510 .. PUSH {r4,lr} + 0x08006f02: f7fefc44 ..D. BL __get_IPSR ; 0x800578e + 0x08006f06: b948 H. CBNZ r0,0x8006f1c ; osKernelStart + 28 + 0x08006f08: f7fefc44 ..D. BL __get_PRIMASK ; 0x8005794 + 0x08006f0c: b930 0. CBNZ r0,0x8006f1c ; osKernelStart + 28 + 0x08006f0e: 480c .H LDR r0,[pc,#48] ; [0x8006f40] = 0x200002a8 + 0x08006f10: 6800 .h LDR r0,[r0,#0] + 0x08006f12: 2802 .( CMP r0,#2 + 0x08006f14: d105 .. BNE 0x8006f22 ; osKernelStart + 34 + 0x08006f16: f7fefc37 ..7. BL __get_BASEPRI ; 0x8005788 + 0x08006f1a: b110 .. CBZ r0,0x8006f22 ; osKernelStart + 34 + 0x08006f1c: f06f0405 o... MVN r4,#5 + 0x08006f20: e00c .. B 0x8006f3c ; osKernelStart + 60 + 0x08006f22: 4807 .H LDR r0,[pc,#28] ; [0x8006f40] = 0x200002a8 + 0x08006f24: 6800 .h LDR r0,[r0,#0] + 0x08006f26: 2801 .( CMP r0,#1 + 0x08006f28: d106 .. BNE 0x8006f38 ; osKernelStart + 56 + 0x08006f2a: 2002 . MOVS r0,#2 + 0x08006f2c: 4904 .I LDR r1,[pc,#16] ; [0x8006f40] = 0x200002a8 + 0x08006f2e: 6008 .` STR r0,[r1,#0] + 0x08006f30: f001fb66 ..f. BL vTaskStartScheduler ; 0x8008600 + 0x08006f34: 2400 .$ MOVS r4,#0 + 0x08006f36: e001 .. B 0x8006f3c ; osKernelStart + 60 + 0x08006f38: f04f34ff O..4 MOV r4,#0xffffffff + 0x08006f3c: 4620 F MOV r0,r4 + 0x08006f3e: bd10 .. POP {r4,pc} + $d + 0x08006f40: 200002a8 ... DCD 536871592 + $t + i.osThreadNew + osThreadNew + 0x08006f44: e92d47f0 -..G PUSH {r4-r10,lr} + 0x08006f48: b086 .. SUB sp,sp,#0x18 + 0x08006f4a: 4680 .F MOV r8,r0 + 0x08006f4c: 4689 .F MOV r9,r1 + 0x08006f4e: 4614 .F MOV r4,r2 + 0x08006f50: 2000 . MOVS r0,#0 + 0x08006f52: 9004 .. STR r0,[sp,#0x10] + 0x08006f54: f7fefc1b .... BL __get_IPSR ; 0x800578e + 0x08006f58: 2800 .( CMP r0,#0 + 0x08006f5a: d15d ]. BNE 0x8007018 ; osThreadNew + 212 + 0x08006f5c: f7fefc1a .... BL __get_PRIMASK ; 0x8005794 + 0x08006f60: 2800 .( CMP r0,#0 + 0x08006f62: d159 Y. BNE 0x8007018 ; osThreadNew + 212 + 0x08006f64: 482d -H LDR r0,[pc,#180] ; [0x800701c] = 0x200002a8 + 0x08006f66: 6800 .h LDR r0,[r0,#0] + 0x08006f68: 2802 .( CMP r0,#2 + 0x08006f6a: d103 .. BNE 0x8006f74 ; osThreadNew + 48 + 0x08006f6c: f7fefc0c .... BL __get_BASEPRI ; 0x8005788 + 0x08006f70: 2800 .( CMP r0,#0 + 0x08006f72: d151 Q. BNE 0x8007018 ; osThreadNew + 212 + 0x08006f74: f1b80f00 .... CMP r8,#0 + 0x08006f78: d04e N. BEQ 0x8007018 ; osThreadNew + 212 + 0x08006f7a: 2640 @& MOVS r6,#0x40 + 0x08006f7c: 2518 .% MOVS r5,#0x18 + 0x08006f7e: 2000 . MOVS r0,#0 + 0x08006f80: 9005 .. STR r0,[sp,#0x14] + 0x08006f82: f10d0a14 .... ADD r10,sp,#0x14 + 0x08006f86: 1e47 G. SUBS r7,r0,#1 + 0x08006f88: b344 D. CBZ r4,0x8006fdc ; osThreadNew + 152 + 0x08006f8a: 6820 h LDR r0,[r4,#0] + 0x08006f8c: b108 .. CBZ r0,0x8006f92 ; osThreadNew + 78 + 0x08006f8e: f8d4a000 .... LDR r10,[r4,#0] + 0x08006f92: 69a0 .i LDR r0,[r4,#0x18] + 0x08006f94: b100 .. CBZ r0,0x8006f98 ; osThreadNew + 84 + 0x08006f96: 69a5 .i LDR r5,[r4,#0x18] + 0x08006f98: b12d -. CBZ r5,0x8006fa6 ; osThreadNew + 98 + 0x08006f9a: 2d38 8- CMP r5,#0x38 + 0x08006f9c: d803 .. BHI 0x8006fa6 ; osThreadNew + 98 + 0x08006f9e: 7920 y LDRB r0,[r4,#4] + 0x08006fa0: f0000001 .... AND r0,r0,#1 + 0x08006fa4: b118 .. CBZ r0,0x8006fae ; osThreadNew + 106 + 0x08006fa6: 2000 . MOVS r0,#0 + 0x08006fa8: b006 .. ADD sp,sp,#0x18 + 0x08006faa: e8bd87f0 .... POP {r4-r10,pc} + 0x08006fae: 6960 `i LDR r0,[r4,#0x14] + 0x08006fb0: b108 .. CBZ r0,0x8006fb6 ; osThreadNew + 114 + 0x08006fb2: 6960 `i LDR r0,[r4,#0x14] + 0x08006fb4: 0886 .. LSRS r6,r0,#2 + 0x08006fb6: 68a0 .h LDR r0,[r4,#8] + 0x08006fb8: b140 @. CBZ r0,0x8006fcc ; osThreadNew + 136 + 0x08006fba: 68e0 .h LDR r0,[r4,#0xc] + 0x08006fbc: 285c \( CMP r0,#0x5c + 0x08006fbe: d305 .. BCC 0x8006fcc ; osThreadNew + 136 + 0x08006fc0: 6920 i LDR r0,[r4,#0x10] + 0x08006fc2: b118 .. CBZ r0,0x8006fcc ; osThreadNew + 136 + 0x08006fc4: 6960 `i LDR r0,[r4,#0x14] + 0x08006fc6: b108 .. CBZ r0,0x8006fcc ; osThreadNew + 136 + 0x08006fc8: 2701 .' MOVS r7,#1 + 0x08006fca: e008 .. B 0x8006fde ; osThreadNew + 154 + 0x08006fcc: 68a0 .h LDR r0,[r4,#8] + 0x08006fce: b930 0. CBNZ r0,0x8006fde ; osThreadNew + 154 + 0x08006fd0: 68e0 .h LDR r0,[r4,#0xc] + 0x08006fd2: b920 . CBNZ r0,0x8006fde ; osThreadNew + 154 + 0x08006fd4: 6920 i LDR r0,[r4,#0x10] + 0x08006fd6: b910 .. CBNZ r0,0x8006fde ; osThreadNew + 154 + 0x08006fd8: 2700 .' MOVS r7,#0 + 0x08006fda: e000 .. B 0x8006fde ; osThreadNew + 154 + 0x08006fdc: 2700 .' MOVS r7,#0 + 0x08006fde: 2f01 ./ CMP r7,#1 + 0x08006fe0: d10c .. BNE 0x8006ffc ; osThreadNew + 184 + 0x08006fe2: 6921 !i LDR r1,[r4,#0x10] + 0x08006fe4: 68a0 .h LDR r0,[r4,#8] + 0x08006fe6: 464b KF MOV r3,r9 + 0x08006fe8: 4632 2F MOV r2,r6 + 0x08006fea: e9cd5100 ...Q STRD r5,r1,[sp,#0] + 0x08006fee: 9002 .. STR r0,[sp,#8] + 0x08006ff0: 4651 QF MOV r1,r10 + 0x08006ff2: 4640 @F MOV r0,r8 + 0x08006ff4: f002fe0e .... BL xTaskCreateStatic ; 0x8009c14 + 0x08006ff8: 9004 .. STR r0,[sp,#0x10] + 0x08006ffa: e00d .. B 0x8007018 ; osThreadNew + 212 + 0x08006ffc: b967 g. CBNZ r7,0x8007018 ; osThreadNew + 212 + 0x08006ffe: a804 .. ADD r0,sp,#0x10 + 0x08007000: b2b2 .. UXTH r2,r6 + 0x08007002: 464b KF MOV r3,r9 + 0x08007004: 4651 QF MOV r1,r10 + 0x08007006: e9cd5000 ...P STRD r5,r0,[sp,#0] + 0x0800700a: 4640 @F MOV r0,r8 + 0x0800700c: f002fdd0 .... BL xTaskCreate ; 0x8009bb0 + 0x08007010: 2801 .( CMP r0,#1 + 0x08007012: d001 .. BEQ 0x8007018 ; osThreadNew + 212 + 0x08007014: 2000 . MOVS r0,#0 + 0x08007016: 9004 .. STR r0,[sp,#0x10] + 0x08007018: 9804 .. LDR r0,[sp,#0x10] + 0x0800701a: e7c5 .. B 0x8006fa8 ; osThreadNew + 100 + $d + 0x0800701c: 200002a8 ... DCD 536871592 + $t + i.prvAddCurrentTaskToDelayedList + prvAddCurrentTaskToDelayedList + 0x08007020: e92d41f0 -..A PUSH {r4-r8,lr} + 0x08007024: 4605 .F MOV r5,r0 + 0x08007026: 460e .F MOV r6,r1 + 0x08007028: 4816 .H LDR r0,[pc,#88] ; [0x8007084] = 0x2000026c + 0x0800702a: 6807 .h LDR r7,[r0,#0] + 0x0800702c: 4816 .H LDR r0,[pc,#88] ; [0x8007088] = 0x20000258 + 0x0800702e: 6800 .h LDR r0,[r0,#0] + 0x08007030: 1d00 .. ADDS r0,r0,#4 + 0x08007032: f000fe75 ..u. BL uxListRemove ; 0x8007d20 + 0x08007036: 1c68 h. ADDS r0,r5,#1 + 0x08007038: b938 8. CBNZ r0,0x800704a ; prvAddCurrentTaskToDelayedList + 42 + 0x0800703a: b136 6. CBZ r6,0x800704a ; prvAddCurrentTaskToDelayedList + 42 + 0x0800703c: 4812 .H LDR r0,[pc,#72] ; [0x8007088] = 0x20000258 + 0x0800703e: 6801 .h LDR r1,[r0,#0] + 0x08007040: 1d09 .. ADDS r1,r1,#4 + 0x08007042: 4812 .H LDR r0,[pc,#72] ; [0x800708c] = 0x20000ebc + 0x08007044: f000fed8 .... BL vListInsertEnd ; 0x8007df8 + 0x08007048: e01a .. B 0x8007080 ; prvAddCurrentTaskToDelayedList + 96 + 0x0800704a: 197c |. ADDS r4,r7,r5 + 0x0800704c: 480e .H LDR r0,[pc,#56] ; [0x8007088] = 0x20000258 + 0x0800704e: 6800 .h LDR r0,[r0,#0] + 0x08007050: 6044 D` STR r4,[r0,#4] + 0x08007052: 42bc .B CMP r4,r7 + 0x08007054: d207 .. BCS 0x8007066 ; prvAddCurrentTaskToDelayedList + 70 + 0x08007056: 480c .H LDR r0,[pc,#48] ; [0x8007088] = 0x20000258 + 0x08007058: 6801 .h LDR r1,[r0,#0] + 0x0800705a: 1d09 .. ADDS r1,r1,#4 + 0x0800705c: 480c .H LDR r0,[pc,#48] ; [0x8007090] = 0x20000260 + 0x0800705e: 6800 .h LDR r0,[r0,#0] + 0x08007060: f000feb0 .... BL vListInsert ; 0x8007dc4 + 0x08007064: e00c .. B 0x8007080 ; prvAddCurrentTaskToDelayedList + 96 + 0x08007066: 4808 .H LDR r0,[pc,#32] ; [0x8007088] = 0x20000258 + 0x08007068: 6801 .h LDR r1,[r0,#0] + 0x0800706a: 1d09 .. ADDS r1,r1,#4 + 0x0800706c: 4809 .H LDR r0,[pc,#36] ; [0x8007094] = 0x2000025c + 0x0800706e: 6800 .h LDR r0,[r0,#0] + 0x08007070: f000fea8 .... BL vListInsert ; 0x8007dc4 + 0x08007074: 4808 .H LDR r0,[pc,#32] ; [0x8007098] = 0x20000288 + 0x08007076: 6800 .h LDR r0,[r0,#0] + 0x08007078: 4284 .B CMP r4,r0 + 0x0800707a: d201 .. BCS 0x8007080 ; prvAddCurrentTaskToDelayedList + 96 + 0x0800707c: 4806 .H LDR r0,[pc,#24] ; [0x8007098] = 0x20000288 + 0x0800707e: 6004 .` STR r4,[r0,#0] + 0x08007080: e8bd81f0 .... POP {r4-r8,pc} + $d + 0x08007084: 2000026c l.. DCD 536871532 + 0x08007088: 20000258 X.. DCD 536871512 + 0x0800708c: 20000ebc ... DCD 536874684 + 0x08007090: 20000260 `.. DCD 536871520 + 0x08007094: 2000025c \.. DCD 536871516 + 0x08007098: 20000288 ... DCD 536871560 + $t + i.prvAddNewTaskToReadyList + prvAddNewTaskToReadyList + 0x0800709c: b510 .. PUSH {r4,lr} + 0x0800709e: 4604 .F MOV r4,r0 + 0x080070a0: f001f826 ..&. BL vPortEnterCritical ; 0x80080f0 + 0x080070a4: 4824 $H LDR r0,[pc,#144] ; [0x8007138] = 0x20000268 + 0x080070a6: 6800 .h LDR r0,[r0,#0] + 0x080070a8: 1c40 @. ADDS r0,r0,#1 + 0x080070aa: 4923 #I LDR r1,[pc,#140] ; [0x8007138] = 0x20000268 + 0x080070ac: 6008 .` STR r0,[r1,#0] + 0x080070ae: 4823 #H LDR r0,[pc,#140] ; [0x800713c] = 0x20000258 + 0x080070b0: 6800 .h LDR r0,[r0,#0] + 0x080070b2: b940 @. CBNZ r0,0x80070c6 ; prvAddNewTaskToReadyList + 42 + 0x080070b4: 4821 !H LDR r0,[pc,#132] ; [0x800713c] = 0x20000258 + 0x080070b6: 6004 .` STR r4,[r0,#0] + 0x080070b8: 4608 .F MOV r0,r1 + 0x080070ba: 6800 .h LDR r0,[r0,#0] + 0x080070bc: 2801 .( CMP r0,#1 + 0x080070be: d10d .. BNE 0x80070dc ; prvAddNewTaskToReadyList + 64 + 0x080070c0: f000fa36 ..6. BL prvInitialiseTaskLists ; 0x8007530 + 0x080070c4: e00a .. B 0x80070dc ; prvAddNewTaskToReadyList + 64 + 0x080070c6: 481e .H LDR r0,[pc,#120] ; [0x8007140] = 0x20000274 + 0x080070c8: 6800 .h LDR r0,[r0,#0] + 0x080070ca: b938 8. CBNZ r0,0x80070dc ; prvAddNewTaskToReadyList + 64 + 0x080070cc: 481b .H LDR r0,[pc,#108] ; [0x800713c] = 0x20000258 + 0x080070ce: 6800 .h LDR r0,[r0,#0] + 0x080070d0: 6ac0 .j LDR r0,[r0,#0x2c] + 0x080070d2: 6ae1 .j LDR r1,[r4,#0x2c] + 0x080070d4: 4288 .B CMP r0,r1 + 0x080070d6: d801 .. BHI 0x80070dc ; prvAddNewTaskToReadyList + 64 + 0x080070d8: 4818 .H LDR r0,[pc,#96] ; [0x800713c] = 0x20000258 + 0x080070da: 6004 .` STR r4,[r0,#0] + 0x080070dc: 4819 .H LDR r0,[pc,#100] ; [0x8007144] = 0x20000284 + 0x080070de: 6800 .h LDR r0,[r0,#0] + 0x080070e0: 1c40 @. ADDS r0,r0,#1 + 0x080070e2: 4918 .I LDR r1,[pc,#96] ; [0x8007144] = 0x20000284 + 0x080070e4: 6008 .` STR r0,[r1,#0] + 0x080070e6: 4608 .F MOV r0,r1 + 0x080070e8: 6800 .h LDR r0,[r0,#0] + 0x080070ea: 6460 `d STR r0,[r4,#0x44] + 0x080070ec: 4916 .I LDR r1,[pc,#88] ; [0x8007148] = 0x20000270 + 0x080070ee: 6ae0 .j LDR r0,[r4,#0x2c] + 0x080070f0: 6809 .h LDR r1,[r1,#0] + 0x080070f2: 4288 .B CMP r0,r1 + 0x080070f4: d902 .. BLS 0x80070fc ; prvAddNewTaskToReadyList + 96 + 0x080070f6: 4914 .I LDR r1,[pc,#80] ; [0x8007148] = 0x20000270 + 0x080070f8: 6ae0 .j LDR r0,[r4,#0x2c] + 0x080070fa: 6008 .` STR r0,[r1,#0] + 0x080070fc: 6ae1 .j LDR r1,[r4,#0x2c] + 0x080070fe: eb010181 .... ADD r1,r1,r1,LSL #2 + 0x08007102: 4a12 .J LDR r2,[pc,#72] ; [0x800714c] = 0x20000a0c + 0x08007104: eb020081 .... ADD r0,r2,r1,LSL #2 + 0x08007108: 1d21 !. ADDS r1,r4,#4 + 0x0800710a: f000fe75 ..u. BL vListInsertEnd ; 0x8007df8 + 0x0800710e: f001f819 .... BL vPortExitCritical ; 0x8008144 + 0x08007112: 480b .H LDR r0,[pc,#44] ; [0x8007140] = 0x20000274 + 0x08007114: 6800 .h LDR r0,[r0,#0] + 0x08007116: b168 h. CBZ r0,0x8007134 ; prvAddNewTaskToReadyList + 152 + 0x08007118: 4808 .H LDR r0,[pc,#32] ; [0x800713c] = 0x20000258 + 0x0800711a: 6800 .h LDR r0,[r0,#0] + 0x0800711c: 6ac0 .j LDR r0,[r0,#0x2c] + 0x0800711e: 6ae1 .j LDR r1,[r4,#0x2c] + 0x08007120: 4288 .B CMP r0,r1 + 0x08007122: d207 .. BCS 0x8007134 ; prvAddNewTaskToReadyList + 152 + 0x08007124: f04f5080 O..P MOV r0,#0x10000000 + 0x08007128: 4909 .I LDR r1,[pc,#36] ; [0x8007150] = 0xe000ed04 + 0x0800712a: 6008 .` STR r0,[r1,#0] + 0x0800712c: f3bf8f4f ..O. DSB + 0x08007130: f3bf8f6f ..o. ISB + 0x08007134: bd10 .. POP {r4,pc} + $d + 0x08007136: 0000 .. DCW 0 + 0x08007138: 20000268 h.. DCD 536871528 + 0x0800713c: 20000258 X.. DCD 536871512 + 0x08007140: 20000274 t.. DCD 536871540 + 0x08007144: 20000284 ... DCD 536871556 + 0x08007148: 20000270 p.. DCD 536871536 + 0x0800714c: 20000a0c ... DCD 536873484 + 0x08007150: e000ed04 .... DCD 3758157060 + $t + i.prvCheckForValidListAndQueue + prvCheckForValidListAndQueue + 0x08007154: b508 .. PUSH {r3,lr} + 0x08007156: f000ffcb .... BL vPortEnterCritical ; 0x80080f0 + 0x0800715a: 4812 .H LDR r0,[pc,#72] ; [0x80071a4] = 0x2000029c + 0x0800715c: 6800 .h LDR r0,[r0,#0] + 0x0800715e: b9e8 .. CBNZ r0,0x800719c ; prvCheckForValidListAndQueue + 72 + 0x08007160: 4811 .H LDR r0,[pc,#68] ; [0x80071a8] = 0x20000ed0 + 0x08007162: f000fe1f .... BL vListInitialise ; 0x8007da4 + 0x08007166: 4811 .H LDR r0,[pc,#68] ; [0x80071ac] = 0x20000ee4 + 0x08007168: f000fe1c .... BL vListInitialise ; 0x8007da4 + 0x0800716c: 480e .H LDR r0,[pc,#56] ; [0x80071a8] = 0x20000ed0 + 0x0800716e: 4910 .I LDR r1,[pc,#64] ; [0x80071b0] = 0x20000294 + 0x08007170: 6008 .` STR r0,[r1,#0] + 0x08007172: 480e .H LDR r0,[pc,#56] ; [0x80071ac] = 0x20000ee4 + 0x08007174: 490f .I LDR r1,[pc,#60] ; [0x80071b4] = 0x20000298 + 0x08007176: 6008 .` STR r0,[r1,#0] + 0x08007178: 2000 . MOVS r0,#0 + 0x0800717a: 4b0f .K LDR r3,[pc,#60] ; [0x80071b8] = 0x20000ef8 + 0x0800717c: 4a0f .J LDR r2,[pc,#60] ; [0x80071bc] = 0x20000f48 + 0x0800717e: 2110 .! MOVS r1,#0x10 + 0x08007180: 9000 .. STR r0,[sp,#0] + 0x08007182: 200a . MOVS r0,#0xa + 0x08007184: f002f8c2 .... BL xQueueGenericCreateStatic ; 0x800930c + 0x08007188: 4906 .I LDR r1,[pc,#24] ; [0x80071a4] = 0x2000029c + 0x0800718a: 6008 .` STR r0,[r1,#0] + 0x0800718c: 4608 .F MOV r0,r1 + 0x0800718e: 6800 .h LDR r0,[r0,#0] + 0x08007190: b120 . CBZ r0,0x800719c ; prvCheckForValidListAndQueue + 72 + 0x08007192: a10b .. ADR r1,{pc}+0x2e ; 0x80071c0 + 0x08007194: 4803 .H LDR r0,[pc,#12] ; [0x80071a4] = 0x2000029c + 0x08007196: 6800 .h LDR r0,[r0,#0] + 0x08007198: f001f88c .... BL vQueueAddToRegistry ; 0x80082b4 + 0x0800719c: f000ffd2 .... BL vPortExitCritical ; 0x8008144 + 0x080071a0: bd08 .. POP {r3,pc} + $d + 0x080071a2: 0000 .. DCW 0 + 0x080071a4: 2000029c ... DCD 536871580 + 0x080071a8: 20000ed0 ... DCD 536874704 + 0x080071ac: 20000ee4 ... DCD 536874724 + 0x080071b0: 20000294 ... DCD 536871572 + 0x080071b4: 20000298 ... DCD 536871576 + 0x080071b8: 20000ef8 ... DCD 536874744 + 0x080071bc: 20000f48 H.. DCD 536874824 + 0x080071c0: 51726d54 TmrQ DCD 1366453588 + 0x080071c4: 00000000 .... DCD 0 + $t + i.prvCheckTasksWaitingTermination + prvCheckTasksWaitingTermination + 0x080071c8: b510 .. PUSH {r4,lr} + 0x080071ca: e016 .. B 0x80071fa ; prvCheckTasksWaitingTermination + 50 + 0x080071cc: f000ff90 .... BL vPortEnterCritical ; 0x80080f0 + 0x080071d0: 480c .H LDR r0,[pc,#48] ; [0x8007204] = 0x20000ea8 + 0x080071d2: 68c0 .h LDR r0,[r0,#0xc] + 0x080071d4: 68c4 .h LDR r4,[r0,#0xc] + 0x080071d6: 1d20 . ADDS r0,r4,#4 + 0x080071d8: f000fda2 .... BL uxListRemove ; 0x8007d20 + 0x080071dc: 480a .H LDR r0,[pc,#40] ; [0x8007208] = 0x20000268 + 0x080071de: 6800 .h LDR r0,[r0,#0] + 0x080071e0: 1e40 @. SUBS r0,r0,#1 + 0x080071e2: 4909 .I LDR r1,[pc,#36] ; [0x8007208] = 0x20000268 + 0x080071e4: 6008 .` STR r0,[r1,#0] + 0x080071e6: 4809 .H LDR r0,[pc,#36] ; [0x800720c] = 0x20000264 + 0x080071e8: 6800 .h LDR r0,[r0,#0] + 0x080071ea: 1e40 @. SUBS r0,r0,#1 + 0x080071ec: 4907 .I LDR r1,[pc,#28] ; [0x800720c] = 0x20000264 + 0x080071ee: 6008 .` STR r0,[r1,#0] + 0x080071f0: f000ffa8 .... BL vPortExitCritical ; 0x8008144 + 0x080071f4: 4620 F MOV r0,r4 + 0x080071f6: f000f85e ..^. BL prvDeleteTCB ; 0x80072b6 + 0x080071fa: 4804 .H LDR r0,[pc,#16] ; [0x800720c] = 0x20000264 + 0x080071fc: 6800 .h LDR r0,[r0,#0] + 0x080071fe: 2800 .( CMP r0,#0 + 0x08007200: d1e4 .. BNE 0x80071cc ; prvCheckTasksWaitingTermination + 4 + 0x08007202: bd10 .. POP {r4,pc} + $d + 0x08007204: 20000ea8 ... DCD 536874664 + 0x08007208: 20000268 h.. DCD 536871528 + 0x0800720c: 20000264 d.. DCD 536871524 + $t + i.prvCopyDataFromQueue + prvCopyDataFromQueue + 0x08007210: b570 p. PUSH {r4-r6,lr} + 0x08007212: 4604 .F MOV r4,r0 + 0x08007214: 460d .F MOV r5,r1 + 0x08007216: 6c20 l LDR r0,[r4,#0x40] + 0x08007218: b170 p. CBZ r0,0x8007238 ; prvCopyDataFromQueue + 40 + 0x0800721a: 6c21 !l LDR r1,[r4,#0x40] + 0x0800721c: 68e0 .h LDR r0,[r4,#0xc] + 0x0800721e: 4408 .D ADD r0,r0,r1 + 0x08007220: 60e0 .` STR r0,[r4,#0xc] + 0x08007222: 6861 ah LDR r1,[r4,#4] + 0x08007224: 68e0 .h LDR r0,[r4,#0xc] + 0x08007226: 4288 .B CMP r0,r1 + 0x08007228: d301 .. BCC 0x800722e ; prvCopyDataFromQueue + 30 + 0x0800722a: 6820 h LDR r0,[r4,#0] + 0x0800722c: 60e0 .` STR r0,[r4,#0xc] + 0x0800722e: 4628 (F MOV r0,r5 + 0x08007230: 6c22 "l LDR r2,[r4,#0x40] + 0x08007232: 68e1 .h LDR r1,[r4,#0xc] + 0x08007234: f7f9f835 ..5. BL __aeabi_memcpy ; 0x80002a2 + 0x08007238: bd70 p. POP {r4-r6,pc} + i.prvCopyDataToQueue + prvCopyDataToQueue + 0x0800723a: e92d41f0 -..A PUSH {r4-r8,lr} + 0x0800723e: 4604 .F MOV r4,r0 + 0x08007240: 460f .F MOV r7,r1 + 0x08007242: 4615 .F MOV r5,r2 + 0x08007244: f04f0800 O... MOV r8,#0 + 0x08007248: 6ba6 .k LDR r6,[r4,#0x38] + 0x0800724a: 6c20 l LDR r0,[r4,#0x40] + 0x0800724c: b940 @. CBNZ r0,0x8007260 ; prvCopyDataToQueue + 38 + 0x0800724e: 6820 h LDR r0,[r4,#0] + 0x08007250: bb60 `. CBNZ r0,0x80072ac ; prvCopyDataToQueue + 114 + 0x08007252: 6860 `h LDR r0,[r4,#4] + 0x08007254: f002fdf2 .... BL xTaskPriorityDisinherit ; 0x8009e3c + 0x08007258: 4680 .F MOV r8,r0 + 0x0800725a: 2000 . MOVS r0,#0 + 0x0800725c: 6060 `` STR r0,[r4,#4] + 0x0800725e: e025 %. B 0x80072ac ; prvCopyDataToQueue + 114 + 0x08007260: b97d }. CBNZ r5,0x8007282 ; prvCopyDataToQueue + 72 + 0x08007262: 4639 9F MOV r1,r7 + 0x08007264: 6c22 "l LDR r2,[r4,#0x40] + 0x08007266: 68a0 .h LDR r0,[r4,#8] + 0x08007268: f7f9f81b .... BL __aeabi_memcpy ; 0x80002a2 + 0x0800726c: 6c21 !l LDR r1,[r4,#0x40] + 0x0800726e: 68a0 .h LDR r0,[r4,#8] + 0x08007270: 4408 .D ADD r0,r0,r1 + 0x08007272: 60a0 .` STR r0,[r4,#8] + 0x08007274: e9d41001 .... LDRD r1,r0,[r4,#4] + 0x08007278: 4288 .B CMP r0,r1 + 0x0800727a: d317 .. BCC 0x80072ac ; prvCopyDataToQueue + 114 + 0x0800727c: 6820 h LDR r0,[r4,#0] + 0x0800727e: 60a0 .` STR r0,[r4,#8] + 0x08007280: e014 .. B 0x80072ac ; prvCopyDataToQueue + 114 + 0x08007282: 4639 9F MOV r1,r7 + 0x08007284: 6c22 "l LDR r2,[r4,#0x40] + 0x08007286: 68e0 .h LDR r0,[r4,#0xc] + 0x08007288: f7f9f80b .... BL __aeabi_memcpy ; 0x80002a2 + 0x0800728c: 6c21 !l LDR r1,[r4,#0x40] + 0x0800728e: 68e0 .h LDR r0,[r4,#0xc] + 0x08007290: 1a40 @. SUBS r0,r0,r1 + 0x08007292: 60e0 .` STR r0,[r4,#0xc] + 0x08007294: 6821 !h LDR r1,[r4,#0] + 0x08007296: 68e0 .h LDR r0,[r4,#0xc] + 0x08007298: 4288 .B CMP r0,r1 + 0x0800729a: d203 .. BCS 0x80072a4 ; prvCopyDataToQueue + 106 + 0x0800729c: 6c21 !l LDR r1,[r4,#0x40] + 0x0800729e: 6860 `h LDR r0,[r4,#4] + 0x080072a0: 1a40 @. SUBS r0,r0,r1 + 0x080072a2: 60e0 .` STR r0,[r4,#0xc] + 0x080072a4: 2d02 .- CMP r5,#2 + 0x080072a6: d101 .. BNE 0x80072ac ; prvCopyDataToQueue + 114 + 0x080072a8: b106 .. CBZ r6,0x80072ac ; prvCopyDataToQueue + 114 + 0x080072aa: 1e76 v. SUBS r6,r6,#1 + 0x080072ac: 1c70 p. ADDS r0,r6,#1 + 0x080072ae: 63a0 .c STR r0,[r4,#0x38] + 0x080072b0: 4640 @F MOV r0,r8 + 0x080072b2: e8bd81f0 .... POP {r4-r8,pc} + i.prvDeleteTCB + prvDeleteTCB + 0x080072b6: b510 .. PUSH {r4,lr} + 0x080072b8: 4604 .F MOV r4,r0 + 0x080072ba: f8940059 ..Y. LDRB r0,[r4,#0x59] + 0x080072be: b930 0. CBNZ r0,0x80072ce ; prvDeleteTCB + 24 + 0x080072c0: 6b20 k LDR r0,[r4,#0x30] + 0x080072c2: f000ff5d ..]. BL vPortFree ; 0x8008180 + 0x080072c6: 4620 F MOV r0,r4 + 0x080072c8: f000ff5a ..Z. BL vPortFree ; 0x8008180 + 0x080072cc: e01a .. B 0x8007304 ; prvDeleteTCB + 78 + 0x080072ce: f8940059 ..Y. LDRB r0,[r4,#0x59] + 0x080072d2: 2801 .( CMP r0,#1 + 0x080072d4: d103 .. BNE 0x80072de ; prvDeleteTCB + 40 + 0x080072d6: 4620 F MOV r0,r4 + 0x080072d8: f000ff52 ..R. BL vPortFree ; 0x8008180 + 0x080072dc: e012 .. B 0x8007304 ; prvDeleteTCB + 78 + 0x080072de: f8940059 ..Y. LDRB r0,[r4,#0x59] + 0x080072e2: 2802 .( CMP r0,#2 + 0x080072e4: d101 .. BNE 0x80072ea ; prvDeleteTCB + 52 + 0x080072e6: 2001 . MOVS r0,#1 + 0x080072e8: e000 .. B 0x80072ec ; prvDeleteTCB + 54 + 0x080072ea: 2000 . MOVS r0,#0 + 0x080072ec: b950 P. CBNZ r0,0x8007304 ; prvDeleteTCB + 78 + 0x080072ee: bf00 .. NOP + 0x080072f0: 2050 P MOVS r0,#0x50 + 0x080072f2: f3808811 .... MSR BASEPRI,r0 + 0x080072f6: f3bf8f4f ..O. DSB + 0x080072fa: f3bf8f6f ..o. ISB + 0x080072fe: bf00 .. NOP + 0x08007300: bf00 .. NOP + 0x08007302: e7fe .. B 0x8007302 ; prvDeleteTCB + 76 + 0x08007304: bd10 .. POP {r4,pc} + i.prvGetDisinheritPriorityAfterTimeout + prvGetDisinheritPriorityAfterTimeout + 0x08007306: 4601 .F MOV r1,r0 + 0x08007308: 6a4a Jj LDR r2,[r1,#0x24] + 0x0800730a: b122 ". CBZ r2,0x8007316 ; prvGetDisinheritPriorityAfterTimeout + 16 + 0x0800730c: 6b0a .k LDR r2,[r1,#0x30] + 0x0800730e: 6812 .h LDR r2,[r2,#0] + 0x08007310: f1c20038 ..8. RSB r0,r2,#0x38 + 0x08007314: e000 .. B 0x8007318 ; prvGetDisinheritPriorityAfterTimeout + 18 + 0x08007316: 2000 . MOVS r0,#0 + 0x08007318: 4770 pG BX lr + 0x0800731a: 0000 .. MOVS r0,r0 + i.prvGetNextExpireTime + prvGetNextExpireTime + 0x0800731c: 4601 .F MOV r1,r0 + 0x0800731e: 4a08 .J LDR r2,[pc,#32] ; [0x8007340] = 0x20000294 + 0x08007320: 6812 .h LDR r2,[r2,#0] + 0x08007322: 6812 .h LDR r2,[r2,#0] + 0x08007324: b90a .. CBNZ r2,0x800732a ; prvGetNextExpireTime + 14 + 0x08007326: 2201 ." MOVS r2,#1 + 0x08007328: e000 .. B 0x800732c ; prvGetNextExpireTime + 16 + 0x0800732a: 2200 ." MOVS r2,#0 + 0x0800732c: 600a .` STR r2,[r1,#0] + 0x0800732e: 680a .h LDR r2,[r1,#0] + 0x08007330: b922 ". CBNZ r2,0x800733c ; prvGetNextExpireTime + 32 + 0x08007332: 4a03 .J LDR r2,[pc,#12] ; [0x8007340] = 0x20000294 + 0x08007334: 6812 .h LDR r2,[r2,#0] + 0x08007336: 68d2 .h LDR r2,[r2,#0xc] + 0x08007338: 6810 .h LDR r0,[r2,#0] + 0x0800733a: e000 .. B 0x800733e ; prvGetNextExpireTime + 34 + 0x0800733c: 2000 . MOVS r0,#0 + 0x0800733e: 4770 pG BX lr + $d + 0x08007340: 20000294 ... DCD 536871572 + $t + i.prvHeapInit + prvHeapInit + 0x08007344: b530 0. PUSH {r4,r5,lr} + 0x08007346: f44f5300 O..S MOV r3,#0x2000 + 0x0800734a: 4817 .H LDR r0,[pc,#92] ; [0x80073a8] = 0x200013a0 + 0x0800734c: f0000407 .... AND r4,r0,#7 + 0x08007350: b12c ,. CBZ r4,0x800735e ; prvHeapInit + 26 + 0x08007352: 1dc0 .. ADDS r0,r0,#7 + 0x08007354: f0200007 ... BIC r0,r0,#7 + 0x08007358: 4c13 .L LDR r4,[pc,#76] ; [0x80073a8] = 0x200013a0 + 0x0800735a: 1b04 .. SUBS r4,r0,r4 + 0x0800735c: 1b1b .. SUBS r3,r3,r4 + 0x0800735e: 4602 .F MOV r2,r0 + 0x08007360: 4c12 .L LDR r4,[pc,#72] ; [0x80073ac] = 0x200002ac + 0x08007362: 6022 "` STR r2,[r4,#0] + 0x08007364: 2400 .$ MOVS r4,#0 + 0x08007366: 4d11 .M LDR r5,[pc,#68] ; [0x80073ac] = 0x200002ac + 0x08007368: 606c l` STR r4,[r5,#4] + 0x0800736a: 18d0 .. ADDS r0,r2,r3 + 0x0800736c: 3808 .8 SUBS r0,r0,#8 + 0x0800736e: f0200007 ... BIC r0,r0,#7 + 0x08007372: 4c0f .L LDR r4,[pc,#60] ; [0x80073b0] = 0x200002b4 + 0x08007374: 6020 ` STR r0,[r4,#0] + 0x08007376: 2400 .$ MOVS r4,#0 + 0x08007378: 4d0d .M LDR r5,[pc,#52] ; [0x80073b0] = 0x200002b4 + 0x0800737a: 682d -h LDR r5,[r5,#0] + 0x0800737c: 606c l` STR r4,[r5,#4] + 0x0800737e: 4d0c .M LDR r5,[pc,#48] ; [0x80073b0] = 0x200002b4 + 0x08007380: 682d -h LDR r5,[r5,#0] + 0x08007382: 602c ,` STR r4,[r5,#0] + 0x08007384: 4611 .F MOV r1,r2 + 0x08007386: 1a44 D. SUBS r4,r0,r1 + 0x08007388: 604c L` STR r4,[r1,#4] + 0x0800738a: 4c09 .L LDR r4,[pc,#36] ; [0x80073b0] = 0x200002b4 + 0x0800738c: 6824 $h LDR r4,[r4,#0] + 0x0800738e: 600c .` STR r4,[r1,#0] + 0x08007390: 4d08 .M LDR r5,[pc,#32] ; [0x80073b4] = 0x200002bc + 0x08007392: 684c Lh LDR r4,[r1,#4] + 0x08007394: 602c ,` STR r4,[r5,#0] + 0x08007396: 4d08 .M LDR r5,[pc,#32] ; [0x80073b8] = 0x200002b8 + 0x08007398: 684c Lh LDR r4,[r1,#4] + 0x0800739a: 602c ,` STR r4,[r5,#0] + 0x0800739c: f04f4400 O..D MOV r4,#0x80000000 + 0x080073a0: 4d06 .M LDR r5,[pc,#24] ; [0x80073bc] = 0x200002c0 + 0x080073a2: 602c ,` STR r4,[r5,#0] + 0x080073a4: bd30 0. POP {r4,r5,pc} + $d + 0x080073a6: 0000 .. DCW 0 + 0x080073a8: 200013a0 ... DCD 536875936 + 0x080073ac: 200002ac ... DCD 536871596 + 0x080073b0: 200002b4 ... DCD 536871604 + 0x080073b4: 200002bc ... DCD 536871612 + 0x080073b8: 200002b8 ... DCD 536871608 + 0x080073bc: 200002c0 ... DCD 536871616 + $t + i.prvIdleTask + prvIdleTask + 0x080073c0: bf00 .. NOP + 0x080073c2: f7ffff01 .... BL prvCheckTasksWaitingTermination ; 0x80071c8 + 0x080073c6: 4806 .H LDR r0,[pc,#24] ; [0x80073e0] = 0x20000a0c + 0x080073c8: 6800 .h LDR r0,[r0,#0] + 0x080073ca: 2801 .( CMP r0,#1 + 0x080073cc: d9f9 .. BLS 0x80073c2 ; prvIdleTask + 2 + 0x080073ce: f04f5080 O..P MOV r0,#0x10000000 + 0x080073d2: 4904 .I LDR r1,[pc,#16] ; [0x80073e4] = 0xe000ed04 + 0x080073d4: 6008 .` STR r0,[r1,#0] + 0x080073d6: f3bf8f4f ..O. DSB + 0x080073da: f3bf8f6f ..o. ISB + 0x080073de: e7f0 .. B 0x80073c2 ; prvIdleTask + 2 + $d + 0x080073e0: 20000a0c ... DCD 536873484 + 0x080073e4: e000ed04 .... DCD 3758157060 + $t + i.prvInitialiseMutex + prvInitialiseMutex + 0x080073e8: b510 .. PUSH {r4,lr} + 0x080073ea: 4604 .F MOV r4,r0 + 0x080073ec: b14c L. CBZ r4,0x8007402 ; prvInitialiseMutex + 26 + 0x080073ee: 2000 . MOVS r0,#0 + 0x080073f0: 6060 `` STR r0,[r4,#4] + 0x080073f2: 6020 ` STR r0,[r4,#0] + 0x080073f4: 60e0 .` STR r0,[r4,#0xc] + 0x080073f6: 2300 .# MOVS r3,#0 + 0x080073f8: 461a .F MOV r2,r3 + 0x080073fa: 4619 .F MOV r1,r3 + 0x080073fc: 4620 F MOV r0,r4 + 0x080073fe: f002f841 ..A. BL xQueueGenericSend ; 0x8009484 + 0x08007402: bd10 .. POP {r4,pc} + i.prvInitialiseNewQueue + prvInitialiseNewQueue + 0x08007404: e92d41f0 -..A PUSH {r4-r8,lr} + 0x08007408: 4606 .F MOV r6,r0 + 0x0800740a: 460d .F MOV r5,r1 + 0x0800740c: 4617 .F MOV r7,r2 + 0x0800740e: 4698 .F MOV r8,r3 + 0x08007410: 9c06 .. LDR r4,[sp,#0x18] + 0x08007412: b90d .. CBNZ r5,0x8007418 ; prvInitialiseNewQueue + 20 + 0x08007414: 6024 $` STR r4,[r4,#0] + 0x08007416: e000 .. B 0x800741a ; prvInitialiseNewQueue + 22 + 0x08007418: 6027 '` STR r7,[r4,#0] + 0x0800741a: 63e6 .c STR r6,[r4,#0x3c] + 0x0800741c: 6425 %d STR r5,[r4,#0x40] + 0x0800741e: 2101 .! MOVS r1,#1 + 0x08007420: 4620 F MOV r0,r4 + 0x08007422: f001ffe3 .... BL xQueueGenericReset ; 0x80093ec + 0x08007426: f884804c ..L. STRB r8,[r4,#0x4c] + 0x0800742a: e8bd81f0 .... POP {r4-r8,pc} + i.prvInitialiseNewTask + prvInitialiseNewTask + 0x0800742e: e92d5ff0 -.._ PUSH {r4-r12,lr} + 0x08007432: 4682 .F MOV r10,r0 + 0x08007434: 460f .F MOV r7,r1 + 0x08007436: 4690 .F MOV r8,r2 + 0x08007438: 469b .F MOV r11,r3 + 0x0800743a: 9e0a .. LDR r6,[sp,#0x28] + 0x0800743c: 9c0c .. LDR r4,[sp,#0x30] + 0x0800743e: ea4f0188 O... LSL r1,r8,#2 + 0x08007442: 22a5 ." MOVS r2,#0xa5 + 0x08007444: 6b20 k LDR r0,[r4,#0x30] + 0x08007446: f7f8ff3e ..>. BL __aeabi_memset ; 0x80002c6 + 0x0800744a: f1a80001 .... SUB r0,r8,#1 + 0x0800744e: 6b21 !k LDR r1,[r4,#0x30] + 0x08007450: eb010980 .... ADD r9,r1,r0,LSL #2 + 0x08007454: f0290907 )... BIC r9,r9,#7 + 0x08007458: f0090007 .... AND r0,r9,#7 + 0x0800745c: b908 .. CBNZ r0,0x8007462 ; prvInitialiseNewTask + 52 + 0x0800745e: 2001 . MOVS r0,#1 + 0x08007460: e000 .. B 0x8007464 ; prvInitialiseNewTask + 54 + 0x08007462: 2000 . MOVS r0,#0 + 0x08007464: b950 P. CBNZ r0,0x800747c ; prvInitialiseNewTask + 78 + 0x08007466: bf00 .. NOP + 0x08007468: 2050 P MOVS r0,#0x50 + 0x0800746a: f3808811 .... MSR BASEPRI,r0 + 0x0800746e: f3bf8f4f ..O. DSB + 0x08007472: f3bf8f6f ..o. ISB + 0x08007476: bf00 .. NOP + 0x08007478: bf00 .. NOP + 0x0800747a: e7fe .. B 0x800747a ; prvInitialiseNewTask + 76 + 0x0800747c: 2500 .% MOVS r5,#0 + 0x0800747e: e007 .. B 0x8007490 ; prvInitialiseNewTask + 98 + 0x08007480: 5d79 y] LDRB r1,[r7,r5] + 0x08007482: f1040034 ..4. ADD r0,r4,#0x34 + 0x08007486: 5541 AU STRB r1,[r0,r5] + 0x08007488: 5d78 x] LDRB r0,[r7,r5] + 0x0800748a: b900 .. CBNZ r0,0x800748e ; prvInitialiseNewTask + 96 + 0x0800748c: e002 .. B 0x8007494 ; prvInitialiseNewTask + 102 + 0x0800748e: 1c6d m. ADDS r5,r5,#1 + 0x08007490: 2d10 .- CMP r5,#0x10 + 0x08007492: d3f5 .. BCC 0x8007480 ; prvInitialiseNewTask + 82 + 0x08007494: bf00 .. NOP + 0x08007496: 2100 .! MOVS r1,#0 + 0x08007498: 2043 C MOVS r0,#0x43 + 0x0800749a: 5501 .U STRB r1,[r0,r4] + 0x0800749c: 2e38 8. CMP r6,#0x38 + 0x0800749e: d300 .. BCC 0x80074a2 ; prvInitialiseNewTask + 116 + 0x080074a0: 2637 7& MOVS r6,#0x37 + 0x080074a2: 62e6 .b STR r6,[r4,#0x2c] + 0x080074a4: 64e6 .d STR r6,[r4,#0x4c] + 0x080074a6: 2000 . MOVS r0,#0 + 0x080074a8: 6520 e STR r0,[r4,#0x50] + 0x080074aa: 1d20 . ADDS r0,r4,#4 + 0x080074ac: f000fc87 .... BL vListInitialiseItem ; 0x8007dbe + 0x080074b0: f1040018 .... ADD r0,r4,#0x18 + 0x080074b4: f000fc83 .... BL vListInitialiseItem ; 0x8007dbe + 0x080074b8: 6124 $a STR r4,[r4,#0x10] + 0x080074ba: f1c60038 ..8. RSB r0,r6,#0x38 + 0x080074be: 61a0 .a STR r0,[r4,#0x18] + 0x080074c0: 6264 db STR r4,[r4,#0x24] + 0x080074c2: 2000 . MOVS r0,#0 + 0x080074c4: 6560 `e STR r0,[r4,#0x54] + 0x080074c6: f8840058 ..X. STRB r0,[r4,#0x58] + 0x080074ca: 465a ZF MOV r2,r11 + 0x080074cc: 4651 QF MOV r1,r10 + 0x080074ce: 4648 HF MOV r0,r9 + 0x080074d0: f000fbb0 .... BL pxPortInitialiseStack ; 0x8007c34 + 0x080074d4: 6020 ` STR r0,[r4,#0] + 0x080074d6: 980b .. LDR r0,[sp,#0x2c] + 0x080074d8: b108 .. CBZ r0,0x80074de ; prvInitialiseNewTask + 176 + 0x080074da: 980b .. LDR r0,[sp,#0x2c] + 0x080074dc: 6004 .` STR r4,[r0,#0] + 0x080074de: e8bd9ff0 .... POP {r4-r12,pc} + i.prvInitialiseNewTimer + prvInitialiseNewTimer + 0x080074e2: e92d47f0 -..G PUSH {r4-r10,lr} + 0x080074e6: 4606 .F MOV r6,r0 + 0x080074e8: 460d .F MOV r5,r1 + 0x080074ea: 4617 .F MOV r7,r2 + 0x080074ec: 4698 .F MOV r8,r3 + 0x080074ee: e9dd9408 .... LDRD r9,r4,[sp,#0x20] + 0x080074f2: b10d .. CBZ r5,0x80074f8 ; prvInitialiseNewTimer + 22 + 0x080074f4: 2001 . MOVS r0,#1 + 0x080074f6: e000 .. B 0x80074fa ; prvInitialiseNewTimer + 24 + 0x080074f8: 2000 . MOVS r0,#0 + 0x080074fa: b950 P. CBNZ r0,0x8007512 ; prvInitialiseNewTimer + 48 + 0x080074fc: bf00 .. NOP + 0x080074fe: 2050 P MOVS r0,#0x50 + 0x08007500: f3808811 .... MSR BASEPRI,r0 + 0x08007504: f3bf8f4f ..O. DSB + 0x08007508: f3bf8f6f ..o. ISB + 0x0800750c: bf00 .. NOP + 0x0800750e: bf00 .. NOP + 0x08007510: e7fe .. B 0x8007510 ; prvInitialiseNewTimer + 46 + 0x08007512: b15c \. CBZ r4,0x800752c ; prvInitialiseNewTimer + 74 + 0x08007514: f7fffe1e .... BL prvCheckForValidListAndQueue ; 0x8007154 + 0x08007518: 6026 &` STR r6,[r4,#0] + 0x0800751a: 61a5 .a STR r5,[r4,#0x18] + 0x0800751c: 61e7 .a STR r7,[r4,#0x1c] + 0x0800751e: f8c48020 .. . STR r8,[r4,#0x20] + 0x08007522: f8c49024 ..$. STR r9,[r4,#0x24] + 0x08007526: 1d20 . ADDS r0,r4,#4 + 0x08007528: f000fc49 ..I. BL vListInitialiseItem ; 0x8007dbe + 0x0800752c: e8bd87f0 .... POP {r4-r10,pc} + i.prvInitialiseTaskLists + prvInitialiseTaskLists + 0x08007530: b510 .. PUSH {r4,lr} + 0x08007532: 2400 .$ MOVS r4,#0 + 0x08007534: e007 .. B 0x8007546 ; prvInitialiseTaskLists + 22 + 0x08007536: eb040184 .... ADD r1,r4,r4,LSL #2 + 0x0800753a: 4a0f .J LDR r2,[pc,#60] ; [0x8007578] = 0x20000a0c + 0x0800753c: eb020081 .... ADD r0,r2,r1,LSL #2 + 0x08007540: f000fc30 ..0. BL vListInitialise ; 0x8007da4 + 0x08007544: 1c64 d. ADDS r4,r4,#1 + 0x08007546: 2c38 8, CMP r4,#0x38 + 0x08007548: d3f5 .. BCC 0x8007536 ; prvInitialiseTaskLists + 6 + 0x0800754a: 480c .H LDR r0,[pc,#48] ; [0x800757c] = 0x20000e6c + 0x0800754c: f000fc2a ..*. BL vListInitialise ; 0x8007da4 + 0x08007550: 480b .H LDR r0,[pc,#44] ; [0x8007580] = 0x20000e80 + 0x08007552: f000fc27 ..'. BL vListInitialise ; 0x8007da4 + 0x08007556: 480b .H LDR r0,[pc,#44] ; [0x8007584] = 0x20000e94 + 0x08007558: f000fc24 ..$. BL vListInitialise ; 0x8007da4 + 0x0800755c: 480a .H LDR r0,[pc,#40] ; [0x8007588] = 0x20000ea8 + 0x0800755e: f000fc21 ..!. BL vListInitialise ; 0x8007da4 + 0x08007562: 480a .H LDR r0,[pc,#40] ; [0x800758c] = 0x20000ebc + 0x08007564: f000fc1e .... BL vListInitialise ; 0x8007da4 + 0x08007568: 4804 .H LDR r0,[pc,#16] ; [0x800757c] = 0x20000e6c + 0x0800756a: 4909 .I LDR r1,[pc,#36] ; [0x8007590] = 0x2000025c + 0x0800756c: 6008 .` STR r0,[r1,#0] + 0x0800756e: 4804 .H LDR r0,[pc,#16] ; [0x8007580] = 0x20000e80 + 0x08007570: 4908 .I LDR r1,[pc,#32] ; [0x8007594] = 0x20000260 + 0x08007572: 6008 .` STR r0,[r1,#0] + 0x08007574: bd10 .. POP {r4,pc} + $d + 0x08007576: 0000 .. DCW 0 + 0x08007578: 20000a0c ... DCD 536873484 + 0x0800757c: 20000e6c l.. DCD 536874604 + 0x08007580: 20000e80 ... DCD 536874624 + 0x08007584: 20000e94 ... DCD 536874644 + 0x08007588: 20000ea8 ... DCD 536874664 + 0x0800758c: 20000ebc ... DCD 536874684 + 0x08007590: 2000025c \.. DCD 536871516 + 0x08007594: 20000260 `.. DCD 536871520 + $t + i.prvInsertBlockIntoFreeList + prvInsertBlockIntoFreeList + 0x08007598: b510 .. PUSH {r4,lr} + 0x0800759a: 4601 .F MOV r1,r0 + 0x0800759c: 4816 .H LDR r0,[pc,#88] ; [0x80075f8] = 0x200002ac + 0x0800759e: e000 .. B 0x80075a2 ; prvInsertBlockIntoFreeList + 10 + 0x080075a0: 6800 .h LDR r0,[r0,#0] + 0x080075a2: 6803 .h LDR r3,[r0,#0] + 0x080075a4: 428b .B CMP r3,r1 + 0x080075a6: d3fb .. BCC 0x80075a0 ; prvInsertBlockIntoFreeList + 8 + 0x080075a8: 4602 .F MOV r2,r0 + 0x080075aa: 6843 Ch LDR r3,[r0,#4] + 0x080075ac: 4413 .D ADD r3,r3,r2 + 0x080075ae: 428b .B CMP r3,r1 + 0x080075b0: d104 .. BNE 0x80075bc ; prvInsertBlockIntoFreeList + 36 + 0x080075b2: 6843 Ch LDR r3,[r0,#4] + 0x080075b4: 684c Lh LDR r4,[r1,#4] + 0x080075b6: 4423 #D ADD r3,r3,r4 + 0x080075b8: 6043 C` STR r3,[r0,#4] + 0x080075ba: 4601 .F MOV r1,r0 + 0x080075bc: 460a .F MOV r2,r1 + 0x080075be: 684b Kh LDR r3,[r1,#4] + 0x080075c0: 4413 .D ADD r3,r3,r2 + 0x080075c2: 6804 .h LDR r4,[r0,#0] + 0x080075c4: 42a3 .B CMP r3,r4 + 0x080075c6: d111 .. BNE 0x80075ec ; prvInsertBlockIntoFreeList + 84 + 0x080075c8: 4c0c .L LDR r4,[pc,#48] ; [0x80075fc] = 0x200002b4 + 0x080075ca: 6803 .h LDR r3,[r0,#0] + 0x080075cc: 6824 $h LDR r4,[r4,#0] + 0x080075ce: 42a3 .B CMP r3,r4 + 0x080075d0: d008 .. BEQ 0x80075e4 ; prvInsertBlockIntoFreeList + 76 + 0x080075d2: 684b Kh LDR r3,[r1,#4] + 0x080075d4: 6804 .h LDR r4,[r0,#0] + 0x080075d6: 6864 dh LDR r4,[r4,#4] + 0x080075d8: 4423 #D ADD r3,r3,r4 + 0x080075da: 604b K` STR r3,[r1,#4] + 0x080075dc: 6803 .h LDR r3,[r0,#0] + 0x080075de: 681b .h LDR r3,[r3,#0] + 0x080075e0: 600b .` STR r3,[r1,#0] + 0x080075e2: e005 .. B 0x80075f0 ; prvInsertBlockIntoFreeList + 88 + 0x080075e4: 4b05 .K LDR r3,[pc,#20] ; [0x80075fc] = 0x200002b4 + 0x080075e6: 681b .h LDR r3,[r3,#0] + 0x080075e8: 600b .` STR r3,[r1,#0] + 0x080075ea: e001 .. B 0x80075f0 ; prvInsertBlockIntoFreeList + 88 + 0x080075ec: 6803 .h LDR r3,[r0,#0] + 0x080075ee: 600b .` STR r3,[r1,#0] + 0x080075f0: 4288 .B CMP r0,r1 + 0x080075f2: d000 .. BEQ 0x80075f6 ; prvInsertBlockIntoFreeList + 94 + 0x080075f4: 6001 .` STR r1,[r0,#0] + 0x080075f6: bd10 .. POP {r4,pc} + $d + 0x080075f8: 200002ac ... DCD 536871596 + 0x080075fc: 200002b4 ... DCD 536871604 + $t + i.prvInsertTimerInActiveList + prvInsertTimerInActiveList + 0x08007600: e92d41f0 -..A PUSH {r4-r8,lr} + 0x08007604: 4604 .F MOV r4,r0 + 0x08007606: 460d .F MOV r5,r1 + 0x08007608: 4616 .F MOV r6,r2 + 0x0800760a: 461f .F MOV r7,r3 + 0x0800760c: f04f0800 O... MOV r8,#0 + 0x08007610: 6065 e` STR r5,[r4,#4] + 0x08007612: 6124 $a STR r4,[r4,#0x10] + 0x08007614: 42b5 .B CMP r5,r6 + 0x08007616: d80c .. BHI 0x8007632 ; prvInsertTimerInActiveList + 50 + 0x08007618: 1bf0 .. SUBS r0,r6,r7 + 0x0800761a: 69a1 .i LDR r1,[r4,#0x18] + 0x0800761c: 4288 .B CMP r0,r1 + 0x0800761e: d302 .. BCC 0x8007626 ; prvInsertTimerInActiveList + 38 + 0x08007620: f04f0801 O... MOV r8,#1 + 0x08007624: e011 .. B 0x800764a ; prvInsertTimerInActiveList + 74 + 0x08007626: 1d21 !. ADDS r1,r4,#4 + 0x08007628: 4809 .H LDR r0,[pc,#36] ; [0x8007650] = 0x20000298 + 0x0800762a: 6800 .h LDR r0,[r0,#0] + 0x0800762c: f000fbca .... BL vListInsert ; 0x8007dc4 + 0x08007630: e00b .. B 0x800764a ; prvInsertTimerInActiveList + 74 + 0x08007632: 42be .B CMP r6,r7 + 0x08007634: d204 .. BCS 0x8007640 ; prvInsertTimerInActiveList + 64 + 0x08007636: 42bd .B CMP r5,r7 + 0x08007638: d302 .. BCC 0x8007640 ; prvInsertTimerInActiveList + 64 + 0x0800763a: f04f0801 O... MOV r8,#1 + 0x0800763e: e004 .. B 0x800764a ; prvInsertTimerInActiveList + 74 + 0x08007640: 1d21 !. ADDS r1,r4,#4 + 0x08007642: 4804 .H LDR r0,[pc,#16] ; [0x8007654] = 0x20000294 + 0x08007644: 6800 .h LDR r0,[r0,#0] + 0x08007646: f000fbbd .... BL vListInsert ; 0x8007dc4 + 0x0800764a: 4640 @F MOV r0,r8 + 0x0800764c: e8bd81f0 .... POP {r4-r8,pc} + $d + 0x08007650: 20000298 ... DCD 536871576 + 0x08007654: 20000294 ... DCD 536871572 + $t + i.prvIsQueueEmpty + prvIsQueueEmpty + 0x08007658: b570 p. PUSH {r4-r6,lr} + 0x0800765a: 4605 .F MOV r5,r0 + 0x0800765c: f000fd48 ..H. BL vPortEnterCritical ; 0x80080f0 + 0x08007660: 6ba8 .k LDR r0,[r5,#0x38] + 0x08007662: b908 .. CBNZ r0,0x8007668 ; prvIsQueueEmpty + 16 + 0x08007664: 2401 .$ MOVS r4,#1 + 0x08007666: e000 .. B 0x800766a ; prvIsQueueEmpty + 18 + 0x08007668: 2400 .$ MOVS r4,#0 + 0x0800766a: f000fd6b ..k. BL vPortExitCritical ; 0x8008144 + 0x0800766e: 4620 F MOV r0,r4 + 0x08007670: bd70 p. POP {r4-r6,pc} + i.prvIsQueueFull + prvIsQueueFull + 0x08007672: b570 p. PUSH {r4-r6,lr} + 0x08007674: 4605 .F MOV r5,r0 + 0x08007676: f000fd3b ..;. BL vPortEnterCritical ; 0x80080f0 + 0x0800767a: 6ba8 .k LDR r0,[r5,#0x38] + 0x0800767c: 6be9 .k LDR r1,[r5,#0x3c] + 0x0800767e: 4288 .B CMP r0,r1 + 0x08007680: d101 .. BNE 0x8007686 ; prvIsQueueFull + 20 + 0x08007682: 2401 .$ MOVS r4,#1 + 0x08007684: e000 .. B 0x8007688 ; prvIsQueueFull + 22 + 0x08007686: 2400 .$ MOVS r4,#0 + 0x08007688: f000fd5c ..\. BL vPortExitCritical ; 0x8008144 + 0x0800768c: 4620 F MOV r0,r4 + 0x0800768e: bd70 p. POP {r4-r6,pc} + i.prvProcessExpiredTimer + prvProcessExpiredTimer + 0x08007690: b5f8 .. PUSH {r3-r7,lr} + 0x08007692: 4605 .F MOV r5,r0 + 0x08007694: 460f .F MOV r7,r1 + 0x08007696: 4816 .H LDR r0,[pc,#88] ; [0x80076f0] = 0x20000294 + 0x08007698: 6800 .h LDR r0,[r0,#0] + 0x0800769a: 68c0 .h LDR r0,[r0,#0xc] + 0x0800769c: 68c4 .h LDR r4,[r0,#0xc] + 0x0800769e: 1d20 . ADDS r0,r4,#4 + 0x080076a0: f000fb3e ..>. BL uxListRemove ; 0x8007d20 + 0x080076a4: 69e0 .i LDR r0,[r4,#0x1c] + 0x080076a6: 2801 .( CMP r0,#1 + 0x080076a8: d11d .. BNE 0x80076e6 ; prvProcessExpiredTimer + 86 + 0x080076aa: 69a0 .i LDR r0,[r4,#0x18] + 0x080076ac: 1941 A. ADDS r1,r0,r5 + 0x080076ae: 462b +F MOV r3,r5 + 0x080076b0: 463a :F MOV r2,r7 + 0x080076b2: 4620 F MOV r0,r4 + 0x080076b4: f7ffffa4 .... BL prvInsertTimerInActiveList ; 0x8007600 + 0x080076b8: b1a8 .. CBZ r0,0x80076e6 ; prvProcessExpiredTimer + 86 + 0x080076ba: 2000 . MOVS r0,#0 + 0x080076bc: 4603 .F MOV r3,r0 + 0x080076be: 462a *F MOV r2,r5 + 0x080076c0: 4601 .F MOV r1,r0 + 0x080076c2: 9000 .. STR r0,[sp,#0] + 0x080076c4: 4620 F MOV r0,r4 + 0x080076c6: f002fd83 .... BL xTimerGenericCommand ; 0x800a1d0 + 0x080076ca: 4606 .F MOV r6,r0 + 0x080076cc: b956 V. CBNZ r6,0x80076e4 ; prvProcessExpiredTimer + 84 + 0x080076ce: bf00 .. NOP + 0x080076d0: 2050 P MOVS r0,#0x50 + 0x080076d2: f3808811 .... MSR BASEPRI,r0 + 0x080076d6: f3bf8f4f ..O. DSB + 0x080076da: f3bf8f6f ..o. ISB + 0x080076de: bf00 .. NOP + 0x080076e0: bf00 .. NOP + 0x080076e2: e7fe .. B 0x80076e2 ; prvProcessExpiredTimer + 82 + 0x080076e4: bf00 .. NOP + 0x080076e6: 4620 F MOV r0,r4 + 0x080076e8: 6a61 aj LDR r1,[r4,#0x24] + 0x080076ea: 4788 .G BLX r1 + 0x080076ec: bdf8 .. POP {r3-r7,pc} + $d + 0x080076ee: 0000 .. DCW 0 + 0x080076f0: 20000294 ... DCD 536871572 + $t + i.prvProcessReceivedCommands + prvProcessReceivedCommands + 0x080076f4: b5f0 .. PUSH {r4-r7,lr} + 0x080076f6: b087 .. SUB sp,sp,#0x1c + 0x080076f8: e082 .. B 0x8007800 ; prvProcessReceivedCommands + 268 + 0x080076fa: 9803 .. LDR r0,[sp,#0xc] + 0x080076fc: 2800 .( CMP r0,#0 + 0x080076fe: da11 .. BGE 0x8007724 ; prvProcessReceivedCommands + 48 + 0x08007700: ae04 .. ADD r6,sp,#0x10 + 0x08007702: b956 V. CBNZ r6,0x800771a ; prvProcessReceivedCommands + 38 + 0x08007704: bf00 .. NOP + 0x08007706: 2050 P MOVS r0,#0x50 + 0x08007708: f3808811 .... MSR BASEPRI,r0 + 0x0800770c: f3bf8f4f ..O. DSB + 0x08007710: f3bf8f6f ..o. ISB + 0x08007714: bf00 .. NOP + 0x08007716: bf00 .. NOP + 0x08007718: e7fe .. B 0x8007718 ; prvProcessReceivedCommands + 36 + 0x0800771a: e9d62000 ... LDRD r2,r0,[r6,#0] + 0x0800771e: 68b1 .h LDR r1,[r6,#8] + 0x08007720: 4790 .G BLX r2 + 0x08007722: bf00 .. NOP + 0x08007724: 9803 .. LDR r0,[sp,#0xc] + 0x08007726: 2800 .( CMP r0,#0 + 0x08007728: db6a j. BLT 0x8007800 ; prvProcessReceivedCommands + 268 + 0x0800772a: 9c05 .. LDR r4,[sp,#0x14] + 0x0800772c: 6960 `i LDR r0,[r4,#0x14] + 0x0800772e: b908 .. CBNZ r0,0x8007734 ; prvProcessReceivedCommands + 64 + 0x08007730: 2001 . MOVS r0,#1 + 0x08007732: e000 .. B 0x8007736 ; prvProcessReceivedCommands + 66 + 0x08007734: 2000 . MOVS r0,#0 + 0x08007736: b910 .. CBNZ r0,0x800773e ; prvProcessReceivedCommands + 74 + 0x08007738: 1d20 . ADDS r0,r4,#4 + 0x0800773a: f000faf1 .... BL uxListRemove ; 0x8007d20 + 0x0800773e: a802 .. ADD r0,sp,#8 + 0x08007740: f000f8c0 .... BL prvSampleTimeNow ; 0x80078c4 + 0x08007744: 4605 .F MOV r5,r0 + 0x08007746: 9803 .. LDR r0,[sp,#0xc] + 0x08007748: 280a .( CMP r0,#0xa + 0x0800774a: d257 W. BCS 0x80077fc ; prvProcessReceivedCommands + 264 + 0x0800774c: e8dff000 .... TBB [pc,r0] + $d + 0x08007750: 31070509 ...1 DCD 822543625 + 0x08007754: 08064f33 3O.. DCD 134631219 + 0x08007758: 3432 24 DCW 13362 + $t + 0x0800775a: bf00 .. NOP + 0x0800775c: bf00 .. NOP + 0x0800775e: bf00 .. NOP + 0x08007760: bf00 .. NOP + 0x08007762: 9804 .. LDR r0,[sp,#0x10] + 0x08007764: 69a2 .i LDR r2,[r4,#0x18] + 0x08007766: 1881 .. ADDS r1,r0,r2 + 0x08007768: 4603 .F MOV r3,r0 + 0x0800776a: 462a *F MOV r2,r5 + 0x0800776c: 4620 F MOV r0,r4 + 0x0800776e: f7ffff47 ..G. BL prvInsertTimerInActiveList ; 0x8007600 + 0x08007772: b1e8 .. CBZ r0,0x80077b0 ; prvProcessReceivedCommands + 188 + 0x08007774: 4620 F MOV r0,r4 + 0x08007776: 6a61 aj LDR r1,[r4,#0x24] + 0x08007778: 4788 .G BLX r1 + 0x0800777a: 69e0 .i LDR r0,[r4,#0x1c] + 0x0800777c: 2801 .( CMP r0,#1 + 0x0800777e: d117 .. BNE 0x80077b0 ; prvProcessReceivedCommands + 188 + 0x08007780: 2000 . MOVS r0,#0 + 0x08007782: 9000 .. STR r0,[sp,#0] + 0x08007784: 9804 .. LDR r0,[sp,#0x10] + 0x08007786: 69a1 .i LDR r1,[r4,#0x18] + 0x08007788: 1842 B. ADDS r2,r0,r1 + 0x0800778a: 2300 .# MOVS r3,#0 + 0x0800778c: 4619 .F MOV r1,r3 + 0x0800778e: 4620 F MOV r0,r4 + 0x08007790: f002fd1e .... BL xTimerGenericCommand ; 0x800a1d0 + 0x08007794: 4607 .F MOV r7,r0 + 0x08007796: b957 W. CBNZ r7,0x80077ae ; prvProcessReceivedCommands + 186 + 0x08007798: bf00 .. NOP + 0x0800779a: 2050 P MOVS r0,#0x50 + 0x0800779c: f3808811 .... MSR BASEPRI,r0 + 0x080077a0: f3bf8f4f ..O. DSB + 0x080077a4: f3bf8f6f ..o. ISB + 0x080077a8: bf00 .. NOP + 0x080077aa: bf00 .. NOP + 0x080077ac: e7fe .. B 0x80077ac ; prvProcessReceivedCommands + 184 + 0x080077ae: bf00 .. NOP + 0x080077b0: e025 %. B 0x80077fe ; prvProcessReceivedCommands + 266 + 0x080077b2: bf00 .. NOP + 0x080077b4: e023 #. B 0x80077fe ; prvProcessReceivedCommands + 266 + 0x080077b6: bf00 .. NOP + 0x080077b8: 9804 .. LDR r0,[sp,#0x10] + 0x080077ba: 61a0 .a STR r0,[r4,#0x18] + 0x080077bc: 69a0 .i LDR r0,[r4,#0x18] + 0x080077be: b108 .. CBZ r0,0x80077c4 ; prvProcessReceivedCommands + 208 + 0x080077c0: 2001 . MOVS r0,#1 + 0x080077c2: e000 .. B 0x80077c6 ; prvProcessReceivedCommands + 210 + 0x080077c4: 2000 . MOVS r0,#0 + 0x080077c6: b950 P. CBNZ r0,0x80077de ; prvProcessReceivedCommands + 234 + 0x080077c8: bf00 .. NOP + 0x080077ca: 2050 P MOVS r0,#0x50 + 0x080077cc: f3808811 .... MSR BASEPRI,r0 + 0x080077d0: f3bf8f4f ..O. DSB + 0x080077d4: f3bf8f6f ..o. ISB + 0x080077d8: bf00 .. NOP + 0x080077da: bf00 .. NOP + 0x080077dc: e7fe .. B 0x80077dc ; prvProcessReceivedCommands + 232 + 0x080077de: 69a0 .i LDR r0,[r4,#0x18] + 0x080077e0: 1941 A. ADDS r1,r0,r5 + 0x080077e2: 462b +F MOV r3,r5 + 0x080077e4: 462a *F MOV r2,r5 + 0x080077e6: 4620 F MOV r0,r4 + 0x080077e8: f7ffff0a .... BL prvInsertTimerInActiveList ; 0x8007600 + 0x080077ec: e007 .. B 0x80077fe ; prvProcessReceivedCommands + 266 + 0x080077ee: f894002c ..,. LDRB r0,[r4,#0x2c] + 0x080077f2: b910 .. CBNZ r0,0x80077fa ; prvProcessReceivedCommands + 262 + 0x080077f4: 4620 F MOV r0,r4 + 0x080077f6: f000fcc3 .... BL vPortFree ; 0x8008180 + 0x080077fa: e000 .. B 0x80077fe ; prvProcessReceivedCommands + 266 + 0x080077fc: bf00 .. NOP + 0x080077fe: bf00 .. NOP + 0x08007800: 2200 ." MOVS r2,#0 + 0x08007802: a903 .. ADD r1,sp,#0xc + 0x08007804: 4804 .H LDR r0,[pc,#16] ; [0x8007818] = 0x2000029c + 0x08007806: 6800 .h LDR r0,[r0,#0] + 0x08007808: f001fffc .... BL xQueueReceive ; 0x8009804 + 0x0800780c: 2800 .( CMP r0,#0 + 0x0800780e: f47faf74 ..t. BNE 0x80076fa ; prvProcessReceivedCommands + 6 + 0x08007812: b007 .. ADD sp,sp,#0x1c + 0x08007814: bdf0 .. POP {r4-r7,pc} + $d + 0x08007816: 0000 .. DCW 0 + 0x08007818: 2000029c ... DCD 536871580 + $t + i.prvProcessTimerOrBlockTask + prvProcessTimerOrBlockTask + 0x0800781c: b5f8 .. PUSH {r3-r7,lr} + 0x0800781e: 4605 .F MOV r5,r0 + 0x08007820: 460c .F MOV r4,r1 + 0x08007822: f000ff49 ..I. BL vTaskSuspendAll ; 0x80086b8 + 0x08007826: 4668 hF MOV r0,sp + 0x08007828: f000f84c ..L. BL prvSampleTimeNow ; 0x80078c4 + 0x0800782c: 4606 .F MOV r6,r0 + 0x0800782e: 9800 .. LDR r0,[sp,#0] + 0x08007830: bb20 . CBNZ r0,0x800787c ; prvProcessTimerOrBlockTask + 96 + 0x08007832: b944 D. CBNZ r4,0x8007846 ; prvProcessTimerOrBlockTask + 42 + 0x08007834: 42b5 .B CMP r5,r6 + 0x08007836: d806 .. BHI 0x8007846 ; prvProcessTimerOrBlockTask + 42 + 0x08007838: f002fbf0 .... BL xTaskResumeAll ; 0x800a01c + 0x0800783c: 4631 1F MOV r1,r6 + 0x0800783e: 4628 (F MOV r0,r5 + 0x08007840: f7ffff26 ..&. BL prvProcessExpiredTimer ; 0x8007690 + 0x08007844: e01c .. B 0x8007880 ; prvProcessTimerOrBlockTask + 100 + 0x08007846: b13c <. CBZ r4,0x8007858 ; prvProcessTimerOrBlockTask + 60 + 0x08007848: 480e .H LDR r0,[pc,#56] ; [0x8007884] = 0x20000298 + 0x0800784a: 6800 .h LDR r0,[r0,#0] + 0x0800784c: 6800 .h LDR r0,[r0,#0] + 0x0800784e: b908 .. CBNZ r0,0x8007854 ; prvProcessTimerOrBlockTask + 56 + 0x08007850: 2001 . MOVS r0,#1 + 0x08007852: e000 .. B 0x8007856 ; prvProcessTimerOrBlockTask + 58 + 0x08007854: 2000 . MOVS r0,#0 + 0x08007856: 4604 .F MOV r4,r0 + 0x08007858: 1ba9 .. SUBS r1,r5,r6 + 0x0800785a: 4622 "F MOV r2,r4 + 0x0800785c: 480a .H LDR r0,[pc,#40] ; [0x8007888] = 0x2000029c + 0x0800785e: 6800 .h LDR r0,[r0,#0] + 0x08007860: f000fd3e ..>. BL vQueueWaitForMessageRestricted ; 0x80082e0 + 0x08007864: f002fbda .... BL xTaskResumeAll ; 0x800a01c + 0x08007868: b950 P. CBNZ r0,0x8007880 ; prvProcessTimerOrBlockTask + 100 + 0x0800786a: f04f5080 O..P MOV r0,#0x10000000 + 0x0800786e: 4907 .I LDR r1,[pc,#28] ; [0x800788c] = 0xe000ed04 + 0x08007870: 6008 .` STR r0,[r1,#0] + 0x08007872: f3bf8f4f ..O. DSB + 0x08007876: f3bf8f6f ..o. ISB + 0x0800787a: e001 .. B 0x8007880 ; prvProcessTimerOrBlockTask + 100 + 0x0800787c: f002fbce .... BL xTaskResumeAll ; 0x800a01c + 0x08007880: bdf8 .. POP {r3-r7,pc} + $d + 0x08007882: 0000 .. DCW 0 + 0x08007884: 20000298 ... DCD 536871576 + 0x08007888: 2000029c ... DCD 536871580 + 0x0800788c: e000ed04 .... DCD 3758157060 + $t + i.prvResetNextTaskUnblockTime + prvResetNextTaskUnblockTime + 0x08007890: 490a .I LDR r1,[pc,#40] ; [0x80078bc] = 0x2000025c + 0x08007892: 6809 .h LDR r1,[r1,#0] + 0x08007894: 6809 .h LDR r1,[r1,#0] + 0x08007896: b909 .. CBNZ r1,0x800789c ; prvResetNextTaskUnblockTime + 12 + 0x08007898: 2101 .! MOVS r1,#1 + 0x0800789a: e000 .. B 0x800789e ; prvResetNextTaskUnblockTime + 14 + 0x0800789c: 2100 .! MOVS r1,#0 + 0x0800789e: b121 !. CBZ r1,0x80078aa ; prvResetNextTaskUnblockTime + 26 + 0x080078a0: f04f31ff O..1 MOV r1,#0xffffffff + 0x080078a4: 4a06 .J LDR r2,[pc,#24] ; [0x80078c0] = 0x20000288 + 0x080078a6: 6011 .` STR r1,[r2,#0] + 0x080078a8: e006 .. B 0x80078b8 ; prvResetNextTaskUnblockTime + 40 + 0x080078aa: 4904 .I LDR r1,[pc,#16] ; [0x80078bc] = 0x2000025c + 0x080078ac: 6809 .h LDR r1,[r1,#0] + 0x080078ae: 68c9 .h LDR r1,[r1,#0xc] + 0x080078b0: 68c8 .h LDR r0,[r1,#0xc] + 0x080078b2: 4a03 .J LDR r2,[pc,#12] ; [0x80078c0] = 0x20000288 + 0x080078b4: 6841 Ah LDR r1,[r0,#4] + 0x080078b6: 6011 .` STR r1,[r2,#0] + 0x080078b8: 4770 pG BX lr + $d + 0x080078ba: 0000 .. DCW 0 + 0x080078bc: 2000025c \.. DCD 536871516 + 0x080078c0: 20000288 ... DCD 536871560 + $t + i.prvSampleTimeNow + prvSampleTimeNow + 0x080078c4: b570 p. PUSH {r4-r6,lr} + 0x080078c6: 4604 .F MOV r4,r0 + 0x080078c8: f002fa10 .... BL xTaskGetTickCount ; 0x8009cec + 0x080078cc: 4605 .F MOV r5,r0 + 0x080078ce: 4807 .H LDR r0,[pc,#28] ; [0x80078ec] = 0x200002a4 + 0x080078d0: 6800 .h LDR r0,[r0,#0] + 0x080078d2: 4285 .B CMP r5,r0 + 0x080078d4: d204 .. BCS 0x80078e0 ; prvSampleTimeNow + 28 + 0x080078d6: f000f80b .... BL prvSwitchTimerLists ; 0x80078f0 + 0x080078da: 2001 . MOVS r0,#1 + 0x080078dc: 6020 ` STR r0,[r4,#0] + 0x080078de: e001 .. B 0x80078e4 ; prvSampleTimeNow + 32 + 0x080078e0: 2000 . MOVS r0,#0 + 0x080078e2: 6020 ` STR r0,[r4,#0] + 0x080078e4: 4801 .H LDR r0,[pc,#4] ; [0x80078ec] = 0x200002a4 + 0x080078e6: 6005 .` STR r5,[r0,#0] + 0x080078e8: 4628 (F MOV r0,r5 + 0x080078ea: bd70 p. POP {r4-r6,pc} + $d + 0x080078ec: 200002a4 ... DCD 536871588 + $t + i.prvSwitchTimerLists + prvSwitchTimerLists + 0x080078f0: e92d43f8 -..C PUSH {r3-r9,lr} + 0x080078f4: e032 2. B 0x800795c ; prvSwitchTimerLists + 108 + 0x080078f6: 4824 $H LDR r0,[pc,#144] ; [0x8007988] = 0x20000294 + 0x080078f8: 6800 .h LDR r0,[r0,#0] + 0x080078fa: 68c0 .h LDR r0,[r0,#0xc] + 0x080078fc: 6805 .h LDR r5,[r0,#0] + 0x080078fe: 4822 "H LDR r0,[pc,#136] ; [0x8007988] = 0x20000294 + 0x08007900: 6800 .h LDR r0,[r0,#0] + 0x08007902: 68c0 .h LDR r0,[r0,#0xc] + 0x08007904: 68c4 .h LDR r4,[r0,#0xc] + 0x08007906: 1d20 . ADDS r0,r4,#4 + 0x08007908: f000fa0a .... BL uxListRemove ; 0x8007d20 + 0x0800790c: 4620 F MOV r0,r4 + 0x0800790e: 6a61 aj LDR r1,[r4,#0x24] + 0x08007910: 4788 .G BLX r1 + 0x08007912: 69e0 .i LDR r0,[r4,#0x1c] + 0x08007914: 2801 .( CMP r0,#1 + 0x08007916: d121 !. BNE 0x800795c ; prvSwitchTimerLists + 108 + 0x08007918: 69a0 .i LDR r0,[r4,#0x18] + 0x0800791a: 1946 F. ADDS r6,r0,r5 + 0x0800791c: 42ae .B CMP r6,r5 + 0x0800791e: d907 .. BLS 0x8007930 ; prvSwitchTimerLists + 64 + 0x08007920: 6066 f` STR r6,[r4,#4] + 0x08007922: 6124 $a STR r4,[r4,#0x10] + 0x08007924: 1d21 !. ADDS r1,r4,#4 + 0x08007926: 4818 .H LDR r0,[pc,#96] ; [0x8007988] = 0x20000294 + 0x08007928: 6800 .h LDR r0,[r0,#0] + 0x0800792a: f000fa4b ..K. BL vListInsert ; 0x8007dc4 + 0x0800792e: e015 .. B 0x800795c ; prvSwitchTimerLists + 108 + 0x08007930: 2000 . MOVS r0,#0 + 0x08007932: 4603 .F MOV r3,r0 + 0x08007934: 462a *F MOV r2,r5 + 0x08007936: 4601 .F MOV r1,r0 + 0x08007938: 9000 .. STR r0,[sp,#0] + 0x0800793a: 4620 F MOV r0,r4 + 0x0800793c: f002fc48 ..H. BL xTimerGenericCommand ; 0x800a1d0 + 0x08007940: 4607 .F MOV r7,r0 + 0x08007942: b957 W. CBNZ r7,0x800795a ; prvSwitchTimerLists + 106 + 0x08007944: bf00 .. NOP + 0x08007946: 2050 P MOVS r0,#0x50 + 0x08007948: f3808811 .... MSR BASEPRI,r0 + 0x0800794c: f3bf8f4f ..O. DSB + 0x08007950: f3bf8f6f ..o. ISB + 0x08007954: bf00 .. NOP + 0x08007956: bf00 .. NOP + 0x08007958: e7fe .. B 0x8007958 ; prvSwitchTimerLists + 104 + 0x0800795a: bf00 .. NOP + 0x0800795c: 480a .H LDR r0,[pc,#40] ; [0x8007988] = 0x20000294 + 0x0800795e: 6800 .h LDR r0,[r0,#0] + 0x08007960: 6800 .h LDR r0,[r0,#0] + 0x08007962: b908 .. CBNZ r0,0x8007968 ; prvSwitchTimerLists + 120 + 0x08007964: 2001 . MOVS r0,#1 + 0x08007966: e000 .. B 0x800796a ; prvSwitchTimerLists + 122 + 0x08007968: 2000 . MOVS r0,#0 + 0x0800796a: 2800 .( CMP r0,#0 + 0x0800796c: d0c3 .. BEQ 0x80078f6 ; prvSwitchTimerLists + 6 + 0x0800796e: 4806 .H LDR r0,[pc,#24] ; [0x8007988] = 0x20000294 + 0x08007970: f8d08000 .... LDR r8,[r0,#0] + 0x08007974: 4805 .H LDR r0,[pc,#20] ; [0x800798c] = 0x20000298 + 0x08007976: 6800 .h LDR r0,[r0,#0] + 0x08007978: 4903 .I LDR r1,[pc,#12] ; [0x8007988] = 0x20000294 + 0x0800797a: 6008 .` STR r0,[r1,#0] + 0x0800797c: 4803 .H LDR r0,[pc,#12] ; [0x800798c] = 0x20000298 + 0x0800797e: f8c08000 .... STR r8,[r0,#0] + 0x08007982: e8bd83f8 .... POP {r3-r9,pc} + $d + 0x08007986: 0000 .. DCW 0 + 0x08007988: 20000294 ... DCD 536871572 + 0x0800798c: 20000298 ... DCD 536871576 + $t + i.prvTaskExitError + prvTaskExitError + 0x08007990: 480e .H LDR r0,[pc,#56] ; [0x80079cc] = 0x200002c4 + 0x08007992: 6800 .h LDR r0,[r0,#0] + 0x08007994: 1c40 @. ADDS r0,r0,#1 + 0x08007996: b908 .. CBNZ r0,0x800799c ; prvTaskExitError + 12 + 0x08007998: 2001 . MOVS r0,#1 + 0x0800799a: e000 .. B 0x800799e ; prvTaskExitError + 14 + 0x0800799c: 2000 . MOVS r0,#0 + 0x0800799e: b950 P. CBNZ r0,0x80079b6 ; prvTaskExitError + 38 + 0x080079a0: bf00 .. NOP + 0x080079a2: 2050 P MOVS r0,#0x50 + 0x080079a4: f3808811 .... MSR BASEPRI,r0 + 0x080079a8: f3bf8f4f ..O. DSB + 0x080079ac: f3bf8f6f ..o. ISB + 0x080079b0: bf00 .. NOP + 0x080079b2: bf00 .. NOP + 0x080079b4: e7fe .. B 0x80079b4 ; prvTaskExitError + 36 + 0x080079b6: bf00 .. NOP + 0x080079b8: 2050 P MOVS r0,#0x50 + 0x080079ba: f3808811 .... MSR BASEPRI,r0 + 0x080079be: f3bf8f4f ..O. DSB + 0x080079c2: f3bf8f6f ..o. ISB + 0x080079c6: bf00 .. NOP + 0x080079c8: bf00 .. NOP + 0x080079ca: e7fe .. B 0x80079ca ; prvTaskExitError + 58 + $d + 0x080079cc: 200002c4 ... DCD 536871620 + $t + i.prvTestWaitCondition + prvTestWaitCondition + 0x080079d0: b510 .. PUSH {r4,lr} + 0x080079d2: 4603 .F MOV r3,r0 + 0x080079d4: 2000 . MOVS r0,#0 + 0x080079d6: b922 ". CBNZ r2,0x80079e2 ; prvTestWaitCondition + 18 + 0x080079d8: ea030401 .... AND r4,r3,r1 + 0x080079dc: b134 4. CBZ r4,0x80079ec ; prvTestWaitCondition + 28 + 0x080079de: 2001 . MOVS r0,#1 + 0x080079e0: e004 .. B 0x80079ec ; prvTestWaitCondition + 28 + 0x080079e2: ea030401 .... AND r4,r3,r1 + 0x080079e6: 428c .B CMP r4,r1 + 0x080079e8: d100 .. BNE 0x80079ec ; prvTestWaitCondition + 28 + 0x080079ea: 2001 . MOVS r0,#1 + 0x080079ec: bd10 .. POP {r4,pc} + i.prvTimerTask + prvTimerTask + 0x080079ee: b508 .. PUSH {r3,lr} + 0x080079f0: bf00 .. NOP + 0x080079f2: 4668 hF MOV r0,sp + 0x080079f4: f7fffc92 .... BL prvGetNextExpireTime ; 0x800731c + 0x080079f8: 4604 .F MOV r4,r0 + 0x080079fa: 4620 F MOV r0,r4 + 0x080079fc: 9900 .. LDR r1,[sp,#0] + 0x080079fe: f7ffff0d .... BL prvProcessTimerOrBlockTask ; 0x800781c + 0x08007a02: f7fffe77 ..w. BL prvProcessReceivedCommands ; 0x80076f4 + 0x08007a06: e7f4 .. B 0x80079f2 ; prvTimerTask + 4 + i.prvUnlockQueue + prvUnlockQueue + 0x08007a08: b570 p. PUSH {r4-r6,lr} + 0x08007a0a: 4604 .F MOV r4,r0 + 0x08007a0c: f000fb70 ..p. BL vPortEnterCritical ; 0x80080f0 + 0x08007a10: f9945045 ..EP LDRSB r5,[r4,#0x45] + 0x08007a14: e010 .. B 0x8007a38 ; prvUnlockQueue + 48 + 0x08007a16: 6a60 `j LDR r0,[r4,#0x24] + 0x08007a18: b908 .. CBNZ r0,0x8007a1e ; prvUnlockQueue + 22 + 0x08007a1a: 2001 . MOVS r0,#1 + 0x08007a1c: e000 .. B 0x8007a20 ; prvUnlockQueue + 24 + 0x08007a1e: 2000 . MOVS r0,#0 + 0x08007a20: b938 8. CBNZ r0,0x8007a32 ; prvUnlockQueue + 42 + 0x08007a22: f1040024 ..$. ADD r0,r4,#0x24 + 0x08007a26: f002faad .... BL xTaskRemoveFromEventList ; 0x8009f84 + 0x08007a2a: b118 .. CBZ r0,0x8007a34 ; prvUnlockQueue + 44 + 0x08007a2c: f000fcb8 .... BL vTaskMissedYield ; 0x80083a0 + 0x08007a30: e000 .. B 0x8007a34 ; prvUnlockQueue + 44 + 0x08007a32: e003 .. B 0x8007a3c ; prvUnlockQueue + 52 + 0x08007a34: 1e68 h. SUBS r0,r5,#1 + 0x08007a36: b245 E. SXTB r5,r0 + 0x08007a38: 2d00 .- CMP r5,#0 + 0x08007a3a: dcec .. BGT 0x8007a16 ; prvUnlockQueue + 14 + 0x08007a3c: bf00 .. NOP + 0x08007a3e: 20ff . MOVS r0,#0xff + 0x08007a40: f8840045 ..E. STRB r0,[r4,#0x45] + 0x08007a44: f000fb7e ..~. BL vPortExitCritical ; 0x8008144 + 0x08007a48: f000fb52 ..R. BL vPortEnterCritical ; 0x80080f0 + 0x08007a4c: f9945044 ..DP LDRSB r5,[r4,#0x44] + 0x08007a50: e010 .. B 0x8007a74 ; prvUnlockQueue + 108 + 0x08007a52: 6920 i LDR r0,[r4,#0x10] + 0x08007a54: b908 .. CBNZ r0,0x8007a5a ; prvUnlockQueue + 82 + 0x08007a56: 2001 . MOVS r0,#1 + 0x08007a58: e000 .. B 0x8007a5c ; prvUnlockQueue + 84 + 0x08007a5a: 2000 . MOVS r0,#0 + 0x08007a5c: b948 H. CBNZ r0,0x8007a72 ; prvUnlockQueue + 106 + 0x08007a5e: f1040010 .... ADD r0,r4,#0x10 + 0x08007a62: f002fa8f .... BL xTaskRemoveFromEventList ; 0x8009f84 + 0x08007a66: b108 .. CBZ r0,0x8007a6c ; prvUnlockQueue + 100 + 0x08007a68: f000fc9a .... BL vTaskMissedYield ; 0x80083a0 + 0x08007a6c: 1e68 h. SUBS r0,r5,#1 + 0x08007a6e: b245 E. SXTB r5,r0 + 0x08007a70: e000 .. B 0x8007a74 ; prvUnlockQueue + 108 + 0x08007a72: e001 .. B 0x8007a78 ; prvUnlockQueue + 112 + 0x08007a74: 2d00 .- CMP r5,#0 + 0x08007a76: dcec .. BGT 0x8007a52 ; prvUnlockQueue + 74 + 0x08007a78: bf00 .. NOP + 0x08007a7a: 20ff . MOVS r0,#0xff + 0x08007a7c: f8840044 ..D. STRB r0,[r4,#0x44] + 0x08007a80: f000fb60 ..`. BL vPortExitCritical ; 0x8008144 + 0x08007a84: bd70 p. POP {r4-r6,pc} + i.prveMBError2Exception + prveMBError2Exception + 0x08007a86: 4601 .F MOV r1,r0 + 0x08007a88: b121 !. CBZ r1,0x8007a94 ; prveMBError2Exception + 14 + 0x08007a8a: 2901 .) CMP r1,#1 + 0x08007a8c: d004 .. BEQ 0x8007a98 ; prveMBError2Exception + 18 + 0x08007a8e: 2907 .) CMP r1,#7 + 0x08007a90: d106 .. BNE 0x8007aa0 ; prveMBError2Exception + 26 + 0x08007a92: e003 .. B 0x8007a9c ; prveMBError2Exception + 22 + 0x08007a94: 2000 . MOVS r0,#0 + 0x08007a96: e005 .. B 0x8007aa4 ; prveMBError2Exception + 30 + 0x08007a98: 2002 . MOVS r0,#2 + 0x08007a9a: e003 .. B 0x8007aa4 ; prveMBError2Exception + 30 + 0x08007a9c: 2006 . MOVS r0,#6 + 0x08007a9e: e001 .. B 0x8007aa4 ; prveMBError2Exception + 30 + 0x08007aa0: 2004 . MOVS r0,#4 + 0x08007aa2: bf00 .. NOP + 0x08007aa4: bf00 .. NOP + 0x08007aa6: 4770 pG BX lr + i.prvvTIMERExpiredISR + prvvTIMERExpiredISR + 0x08007aa8: b510 .. PUSH {r4,lr} + 0x08007aaa: 4802 .H LDR r0,[pc,#8] ; [0x8007ab4] = 0x20000338 + 0x08007aac: 6800 .h LDR r0,[r0,#0] + 0x08007aae: 4780 .G BLX r0 + 0x08007ab0: bd10 .. POP {r4,pc} + $d + 0x08007ab2: 0000 .. DCW 0 + 0x08007ab4: 20000338 8.. DCD 536871736 + $t + i.prvvUARTRxISR + prvvUARTRxISR + 0x08007ab8: b510 .. PUSH {r4,lr} + 0x08007aba: 4802 .H LDR r0,[pc,#8] ; [0x8007ac4] = 0x20000330 + 0x08007abc: 6800 .h LDR r0,[r0,#0] + 0x08007abe: 4780 .G BLX r0 + 0x08007ac0: bd10 .. POP {r4,pc} + $d + 0x08007ac2: 0000 .. DCW 0 + 0x08007ac4: 20000330 0.. DCD 536871728 + $t + i.prvvUARTTxReadyISR + prvvUARTTxReadyISR + 0x08007ac8: b510 .. PUSH {r4,lr} + 0x08007aca: 4802 .H LDR r0,[pc,#8] ; [0x8007ad4] = 0x20000334 + 0x08007acc: 6800 .h LDR r0,[r0,#0] + 0x08007ace: 4780 .G BLX r0 + 0x08007ad0: bd10 .. POP {r4,pc} + $d + 0x08007ad2: 0000 .. DCW 0 + 0x08007ad4: 20000334 4.. DCD 536871732 + $t + i.pvPortMalloc + pvPortMalloc + 0x08007ad8: e92d41f0 -..A PUSH {r4-r8,lr} + 0x08007adc: 4604 .F MOV r4,r0 + 0x08007ade: f04f0800 O... MOV r8,#0 + 0x08007ae2: f000fde9 .... BL vTaskSuspendAll ; 0x80086b8 + 0x08007ae6: 4846 FH LDR r0,[pc,#280] ; [0x8007c00] = 0x200002b4 + 0x08007ae8: 6800 .h LDR r0,[r0,#0] + 0x08007aea: b908 .. CBNZ r0,0x8007af0 ; pvPortMalloc + 24 + 0x08007aec: f7fffc2a ..*. BL prvHeapInit ; 0x8007344 + 0x08007af0: 4844 DH LDR r0,[pc,#272] ; [0x8007c04] = 0x200002c0 + 0x08007af2: 6800 .h LDR r0,[r0,#0] + 0x08007af4: 4020 @ ANDS r0,r0,r4 + 0x08007af6: 2800 .( CMP r0,#0 + 0x08007af8: d16b k. BNE 0x8007bd2 ; pvPortMalloc + 250 + 0x08007afa: b1d4 .. CBZ r4,0x8007b32 ; pvPortMalloc + 90 + 0x08007afc: 3408 .4 ADDS r4,r4,#8 + 0x08007afe: f0040007 .... AND r0,r4,#7 + 0x08007b02: b1b0 .. CBZ r0,0x8007b32 ; pvPortMalloc + 90 + 0x08007b04: f0040007 .... AND r0,r4,#7 + 0x08007b08: f1c00008 .... RSB r0,r0,#8 + 0x08007b0c: 4404 .D ADD r4,r4,r0 + 0x08007b0e: f0040007 .... AND r0,r4,#7 + 0x08007b12: b908 .. CBNZ r0,0x8007b18 ; pvPortMalloc + 64 + 0x08007b14: 2001 . MOVS r0,#1 + 0x08007b16: e000 .. B 0x8007b1a ; pvPortMalloc + 66 + 0x08007b18: 2000 . MOVS r0,#0 + 0x08007b1a: b950 P. CBNZ r0,0x8007b32 ; pvPortMalloc + 90 + 0x08007b1c: bf00 .. NOP + 0x08007b1e: 2050 P MOVS r0,#0x50 + 0x08007b20: f3808811 .... MSR BASEPRI,r0 + 0x08007b24: f3bf8f4f ..O. DSB + 0x08007b28: f3bf8f6f ..o. ISB + 0x08007b2c: bf00 .. NOP + 0x08007b2e: bf00 .. NOP + 0x08007b30: e7fe .. B 0x8007b30 ; pvPortMalloc + 88 + 0x08007b32: 2c00 ., CMP r4,#0 + 0x08007b34: d04d M. BEQ 0x8007bd2 ; pvPortMalloc + 250 + 0x08007b36: 4834 4H LDR r0,[pc,#208] ; [0x8007c08] = 0x200002b8 + 0x08007b38: 6800 .h LDR r0,[r0,#0] + 0x08007b3a: 4284 .B CMP r4,r0 + 0x08007b3c: d849 I. BHI 0x8007bd2 ; pvPortMalloc + 250 + 0x08007b3e: 4e33 3N LDR r6,[pc,#204] ; [0x8007c0c] = 0x200002ac + 0x08007b40: 4630 0F MOV r0,r6 + 0x08007b42: 6805 .h LDR r5,[r0,#0] + 0x08007b44: e001 .. B 0x8007b4a ; pvPortMalloc + 114 + 0x08007b46: 462e .F MOV r6,r5 + 0x08007b48: 682d -h LDR r5,[r5,#0] + 0x08007b4a: 6868 hh LDR r0,[r5,#4] + 0x08007b4c: 42a0 .B CMP r0,r4 + 0x08007b4e: d202 .. BCS 0x8007b56 ; pvPortMalloc + 126 + 0x08007b50: 6828 (h LDR r0,[r5,#0] + 0x08007b52: 2800 .( CMP r0,#0 + 0x08007b54: d1f7 .. BNE 0x8007b46 ; pvPortMalloc + 110 + 0x08007b56: 482a *H LDR r0,[pc,#168] ; [0x8007c00] = 0x200002b4 + 0x08007b58: 6800 .h LDR r0,[r0,#0] + 0x08007b5a: 4285 .B CMP r5,r0 + 0x08007b5c: d039 9. BEQ 0x8007bd2 ; pvPortMalloc + 250 + 0x08007b5e: 6830 0h LDR r0,[r6,#0] + 0x08007b60: f1000808 .... ADD r8,r0,#8 + 0x08007b64: 6828 (h LDR r0,[r5,#0] + 0x08007b66: 6030 0` STR r0,[r6,#0] + 0x08007b68: 6868 hh LDR r0,[r5,#4] + 0x08007b6a: 1b00 .. SUBS r0,r0,r4 + 0x08007b6c: 2810 .( CMP r0,#0x10 + 0x08007b6e: d919 .. BLS 0x8007ba4 ; pvPortMalloc + 204 + 0x08007b70: 192f /. ADDS r7,r5,r4 + 0x08007b72: f0070007 .... AND r0,r7,#7 + 0x08007b76: b908 .. CBNZ r0,0x8007b7c ; pvPortMalloc + 164 + 0x08007b78: 2001 . MOVS r0,#1 + 0x08007b7a: e000 .. B 0x8007b7e ; pvPortMalloc + 166 + 0x08007b7c: 2000 . MOVS r0,#0 + 0x08007b7e: b950 P. CBNZ r0,0x8007b96 ; pvPortMalloc + 190 + 0x08007b80: bf00 .. NOP + 0x08007b82: 2050 P MOVS r0,#0x50 + 0x08007b84: f3808811 .... MSR BASEPRI,r0 + 0x08007b88: f3bf8f4f ..O. DSB + 0x08007b8c: f3bf8f6f ..o. ISB + 0x08007b90: bf00 .. NOP + 0x08007b92: bf00 .. NOP + 0x08007b94: e7fe .. B 0x8007b94 ; pvPortMalloc + 188 + 0x08007b96: 6868 hh LDR r0,[r5,#4] + 0x08007b98: 1b00 .. SUBS r0,r0,r4 + 0x08007b9a: 6078 x` STR r0,[r7,#4] + 0x08007b9c: 606c l` STR r4,[r5,#4] + 0x08007b9e: 4638 8F MOV r0,r7 + 0x08007ba0: f7fffcfa .... BL prvInsertBlockIntoFreeList ; 0x8007598 + 0x08007ba4: 4918 .I LDR r1,[pc,#96] ; [0x8007c08] = 0x200002b8 + 0x08007ba6: 6868 hh LDR r0,[r5,#4] + 0x08007ba8: 6809 .h LDR r1,[r1,#0] + 0x08007baa: 1a08 .. SUBS r0,r1,r0 + 0x08007bac: 4916 .I LDR r1,[pc,#88] ; [0x8007c08] = 0x200002b8 + 0x08007bae: 6008 .` STR r0,[r1,#0] + 0x08007bb0: 4608 .F MOV r0,r1 + 0x08007bb2: 6800 .h LDR r0,[r0,#0] + 0x08007bb4: 4916 .I LDR r1,[pc,#88] ; [0x8007c10] = 0x200002bc + 0x08007bb6: 6809 .h LDR r1,[r1,#0] + 0x08007bb8: 4288 .B CMP r0,r1 + 0x08007bba: d203 .. BCS 0x8007bc4 ; pvPortMalloc + 236 + 0x08007bbc: 4812 .H LDR r0,[pc,#72] ; [0x8007c08] = 0x200002b8 + 0x08007bbe: 6800 .h LDR r0,[r0,#0] + 0x08007bc0: 4913 .I LDR r1,[pc,#76] ; [0x8007c10] = 0x200002bc + 0x08007bc2: 6008 .` STR r0,[r1,#0] + 0x08007bc4: 490f .I LDR r1,[pc,#60] ; [0x8007c04] = 0x200002c0 + 0x08007bc6: 6868 hh LDR r0,[r5,#4] + 0x08007bc8: 6809 .h LDR r1,[r1,#0] + 0x08007bca: 4308 .C ORRS r0,r0,r1 + 0x08007bcc: 6068 h` STR r0,[r5,#4] + 0x08007bce: 2000 . MOVS r0,#0 + 0x08007bd0: 6028 (` STR r0,[r5,#0] + 0x08007bd2: f002fa23 ..#. BL xTaskResumeAll ; 0x800a01c + 0x08007bd6: f0080007 .... AND r0,r8,#7 + 0x08007bda: b908 .. CBNZ r0,0x8007be0 ; pvPortMalloc + 264 + 0x08007bdc: 2001 . MOVS r0,#1 + 0x08007bde: e000 .. B 0x8007be2 ; pvPortMalloc + 266 + 0x08007be0: 2000 . MOVS r0,#0 + 0x08007be2: b950 P. CBNZ r0,0x8007bfa ; pvPortMalloc + 290 + 0x08007be4: bf00 .. NOP + 0x08007be6: 2050 P MOVS r0,#0x50 + 0x08007be8: f3808811 .... MSR BASEPRI,r0 + 0x08007bec: f3bf8f4f ..O. DSB + 0x08007bf0: f3bf8f6f ..o. ISB + 0x08007bf4: bf00 .. NOP + 0x08007bf6: bf00 .. NOP + 0x08007bf8: e7fe .. B 0x8007bf8 ; pvPortMalloc + 288 + 0x08007bfa: 4640 @F MOV r0,r8 + 0x08007bfc: e8bd81f0 .... POP {r4-r8,pc} + $d + 0x08007c00: 200002b4 ... DCD 536871604 + 0x08007c04: 200002c0 ... DCD 536871616 + 0x08007c08: 200002b8 ... DCD 536871608 + 0x08007c0c: 200002ac ... DCD 536871596 + 0x08007c10: 200002bc ... DCD 536871612 + $t + i.pvTaskIncrementMutexHeldCount + pvTaskIncrementMutexHeldCount + 0x08007c14: 4806 .H LDR r0,[pc,#24] ; [0x8007c30] = 0x20000258 + 0x08007c16: 6800 .h LDR r0,[r0,#0] + 0x08007c18: b130 0. CBZ r0,0x8007c28 ; pvTaskIncrementMutexHeldCount + 20 + 0x08007c1a: 4905 .I LDR r1,[pc,#20] ; [0x8007c30] = 0x20000258 + 0x08007c1c: 6809 .h LDR r1,[r1,#0] + 0x08007c1e: f1010050 ..P. ADD r0,r1,#0x50 + 0x08007c22: 6d09 .m LDR r1,[r1,#0x50] + 0x08007c24: 1c49 I. ADDS r1,r1,#1 + 0x08007c26: 6001 .` STR r1,[r0,#0] + 0x08007c28: 4801 .H LDR r0,[pc,#4] ; [0x8007c30] = 0x20000258 + 0x08007c2a: 6800 .h LDR r0,[r0,#0] + 0x08007c2c: 4770 pG BX lr + $d + 0x08007c2e: 0000 .. DCW 0 + 0x08007c30: 20000258 X.. DCD 536871512 + $t + i.pxPortInitialiseStack + pxPortInitialiseStack + 0x08007c34: 1f00 .. SUBS r0,r0,#4 + 0x08007c36: f04f7380 O..s MOV r3,#0x1000000 + 0x08007c3a: 6003 .` STR r3,[r0,#0] + 0x08007c3c: 1f00 .. SUBS r0,r0,#4 + 0x08007c3e: f0210301 !... BIC r3,r1,#1 + 0x08007c42: 6003 .` STR r3,[r0,#0] + 0x08007c44: 1f00 .. SUBS r0,r0,#4 + 0x08007c46: 4b03 .K LDR r3,[pc,#12] ; [0x8007c54] = 0x8007991 + 0x08007c48: 6003 .` STR r3,[r0,#0] + 0x08007c4a: 3814 .8 SUBS r0,r0,#0x14 + 0x08007c4c: 6002 .` STR r2,[r0,#0] + 0x08007c4e: 3820 8 SUBS r0,r0,#0x20 + 0x08007c50: 4770 pG BX lr + $d + 0x08007c52: 0000 .. DCW 0 + 0x08007c54: 08007991 .y.. DCD 134248849 + $t + i.serial_soft_trans_irq + serial_soft_trans_irq + 0x08007c58: b508 .. PUSH {r3,lr} + 0x08007c5a: e00b .. B 0x8007c74 ; serial_soft_trans_irq + 28 + 0x08007c5c: f04f30ff O..0 MOV r0,#0xffffffff + 0x08007c60: 2300 .# MOVS r3,#0 + 0x08007c62: 461a .F MOV r2,r3 + 0x08007c64: 2101 .! MOVS r1,#1 + 0x08007c66: 9000 .. STR r0,[sp,#0] + 0x08007c68: 4803 .H LDR r0,[pc,#12] ; [0x8007c78] = 0x2000040c + 0x08007c6a: 6800 .h LDR r0,[r0,#0] + 0x08007c6c: f000fe2a ..*. BL xEventGroupWaitBits ; 0x80088c4 + 0x08007c70: f7ffff2a ..*. BL prvvUARTTxReadyISR ; 0x8007ac8 + 0x08007c74: e7f2 .. B 0x8007c5c ; serial_soft_trans_irq + 4 + $d + 0x08007c76: 0000 .. DCW 0 + 0x08007c78: 2000040c ... DCD 536871948 + $t + i.stm32_getc + stm32_getc + 0x08007c7c: f04f30ff O..0 MOV r0,#0xffffffff + 0x08007c80: 4906 .I LDR r1,[pc,#24] ; [0x8007c9c] = 0x20000410 + 0x08007c82: 6809 .h LDR r1,[r1,#0] + 0x08007c84: 6809 .h LDR r1,[r1,#0] + 0x08007c86: 6809 .h LDR r1,[r1,#0] + 0x08007c88: f0010120 .. . AND r1,r1,#0x20 + 0x08007c8c: b121 !. CBZ r1,0x8007c98 ; stm32_getc + 28 + 0x08007c8e: 4903 .I LDR r1,[pc,#12] ; [0x8007c9c] = 0x20000410 + 0x08007c90: 6809 .h LDR r1,[r1,#0] + 0x08007c92: 6809 .h LDR r1,[r1,#0] + 0x08007c94: 6849 Ih LDR r1,[r1,#4] + 0x08007c96: b2c8 .. UXTB r0,r1 + 0x08007c98: 4770 pG BX lr + $d + 0x08007c9a: 0000 .. DCW 0 + 0x08007c9c: 20000410 ... DCD 536871952 + $t + i.stm32_putc + stm32_putc + 0x08007ca0: 4601 .F MOV r1,r0 + 0x08007ca2: 4807 .H LDR r0,[pc,#28] ; [0x8007cc0] = 0x20000410 + 0x08007ca4: 6800 .h LDR r0,[r0,#0] + 0x08007ca6: 6800 .h LDR r0,[r0,#0] + 0x08007ca8: 6041 A` STR r1,[r0,#4] + 0x08007caa: bf00 .. NOP + 0x08007cac: 4804 .H LDR r0,[pc,#16] ; [0x8007cc0] = 0x20000410 + 0x08007cae: 6800 .h LDR r0,[r0,#0] + 0x08007cb0: 6800 .h LDR r0,[r0,#0] + 0x08007cb2: 6800 .h LDR r0,[r0,#0] + 0x08007cb4: f0000040 ..@. AND r0,r0,#0x40 + 0x08007cb8: 2800 .( CMP r0,#0 + 0x08007cba: d0f7 .. BEQ 0x8007cac ; stm32_putc + 12 + 0x08007cbc: 2001 . MOVS r0,#1 + 0x08007cbe: 4770 pG BX lr + $d + 0x08007cc0: 20000410 ... DCD 536871952 + $t + i.timer_timeout_ind + timer_timeout_ind + 0x08007cc4: b510 .. PUSH {r4,lr} + 0x08007cc6: 4604 .F MOV r4,r0 + 0x08007cc8: f7fffeee .... BL prvvTIMERExpiredISR ; 0x8007aa8 + 0x08007ccc: bd10 .. POP {r4,pc} + 0x08007cce: 0000 .. MOVS r0,r0 + i.ucMBMasterGetDestAddress + ucMBMasterGetDestAddress + 0x08007cd0: 4801 .H LDR r0,[pc,#4] ; [0x8007cd8] = 0x20000318 + 0x08007cd2: 7800 .x LDRB r0,[r0,#0] + 0x08007cd4: 4770 pG BX lr + $d + 0x08007cd6: 0000 .. DCW 0 + 0x08007cd8: 20000318 ... DCD 536871704 + $t + i.usMBCRC16 + usMBCRC16 + 0x08007cdc: b570 p. PUSH {r4-r6,lr} + 0x08007cde: 4602 .F MOV r2,r0 + 0x08007ce0: 460c .F MOV r4,r1 + 0x08007ce2: 25ff .% MOVS r5,#0xff + 0x08007ce4: 23ff .# MOVS r3,#0xff + 0x08007ce6: e009 .. B 0x8007cfc ; usMBCRC16 + 32 + 0x08007ce8: f8120b01 .... LDRB r0,[r2],#1 + 0x08007cec: ea800103 .... EOR r1,r0,r3 + 0x08007cf0: 4806 .H LDR r0,[pc,#24] ; [0x8007d0c] = 0x800a3b0 + 0x08007cf2: 5c40 @\ LDRB r0,[r0,r1] + 0x08007cf4: ea800305 .... EOR r3,r0,r5 + 0x08007cf8: 4805 .H LDR r0,[pc,#20] ; [0x8007d10] = 0x800a4b0 + 0x08007cfa: 5c45 E\ LDRB r5,[r0,r1] + 0x08007cfc: 1e20 . SUBS r0,r4,#0 + 0x08007cfe: f1a40601 .... SUB r6,r4,#1 + 0x08007d02: b2b4 .. UXTH r4,r6 + 0x08007d04: d1f0 .. BNE 0x8007ce8 ; usMBCRC16 + 12 + 0x08007d06: ea432005 C.. ORR r0,r3,r5,LSL #8 + 0x08007d0a: bd70 p. POP {r4-r6,pc} + $d + 0x08007d0c: 0800a3b0 .... DCD 134259632 + 0x08007d10: 0800a4b0 .... DCD 134259888 + $t + i.usMBMasterGetPDUSndLength + usMBMasterGetPDUSndLength + 0x08007d14: 4801 .H LDR r0,[pc,#4] ; [0x8007d1c] = 0x200003d2 + 0x08007d16: 8800 .. LDRH r0,[r0,#0] + 0x08007d18: 4770 pG BX lr + $d + 0x08007d1a: 0000 .. DCW 0 + 0x08007d1c: 200003d2 ... DCD 536871890 + $t + i.uxListRemove + uxListRemove + 0x08007d20: 4601 .F MOV r1,r0 + 0x08007d22: 690a .i LDR r2,[r1,#0x10] + 0x08007d24: e9d13001 ...0 LDRD r3,r0,[r1,#4] + 0x08007d28: 6098 .` STR r0,[r3,#8] + 0x08007d2a: e9d10301 .... LDRD r0,r3,[r1,#4] + 0x08007d2e: 6058 X` STR r0,[r3,#4] + 0x08007d30: 6850 Ph LDR r0,[r2,#4] + 0x08007d32: 4288 .B CMP r0,r1 + 0x08007d34: d101 .. BNE 0x8007d3a ; uxListRemove + 26 + 0x08007d36: 6888 .h LDR r0,[r1,#8] + 0x08007d38: 6050 P` STR r0,[r2,#4] + 0x08007d3a: 2000 . MOVS r0,#0 + 0x08007d3c: 6108 .a STR r0,[r1,#0x10] + 0x08007d3e: 6810 .h LDR r0,[r2,#0] + 0x08007d40: 1e40 @. SUBS r0,r0,#1 + 0x08007d42: 6010 .` STR r0,[r2,#0] + 0x08007d44: 6810 .h LDR r0,[r2,#0] + 0x08007d46: 4770 pG BX lr + i.uxTaskResetEventItemValue + uxTaskResetEventItemValue + 0x08007d48: 4905 .I LDR r1,[pc,#20] ; [0x8007d60] = 0x20000258 + 0x08007d4a: 6809 .h LDR r1,[r1,#0] + 0x08007d4c: 6988 .i LDR r0,[r1,#0x18] + 0x08007d4e: 4904 .I LDR r1,[pc,#16] ; [0x8007d60] = 0x20000258 + 0x08007d50: 6809 .h LDR r1,[r1,#0] + 0x08007d52: 6ac9 .j LDR r1,[r1,#0x2c] + 0x08007d54: f1c10138 ..8. RSB r1,r1,#0x38 + 0x08007d58: 4a01 .J LDR r2,[pc,#4] ; [0x8007d60] = 0x20000258 + 0x08007d5a: 6812 .h LDR r2,[r2,#0] + 0x08007d5c: 6191 .a STR r1,[r2,#0x18] + 0x08007d5e: 4770 pG BX lr + $d + 0x08007d60: 20000258 X.. DCD 536871512 + $t + i.vApplicationGetIdleTaskMemory + vApplicationGetIdleTaskMemory + 0x08007d64: 4b03 .K LDR r3,[pc,#12] ; [0x8007d74] = 0x20000fe8 + 0x08007d66: 6003 .` STR r3,[r0,#0] + 0x08007d68: 4b03 .K LDR r3,[pc,#12] ; [0x8007d78] = 0x20001044 + 0x08007d6a: 600b .` STR r3,[r1,#0] + 0x08007d6c: 2340 @# MOVS r3,#0x40 + 0x08007d6e: 6013 .` STR r3,[r2,#0] + 0x08007d70: 4770 pG BX lr + $d + 0x08007d72: 0000 .. DCW 0 + 0x08007d74: 20000fe8 ... DCD 536874984 + 0x08007d78: 20001044 D.. DCD 536875076 + $t + i.vApplicationGetTimerTaskMemory + vApplicationGetTimerTaskMemory + 0x08007d7c: 4b03 .K LDR r3,[pc,#12] ; [0x8007d8c] = 0x20001144 + 0x08007d7e: 6003 .` STR r3,[r0,#0] + 0x08007d80: 4b03 .K LDR r3,[pc,#12] ; [0x8007d90] = 0x200011a0 + 0x08007d82: 600b .` STR r3,[r1,#0] + 0x08007d84: 2380 .# MOVS r3,#0x80 + 0x08007d86: 6013 .` STR r3,[r2,#0] + 0x08007d88: 4770 pG BX lr + $d + 0x08007d8a: 0000 .. DCW 0 + 0x08007d8c: 20001144 D.. DCD 536875332 + 0x08007d90: 200011a0 ... DCD 536875424 + $t + i.vEventGroupSetBitsCallback + vEventGroupSetBitsCallback + 0x08007d94: b570 p. PUSH {r4-r6,lr} + 0x08007d96: 4604 .F MOV r4,r0 + 0x08007d98: 460d .F MOV r5,r1 + 0x08007d9a: 4629 )F MOV r1,r5 + 0x08007d9c: 4620 F MOV r0,r4 + 0x08007d9e: f000fd18 .... BL xEventGroupSetBits ; 0x80087d2 + 0x08007da2: bd70 p. POP {r4-r6,pc} + i.vListInitialise + vListInitialise + 0x08007da4: f1000108 .... ADD r1,r0,#8 + 0x08007da8: 6041 A` STR r1,[r0,#4] + 0x08007daa: f04f31ff O..1 MOV r1,#0xffffffff + 0x08007dae: 6081 .` STR r1,[r0,#8] + 0x08007db0: f1000108 .... ADD r1,r0,#8 + 0x08007db4: 60c1 .` STR r1,[r0,#0xc] + 0x08007db6: 6101 .a STR r1,[r0,#0x10] + 0x08007db8: 2100 .! MOVS r1,#0 + 0x08007dba: 6001 .` STR r1,[r0,#0] + 0x08007dbc: 4770 pG BX lr + i.vListInitialiseItem + vListInitialiseItem + 0x08007dbe: 2100 .! MOVS r1,#0 + 0x08007dc0: 6101 .a STR r1,[r0,#0x10] + 0x08007dc2: 4770 pG BX lr + i.vListInsert + vListInsert + 0x08007dc4: b510 .. PUSH {r4,lr} + 0x08007dc6: 4602 .F MOV r2,r0 + 0x08007dc8: 680b .h LDR r3,[r1,#0] + 0x08007dca: 1c5c \. ADDS r4,r3,#1 + 0x08007dcc: b90c .. CBNZ r4,0x8007dd2 ; vListInsert + 14 + 0x08007dce: 6910 .i LDR r0,[r2,#0x10] + 0x08007dd0: e007 .. B 0x8007de2 ; vListInsert + 30 + 0x08007dd2: f1020008 .... ADD r0,r2,#8 + 0x08007dd6: e000 .. B 0x8007dda ; vListInsert + 22 + 0x08007dd8: 6840 @h LDR r0,[r0,#4] + 0x08007dda: 6844 Dh LDR r4,[r0,#4] + 0x08007ddc: 6824 $h LDR r4,[r4,#0] + 0x08007dde: 429c .B CMP r4,r3 + 0x08007de0: d9fa .. BLS 0x8007dd8 ; vListInsert + 20 + 0x08007de2: 6844 Dh LDR r4,[r0,#4] + 0x08007de4: 604c L` STR r4,[r1,#4] + 0x08007de6: 684c Lh LDR r4,[r1,#4] + 0x08007de8: 60a1 .` STR r1,[r4,#8] + 0x08007dea: 6088 .` STR r0,[r1,#8] + 0x08007dec: 6041 A` STR r1,[r0,#4] + 0x08007dee: 610a .a STR r2,[r1,#0x10] + 0x08007df0: 6814 .h LDR r4,[r2,#0] + 0x08007df2: 1c64 d. ADDS r4,r4,#1 + 0x08007df4: 6014 .` STR r4,[r2,#0] + 0x08007df6: bd10 .. POP {r4,pc} + i.vListInsertEnd + vListInsertEnd + 0x08007df8: 6842 Bh LDR r2,[r0,#4] + 0x08007dfa: 604a J` STR r2,[r1,#4] + 0x08007dfc: 6893 .h LDR r3,[r2,#8] + 0x08007dfe: 608b .` STR r3,[r1,#8] + 0x08007e00: 6893 .h LDR r3,[r2,#8] + 0x08007e02: 6059 Y` STR r1,[r3,#4] + 0x08007e04: 6091 .` STR r1,[r2,#8] + 0x08007e06: 6108 .a STR r0,[r1,#0x10] + 0x08007e08: 6803 .h LDR r3,[r0,#0] + 0x08007e0a: 1c5b [. ADDS r3,r3,#1 + 0x08007e0c: 6003 .` STR r3,[r0,#0] + 0x08007e0e: 4770 pG BX lr + i.vMBMasterCBRequestScuuess + vMBMasterCBRequestScuuess + 0x08007e10: b510 .. PUSH {r4,lr} + 0x08007e12: 2120 ! MOVS r1,#0x20 + 0x08007e14: 4802 .H LDR r0,[pc,#8] ; [0x8007e20] = 0x200003fc + 0x08007e16: 6800 .h LDR r0,[r0,#0] + 0x08007e18: f000fcdb .... BL xEventGroupSetBits ; 0x80087d2 + 0x08007e1c: bd10 .. POP {r4,pc} + $d + 0x08007e1e: 0000 .. DCW 0 + 0x08007e20: 200003fc ... DCD 536871932 + $t + i.vMBMasterErrorCBExecuteFunction + vMBMasterErrorCBExecuteFunction + 0x08007e24: b570 p. PUSH {r4-r6,lr} + 0x08007e26: 4604 .F MOV r4,r0 + 0x08007e28: 460d .F MOV r5,r1 + 0x08007e2a: 4616 .F MOV r6,r2 + 0x08007e2c: f44f7180 O..q MOV r1,#0x100 + 0x08007e30: 4802 .H LDR r0,[pc,#8] ; [0x8007e3c] = 0x200003fc + 0x08007e32: 6800 .h LDR r0,[r0,#0] + 0x08007e34: f000fccd .... BL xEventGroupSetBits ; 0x80087d2 + 0x08007e38: bd70 p. POP {r4-r6,pc} + $d + 0x08007e3a: 0000 .. DCW 0 + 0x08007e3c: 200003fc ... DCD 536871932 + $t + i.vMBMasterErrorCBReceiveData + vMBMasterErrorCBReceiveData + 0x08007e40: b570 p. PUSH {r4-r6,lr} + 0x08007e42: 4604 .F MOV r4,r0 + 0x08007e44: 460d .F MOV r5,r1 + 0x08007e46: 4616 .F MOV r6,r2 + 0x08007e48: 2180 .! MOVS r1,#0x80 + 0x08007e4a: 4802 .H LDR r0,[pc,#8] ; [0x8007e54] = 0x200003fc + 0x08007e4c: 6800 .h LDR r0,[r0,#0] + 0x08007e4e: f000fcc0 .... BL xEventGroupSetBits ; 0x80087d2 + 0x08007e52: bd70 p. POP {r4-r6,pc} + $d + 0x08007e54: 200003fc ... DCD 536871932 + $t + i.vMBMasterErrorCBRespondTimeout + vMBMasterErrorCBRespondTimeout + 0x08007e58: b570 p. PUSH {r4-r6,lr} + 0x08007e5a: 4604 .F MOV r4,r0 + 0x08007e5c: 460d .F MOV r5,r1 + 0x08007e5e: 4616 .F MOV r6,r2 + 0x08007e60: 2140 @! MOVS r1,#0x40 + 0x08007e62: 4802 .H LDR r0,[pc,#8] ; [0x8007e6c] = 0x200003fc + 0x08007e64: 6800 .h LDR r0,[r0,#0] + 0x08007e66: f000fcb4 .... BL xEventGroupSetBits ; 0x80087d2 + 0x08007e6a: bd70 p. POP {r4-r6,pc} + $d + 0x08007e6c: 200003fc ... DCD 536871932 + $t + i.vMBMasterGetPDUSndBuf + vMBMasterGetPDUSndBuf + 0x08007e70: 4901 .I LDR r1,[pc,#4] ; [0x8007e78] = 0x200033b3 + 0x08007e72: 6001 .` STR r1,[r0,#0] + 0x08007e74: 4770 pG BX lr + $d + 0x08007e76: 0000 .. DCW 0 + 0x08007e78: 200033b3 .3. DCD 536884147 + $t + i.vMBMasterOsResInit + vMBMasterOsResInit + 0x08007e7c: b510 .. PUSH {r4,lr} + 0x08007e7e: 2203 ." MOVS r2,#3 + 0x08007e80: 2100 .! MOVS r1,#0 + 0x08007e82: 2001 . MOVS r0,#1 + 0x08007e84: f001fa13 .... BL xQueueGenericCreate ; 0x80092ae + 0x08007e88: 4901 .I LDR r1,[pc,#4] ; [0x8007e90] = 0x200003f8 + 0x08007e8a: 6008 .` STR r0,[r1,#0] + 0x08007e8c: bd10 .. POP {r4,pc} + $d + 0x08007e8e: 0000 .. DCW 0 + 0x08007e90: 200003f8 ... DCD 536871928 + $t + i.vMBMasterPortSerialEnable + vMBMasterPortSerialEnable + 0x08007e94: b570 p. PUSH {r4-r6,lr} + 0x08007e96: 4605 .F MOV r5,r0 + 0x08007e98: 460c .F MOV r4,r1 + 0x08007e9a: f06f0020 o. . MVN r0,#0x20 + 0x08007e9e: 4922 "I LDR r1,[pc,#136] ; [0x8007f28] = 0x20000410 + 0x08007ea0: 6809 .h LDR r1,[r1,#0] + 0x08007ea2: 6809 .h LDR r1,[r1,#0] + 0x08007ea4: 6008 .` STR r0,[r1,#0] + 0x08007ea6: f06f0040 o.@. MVN r0,#0x40 + 0x08007eaa: 491f .I LDR r1,[pc,#124] ; [0x8007f28] = 0x20000410 + 0x08007eac: 6809 .h LDR r1,[r1,#0] + 0x08007eae: 6809 .h LDR r1,[r1,#0] + 0x08007eb0: 6008 .` STR r0,[r1,#0] + 0x08007eb2: 2d01 .- CMP r5,#1 + 0x08007eb4: d115 .. BNE 0x8007ee2 ; vMBMasterPortSerialEnable + 78 + 0x08007eb6: 2394 .# MOVS r3,#0x94 + 0x08007eb8: 4a1c .J LDR r2,[pc,#112] ; [0x8007f2c] = 0x800a5f6 + 0x08007eba: a11d .. ADR r1,{pc}+0x76 ; 0x8007f30 + 0x08007ebc: 4827 'H LDR r0,[pc,#156] ; [0x8007f5c] = 0x20000420 + 0x08007ebe: f7fdfc29 ..). BL __0fprintf ; 0x8005714 + 0x08007ec2: 2200 ." MOVS r2,#0 + 0x08007ec4: 03a9 .. LSLS r1,r5,#14 + 0x08007ec6: 4826 &H LDR r0,[pc,#152] ; [0x8007f60] = 0x40010c00 + 0x08007ec8: f7faf944 ..D. BL HAL_GPIO_WritePin ; 0x8002154 + 0x08007ecc: 4816 .H LDR r0,[pc,#88] ; [0x8007f28] = 0x20000410 + 0x08007ece: 6800 .h LDR r0,[r0,#0] + 0x08007ed0: 6800 .h LDR r0,[r0,#0] + 0x08007ed2: 68c0 .h LDR r0,[r0,#0xc] + 0x08007ed4: f0400020 @. . ORR r0,r0,#0x20 + 0x08007ed8: 4913 .I LDR r1,[pc,#76] ; [0x8007f28] = 0x20000410 + 0x08007eda: 6809 .h LDR r1,[r1,#0] + 0x08007edc: 6809 .h LDR r1,[r1,#0] + 0x08007ede: 60c8 .` STR r0,[r1,#0xc] + 0x08007ee0: e014 .. B 0x8007f0c ; vMBMasterPortSerialEnable + 120 + 0x08007ee2: 239b .# MOVS r3,#0x9b + 0x08007ee4: 4a11 .J LDR r2,[pc,#68] ; [0x8007f2c] = 0x800a5f6 + 0x08007ee6: a11f .. ADR r1,{pc}+0x7e ; 0x8007f64 + 0x08007ee8: 481c .H LDR r0,[pc,#112] ; [0x8007f5c] = 0x20000420 + 0x08007eea: f7fdfc13 .... BL __0fprintf ; 0x8005714 + 0x08007eee: 2201 ." MOVS r2,#1 + 0x08007ef0: 0391 .. LSLS r1,r2,#14 + 0x08007ef2: 481b .H LDR r0,[pc,#108] ; [0x8007f60] = 0x40010c00 + 0x08007ef4: f7faf92e .... BL HAL_GPIO_WritePin ; 0x8002154 + 0x08007ef8: 480b .H LDR r0,[pc,#44] ; [0x8007f28] = 0x20000410 + 0x08007efa: 6800 .h LDR r0,[r0,#0] + 0x08007efc: 6800 .h LDR r0,[r0,#0] + 0x08007efe: 68c0 .h LDR r0,[r0,#0xc] + 0x08007f00: f0200020 . . BIC r0,r0,#0x20 + 0x08007f04: 4908 .I LDR r1,[pc,#32] ; [0x8007f28] = 0x20000410 + 0x08007f06: 6809 .h LDR r1,[r1,#0] + 0x08007f08: 6809 .h LDR r1,[r1,#0] + 0x08007f0a: 60c8 .` STR r0,[r1,#0xc] + 0x08007f0c: 2c01 ., CMP r4,#1 + 0x08007f0e: d105 .. BNE 0x8007f1c ; vMBMasterPortSerialEnable + 136 + 0x08007f10: 2101 .! MOVS r1,#1 + 0x08007f12: 481f .H LDR r0,[pc,#124] ; [0x8007f90] = 0x2000040c + 0x08007f14: 6800 .h LDR r0,[r0,#0] + 0x08007f16: f000fc5c ..\. BL xEventGroupSetBits ; 0x80087d2 + 0x08007f1a: e004 .. B 0x8007f26 ; vMBMasterPortSerialEnable + 146 + 0x08007f1c: 2101 .! MOVS r1,#1 + 0x08007f1e: 481c .H LDR r0,[pc,#112] ; [0x8007f90] = 0x2000040c + 0x08007f20: 6800 .h LDR r0,[r0,#0] + 0x08007f22: f000fc19 .... BL xEventGroupClearBits ; 0x8008758 + 0x08007f26: bd70 p. POP {r4-r6,pc} + $d + 0x08007f28: 20000410 ... DCD 536871952 + 0x08007f2c: 0800a5f6 .... DCD 134260214 + 0x08007f30: 4f4d2020 MO DCD 1330454560 + 0x08007f34: 53554244 DBUS DCD 1398096452 + 0x08007f38: 4245445f _DEB DCD 1111835743 + 0x08007f3c: 25284755 UG(% DCD 623396693 + 0x08007f40: 64253a73 s:%d DCD 1680161395 + 0x08007f44: 20203a29 ): DCD 538982953 + 0x08007f48: 34535209 .RS4 DCD 877875721 + 0x08007f4c: 525f3538 85_R DCD 1381971256 + 0x08007f50: 4f4d5f58 X_MO DCD 1330470744 + 0x08007f54: 0a0d4544 DE.. DCD 168641860 + 0x08007f58: 00000000 .... DCD 0 + 0x08007f5c: 20000420 .. DCD 536871968 + 0x08007f60: 40010c00 ...@ DCD 1073810432 + 0x08007f64: 4f4d2020 MO DCD 1330454560 + 0x08007f68: 53554244 DBUS DCD 1398096452 + 0x08007f6c: 4245445f _DEB DCD 1111835743 + 0x08007f70: 25284755 UG(% DCD 623396693 + 0x08007f74: 64253a73 s:%d DCD 1680161395 + 0x08007f78: 20203a29 ): DCD 538982953 + 0x08007f7c: 34535209 .RS4 DCD 877875721 + 0x08007f80: 545f3538 85_T DCD 1415525688 + 0x08007f84: 4f4d5f58 X_MO DCD 1330470744 + 0x08007f88: 0a0d4544 DE.. DCD 168641860 + 0x08007f8c: 00000000 .... DCD 0 + 0x08007f90: 2000040c ... DCD 536871948 + $t + i.vMBMasterPortTimersConvertDelayEnable + vMBMasterPortTimersConvertDelayEnable + 0x08007f94: b538 8. PUSH {r3-r5,lr} + 0x08007f96: 24c8 .$ MOVS r4,#0xc8 + 0x08007f98: 2002 . MOVS r0,#2 + 0x08007f9a: f000f891 .... BL vMBMasterSetCurTimerMode ; 0x80080c0 + 0x08007f9e: f7fcfaf1 .... BL IS_IRQ ; 0x8004584 + 0x08007fa2: b148 H. CBZ r0,0x8007fb8 ; vMBMasterPortTimersConvertDelayEnable + 36 + 0x08007fa4: 2000 . MOVS r0,#0 + 0x08007fa6: 4b09 .K LDR r3,[pc,#36] ; [0x8007fcc] = 0x2000041c + 0x08007fa8: 4622 "F MOV r2,r4 + 0x08007faa: 2109 .! MOVS r1,#9 + 0x08007fac: 9000 .. STR r0,[sp,#0] + 0x08007fae: 4808 .H LDR r0,[pc,#32] ; [0x8007fd0] = 0x20000418 + 0x08007fb0: 6800 .h LDR r0,[r0,#0] + 0x08007fb2: f002f90d .... BL xTimerGenericCommand ; 0x800a1d0 + 0x08007fb6: e008 .. B 0x8007fca ; vMBMasterPortTimersConvertDelayEnable + 54 + 0x08007fb8: 2000 . MOVS r0,#0 + 0x08007fba: 4603 .F MOV r3,r0 + 0x08007fbc: 4622 "F MOV r2,r4 + 0x08007fbe: 2104 .! MOVS r1,#4 + 0x08007fc0: 9000 .. STR r0,[sp,#0] + 0x08007fc2: 4803 .H LDR r0,[pc,#12] ; [0x8007fd0] = 0x20000418 + 0x08007fc4: 6800 .h LDR r0,[r0,#0] + 0x08007fc6: f002f903 .... BL xTimerGenericCommand ; 0x800a1d0 + 0x08007fca: bd38 8. POP {r3-r5,pc} + $d + 0x08007fcc: 2000041c ... DCD 536871964 + 0x08007fd0: 20000418 ... DCD 536871960 + $t + i.vMBMasterPortTimersDisable + vMBMasterPortTimersDisable + 0x08007fd4: b508 .. PUSH {r3,lr} + 0x08007fd6: f7fcfad5 .... BL IS_IRQ ; 0x8004584 + 0x08007fda: b148 H. CBZ r0,0x8007ff0 ; vMBMasterPortTimersDisable + 28 + 0x08007fdc: 2000 . MOVS r0,#0 + 0x08007fde: 4603 .F MOV r3,r0 + 0x08007fe0: 4602 .F MOV r2,r0 + 0x08007fe2: 2108 .! MOVS r1,#8 + 0x08007fe4: 9000 .. STR r0,[sp,#0] + 0x08007fe6: 4807 .H LDR r0,[pc,#28] ; [0x8008004] = 0x20000418 + 0x08007fe8: 6800 .h LDR r0,[r0,#0] + 0x08007fea: f002f8f1 .... BL xTimerGenericCommand ; 0x800a1d0 + 0x08007fee: e008 .. B 0x8008002 ; vMBMasterPortTimersDisable + 46 + 0x08007ff0: 2000 . MOVS r0,#0 + 0x08007ff2: 4603 .F MOV r3,r0 + 0x08007ff4: 4602 .F MOV r2,r0 + 0x08007ff6: 2103 .! MOVS r1,#3 + 0x08007ff8: 9000 .. STR r0,[sp,#0] + 0x08007ffa: 4802 .H LDR r0,[pc,#8] ; [0x8008004] = 0x20000418 + 0x08007ffc: 6800 .h LDR r0,[r0,#0] + 0x08007ffe: f002f8e7 .... BL xTimerGenericCommand ; 0x800a1d0 + 0x08008002: bd08 .. POP {r3,pc} + $d + 0x08008004: 20000418 ... DCD 536871960 + $t + i.vMBMasterPortTimersRespondTimeoutEnable + vMBMasterPortTimersRespondTimeoutEnable + 0x08008008: b538 8. PUSH {r3-r5,lr} + 0x0800800a: 2464 d$ MOVS r4,#0x64 + 0x0800800c: 2001 . MOVS r0,#1 + 0x0800800e: f000f857 ..W. BL vMBMasterSetCurTimerMode ; 0x80080c0 + 0x08008012: f7fcfab7 .... BL IS_IRQ ; 0x8004584 + 0x08008016: b148 H. CBZ r0,0x800802c ; vMBMasterPortTimersRespondTimeoutEnable + 36 + 0x08008018: 2000 . MOVS r0,#0 + 0x0800801a: 4b09 .K LDR r3,[pc,#36] ; [0x8008040] = 0x2000041c + 0x0800801c: 4622 "F MOV r2,r4 + 0x0800801e: 2109 .! MOVS r1,#9 + 0x08008020: 9000 .. STR r0,[sp,#0] + 0x08008022: 4808 .H LDR r0,[pc,#32] ; [0x8008044] = 0x20000418 + 0x08008024: 6800 .h LDR r0,[r0,#0] + 0x08008026: f002f8d3 .... BL xTimerGenericCommand ; 0x800a1d0 + 0x0800802a: e008 .. B 0x800803e ; vMBMasterPortTimersRespondTimeoutEnable + 54 + 0x0800802c: 2000 . MOVS r0,#0 + 0x0800802e: 4603 .F MOV r3,r0 + 0x08008030: 4622 "F MOV r2,r4 + 0x08008032: 2104 .! MOVS r1,#4 + 0x08008034: 9000 .. STR r0,[sp,#0] + 0x08008036: 4803 .H LDR r0,[pc,#12] ; [0x8008044] = 0x20000418 + 0x08008038: 6800 .h LDR r0,[r0,#0] + 0x0800803a: f002f8c9 .... BL xTimerGenericCommand ; 0x800a1d0 + 0x0800803e: bd38 8. POP {r3-r5,pc} + $d + 0x08008040: 2000041c ... DCD 536871964 + 0x08008044: 20000418 ... DCD 536871960 + $t + i.vMBMasterPortTimersT35Enable + vMBMasterPortTimersT35Enable + 0x08008048: b538 8. PUSH {r3-r5,lr} + 0x0800804a: 4811 .H LDR r0,[pc,#68] ; [0x8008090] = 0x20000414 + 0x0800804c: 8800 .. LDRH r0,[r0,#0] + 0x0800804e: 2132 2! MOVS r1,#0x32 + 0x08008050: 4348 HC MULS r0,r1,r0 + 0x08008052: f44f717a O.zq MOV r1,#0x3e8 + 0x08008056: fbb0f0f1 .... UDIV r0,r0,r1 + 0x0800805a: 1c44 D. ADDS r4,r0,#1 + 0x0800805c: 2000 . MOVS r0,#0 + 0x0800805e: f000f82f ../. BL vMBMasterSetCurTimerMode ; 0x80080c0 + 0x08008062: f7fcfa8f .... BL IS_IRQ ; 0x8004584 + 0x08008066: b148 H. CBZ r0,0x800807c ; vMBMasterPortTimersT35Enable + 52 + 0x08008068: 2000 . MOVS r0,#0 + 0x0800806a: 4b0a .K LDR r3,[pc,#40] ; [0x8008094] = 0x2000041c + 0x0800806c: 4622 "F MOV r2,r4 + 0x0800806e: 2109 .! MOVS r1,#9 + 0x08008070: 9000 .. STR r0,[sp,#0] + 0x08008072: 4809 .H LDR r0,[pc,#36] ; [0x8008098] = 0x20000418 + 0x08008074: 6800 .h LDR r0,[r0,#0] + 0x08008076: f002f8ab .... BL xTimerGenericCommand ; 0x800a1d0 + 0x0800807a: e008 .. B 0x800808e ; vMBMasterPortTimersT35Enable + 70 + 0x0800807c: 2000 . MOVS r0,#0 + 0x0800807e: 4603 .F MOV r3,r0 + 0x08008080: 4622 "F MOV r2,r4 + 0x08008082: 2104 .! MOVS r1,#4 + 0x08008084: 9000 .. STR r0,[sp,#0] + 0x08008086: 4804 .H LDR r0,[pc,#16] ; [0x8008098] = 0x20000418 + 0x08008088: 6800 .h LDR r0,[r0,#0] + 0x0800808a: f002f8a1 .... BL xTimerGenericCommand ; 0x800a1d0 + 0x0800808e: bd38 8. POP {r3-r5,pc} + $d + 0x08008090: 20000414 ... DCD 536871956 + 0x08008094: 2000041c ... DCD 536871964 + 0x08008098: 20000418 ... DCD 536871960 + $t + i.vMBMasterRunResRelease + vMBMasterRunResRelease + 0x0800809c: b510 .. PUSH {r4,lr} + 0x0800809e: 2300 .# MOVS r3,#0 + 0x080080a0: 461a .F MOV r2,r3 + 0x080080a2: 4619 .F MOV r1,r3 + 0x080080a4: 4802 .H LDR r0,[pc,#8] ; [0x80080b0] = 0x200003f8 + 0x080080a6: 6800 .h LDR r0,[r0,#0] + 0x080080a8: f001f9ec .... BL xQueueGenericSend ; 0x8009484 + 0x080080ac: bd10 .. POP {r4,pc} + $d + 0x080080ae: 0000 .. DCW 0 + 0x080080b0: 200003f8 ... DCD 536871928 + $t + i.vMBMasterSetCBRunInMasterMode + vMBMasterSetCBRunInMasterMode + 0x080080b4: 4901 .I LDR r1,[pc,#4] ; [0x80080bc] = 0x20000319 + 0x080080b6: 7008 .p STRB r0,[r1,#0] + 0x080080b8: 4770 pG BX lr + $d + 0x080080ba: 0000 .. DCW 0 + 0x080080bc: 20000319 ... DCD 536871705 + $t + i.vMBMasterSetCurTimerMode + vMBMasterSetCurTimerMode + 0x080080c0: 4901 .I LDR r1,[pc,#4] ; [0x80080c8] = 0x200003dd + 0x080080c2: 7008 .p STRB r0,[r1,#0] + 0x080080c4: 4770 pG BX lr + $d + 0x080080c6: 0000 .. DCW 0 + 0x080080c8: 200003dd ... DCD 536871901 + $t + i.vMBMasterSetDestAddress + vMBMasterSetDestAddress + 0x080080cc: 4901 .I LDR r1,[pc,#4] ; [0x80080d4] = 0x20000318 + 0x080080ce: 7008 .p STRB r0,[r1,#0] + 0x080080d0: 4770 pG BX lr + $d + 0x080080d2: 0000 .. DCW 0 + 0x080080d4: 20000318 ... DCD 536871704 + $t + i.vMBMasterSetErrorType + vMBMasterSetErrorType + 0x080080d8: 4901 .I LDR r1,[pc,#4] ; [0x80080e0] = 0x2000031a + 0x080080da: 7008 .p STRB r0,[r1,#0] + 0x080080dc: 4770 pG BX lr + $d + 0x080080de: 0000 .. DCW 0 + 0x080080e0: 2000031a ... DCD 536871706 + $t + i.vMBMasterSetPDUSndLength + vMBMasterSetPDUSndLength + 0x080080e4: 4901 .I LDR r1,[pc,#4] ; [0x80080ec] = 0x200003d2 + 0x080080e6: 8008 .. STRH r0,[r1,#0] + 0x080080e8: 4770 pG BX lr + $d + 0x080080ea: 0000 .. DCW 0 + 0x080080ec: 200003d2 ... DCD 536871890 + $t + i.vPortEnterCritical + vPortEnterCritical + 0x080080f0: bf00 .. NOP + 0x080080f2: 2050 P MOVS r0,#0x50 + 0x080080f4: f3808811 .... MSR BASEPRI,r0 + 0x080080f8: f3bf8f4f ..O. DSB + 0x080080fc: f3bf8f6f ..o. ISB + 0x08008100: bf00 .. NOP + 0x08008102: 480e .H LDR r0,[pc,#56] ; [0x800813c] = 0x200002c4 + 0x08008104: 6800 .h LDR r0,[r0,#0] + 0x08008106: 1c40 @. ADDS r0,r0,#1 + 0x08008108: 490c .I LDR r1,[pc,#48] ; [0x800813c] = 0x200002c4 + 0x0800810a: 6008 .` STR r0,[r1,#0] + 0x0800810c: 4608 .F MOV r0,r1 + 0x0800810e: 6800 .h LDR r0,[r0,#0] + 0x08008110: 2801 .( CMP r0,#1 + 0x08008112: d112 .. BNE 0x800813a ; vPortEnterCritical + 74 + 0x08008114: 480a .H LDR r0,[pc,#40] ; [0x8008140] = 0xe000ed04 + 0x08008116: 6800 .h LDR r0,[r0,#0] + 0x08008118: b2c0 .. UXTB r0,r0 + 0x0800811a: b908 .. CBNZ r0,0x8008120 ; vPortEnterCritical + 48 + 0x0800811c: 2001 . MOVS r0,#1 + 0x0800811e: e000 .. B 0x8008122 ; vPortEnterCritical + 50 + 0x08008120: 2000 . MOVS r0,#0 + 0x08008122: b950 P. CBNZ r0,0x800813a ; vPortEnterCritical + 74 + 0x08008124: bf00 .. NOP + 0x08008126: 2050 P MOVS r0,#0x50 + 0x08008128: f3808811 .... MSR BASEPRI,r0 + 0x0800812c: f3bf8f4f ..O. DSB + 0x08008130: f3bf8f6f ..o. ISB + 0x08008134: bf00 .. NOP + 0x08008136: bf00 .. NOP + 0x08008138: e7fe .. B 0x8008138 ; vPortEnterCritical + 72 + 0x0800813a: 4770 pG BX lr + $d + 0x0800813c: 200002c4 ... DCD 536871620 + 0x08008140: e000ed04 .... DCD 3758157060 + $t + i.vPortExitCritical + vPortExitCritical + 0x08008144: 480d .H LDR r0,[pc,#52] ; [0x800817c] = 0x200002c4 + 0x08008146: 6800 .h LDR r0,[r0,#0] + 0x08008148: b950 P. CBNZ r0,0x8008160 ; vPortExitCritical + 28 + 0x0800814a: bf00 .. NOP + 0x0800814c: 2050 P MOVS r0,#0x50 + 0x0800814e: f3808811 .... MSR BASEPRI,r0 + 0x08008152: f3bf8f4f ..O. DSB + 0x08008156: f3bf8f6f ..o. ISB + 0x0800815a: bf00 .. NOP + 0x0800815c: bf00 .. NOP + 0x0800815e: e7fe .. B 0x800815e ; vPortExitCritical + 26 + 0x08008160: 4806 .H LDR r0,[pc,#24] ; [0x800817c] = 0x200002c4 + 0x08008162: 6800 .h LDR r0,[r0,#0] + 0x08008164: 1e40 @. SUBS r0,r0,#1 + 0x08008166: 4905 .I LDR r1,[pc,#20] ; [0x800817c] = 0x200002c4 + 0x08008168: 6008 .` STR r0,[r1,#0] + 0x0800816a: 4608 .F MOV r0,r1 + 0x0800816c: 6800 .h LDR r0,[r0,#0] + 0x0800816e: b920 . CBNZ r0,0x800817a ; vPortExitCritical + 54 + 0x08008170: 2000 . MOVS r0,#0 + 0x08008172: f3808811 .... MSR BASEPRI,r0 + 0x08008176: bf00 .. NOP + 0x08008178: bf00 .. NOP + 0x0800817a: 4770 pG BX lr + $d + 0x0800817c: 200002c4 ... DCD 536871620 + $t + i.vPortFree + vPortFree + 0x08008180: b570 p. PUSH {r4-r6,lr} + 0x08008182: 4606 .F MOV r6,r0 + 0x08008184: 4635 5F MOV r5,r6 + 0x08008186: 2e00 .. CMP r6,#0 + 0x08008188: d03f ?. BEQ 0x800820a ; vPortFree + 138 + 0x0800818a: 3d08 .= SUBS r5,r5,#8 + 0x0800818c: 462c ,F MOV r4,r5 + 0x0800818e: 491f .I LDR r1,[pc,#124] ; [0x800820c] = 0x200002c0 + 0x08008190: 6860 `h LDR r0,[r4,#4] + 0x08008192: 6809 .h LDR r1,[r1,#0] + 0x08008194: 4008 .@ ANDS r0,r0,r1 + 0x08008196: b108 .. CBZ r0,0x800819c ; vPortFree + 28 + 0x08008198: 2001 . MOVS r0,#1 + 0x0800819a: e000 .. B 0x800819e ; vPortFree + 30 + 0x0800819c: 2000 . MOVS r0,#0 + 0x0800819e: b950 P. CBNZ r0,0x80081b6 ; vPortFree + 54 + 0x080081a0: bf00 .. NOP + 0x080081a2: 2050 P MOVS r0,#0x50 + 0x080081a4: f3808811 .... MSR BASEPRI,r0 + 0x080081a8: f3bf8f4f ..O. DSB + 0x080081ac: f3bf8f6f ..o. ISB + 0x080081b0: bf00 .. NOP + 0x080081b2: bf00 .. NOP + 0x080081b4: e7fe .. B 0x80081b4 ; vPortFree + 52 + 0x080081b6: 6820 h LDR r0,[r4,#0] + 0x080081b8: b908 .. CBNZ r0,0x80081be ; vPortFree + 62 + 0x080081ba: 2001 . MOVS r0,#1 + 0x080081bc: e000 .. B 0x80081c0 ; vPortFree + 64 + 0x080081be: 2000 . MOVS r0,#0 + 0x080081c0: b950 P. CBNZ r0,0x80081d8 ; vPortFree + 88 + 0x080081c2: bf00 .. NOP + 0x080081c4: 2050 P MOVS r0,#0x50 + 0x080081c6: f3808811 .... MSR BASEPRI,r0 + 0x080081ca: f3bf8f4f ..O. DSB + 0x080081ce: f3bf8f6f ..o. ISB + 0x080081d2: bf00 .. NOP + 0x080081d4: bf00 .. NOP + 0x080081d6: e7fe .. B 0x80081d6 ; vPortFree + 86 + 0x080081d8: 490c .I LDR r1,[pc,#48] ; [0x800820c] = 0x200002c0 + 0x080081da: 6860 `h LDR r0,[r4,#4] + 0x080081dc: 6809 .h LDR r1,[r1,#0] + 0x080081de: 4008 .@ ANDS r0,r0,r1 + 0x080081e0: b198 .. CBZ r0,0x800820a ; vPortFree + 138 + 0x080081e2: 6820 h LDR r0,[r4,#0] + 0x080081e4: b988 .. CBNZ r0,0x800820a ; vPortFree + 138 + 0x080081e6: 4909 .I LDR r1,[pc,#36] ; [0x800820c] = 0x200002c0 + 0x080081e8: 6860 `h LDR r0,[r4,#4] + 0x080081ea: 6809 .h LDR r1,[r1,#0] + 0x080081ec: 4388 .C BICS r0,r0,r1 + 0x080081ee: 6060 `` STR r0,[r4,#4] + 0x080081f0: f000fa62 ..b. BL vTaskSuspendAll ; 0x80086b8 + 0x080081f4: 4906 .I LDR r1,[pc,#24] ; [0x8008210] = 0x200002b8 + 0x080081f6: 6860 `h LDR r0,[r4,#4] + 0x080081f8: 6809 .h LDR r1,[r1,#0] + 0x080081fa: 4408 .D ADD r0,r0,r1 + 0x080081fc: 4904 .I LDR r1,[pc,#16] ; [0x8008210] = 0x200002b8 + 0x080081fe: 6008 .` STR r0,[r1,#0] + 0x08008200: 4620 F MOV r0,r4 + 0x08008202: f7fff9c9 .... BL prvInsertBlockIntoFreeList ; 0x8007598 + 0x08008206: f001ff09 .... BL xTaskResumeAll ; 0x800a01c + 0x0800820a: bd70 p. POP {r4-r6,pc} + $d + 0x0800820c: 200002c0 ... DCD 536871616 + 0x08008210: 200002b8 ... DCD 536871608 + $t + i.vPortSetupTimerInterrupt + vPortSetupTimerInterrupt + 0x08008214: 2000 . MOVS r0,#0 + 0x08008216: f04f21e0 O..! MOV r1,#0xe000e000 + 0x0800821a: 6108 .a STR r0,[r1,#0x10] + 0x0800821c: 6188 .a STR r0,[r1,#0x18] + 0x0800821e: 4806 .H LDR r0,[pc,#24] ; [0x8008238] = 0x20000254 + 0x08008220: 6800 .h LDR r0,[r0,#0] + 0x08008222: f44f717a O.zq MOV r1,#0x3e8 + 0x08008226: fbb0f0f1 .... UDIV r0,r0,r1 + 0x0800822a: 1e40 @. SUBS r0,r0,#1 + 0x0800822c: f04f21e0 O..! MOV r1,#0xe000e000 + 0x08008230: 6148 Ha STR r0,[r1,#0x14] + 0x08008232: 2007 . MOVS r0,#7 + 0x08008234: 6108 .a STR r0,[r1,#0x10] + 0x08008236: 4770 pG BX lr + $d + 0x08008238: 20000254 T.. DCD 536871508 + $t + i.vPortValidateInterruptPriority + vPortValidateInterruptPriority + 0x0800823c: b570 p. PUSH {r4-r6,lr} + 0x0800823e: f7f7ffd9 .... BL vPortGetIPSR ; 0x80001f4 + 0x08008242: 4604 .F MOV r4,r0 + 0x08008244: 2c10 ., CMP r4,#0x10 + 0x08008246: d316 .. BCC 0x8008276 ; vPortValidateInterruptPriority + 58 + 0x08008248: f10420e0 ... ADD r0,r4,#0xe000e000 + 0x0800824c: f89053f0 ...S LDRB r5,[r0,#0x3f0] + 0x08008250: 4815 .H LDR r0,[pc,#84] ; [0x80082a8] = 0x200002c8 + 0x08008252: 7800 .x LDRB r0,[r0,#0] + 0x08008254: 4285 .B CMP r5,r0 + 0x08008256: db01 .. BLT 0x800825c ; vPortValidateInterruptPriority + 32 + 0x08008258: 2001 . MOVS r0,#1 + 0x0800825a: e000 .. B 0x800825e ; vPortValidateInterruptPriority + 34 + 0x0800825c: 2000 . MOVS r0,#0 + 0x0800825e: b950 P. CBNZ r0,0x8008276 ; vPortValidateInterruptPriority + 58 + 0x08008260: bf00 .. NOP + 0x08008262: 2050 P MOVS r0,#0x50 + 0x08008264: f3808811 .... MSR BASEPRI,r0 + 0x08008268: f3bf8f4f ..O. DSB + 0x0800826c: f3bf8f6f ..o. ISB + 0x08008270: bf00 .. NOP + 0x08008272: bf00 .. NOP + 0x08008274: e7fe .. B 0x8008274 ; vPortValidateInterruptPriority + 56 + 0x08008276: 480d .H LDR r0,[pc,#52] ; [0x80082ac] = 0xe000ed0c + 0x08008278: 6800 .h LDR r0,[r0,#0] + 0x0800827a: f40060e0 ...` AND r0,r0,#0x700 + 0x0800827e: 490c .I LDR r1,[pc,#48] ; [0x80082b0] = 0x200002cc + 0x08008280: 6809 .h LDR r1,[r1,#0] + 0x08008282: 4288 .B CMP r0,r1 + 0x08008284: d801 .. BHI 0x800828a ; vPortValidateInterruptPriority + 78 + 0x08008286: 2001 . MOVS r0,#1 + 0x08008288: e000 .. B 0x800828c ; vPortValidateInterruptPriority + 80 + 0x0800828a: 2000 . MOVS r0,#0 + 0x0800828c: b950 P. CBNZ r0,0x80082a4 ; vPortValidateInterruptPriority + 104 + 0x0800828e: bf00 .. NOP + 0x08008290: 2050 P MOVS r0,#0x50 + 0x08008292: f3808811 .... MSR BASEPRI,r0 + 0x08008296: f3bf8f4f ..O. DSB + 0x0800829a: f3bf8f6f ..o. ISB + 0x0800829e: bf00 .. NOP + 0x080082a0: bf00 .. NOP + 0x080082a2: e7fe .. B 0x80082a2 ; vPortValidateInterruptPriority + 102 + 0x080082a4: bd70 p. POP {r4-r6,pc} + $d + 0x080082a6: 0000 .. DCW 0 + 0x080082a8: 200002c8 ... DCD 536871624 + 0x080082ac: e000ed0c .... DCD 3758157068 + 0x080082b0: 200002cc ... DCD 536871628 + $t + i.vQueueAddToRegistry + vQueueAddToRegistry + 0x080082b4: 4602 .F MOV r2,r0 + 0x080082b6: 2000 . MOVS r0,#0 + 0x080082b8: e00b .. B 0x80082d2 ; vQueueAddToRegistry + 30 + 0x080082ba: 4b08 .K LDR r3,[pc,#32] ; [0x80082dc] = 0x200009cc + 0x080082bc: f8533030 S.00 LDR r3,[r3,r0,LSL #3] + 0x080082c0: b933 3. CBNZ r3,0x80082d0 ; vQueueAddToRegistry + 28 + 0x080082c2: 4b06 .K LDR r3,[pc,#24] ; [0x80082dc] = 0x200009cc + 0x080082c4: f8431030 C.0. STR r1,[r3,r0,LSL #3] + 0x080082c8: eb0303c0 .... ADD r3,r3,r0,LSL #3 + 0x080082cc: 605a Z` STR r2,[r3,#4] + 0x080082ce: e002 .. B 0x80082d6 ; vQueueAddToRegistry + 34 + 0x080082d0: 1c40 @. ADDS r0,r0,#1 + 0x080082d2: 2808 .( CMP r0,#8 + 0x080082d4: d3f1 .. BCC 0x80082ba ; vQueueAddToRegistry + 6 + 0x080082d6: bf00 .. NOP + 0x080082d8: 4770 pG BX lr + $d + 0x080082da: 0000 .. DCW 0 + 0x080082dc: 200009cc ... DCD 536873420 + $t + i.vQueueWaitForMessageRestricted + vQueueWaitForMessageRestricted + 0x080082e0: e92d41f0 -..A PUSH {r4-r8,lr} + 0x080082e4: 4605 .F MOV r5,r0 + 0x080082e6: 460e .F MOV r6,r1 + 0x080082e8: 4617 .F MOV r7,r2 + 0x080082ea: 462c ,F MOV r4,r5 + 0x080082ec: f7ffff00 .... BL vPortEnterCritical ; 0x80080f0 + 0x080082f0: f9940044 ..D. LDRSB r0,[r4,#0x44] + 0x080082f4: 1c40 @. ADDS r0,r0,#1 + 0x080082f6: b910 .. CBNZ r0,0x80082fe ; vQueueWaitForMessageRestricted + 30 + 0x080082f8: 2000 . MOVS r0,#0 + 0x080082fa: f8840044 ..D. STRB r0,[r4,#0x44] + 0x080082fe: f9940045 ..E. LDRSB r0,[r4,#0x45] + 0x08008302: 1c40 @. ADDS r0,r0,#1 + 0x08008304: b910 .. CBNZ r0,0x800830c ; vQueueWaitForMessageRestricted + 44 + 0x08008306: 2000 . MOVS r0,#0 + 0x08008308: f8840045 ..E. STRB r0,[r4,#0x45] + 0x0800830c: f7ffff1a .... BL vPortExitCritical ; 0x8008144 + 0x08008310: 6ba0 .k LDR r0,[r4,#0x38] + 0x08008312: b928 (. CBNZ r0,0x8008320 ; vQueueWaitForMessageRestricted + 64 + 0x08008314: 463a :F MOV r2,r7 + 0x08008316: 4631 1F MOV r1,r6 + 0x08008318: f1040024 ..$. ADD r0,r4,#0x24 + 0x0800831c: f000f862 ..b. BL vTaskPlaceOnEventListRestricted ; 0x80083e4 + 0x08008320: 4620 F MOV r0,r4 + 0x08008322: f7fffb71 ..q. BL prvUnlockQueue ; 0x8007a08 + 0x08008326: e8bd81f0 .... POP {r4-r8,pc} + 0x0800832a: 0000 .. MOVS r0,r0 + i.vTaskDelay + vTaskDelay + 0x0800832c: b570 p. PUSH {r4-r6,lr} + 0x0800832e: 4604 .F MOV r4,r0 + 0x08008330: 2500 .% MOVS r5,#0 + 0x08008332: b1d4 .. CBZ r4,0x800836a ; vTaskDelay + 62 + 0x08008334: 4812 .H LDR r0,[pc,#72] ; [0x8008380] = 0x20000290 + 0x08008336: 6800 .h LDR r0,[r0,#0] + 0x08008338: b908 .. CBNZ r0,0x800833e ; vTaskDelay + 18 + 0x0800833a: 2001 . MOVS r0,#1 + 0x0800833c: e000 .. B 0x8008340 ; vTaskDelay + 20 + 0x0800833e: 2000 . MOVS r0,#0 + 0x08008340: b950 P. CBNZ r0,0x8008358 ; vTaskDelay + 44 + 0x08008342: bf00 .. NOP + 0x08008344: 2050 P MOVS r0,#0x50 + 0x08008346: f3808811 .... MSR BASEPRI,r0 + 0x0800834a: f3bf8f4f ..O. DSB + 0x0800834e: f3bf8f6f ..o. ISB + 0x08008352: bf00 .. NOP + 0x08008354: bf00 .. NOP + 0x08008356: e7fe .. B 0x8008356 ; vTaskDelay + 42 + 0x08008358: f000f9ae .... BL vTaskSuspendAll ; 0x80086b8 + 0x0800835c: 2100 .! MOVS r1,#0 + 0x0800835e: 4620 F MOV r0,r4 + 0x08008360: f7fefe5e ..^. BL prvAddCurrentTaskToDelayedList ; 0x8007020 + 0x08008364: f001fe5a ..Z. BL xTaskResumeAll ; 0x800a01c + 0x08008368: 4605 .F MOV r5,r0 + 0x0800836a: b93d =. CBNZ r5,0x800837c ; vTaskDelay + 80 + 0x0800836c: f04f5080 O..P MOV r0,#0x10000000 + 0x08008370: 4904 .I LDR r1,[pc,#16] ; [0x8008384] = 0xe000ed04 + 0x08008372: 6008 .` STR r0,[r1,#0] + 0x08008374: f3bf8f4f ..O. DSB + 0x08008378: f3bf8f6f ..o. ISB + 0x0800837c: bd70 p. POP {r4-r6,pc} + $d + 0x0800837e: 0000 .. DCW 0 + 0x08008380: 20000290 ... DCD 536871568 + 0x08008384: e000ed04 .... DCD 3758157060 + $t + i.vTaskInternalSetTimeOutState + vTaskInternalSetTimeOutState + 0x08008388: 4903 .I LDR r1,[pc,#12] ; [0x8008398] = 0x20000280 + 0x0800838a: 6809 .h LDR r1,[r1,#0] + 0x0800838c: 6001 .` STR r1,[r0,#0] + 0x0800838e: 4903 .I LDR r1,[pc,#12] ; [0x800839c] = 0x2000026c + 0x08008390: 6809 .h LDR r1,[r1,#0] + 0x08008392: 6041 A` STR r1,[r0,#4] + 0x08008394: 4770 pG BX lr + $d + 0x08008396: 0000 .. DCW 0 + 0x08008398: 20000280 ... DCD 536871552 + 0x0800839c: 2000026c l.. DCD 536871532 + $t + i.vTaskMissedYield + vTaskMissedYield + 0x080083a0: 2001 . MOVS r0,#1 + 0x080083a2: 4901 .I LDR r1,[pc,#4] ; [0x80083a8] = 0x2000027c + 0x080083a4: 6008 .` STR r0,[r1,#0] + 0x080083a6: 4770 pG BX lr + $d + 0x080083a8: 2000027c |.. DCD 536871548 + $t + i.vTaskPlaceOnEventList + vTaskPlaceOnEventList + 0x080083ac: b570 p. PUSH {r4-r6,lr} + 0x080083ae: 4604 .F MOV r4,r0 + 0x080083b0: 460d .F MOV r5,r1 + 0x080083b2: b954 T. CBNZ r4,0x80083ca ; vTaskPlaceOnEventList + 30 + 0x080083b4: bf00 .. NOP + 0x080083b6: 2050 P MOVS r0,#0x50 + 0x080083b8: f3808811 .... MSR BASEPRI,r0 + 0x080083bc: f3bf8f4f ..O. DSB + 0x080083c0: f3bf8f6f ..o. ISB + 0x080083c4: bf00 .. NOP + 0x080083c6: bf00 .. NOP + 0x080083c8: e7fe .. B 0x80083c8 ; vTaskPlaceOnEventList + 28 + 0x080083ca: 4805 .H LDR r0,[pc,#20] ; [0x80083e0] = 0x20000258 + 0x080083cc: 6801 .h LDR r1,[r0,#0] + 0x080083ce: 3118 .1 ADDS r1,r1,#0x18 + 0x080083d0: 4620 F MOV r0,r4 + 0x080083d2: f7fffcf7 .... BL vListInsert ; 0x8007dc4 + 0x080083d6: 2101 .! MOVS r1,#1 + 0x080083d8: 4628 (F MOV r0,r5 + 0x080083da: f7fefe21 ..!. BL prvAddCurrentTaskToDelayedList ; 0x8007020 + 0x080083de: bd70 p. POP {r4-r6,pc} + $d + 0x080083e0: 20000258 X.. DCD 536871512 + $t + i.vTaskPlaceOnEventListRestricted + vTaskPlaceOnEventListRestricted + 0x080083e4: b570 p. PUSH {r4-r6,lr} + 0x080083e6: 4605 .F MOV r5,r0 + 0x080083e8: 460e .F MOV r6,r1 + 0x080083ea: 4614 .F MOV r4,r2 + 0x080083ec: b955 U. CBNZ r5,0x8008404 ; vTaskPlaceOnEventListRestricted + 32 + 0x080083ee: bf00 .. NOP + 0x080083f0: 2050 P MOVS r0,#0x50 + 0x080083f2: f3808811 .... MSR BASEPRI,r0 + 0x080083f6: f3bf8f4f ..O. DSB + 0x080083fa: f3bf8f6f ..o. ISB + 0x080083fe: bf00 .. NOP + 0x08008400: bf00 .. NOP + 0x08008402: e7fe .. B 0x8008402 ; vTaskPlaceOnEventListRestricted + 30 + 0x08008404: 4806 .H LDR r0,[pc,#24] ; [0x8008420] = 0x20000258 + 0x08008406: 6801 .h LDR r1,[r0,#0] + 0x08008408: 3118 .1 ADDS r1,r1,#0x18 + 0x0800840a: 4628 (F MOV r0,r5 + 0x0800840c: f7fffcf4 .... BL vListInsertEnd ; 0x8007df8 + 0x08008410: b10c .. CBZ r4,0x8008416 ; vTaskPlaceOnEventListRestricted + 50 + 0x08008412: f04f36ff O..6 MOV r6,#0xffffffff + 0x08008416: 4621 !F MOV r1,r4 + 0x08008418: 4630 0F MOV r0,r6 + 0x0800841a: f7fefe01 .... BL prvAddCurrentTaskToDelayedList ; 0x8007020 + 0x0800841e: bd70 p. POP {r4-r6,pc} + $d + 0x08008420: 20000258 X.. DCD 536871512 + $t + i.vTaskPlaceOnUnorderedEventList + vTaskPlaceOnUnorderedEventList + 0x08008424: b570 p. PUSH {r4-r6,lr} + 0x08008426: 4604 .F MOV r4,r0 + 0x08008428: 460d .F MOV r5,r1 + 0x0800842a: 4616 .F MOV r6,r2 + 0x0800842c: b954 T. CBNZ r4,0x8008444 ; vTaskPlaceOnUnorderedEventList + 32 + 0x0800842e: bf00 .. NOP + 0x08008430: 2050 P MOVS r0,#0x50 + 0x08008432: f3808811 .... MSR BASEPRI,r0 + 0x08008436: f3bf8f4f ..O. DSB + 0x0800843a: f3bf8f6f ..o. ISB + 0x0800843e: bf00 .. NOP + 0x08008440: bf00 .. NOP + 0x08008442: e7fe .. B 0x8008442 ; vTaskPlaceOnUnorderedEventList + 30 + 0x08008444: 4810 .H LDR r0,[pc,#64] ; [0x8008488] = 0x20000290 + 0x08008446: 6800 .h LDR r0,[r0,#0] + 0x08008448: b108 .. CBZ r0,0x800844e ; vTaskPlaceOnUnorderedEventList + 42 + 0x0800844a: 2001 . MOVS r0,#1 + 0x0800844c: e000 .. B 0x8008450 ; vTaskPlaceOnUnorderedEventList + 44 + 0x0800844e: 2000 . MOVS r0,#0 + 0x08008450: b950 P. CBNZ r0,0x8008468 ; vTaskPlaceOnUnorderedEventList + 68 + 0x08008452: bf00 .. NOP + 0x08008454: 2050 P MOVS r0,#0x50 + 0x08008456: f3808811 .... MSR BASEPRI,r0 + 0x0800845a: f3bf8f4f ..O. DSB + 0x0800845e: f3bf8f6f ..o. ISB + 0x08008462: bf00 .. NOP + 0x08008464: bf00 .. NOP + 0x08008466: e7fe .. B 0x8008466 ; vTaskPlaceOnUnorderedEventList + 66 + 0x08008468: f0454000 E..@ ORR r0,r5,#0x80000000 + 0x0800846c: 4907 .I LDR r1,[pc,#28] ; [0x800848c] = 0x20000258 + 0x0800846e: 6809 .h LDR r1,[r1,#0] + 0x08008470: 6188 .a STR r0,[r1,#0x18] + 0x08008472: 4806 .H LDR r0,[pc,#24] ; [0x800848c] = 0x20000258 + 0x08008474: 6801 .h LDR r1,[r0,#0] + 0x08008476: 3118 .1 ADDS r1,r1,#0x18 + 0x08008478: 4620 F MOV r0,r4 + 0x0800847a: f7fffcbd .... BL vListInsertEnd ; 0x8007df8 + 0x0800847e: 2101 .! MOVS r1,#1 + 0x08008480: 4630 0F MOV r0,r6 + 0x08008482: f7fefdcd .... BL prvAddCurrentTaskToDelayedList ; 0x8007020 + 0x08008486: bd70 p. POP {r4-r6,pc} + $d + 0x08008488: 20000290 ... DCD 536871568 + 0x0800848c: 20000258 X.. DCD 536871512 + $t + i.vTaskPriorityDisinheritAfterTimeout + vTaskPriorityDisinheritAfterTimeout + 0x08008490: e92d47f0 -..G PUSH {r4-r10,lr} + 0x08008494: 4606 .F MOV r6,r0 + 0x08008496: 460f .F MOV r7,r1 + 0x08008498: 4634 4F MOV r4,r6 + 0x0800849a: f04f0901 O... MOV r9,#1 + 0x0800849e: 2e00 .. CMP r6,#0 + 0x080084a0: d055 U. BEQ 0x800854e ; vTaskPriorityDisinheritAfterTimeout + 190 + 0x080084a2: 6d20 m LDR r0,[r4,#0x50] + 0x080084a4: b950 P. CBNZ r0,0x80084bc ; vTaskPriorityDisinheritAfterTimeout + 44 + 0x080084a6: bf00 .. NOP + 0x080084a8: 2050 P MOVS r0,#0x50 + 0x080084aa: f3808811 .... MSR BASEPRI,r0 + 0x080084ae: f3bf8f4f ..O. DSB + 0x080084b2: f3bf8f6f ..o. ISB + 0x080084b6: bf00 .. NOP + 0x080084b8: bf00 .. NOP + 0x080084ba: e7fe .. B 0x80084ba ; vTaskPriorityDisinheritAfterTimeout + 42 + 0x080084bc: 6ce0 .l LDR r0,[r4,#0x4c] + 0x080084be: 42b8 .B CMP r0,r7 + 0x080084c0: d201 .. BCS 0x80084c6 ; vTaskPriorityDisinheritAfterTimeout + 54 + 0x080084c2: 463d =F MOV r5,r7 + 0x080084c4: e000 .. B 0x80084c8 ; vTaskPriorityDisinheritAfterTimeout + 56 + 0x080084c6: 6ce5 .l LDR r5,[r4,#0x4c] + 0x080084c8: 6ae0 .j LDR r0,[r4,#0x2c] + 0x080084ca: 42a8 .B CMP r0,r5 + 0x080084cc: d03f ?. BEQ 0x800854e ; vTaskPriorityDisinheritAfterTimeout + 190 + 0x080084ce: 6d20 m LDR r0,[r4,#0x50] + 0x080084d0: 2801 .( CMP r0,#1 + 0x080084d2: d13c <. BNE 0x800854e ; vTaskPriorityDisinheritAfterTimeout + 190 + 0x080084d4: 481f .H LDR r0,[pc,#124] ; [0x8008554] = 0x20000258 + 0x080084d6: 6800 .h LDR r0,[r0,#0] + 0x080084d8: 4284 .B CMP r4,r0 + 0x080084da: d001 .. BEQ 0x80084e0 ; vTaskPriorityDisinheritAfterTimeout + 80 + 0x080084dc: 2001 . MOVS r0,#1 + 0x080084de: e000 .. B 0x80084e2 ; vTaskPriorityDisinheritAfterTimeout + 82 + 0x080084e0: 2000 . MOVS r0,#0 + 0x080084e2: b950 P. CBNZ r0,0x80084fa ; vTaskPriorityDisinheritAfterTimeout + 106 + 0x080084e4: bf00 .. NOP + 0x080084e6: 2050 P MOVS r0,#0x50 + 0x080084e8: f3808811 .... MSR BASEPRI,r0 + 0x080084ec: f3bf8f4f ..O. DSB + 0x080084f0: f3bf8f6f ..o. ISB + 0x080084f4: bf00 .. NOP + 0x080084f6: bf00 .. NOP + 0x080084f8: e7fe .. B 0x80084f8 ; vTaskPriorityDisinheritAfterTimeout + 104 + 0x080084fa: f8d4802c ..,. LDR r8,[r4,#0x2c] + 0x080084fe: 62e5 .b STR r5,[r4,#0x2c] + 0x08008500: 69a0 .i LDR r0,[r4,#0x18] + 0x08008502: f0004000 ...@ AND r0,r0,#0x80000000 + 0x08008506: b910 .. CBNZ r0,0x800850e ; vTaskPriorityDisinheritAfterTimeout + 126 + 0x08008508: f1c50038 ..8. RSB r0,r5,#0x38 + 0x0800850c: 61a0 .a STR r0,[r4,#0x18] + 0x0800850e: eb080188 .... ADD r1,r8,r8,LSL #2 + 0x08008512: 4a11 .J LDR r2,[pc,#68] ; [0x8008558] = 0x20000a0c + 0x08008514: eb020181 .... ADD r1,r2,r1,LSL #2 + 0x08008518: 6960 `i LDR r0,[r4,#0x14] + 0x0800851a: 4288 .B CMP r0,r1 + 0x0800851c: d101 .. BNE 0x8008522 ; vTaskPriorityDisinheritAfterTimeout + 146 + 0x0800851e: 2001 . MOVS r0,#1 + 0x08008520: e000 .. B 0x8008524 ; vTaskPriorityDisinheritAfterTimeout + 148 + 0x08008522: 2000 . MOVS r0,#0 + 0x08008524: b198 .. CBZ r0,0x800854e ; vTaskPriorityDisinheritAfterTimeout + 190 + 0x08008526: 1d20 . ADDS r0,r4,#4 + 0x08008528: f7fffbfa .... BL uxListRemove ; 0x8007d20 + 0x0800852c: 490b .I LDR r1,[pc,#44] ; [0x800855c] = 0x20000270 + 0x0800852e: 6ae0 .j LDR r0,[r4,#0x2c] + 0x08008530: 6809 .h LDR r1,[r1,#0] + 0x08008532: 4288 .B CMP r0,r1 + 0x08008534: d902 .. BLS 0x800853c ; vTaskPriorityDisinheritAfterTimeout + 172 + 0x08008536: 4909 .I LDR r1,[pc,#36] ; [0x800855c] = 0x20000270 + 0x08008538: 6ae0 .j LDR r0,[r4,#0x2c] + 0x0800853a: 6008 .` STR r0,[r1,#0] + 0x0800853c: 6ae1 .j LDR r1,[r4,#0x2c] + 0x0800853e: eb010181 .... ADD r1,r1,r1,LSL #2 + 0x08008542: 4a05 .J LDR r2,[pc,#20] ; [0x8008558] = 0x20000a0c + 0x08008544: eb020081 .... ADD r0,r2,r1,LSL #2 + 0x08008548: 1d21 !. ADDS r1,r4,#4 + 0x0800854a: f7fffc55 ..U. BL vListInsertEnd ; 0x8007df8 + 0x0800854e: e8bd87f0 .... POP {r4-r10,pc} + $d + 0x08008552: 0000 .. DCW 0 + 0x08008554: 20000258 X.. DCD 536871512 + 0x08008558: 20000a0c ... DCD 536873484 + 0x0800855c: 20000270 p.. DCD 536871536 + $t + i.vTaskRemoveFromUnorderedEventList + vTaskRemoveFromUnorderedEventList + 0x08008560: b570 p. PUSH {r4-r6,lr} + 0x08008562: 4605 .F MOV r5,r0 + 0x08008564: 460e .F MOV r6,r1 + 0x08008566: 4821 !H LDR r0,[pc,#132] ; [0x80085ec] = 0x20000290 + 0x08008568: 6800 .h LDR r0,[r0,#0] + 0x0800856a: b108 .. CBZ r0,0x8008570 ; vTaskRemoveFromUnorderedEventList + 16 + 0x0800856c: 2001 . MOVS r0,#1 + 0x0800856e: e000 .. B 0x8008572 ; vTaskRemoveFromUnorderedEventList + 18 + 0x08008570: 2000 . MOVS r0,#0 + 0x08008572: b950 P. CBNZ r0,0x800858a ; vTaskRemoveFromUnorderedEventList + 42 + 0x08008574: bf00 .. NOP + 0x08008576: 2050 P MOVS r0,#0x50 + 0x08008578: f3808811 .... MSR BASEPRI,r0 + 0x0800857c: f3bf8f4f ..O. DSB + 0x08008580: f3bf8f6f ..o. ISB + 0x08008584: bf00 .. NOP + 0x08008586: bf00 .. NOP + 0x08008588: e7fe .. B 0x8008588 ; vTaskRemoveFromUnorderedEventList + 40 + 0x0800858a: f0464000 F..@ ORR r0,r6,#0x80000000 + 0x0800858e: 6028 (` STR r0,[r5,#0] + 0x08008590: 68ec .h LDR r4,[r5,#0xc] + 0x08008592: b954 T. CBNZ r4,0x80085aa ; vTaskRemoveFromUnorderedEventList + 74 + 0x08008594: bf00 .. NOP + 0x08008596: 2050 P MOVS r0,#0x50 + 0x08008598: f3808811 .... MSR BASEPRI,r0 + 0x0800859c: f3bf8f4f ..O. DSB + 0x080085a0: f3bf8f6f ..o. ISB + 0x080085a4: bf00 .. NOP + 0x080085a6: bf00 .. NOP + 0x080085a8: e7fe .. B 0x80085a8 ; vTaskRemoveFromUnorderedEventList + 72 + 0x080085aa: 4628 (F MOV r0,r5 + 0x080085ac: f7fffbb8 .... BL uxListRemove ; 0x8007d20 + 0x080085b0: 1d20 . ADDS r0,r4,#4 + 0x080085b2: f7fffbb5 .... BL uxListRemove ; 0x8007d20 + 0x080085b6: 490e .I LDR r1,[pc,#56] ; [0x80085f0] = 0x20000270 + 0x080085b8: 6ae0 .j LDR r0,[r4,#0x2c] + 0x080085ba: 6809 .h LDR r1,[r1,#0] + 0x080085bc: 4288 .B CMP r0,r1 + 0x080085be: d902 .. BLS 0x80085c6 ; vTaskRemoveFromUnorderedEventList + 102 + 0x080085c0: 490b .I LDR r1,[pc,#44] ; [0x80085f0] = 0x20000270 + 0x080085c2: 6ae0 .j LDR r0,[r4,#0x2c] + 0x080085c4: 6008 .` STR r0,[r1,#0] + 0x080085c6: 6ae1 .j LDR r1,[r4,#0x2c] + 0x080085c8: eb010181 .... ADD r1,r1,r1,LSL #2 + 0x080085cc: 4a09 .J LDR r2,[pc,#36] ; [0x80085f4] = 0x20000a0c + 0x080085ce: eb020081 .... ADD r0,r2,r1,LSL #2 + 0x080085d2: 1d21 !. ADDS r1,r4,#4 + 0x080085d4: f7fffc10 .... BL vListInsertEnd ; 0x8007df8 + 0x080085d8: 4907 .I LDR r1,[pc,#28] ; [0x80085f8] = 0x20000258 + 0x080085da: 6ae0 .j LDR r0,[r4,#0x2c] + 0x080085dc: 6809 .h LDR r1,[r1,#0] + 0x080085de: 6ac9 .j LDR r1,[r1,#0x2c] + 0x080085e0: 4288 .B CMP r0,r1 + 0x080085e2: d902 .. BLS 0x80085ea ; vTaskRemoveFromUnorderedEventList + 138 + 0x080085e4: 2001 . MOVS r0,#1 + 0x080085e6: 4905 .I LDR r1,[pc,#20] ; [0x80085fc] = 0x2000027c + 0x080085e8: 6008 .` STR r0,[r1,#0] + 0x080085ea: bd70 p. POP {r4-r6,pc} + $d + 0x080085ec: 20000290 ... DCD 536871568 + 0x080085f0: 20000270 p.. DCD 536871536 + 0x080085f4: 20000a0c ... DCD 536873484 + 0x080085f8: 20000258 X.. DCD 536871512 + 0x080085fc: 2000027c |.. DCD 536871548 + $t + i.vTaskStartScheduler + vTaskStartScheduler + 0x08008600: b510 .. PUSH {r4,lr} + 0x08008602: b086 .. SUB sp,sp,#0x18 + 0x08008604: 2000 . MOVS r0,#0 + 0x08008606: 9005 .. STR r0,[sp,#0x14] + 0x08008608: 9004 .. STR r0,[sp,#0x10] + 0x0800860a: aa03 .. ADD r2,sp,#0xc + 0x0800860c: a904 .. ADD r1,sp,#0x10 + 0x0800860e: a805 .. ADD r0,sp,#0x14 + 0x08008610: f7fffba8 .... BL vApplicationGetIdleTaskMemory ; 0x8007d64 + 0x08008614: 2200 ." MOVS r2,#0 + 0x08008616: e9dd1004 .... LDRD r1,r0,[sp,#0x10] + 0x0800861a: 4613 .F MOV r3,r2 + 0x0800861c: e9cd2100 ...! STRD r2,r1,[sp,#0] + 0x08008620: 9002 .. STR r0,[sp,#8] + 0x08008622: a11e .. ADR r1,{pc}+0x7a ; 0x800869c + 0x08008624: 481f .H LDR r0,[pc,#124] ; [0x80086a4] = 0x80073c1 + 0x08008626: 9a03 .. LDR r2,[sp,#0xc] + 0x08008628: f001faf4 .... BL xTaskCreateStatic ; 0x8009c14 + 0x0800862c: 491e .I LDR r1,[pc,#120] ; [0x80086a8] = 0x2000028c + 0x0800862e: 6008 .` STR r0,[r1,#0] + 0x08008630: 4608 .F MOV r0,r1 + 0x08008632: 6800 .h LDR r0,[r0,#0] + 0x08008634: b108 .. CBZ r0,0x800863a ; vTaskStartScheduler + 58 + 0x08008636: 2401 .$ MOVS r4,#1 + 0x08008638: e000 .. B 0x800863c ; vTaskStartScheduler + 60 + 0x0800863a: 2400 .$ MOVS r4,#0 + 0x0800863c: 2c01 ., CMP r4,#1 + 0x0800863e: d102 .. BNE 0x8008646 ; vTaskStartScheduler + 70 + 0x08008640: f001fd8a .... BL xTimerCreateTimerTask ; 0x800a158 + 0x08008644: 4604 .F MOV r4,r0 + 0x08008646: 2c01 ., CMP r4,#1 + 0x08008648: d115 .. BNE 0x8008676 ; vTaskStartScheduler + 118 + 0x0800864a: bf00 .. NOP + 0x0800864c: 2050 P MOVS r0,#0x50 + 0x0800864e: f3808811 .... MSR BASEPRI,r0 + 0x08008652: f3bf8f4f ..O. DSB + 0x08008656: f3bf8f6f ..o. ISB + 0x0800865a: bf00 .. NOP + 0x0800865c: f04f30ff O..0 MOV r0,#0xffffffff + 0x08008660: 4912 .I LDR r1,[pc,#72] ; [0x80086ac] = 0x20000288 + 0x08008662: 6008 .` STR r0,[r1,#0] + 0x08008664: 2001 . MOVS r0,#1 + 0x08008666: 4912 .I LDR r1,[pc,#72] ; [0x80086b0] = 0x20000274 + 0x08008668: 6008 .` STR r0,[r1,#0] + 0x0800866a: 2000 . MOVS r0,#0 + 0x0800866c: 4911 .I LDR r1,[pc,#68] ; [0x80086b4] = 0x2000026c + 0x0800866e: 6008 .` STR r0,[r1,#0] + 0x08008670: f000fd90 .... BL xPortStartScheduler ; 0x8009194 + 0x08008674: e010 .. B 0x8008698 ; vTaskStartScheduler + 152 + 0x08008676: 1c60 `. ADDS r0,r4,#1 + 0x08008678: b108 .. CBZ r0,0x800867e ; vTaskStartScheduler + 126 + 0x0800867a: 2001 . MOVS r0,#1 + 0x0800867c: e000 .. B 0x8008680 ; vTaskStartScheduler + 128 + 0x0800867e: 2000 . MOVS r0,#0 + 0x08008680: b950 P. CBNZ r0,0x8008698 ; vTaskStartScheduler + 152 + 0x08008682: bf00 .. NOP + 0x08008684: 2050 P MOVS r0,#0x50 + 0x08008686: f3808811 .... MSR BASEPRI,r0 + 0x0800868a: f3bf8f4f ..O. DSB + 0x0800868e: f3bf8f6f ..o. ISB + 0x08008692: bf00 .. NOP + 0x08008694: bf00 .. NOP + 0x08008696: e7fe .. B 0x8008696 ; vTaskStartScheduler + 150 + 0x08008698: b006 .. ADD sp,sp,#0x18 + 0x0800869a: bd10 .. POP {r4,pc} + $d + 0x0800869c: 454c4449 IDLE DCD 1162626121 + 0x080086a0: 00000000 .... DCD 0 + 0x080086a4: 080073c1 .s.. DCD 134247361 + 0x080086a8: 2000028c ... DCD 536871564 + 0x080086ac: 20000288 ... DCD 536871560 + 0x080086b0: 20000274 t.. DCD 536871540 + 0x080086b4: 2000026c l.. DCD 536871532 + $t + i.vTaskSuspendAll + vTaskSuspendAll + 0x080086b8: 4802 .H LDR r0,[pc,#8] ; [0x80086c4] = 0x20000290 + 0x080086ba: 6800 .h LDR r0,[r0,#0] + 0x080086bc: 1c40 @. ADDS r0,r0,#1 + 0x080086be: 4901 .I LDR r1,[pc,#4] ; [0x80086c4] = 0x20000290 + 0x080086c0: 6008 .` STR r0,[r1,#0] + 0x080086c2: 4770 pG BX lr + $d + 0x080086c4: 20000290 ... DCD 536871568 + $t + i.vTaskSwitchContext + vTaskSwitchContext + 0x080086c8: 481e .H LDR r0,[pc,#120] ; [0x8008744] = 0x20000290 + 0x080086ca: 6800 .h LDR r0,[r0,#0] + 0x080086cc: b118 .. CBZ r0,0x80086d6 ; vTaskSwitchContext + 14 + 0x080086ce: 2001 . MOVS r0,#1 + 0x080086d0: 491d .I LDR r1,[pc,#116] ; [0x8008748] = 0x2000027c + 0x080086d2: 6008 .` STR r0,[r1,#0] + 0x080086d4: e034 4. B 0x8008740 ; vTaskSwitchContext + 120 + 0x080086d6: 2000 . MOVS r0,#0 + 0x080086d8: 491b .I LDR r1,[pc,#108] ; [0x8008748] = 0x2000027c + 0x080086da: 6008 .` STR r0,[r1,#0] + 0x080086dc: 481b .H LDR r0,[pc,#108] ; [0x800874c] = 0x20000270 + 0x080086de: 6801 .h LDR r1,[r0,#0] + 0x080086e0: e00c .. B 0x80086fc ; vTaskSwitchContext + 52 + 0x080086e2: b951 Q. CBNZ r1,0x80086fa ; vTaskSwitchContext + 50 + 0x080086e4: bf00 .. NOP + 0x080086e6: 2050 P MOVS r0,#0x50 + 0x080086e8: f3808811 .... MSR BASEPRI,r0 + 0x080086ec: f3bf8f4f ..O. DSB + 0x080086f0: f3bf8f6f ..o. ISB + 0x080086f4: bf00 .. NOP + 0x080086f6: bf00 .. NOP + 0x080086f8: e7fe .. B 0x80086f8 ; vTaskSwitchContext + 48 + 0x080086fa: 1e49 I. SUBS r1,r1,#1 + 0x080086fc: eb010081 .... ADD r0,r1,r1,LSL #2 + 0x08008700: 4a13 .J LDR r2,[pc,#76] ; [0x8008750] = 0x20000a0c + 0x08008702: f8520020 R. . LDR r0,[r2,r0,LSL #2] + 0x08008706: b908 .. CBNZ r0,0x800870c ; vTaskSwitchContext + 68 + 0x08008708: 2001 . MOVS r0,#1 + 0x0800870a: e000 .. B 0x800870e ; vTaskSwitchContext + 70 + 0x0800870c: 2000 . MOVS r0,#0 + 0x0800870e: 2800 .( CMP r0,#0 + 0x08008710: d1e7 .. BNE 0x80086e2 ; vTaskSwitchContext + 26 + 0x08008712: eb010281 .... ADD r2,r1,r1,LSL #2 + 0x08008716: 4b0e .K LDR r3,[pc,#56] ; [0x8008750] = 0x20000a0c + 0x08008718: eb030082 .... ADD r0,r3,r2,LSL #2 + 0x0800871c: 6842 Bh LDR r2,[r0,#4] + 0x0800871e: 6852 Rh LDR r2,[r2,#4] + 0x08008720: 6042 B` STR r2,[r0,#4] + 0x08008722: f1000208 .... ADD r2,r0,#8 + 0x08008726: 6843 Ch LDR r3,[r0,#4] + 0x08008728: 4293 .B CMP r3,r2 + 0x0800872a: d102 .. BNE 0x8008732 ; vTaskSwitchContext + 106 + 0x0800872c: 6842 Bh LDR r2,[r0,#4] + 0x0800872e: 6852 Rh LDR r2,[r2,#4] + 0x08008730: 6042 B` STR r2,[r0,#4] + 0x08008732: 6842 Bh LDR r2,[r0,#4] + 0x08008734: 68d2 .h LDR r2,[r2,#0xc] + 0x08008736: 4b07 .K LDR r3,[pc,#28] ; [0x8008754] = 0x20000258 + 0x08008738: 601a .` STR r2,[r3,#0] + 0x0800873a: 4804 .H LDR r0,[pc,#16] ; [0x800874c] = 0x20000270 + 0x0800873c: 6001 .` STR r1,[r0,#0] + 0x0800873e: bf00 .. NOP + 0x08008740: 4770 pG BX lr + $d + 0x08008742: 0000 .. DCW 0 + 0x08008744: 20000290 ... DCD 536871568 + 0x08008748: 2000027c |.. DCD 536871548 + 0x0800874c: 20000270 p.. DCD 536871536 + 0x08008750: 20000a0c ... DCD 536873484 + 0x08008754: 20000258 X.. DCD 536871512 + $t + i.xEventGroupClearBits + xEventGroupClearBits + 0x08008758: e92d41f0 -..A PUSH {r4-r8,lr} + 0x0800875c: 4605 .F MOV r5,r0 + 0x0800875e: 460e .F MOV r6,r1 + 0x08008760: 462c ,F MOV r4,r5 + 0x08008762: b955 U. CBNZ r5,0x800877a ; xEventGroupClearBits + 34 + 0x08008764: bf00 .. NOP + 0x08008766: 2050 P MOVS r0,#0x50 + 0x08008768: f3808811 .... MSR BASEPRI,r0 + 0x0800876c: f3bf8f4f ..O. DSB + 0x08008770: f3bf8f6f ..o. ISB + 0x08008774: bf00 .. NOP + 0x08008776: bf00 .. NOP + 0x08008778: e7fe .. B 0x8008778 ; xEventGroupClearBits + 32 + 0x0800877a: f006407f ...@ AND r0,r6,#0xff000000 + 0x0800877e: b908 .. CBNZ r0,0x8008784 ; xEventGroupClearBits + 44 + 0x08008780: 2001 . MOVS r0,#1 + 0x08008782: e000 .. B 0x8008786 ; xEventGroupClearBits + 46 + 0x08008784: 2000 . MOVS r0,#0 + 0x08008786: b950 P. CBNZ r0,0x800879e ; xEventGroupClearBits + 70 + 0x08008788: bf00 .. NOP + 0x0800878a: 2050 P MOVS r0,#0x50 + 0x0800878c: f3808811 .... MSR BASEPRI,r0 + 0x08008790: f3bf8f4f ..O. DSB + 0x08008794: f3bf8f6f ..o. ISB + 0x08008798: bf00 .. NOP + 0x0800879a: bf00 .. NOP + 0x0800879c: e7fe .. B 0x800879c ; xEventGroupClearBits + 68 + 0x0800879e: f7fffca7 .... BL vPortEnterCritical ; 0x80080f0 + 0x080087a2: 6827 'h LDR r7,[r4,#0] + 0x080087a4: 6820 h LDR r0,[r4,#0] + 0x080087a6: 43b0 .C BICS r0,r0,r6 + 0x080087a8: 6020 ` STR r0,[r4,#0] + 0x080087aa: f7fffccb .... BL vPortExitCritical ; 0x8008144 + 0x080087ae: 4638 8F MOV r0,r7 + 0x080087b0: e8bd81f0 .... POP {r4-r8,pc} + i.xEventGroupCreate + xEventGroupCreate + 0x080087b4: b510 .. PUSH {r4,lr} + 0x080087b6: 2020 MOVS r0,#0x20 + 0x080087b8: f7fff98e .... BL pvPortMalloc ; 0x8007ad8 + 0x080087bc: 4604 .F MOV r4,r0 + 0x080087be: b134 4. CBZ r4,0x80087ce ; xEventGroupCreate + 26 + 0x080087c0: 2000 . MOVS r0,#0 + 0x080087c2: 6020 ` STR r0,[r4,#0] + 0x080087c4: 1d20 . ADDS r0,r4,#4 + 0x080087c6: f7fffaed .... BL vListInitialise ; 0x8007da4 + 0x080087ca: 2000 . MOVS r0,#0 + 0x080087cc: 7720 w STRB r0,[r4,#0x1c] + 0x080087ce: 4620 F MOV r0,r4 + 0x080087d0: bd10 .. POP {r4,pc} + i.xEventGroupSetBits + xEventGroupSetBits + 0x080087d2: e92d4ffe -..O PUSH {r1-r11,lr} + 0x080087d6: 4607 .F MOV r7,r0 + 0x080087d8: 4688 .F MOV r8,r1 + 0x080087da: 2000 . MOVS r0,#0 + 0x080087dc: 9001 .. STR r0,[sp,#4] + 0x080087de: 463c H LDR r0,[pc,#248] ; [0x8008cf4] = 0x20000410 + 0x08008bfc: 6800 .h LDR r0,[r0,#0] + 0x08008bfe: 6081 .` STR r1,[r0,#8] + 0x08008c00: 483c . BL vPortExitCritical ; 0x8008144 + 0x080098c8: 2000 . MOVS r0,#0 + 0x080098ca: e7f6 .. B 0x80098ba ; xQueueReceive + 182 + 0x080098cc: f1b80f00 .... CMP r8,#0 + 0x080098d0: d104 .. BNE 0x80098dc ; xQueueReceive + 216 + 0x080098d2: a801 .. ADD r0,sp,#4 + 0x080098d4: f7fefd58 ..X. BL vTaskInternalSetTimeOutState ; 0x8008388 + 0x080098d8: f04f0801 O... MOV r8,#1 + 0x080098dc: f7fefc32 ..2. BL vPortExitCritical ; 0x8008144 + 0x080098e0: f7fefeea .... BL vTaskSuspendAll ; 0x80086b8 + 0x080098e4: f7fefc04 .... BL vPortEnterCritical ; 0x80080f0 + 0x080098e8: f9940044 ..D. LDRSB r0,[r4,#0x44] + 0x080098ec: 1c40 @. ADDS r0,r0,#1 + 0x080098ee: b910 .. CBNZ r0,0x80098f6 ; xQueueReceive + 242 + 0x080098f0: 2000 . MOVS r0,#0 + 0x080098f2: f8840044 ..D. STRB r0,[r4,#0x44] + 0x080098f6: f9940045 ..E. LDRSB r0,[r4,#0x45] + 0x080098fa: 1c40 @. ADDS r0,r0,#1 + 0x080098fc: b910 .. CBNZ r0,0x8009904 ; xQueueReceive + 256 + 0x080098fe: 2000 . MOVS r0,#0 + 0x08009900: f8840045 ..E. STRB r0,[r4,#0x45] + 0x08009904: f7fefc1e .... BL vPortExitCritical ; 0x8008144 + 0x08009908: a905 .. ADD r1,sp,#0x14 + 0x0800990a: a801 .. ADD r0,sp,#4 + 0x0800990c: f000f90a .... BL xTaskCheckForTimeOut ; 0x8009b24 + 0x08009910: b9f0 .. CBNZ r0,0x8009950 ; xQueueReceive + 332 + 0x08009912: 4620 F MOV r0,r4 + 0x08009914: f7fdfea0 .... BL prvIsQueueEmpty ; 0x8007658 + 0x08009918: b1a0 .. CBZ r0,0x8009944 ; xQueueReceive + 320 + 0x0800991a: f1040024 ..$. ADD r0,r4,#0x24 + 0x0800991e: 9905 .. LDR r1,[sp,#0x14] + 0x08009920: f7fefd44 ..D. BL vTaskPlaceOnEventList ; 0x80083ac + 0x08009924: 4620 F MOV r0,r4 + 0x08009926: f7fef86f ..o. BL prvUnlockQueue ; 0x8007a08 + 0x0800992a: f000fb77 ..w. BL xTaskResumeAll ; 0x800a01c + 0x0800992e: 2800 .( CMP r0,#0 + 0x08009930: d1a3 .. BNE 0x800987a ; xQueueReceive + 118 + 0x08009932: f04f5080 O..P MOV r0,#0x10000000 + 0x08009936: 490c .I LDR r1,[pc,#48] ; [0x8009968] = 0xe000ed04 + 0x08009938: 6008 .` STR r0,[r1,#0] + 0x0800993a: f3bf8f4f ..O. DSB + 0x0800993e: f3bf8f6f ..o. ISB + 0x08009942: e79a .. B 0x800987a ; xQueueReceive + 118 + 0x08009944: 4620 F MOV r0,r4 + 0x08009946: f7fef85f .._. BL prvUnlockQueue ; 0x8007a08 + 0x0800994a: f000fb67 ..g. BL xTaskResumeAll ; 0x800a01c + 0x0800994e: e794 .. B 0x800987a ; xQueueReceive + 118 + 0x08009950: 4620 F MOV r0,r4 + 0x08009952: f7fef859 ..Y. BL prvUnlockQueue ; 0x8007a08 + 0x08009956: f000fb61 ..a. BL xTaskResumeAll ; 0x800a01c + 0x0800995a: 4620 F MOV r0,r4 + 0x0800995c: f7fdfe7c ..|. BL prvIsQueueEmpty ; 0x8007658 + 0x08009960: 2800 .( CMP r0,#0 + 0x08009962: d08a .. BEQ 0x800987a ; xQueueReceive + 118 + 0x08009964: 2000 . MOVS r0,#0 + 0x08009966: e7a8 .. B 0x80098ba ; xQueueReceive + 182 + $d + 0x08009968: e000ed04 .... DCD 3758157060 + $t + i.xQueueSemaphoreTake + xQueueSemaphoreTake + 0x0800996c: e92d41f3 -..A PUSH {r0,r1,r4-r8,lr} + 0x08009970: b082 .. SUB sp,sp,#8 + 0x08009972: 4605 .F MOV r5,r0 + 0x08009974: f04f0800 O... MOV r8,#0 + 0x08009978: 462c ,F MOV r4,r5 + 0x0800997a: 2600 .& MOVS r6,#0 + 0x0800997c: b954 T. CBNZ r4,0x8009994 ; xQueueSemaphoreTake + 40 + 0x0800997e: bf00 .. NOP + 0x08009980: 2050 P MOVS r0,#0x50 + 0x08009982: f3808811 .... MSR BASEPRI,r0 + 0x08009986: f3bf8f4f ..O. DSB + 0x0800998a: f3bf8f6f ..o. ISB + 0x0800998e: bf00 .. NOP + 0x08009990: bf00 .. NOP + 0x08009992: e7fe .. B 0x8009992 ; xQueueSemaphoreTake + 38 + 0x08009994: 6c20 l LDR r0,[r4,#0x40] + 0x08009996: b908 .. CBNZ r0,0x800999c ; xQueueSemaphoreTake + 48 + 0x08009998: 2001 . MOVS r0,#1 + 0x0800999a: e000 .. B 0x800999e ; xQueueSemaphoreTake + 50 + 0x0800999c: 2000 . MOVS r0,#0 + 0x0800999e: b950 P. CBNZ r0,0x80099b6 ; xQueueSemaphoreTake + 74 + 0x080099a0: bf00 .. NOP + 0x080099a2: 2050 P MOVS r0,#0x50 + 0x080099a4: f3808811 .... MSR BASEPRI,r0 + 0x080099a8: f3bf8f4f ..O. DSB + 0x080099ac: f3bf8f6f ..o. ISB + 0x080099b0: bf00 .. NOP + 0x080099b2: bf00 .. NOP + 0x080099b4: e7fe .. B 0x80099b4 ; xQueueSemaphoreTake + 72 + 0x080099b6: f000f989 .... BL xTaskGetSchedulerState ; 0x8009ccc + 0x080099ba: b908 .. CBNZ r0,0x80099c0 ; xQueueSemaphoreTake + 84 + 0x080099bc: 9803 .. LDR r0,[sp,#0xc] + 0x080099be: b908 .. CBNZ r0,0x80099c4 ; xQueueSemaphoreTake + 88 + 0x080099c0: 2001 . MOVS r0,#1 + 0x080099c2: e000 .. B 0x80099c6 ; xQueueSemaphoreTake + 90 + 0x080099c4: 2000 . MOVS r0,#0 + 0x080099c6: b950 P. CBNZ r0,0x80099de ; xQueueSemaphoreTake + 114 + 0x080099c8: bf00 .. NOP + 0x080099ca: 2050 P MOVS r0,#0x50 + 0x080099cc: f3808811 .... MSR BASEPRI,r0 + 0x080099d0: f3bf8f4f ..O. DSB + 0x080099d4: f3bf8f6f ..o. ISB + 0x080099d8: bf00 .. NOP + 0x080099da: bf00 .. NOP + 0x080099dc: e7fe .. B 0x80099dc ; xQueueSemaphoreTake + 112 + 0x080099de: bf00 .. NOP + 0x080099e0: f7fefb86 .... BL vPortEnterCritical ; 0x80080f0 + 0x080099e4: 6ba7 .k LDR r7,[r4,#0x38] + 0x080099e6: b1ff .. CBZ r7,0x8009a28 ; xQueueSemaphoreTake + 188 + 0x080099e8: 1e78 x. SUBS r0,r7,#1 + 0x080099ea: 63a0 .c STR r0,[r4,#0x38] + 0x080099ec: 6820 h LDR r0,[r4,#0] + 0x080099ee: b910 .. CBNZ r0,0x80099f6 ; xQueueSemaphoreTake + 138 + 0x080099f0: f7fef910 .... BL pvTaskIncrementMutexHeldCount ; 0x8007c14 + 0x080099f4: 6060 `` STR r0,[r4,#4] + 0x080099f6: 6920 i LDR r0,[r4,#0x10] + 0x080099f8: b908 .. CBNZ r0,0x80099fe ; xQueueSemaphoreTake + 146 + 0x080099fa: 2001 . MOVS r0,#1 + 0x080099fc: e000 .. B 0x8009a00 ; xQueueSemaphoreTake + 148 + 0x080099fe: 2000 . MOVS r0,#0 + 0x08009a00: b960 `. CBNZ r0,0x8009a1c ; xQueueSemaphoreTake + 176 + 0x08009a02: f1040010 .... ADD r0,r4,#0x10 + 0x08009a06: f000fabd .... BL xTaskRemoveFromEventList ; 0x8009f84 + 0x08009a0a: b138 8. CBZ r0,0x8009a1c ; xQueueSemaphoreTake + 176 + 0x08009a0c: f04f5080 O..P MOV r0,#0x10000000 + 0x08009a10: 4943 CI LDR r1,[pc,#268] ; [0x8009b20] = 0xe000ed04 + 0x08009a12: 6008 .` STR r0,[r1,#0] + 0x08009a14: f3bf8f4f ..O. DSB + 0x08009a18: f3bf8f6f ..o. ISB + 0x08009a1c: f7fefb92 .... BL vPortExitCritical ; 0x8008144 + 0x08009a20: 2001 . MOVS r0,#1 + 0x08009a22: b004 .. ADD sp,sp,#0x10 + 0x08009a24: e8bd81f0 .... POP {r4-r8,pc} + 0x08009a28: 9803 .. LDR r0,[sp,#0xc] + 0x08009a2a: b998 .. CBNZ r0,0x8009a54 ; xQueueSemaphoreTake + 232 + 0x08009a2c: b90e .. CBNZ r6,0x8009a32 ; xQueueSemaphoreTake + 198 + 0x08009a2e: 2001 . MOVS r0,#1 + 0x08009a30: e000 .. B 0x8009a34 ; xQueueSemaphoreTake + 200 + 0x08009a32: 2000 . MOVS r0,#0 + 0x08009a34: b950 P. CBNZ r0,0x8009a4c ; xQueueSemaphoreTake + 224 + 0x08009a36: bf00 .. NOP + 0x08009a38: 2050 P MOVS r0,#0x50 + 0x08009a3a: f3808811 .... MSR BASEPRI,r0 + 0x08009a3e: f3bf8f4f ..O. DSB + 0x08009a42: f3bf8f6f ..o. ISB + 0x08009a46: bf00 .. NOP + 0x08009a48: bf00 .. NOP + 0x08009a4a: e7fe .. B 0x8009a4a ; xQueueSemaphoreTake + 222 + 0x08009a4c: f7fefb7a ..z. BL vPortExitCritical ; 0x8008144 + 0x08009a50: 2000 . MOVS r0,#0 + 0x08009a52: e7e6 .. B 0x8009a22 ; xQueueSemaphoreTake + 182 + 0x08009a54: f1b80f00 .... CMP r8,#0 + 0x08009a58: d104 .. BNE 0x8009a64 ; xQueueSemaphoreTake + 248 + 0x08009a5a: 4668 hF MOV r0,sp + 0x08009a5c: f7fefc94 .... BL vTaskInternalSetTimeOutState ; 0x8008388 + 0x08009a60: f04f0801 O... MOV r8,#1 + 0x08009a64: f7fefb6e ..n. BL vPortExitCritical ; 0x8008144 + 0x08009a68: f7fefe26 ..&. BL vTaskSuspendAll ; 0x80086b8 + 0x08009a6c: f7fefb40 ..@. BL vPortEnterCritical ; 0x80080f0 + 0x08009a70: f9940044 ..D. LDRSB r0,[r4,#0x44] + 0x08009a74: 1c40 @. ADDS r0,r0,#1 + 0x08009a76: b910 .. CBNZ r0,0x8009a7e ; xQueueSemaphoreTake + 274 + 0x08009a78: 2000 . MOVS r0,#0 + 0x08009a7a: f8840044 ..D. STRB r0,[r4,#0x44] + 0x08009a7e: f9940045 ..E. LDRSB r0,[r4,#0x45] + 0x08009a82: 1c40 @. ADDS r0,r0,#1 + 0x08009a84: b910 .. CBNZ r0,0x8009a8c ; xQueueSemaphoreTake + 288 + 0x08009a86: 2000 . MOVS r0,#0 + 0x08009a88: f8840045 ..E. STRB r0,[r4,#0x45] + 0x08009a8c: f7fefb5a ..Z. BL vPortExitCritical ; 0x8008144 + 0x08009a90: a903 .. ADD r1,sp,#0xc + 0x08009a92: 4668 hF MOV r0,sp + 0x08009a94: f000f846 ..F. BL xTaskCheckForTimeOut ; 0x8009b24 + 0x08009a98: bb40 @. CBNZ r0,0x8009aec ; xQueueSemaphoreTake + 384 + 0x08009a9a: 4620 F MOV r0,r4 + 0x08009a9c: f7fdfddc .... BL prvIsQueueEmpty ; 0x8007658 + 0x08009aa0: b1f0 .. CBZ r0,0x8009ae0 ; xQueueSemaphoreTake + 372 + 0x08009aa2: 6820 h LDR r0,[r4,#0] + 0x08009aa4: b938 8. CBNZ r0,0x8009ab6 ; xQueueSemaphoreTake + 330 + 0x08009aa6: f7fefb23 ..#. BL vPortEnterCritical ; 0x80080f0 + 0x08009aaa: 6860 `h LDR r0,[r4,#4] + 0x08009aac: f000fa18 .... BL xTaskPriorityInherit ; 0x8009ee0 + 0x08009ab0: 4606 .F MOV r6,r0 + 0x08009ab2: f7fefb47 ..G. BL vPortExitCritical ; 0x8008144 + 0x08009ab6: f1040024 ..$. ADD r0,r4,#0x24 + 0x08009aba: 9903 .. LDR r1,[sp,#0xc] + 0x08009abc: f7fefc76 ..v. BL vTaskPlaceOnEventList ; 0x80083ac + 0x08009ac0: 4620 F MOV r0,r4 + 0x08009ac2: f7fdffa1 .... BL prvUnlockQueue ; 0x8007a08 + 0x08009ac6: f000faa9 .... BL xTaskResumeAll ; 0x800a01c + 0x08009aca: 2800 .( CMP r0,#0 + 0x08009acc: d188 .. BNE 0x80099e0 ; xQueueSemaphoreTake + 116 + 0x08009ace: f04f5080 O..P MOV r0,#0x10000000 + 0x08009ad2: 4913 .I LDR r1,[pc,#76] ; [0x8009b20] = 0xe000ed04 + 0x08009ad4: 6008 .` STR r0,[r1,#0] + 0x08009ad6: f3bf8f4f ..O. DSB + 0x08009ada: f3bf8f6f ..o. ISB + 0x08009ade: e77f .. B 0x80099e0 ; xQueueSemaphoreTake + 116 + 0x08009ae0: 4620 F MOV r0,r4 + 0x08009ae2: f7fdff91 .... BL prvUnlockQueue ; 0x8007a08 + 0x08009ae6: f000fa99 .... BL xTaskResumeAll ; 0x800a01c + 0x08009aea: e779 y. B 0x80099e0 ; xQueueSemaphoreTake + 116 + 0x08009aec: 4620 F MOV r0,r4 + 0x08009aee: f7fdff8b .... BL prvUnlockQueue ; 0x8007a08 + 0x08009af2: f000fa93 .... BL xTaskResumeAll ; 0x800a01c + 0x08009af6: 4620 F MOV r0,r4 + 0x08009af8: f7fdfdae .... BL prvIsQueueEmpty ; 0x8007658 + 0x08009afc: 2800 .( CMP r0,#0 + 0x08009afe: d0ee .. BEQ 0x8009ade ; xQueueSemaphoreTake + 370 + 0x08009b00: b15e ^. CBZ r6,0x8009b1a ; xQueueSemaphoreTake + 430 + 0x08009b02: f7fefaf5 .... BL vPortEnterCritical ; 0x80080f0 + 0x08009b06: 4620 F MOV r0,r4 + 0x08009b08: f7fdfbfd .... BL prvGetDisinheritPriorityAfterTimeout ; 0x8007306 + 0x08009b0c: 4607 .F MOV r7,r0 + 0x08009b0e: 4639 9F MOV r1,r7 + 0x08009b10: 6860 `h LDR r0,[r4,#4] + 0x08009b12: f7fefcbd .... BL vTaskPriorityDisinheritAfterTimeout ; 0x8008490 + 0x08009b16: f7fefb15 .... BL vPortExitCritical ; 0x8008144 + 0x08009b1a: 2000 . MOVS r0,#0 + 0x08009b1c: e781 .. B 0x8009a22 ; xQueueSemaphoreTake + 182 + $d + 0x08009b1e: 0000 .. DCW 0 + 0x08009b20: e000ed04 .... DCD 3758157060 + $t + i.xTaskCheckForTimeOut + xTaskCheckForTimeOut + 0x08009b24: b570 p. PUSH {r4-r6,lr} + 0x08009b26: 4605 .F MOV r5,r0 + 0x08009b28: 460c .F MOV r4,r1 + 0x08009b2a: b955 U. CBNZ r5,0x8009b42 ; xTaskCheckForTimeOut + 30 + 0x08009b2c: bf00 .. NOP + 0x08009b2e: 2050 P MOVS r0,#0x50 + 0x08009b30: f3808811 .... MSR BASEPRI,r0 + 0x08009b34: f3bf8f4f ..O. DSB + 0x08009b38: f3bf8f6f ..o. ISB + 0x08009b3c: bf00 .. NOP + 0x08009b3e: bf00 .. NOP + 0x08009b40: e7fe .. B 0x8009b40 ; xTaskCheckForTimeOut + 28 + 0x08009b42: b954 T. CBNZ r4,0x8009b5a ; xTaskCheckForTimeOut + 54 + 0x08009b44: bf00 .. NOP + 0x08009b46: 2050 P MOVS r0,#0x50 + 0x08009b48: f3808811 .... MSR BASEPRI,r0 + 0x08009b4c: f3bf8f4f ..O. DSB + 0x08009b50: f3bf8f6f ..o. ISB + 0x08009b54: bf00 .. NOP + 0x08009b56: bf00 .. NOP + 0x08009b58: e7fe .. B 0x8009b58 ; xTaskCheckForTimeOut + 52 + 0x08009b5a: f7fefac9 .... BL vPortEnterCritical ; 0x80080f0 + 0x08009b5e: 4812 .H LDR r0,[pc,#72] ; [0x8009ba8] = 0x2000026c + 0x08009b60: 6802 .h LDR r2,[r0,#0] + 0x08009b62: 6868 hh LDR r0,[r5,#4] + 0x08009b64: 1a13 .. SUBS r3,r2,r0 + 0x08009b66: 6820 h LDR r0,[r4,#0] + 0x08009b68: 1c40 @. ADDS r0,r0,#1 + 0x08009b6a: b908 .. CBNZ r0,0x8009b70 ; xTaskCheckForTimeOut + 76 + 0x08009b6c: 2600 .& MOVS r6,#0 + 0x08009b6e: e017 .. B 0x8009ba0 ; xTaskCheckForTimeOut + 124 + 0x08009b70: 490e .I LDR r1,[pc,#56] ; [0x8009bac] = 0x20000280 + 0x08009b72: 6828 (h LDR r0,[r5,#0] + 0x08009b74: 6809 .h LDR r1,[r1,#0] + 0x08009b76: 4288 .B CMP r0,r1 + 0x08009b78: d004 .. BEQ 0x8009b84 ; xTaskCheckForTimeOut + 96 + 0x08009b7a: 6868 hh LDR r0,[r5,#4] + 0x08009b7c: 4290 .B CMP r0,r2 + 0x08009b7e: d801 .. BHI 0x8009b84 ; xTaskCheckForTimeOut + 96 + 0x08009b80: 2601 .& MOVS r6,#1 + 0x08009b82: e00d .. B 0x8009ba0 ; xTaskCheckForTimeOut + 124 + 0x08009b84: 6820 h LDR r0,[r4,#0] + 0x08009b86: 4298 .B CMP r0,r3 + 0x08009b88: d907 .. BLS 0x8009b9a ; xTaskCheckForTimeOut + 118 + 0x08009b8a: 6820 h LDR r0,[r4,#0] + 0x08009b8c: 1ac0 .. SUBS r0,r0,r3 + 0x08009b8e: 6020 ` STR r0,[r4,#0] + 0x08009b90: 4628 (F MOV r0,r5 + 0x08009b92: f7fefbf9 .... BL vTaskInternalSetTimeOutState ; 0x8008388 + 0x08009b96: 2600 .& MOVS r6,#0 + 0x08009b98: e002 .. B 0x8009ba0 ; xTaskCheckForTimeOut + 124 + 0x08009b9a: 2000 . MOVS r0,#0 + 0x08009b9c: 6020 ` STR r0,[r4,#0] + 0x08009b9e: 2601 .& MOVS r6,#1 + 0x08009ba0: f7fefad0 .... BL vPortExitCritical ; 0x8008144 + 0x08009ba4: 4630 0F MOV r0,r6 + 0x08009ba6: bd70 p. POP {r4-r6,pc} + $d + 0x08009ba8: 2000026c l.. DCD 536871532 + 0x08009bac: 20000280 ... DCD 536871552 + $t + i.xTaskCreate + xTaskCreate + 0x08009bb0: e92d4fff -..O PUSH {r0-r11,lr} + 0x08009bb4: b085 .. SUB sp,sp,#0x14 + 0x08009bb6: 4680 .F MOV r8,r0 + 0x08009bb8: 4689 .F MOV r9,r1 + 0x08009bba: 4617 .F MOV r7,r2 + 0x08009bbc: e9ddab12 .... LDRD r10,r11,[sp,#0x48] + 0x08009bc0: 00b8 .. LSLS r0,r7,#2 + 0x08009bc2: f7fdff89 .... BL pvPortMalloc ; 0x8007ad8 + 0x08009bc6: 4606 .F MOV r6,r0 + 0x08009bc8: b156 V. CBZ r6,0x8009be0 ; xTaskCreate + 48 + 0x08009bca: 205c \ MOVS r0,#0x5c + 0x08009bcc: f7fdff84 .... BL pvPortMalloc ; 0x8007ad8 + 0x08009bd0: 4604 .F MOV r4,r0 + 0x08009bd2: b10c .. CBZ r4,0x8009bd8 ; xTaskCreate + 40 + 0x08009bd4: 6326 &c STR r6,[r4,#0x30] + 0x08009bd6: e004 .. B 0x8009be2 ; xTaskCreate + 50 + 0x08009bd8: 4630 0F MOV r0,r6 + 0x08009bda: f7fefad1 .... BL vPortFree ; 0x8008180 + 0x08009bde: e000 .. B 0x8009be2 ; xTaskCreate + 50 + 0x08009be0: 2400 .$ MOVS r4,#0 + 0x08009be2: b18c .. CBZ r4,0x8009c08 ; xTaskCreate + 88 + 0x08009be4: 2000 . MOVS r0,#0 + 0x08009be6: f8840059 ..Y. STRB r0,[r4,#0x59] + 0x08009bea: e9cdab00 .... STRD r10,r11,[sp,#0] + 0x08009bee: e9cd4002 ...@ STRD r4,r0,[sp,#8] + 0x08009bf2: 463a :F MOV r2,r7 + 0x08009bf4: 4649 IF MOV r1,r9 + 0x08009bf6: 4640 @F MOV r0,r8 + 0x08009bf8: 9b08 .. LDR r3,[sp,#0x20] + 0x08009bfa: f7fdfc18 .... BL prvInitialiseNewTask ; 0x800742e + 0x08009bfe: 4620 F MOV r0,r4 + 0x08009c00: f7fdfa4c ..L. BL prvAddNewTaskToReadyList ; 0x800709c + 0x08009c04: 2501 .% MOVS r5,#1 + 0x08009c06: e001 .. B 0x8009c0c ; xTaskCreate + 92 + 0x08009c08: f04f35ff O..5 MOV r5,#0xffffffff + 0x08009c0c: 4628 (F MOV r0,r5 + 0x08009c0e: b009 .. ADD sp,sp,#0x24 + 0x08009c10: e8bd8ff0 .... POP {r4-r11,pc} + i.xTaskCreateStatic + xTaskCreateStatic + 0x08009c14: e92d4ff0 -..O PUSH {r4-r11,lr} + 0x08009c18: b085 .. SUB sp,sp,#0x14 + 0x08009c1a: 4607 .F MOV r7,r0 + 0x08009c1c: 4688 .F MOV r8,r1 + 0x08009c1e: 4691 .F MOV r9,r2 + 0x08009c20: 469a .F MOV r10,r3 + 0x08009c22: e9ddb60e .... LDRD r11,r6,[sp,#0x38] + 0x08009c26: 9c10 .. LDR r4,[sp,#0x40] + 0x08009c28: b10e .. CBZ r6,0x8009c2e ; xTaskCreateStatic + 26 + 0x08009c2a: 2001 . MOVS r0,#1 + 0x08009c2c: e000 .. B 0x8009c30 ; xTaskCreateStatic + 28 + 0x08009c2e: 2000 . MOVS r0,#0 + 0x08009c30: b950 P. CBNZ r0,0x8009c48 ; xTaskCreateStatic + 52 + 0x08009c32: bf00 .. NOP + 0x08009c34: 2050 P MOVS r0,#0x50 + 0x08009c36: f3808811 .... MSR BASEPRI,r0 + 0x08009c3a: f3bf8f4f ..O. DSB + 0x08009c3e: f3bf8f6f ..o. ISB + 0x08009c42: bf00 .. NOP + 0x08009c44: bf00 .. NOP + 0x08009c46: e7fe .. B 0x8009c46 ; xTaskCreateStatic + 50 + 0x08009c48: b10c .. CBZ r4,0x8009c4e ; xTaskCreateStatic + 58 + 0x08009c4a: 2001 . MOVS r0,#1 + 0x08009c4c: e000 .. B 0x8009c50 ; xTaskCreateStatic + 60 + 0x08009c4e: 2000 . MOVS r0,#0 + 0x08009c50: b950 P. CBNZ r0,0x8009c68 ; xTaskCreateStatic + 84 + 0x08009c52: bf00 .. NOP + 0x08009c54: 2050 P MOVS r0,#0x50 + 0x08009c56: f3808811 .... MSR BASEPRI,r0 + 0x08009c5a: f3bf8f4f ..O. DSB + 0x08009c5e: f3bf8f6f ..o. ISB + 0x08009c62: bf00 .. NOP + 0x08009c64: bf00 .. NOP + 0x08009c66: e7fe .. B 0x8009c66 ; xTaskCreateStatic + 82 + 0x08009c68: 205c \ MOVS r0,#0x5c + 0x08009c6a: 9003 .. STR r0,[sp,#0xc] + 0x08009c6c: 9803 .. LDR r0,[sp,#0xc] + 0x08009c6e: 285c \( CMP r0,#0x5c + 0x08009c70: d101 .. BNE 0x8009c76 ; xTaskCreateStatic + 98 + 0x08009c72: 2001 . MOVS r0,#1 + 0x08009c74: e000 .. B 0x8009c78 ; xTaskCreateStatic + 100 + 0x08009c76: 2000 . MOVS r0,#0 + 0x08009c78: b950 P. CBNZ r0,0x8009c90 ; xTaskCreateStatic + 124 + 0x08009c7a: bf00 .. NOP + 0x08009c7c: 2050 P MOVS r0,#0x50 + 0x08009c7e: f3808811 .... MSR BASEPRI,r0 + 0x08009c82: f3bf8f4f ..O. DSB + 0x08009c86: f3bf8f6f ..o. ISB + 0x08009c8a: bf00 .. NOP + 0x08009c8c: bf00 .. NOP + 0x08009c8e: e7fe .. B 0x8009c8e ; xTaskCreateStatic + 122 + 0x08009c90: b1b4 .. CBZ r4,0x8009cc0 ; xTaskCreateStatic + 172 + 0x08009c92: b1ae .. CBZ r6,0x8009cc0 ; xTaskCreateStatic + 172 + 0x08009c94: 4625 %F MOV r5,r4 + 0x08009c96: 462c ,F MOV r4,r5 + 0x08009c98: 632e .c STR r6,[r5,#0x30] + 0x08009c9a: 2002 . MOVS r0,#2 + 0x08009c9c: f8850059 ..Y. STRB r0,[r5,#0x59] + 0x08009ca0: 2000 . MOVS r0,#0 + 0x08009ca2: a904 .. ADD r1,sp,#0x10 + 0x08009ca4: 4653 SF MOV r3,r10 + 0x08009ca6: 464a JF MOV r2,r9 + 0x08009ca8: e9cdb100 .... STRD r11,r1,[sp,#0] + 0x08009cac: e9cd5002 ...P STRD r5,r0,[sp,#8] + 0x08009cb0: 4641 AF MOV r1,r8 + 0x08009cb2: 4638 8F MOV r0,r7 + 0x08009cb4: f7fdfbbb .... BL prvInitialiseNewTask ; 0x800742e + 0x08009cb8: 4628 (F MOV r0,r5 + 0x08009cba: f7fdf9ef .... BL prvAddNewTaskToReadyList ; 0x800709c + 0x08009cbe: e001 .. B 0x8009cc4 ; xTaskCreateStatic + 176 + 0x08009cc0: 2000 . MOVS r0,#0 + 0x08009cc2: 9004 .. STR r0,[sp,#0x10] + 0x08009cc4: 9804 .. LDR r0,[sp,#0x10] + 0x08009cc6: b005 .. ADD sp,sp,#0x14 + 0x08009cc8: e8bd8ff0 .... POP {r4-r11,pc} + i.xTaskGetSchedulerState + xTaskGetSchedulerState + 0x08009ccc: 4905 .I LDR r1,[pc,#20] ; [0x8009ce4] = 0x20000274 + 0x08009cce: 6809 .h LDR r1,[r1,#0] + 0x08009cd0: b909 .. CBNZ r1,0x8009cd6 ; xTaskGetSchedulerState + 10 + 0x08009cd2: 2001 . MOVS r0,#1 + 0x08009cd4: e005 .. B 0x8009ce2 ; xTaskGetSchedulerState + 22 + 0x08009cd6: 4904 .I LDR r1,[pc,#16] ; [0x8009ce8] = 0x20000290 + 0x08009cd8: 6809 .h LDR r1,[r1,#0] + 0x08009cda: b909 .. CBNZ r1,0x8009ce0 ; xTaskGetSchedulerState + 20 + 0x08009cdc: 2002 . MOVS r0,#2 + 0x08009cde: e000 .. B 0x8009ce2 ; xTaskGetSchedulerState + 22 + 0x08009ce0: 2000 . MOVS r0,#0 + 0x08009ce2: 4770 pG BX lr + $d + 0x08009ce4: 20000274 t.. DCD 536871540 + 0x08009ce8: 20000290 ... DCD 536871568 + $t + i.xTaskGetTickCount + xTaskGetTickCount + 0x08009cec: 4901 .I LDR r1,[pc,#4] ; [0x8009cf4] = 0x2000026c + 0x08009cee: 6808 .h LDR r0,[r1,#0] + 0x08009cf0: 4770 pG BX lr + $d + 0x08009cf2: 0000 .. DCW 0 + 0x08009cf4: 2000026c l.. DCD 536871532 + $t + i.xTaskIncrementTick + xTaskIncrementTick + 0x08009cf8: e92d41f0 -..A PUSH {r4-r8,lr} + 0x08009cfc: f04f0800 O... MOV r8,#0 + 0x08009d00: 4843 CH LDR r0,[pc,#268] ; [0x8009e10] = 0x20000290 + 0x08009d02: 6800 .h LDR r0,[r0,#0] + 0x08009d04: 2800 .( CMP r0,#0 + 0x08009d06: d176 v. BNE 0x8009df6 ; xTaskIncrementTick + 254 + 0x08009d08: 4842 BH LDR r0,[pc,#264] ; [0x8009e14] = 0x2000026c + 0x08009d0a: 6800 .h LDR r0,[r0,#0] + 0x08009d0c: 1c45 E. ADDS r5,r0,#1 + 0x08009d0e: 4841 AH LDR r0,[pc,#260] ; [0x8009e14] = 0x2000026c + 0x08009d10: 6005 .` STR r5,[r0,#0] + 0x08009d12: bb15 .. CBNZ r5,0x8009d5a ; xTaskIncrementTick + 98 + 0x08009d14: 4840 @H LDR r0,[pc,#256] ; [0x8009e18] = 0x2000025c + 0x08009d16: 6800 .h LDR r0,[r0,#0] + 0x08009d18: 6800 .h LDR r0,[r0,#0] + 0x08009d1a: b908 .. CBNZ r0,0x8009d20 ; xTaskIncrementTick + 40 + 0x08009d1c: 2001 . MOVS r0,#1 + 0x08009d1e: e000 .. B 0x8009d22 ; xTaskIncrementTick + 42 + 0x08009d20: 2000 . MOVS r0,#0 + 0x08009d22: b950 P. CBNZ r0,0x8009d3a ; xTaskIncrementTick + 66 + 0x08009d24: bf00 .. NOP + 0x08009d26: 2050 P MOVS r0,#0x50 + 0x08009d28: f3808811 .... MSR BASEPRI,r0 + 0x08009d2c: f3bf8f4f ..O. DSB + 0x08009d30: f3bf8f6f ..o. ISB + 0x08009d34: bf00 .. NOP + 0x08009d36: bf00 .. NOP + 0x08009d38: e7fe .. B 0x8009d38 ; xTaskIncrementTick + 64 + 0x08009d3a: 4837 7H LDR r0,[pc,#220] ; [0x8009e18] = 0x2000025c + 0x08009d3c: 6807 .h LDR r7,[r0,#0] + 0x08009d3e: 4837 7H LDR r0,[pc,#220] ; [0x8009e1c] = 0x20000260 + 0x08009d40: 6800 .h LDR r0,[r0,#0] + 0x08009d42: 4935 5I LDR r1,[pc,#212] ; [0x8009e18] = 0x2000025c + 0x08009d44: 6008 .` STR r0,[r1,#0] + 0x08009d46: 4835 5H LDR r0,[pc,#212] ; [0x8009e1c] = 0x20000260 + 0x08009d48: 6007 .` STR r7,[r0,#0] + 0x08009d4a: 4835 5H LDR r0,[pc,#212] ; [0x8009e20] = 0x20000280 + 0x08009d4c: 6800 .h LDR r0,[r0,#0] + 0x08009d4e: 1c40 @. ADDS r0,r0,#1 + 0x08009d50: 4933 3I LDR r1,[pc,#204] ; [0x8009e20] = 0x20000280 + 0x08009d52: 6008 .` STR r0,[r1,#0] + 0x08009d54: f7fdfd9c .... BL prvResetNextTaskUnblockTime ; 0x8007890 + 0x08009d58: bf00 .. NOP + 0x08009d5a: 4832 2H LDR r0,[pc,#200] ; [0x8009e24] = 0x20000288 + 0x08009d5c: 6800 .h LDR r0,[r0,#0] + 0x08009d5e: 4285 .B CMP r5,r0 + 0x08009d60: d33b ;. BCC 0x8009dda ; xTaskIncrementTick + 226 + 0x08009d62: bf00 .. NOP + 0x08009d64: 482c ,H LDR r0,[pc,#176] ; [0x8009e18] = 0x2000025c + 0x08009d66: 6800 .h LDR r0,[r0,#0] + 0x08009d68: 6800 .h LDR r0,[r0,#0] + 0x08009d6a: b908 .. CBNZ r0,0x8009d70 ; xTaskIncrementTick + 120 + 0x08009d6c: 2001 . MOVS r0,#1 + 0x08009d6e: e000 .. B 0x8009d72 ; xTaskIncrementTick + 122 + 0x08009d70: 2000 . MOVS r0,#0 + 0x08009d72: b120 . CBZ r0,0x8009d7e ; xTaskIncrementTick + 134 + 0x08009d74: f04f30ff O..0 MOV r0,#0xffffffff + 0x08009d78: 492a *I LDR r1,[pc,#168] ; [0x8009e24] = 0x20000288 + 0x08009d7a: 6008 .` STR r0,[r1,#0] + 0x08009d7c: e02c ,. B 0x8009dd8 ; xTaskIncrementTick + 224 + 0x08009d7e: 4826 &H LDR r0,[pc,#152] ; [0x8009e18] = 0x2000025c + 0x08009d80: 6800 .h LDR r0,[r0,#0] + 0x08009d82: 68c0 .h LDR r0,[r0,#0xc] + 0x08009d84: 68c4 .h LDR r4,[r0,#0xc] + 0x08009d86: 6866 fh LDR r6,[r4,#4] + 0x08009d88: 42b5 .B CMP r5,r6 + 0x08009d8a: d202 .. BCS 0x8009d92 ; xTaskIncrementTick + 154 + 0x08009d8c: 4825 %H LDR r0,[pc,#148] ; [0x8009e24] = 0x20000288 + 0x08009d8e: 6006 .` STR r6,[r0,#0] + 0x08009d90: e022 ". B 0x8009dd8 ; xTaskIncrementTick + 224 + 0x08009d92: 1d20 . ADDS r0,r4,#4 + 0x08009d94: f7fdffc4 .... BL uxListRemove ; 0x8007d20 + 0x08009d98: 6aa0 .j LDR r0,[r4,#0x28] + 0x08009d9a: b118 .. CBZ r0,0x8009da4 ; xTaskIncrementTick + 172 + 0x08009d9c: f1040018 .... ADD r0,r4,#0x18 + 0x08009da0: f7fdffbe .... BL uxListRemove ; 0x8007d20 + 0x08009da4: 4920 I LDR r1,[pc,#128] ; [0x8009e28] = 0x20000270 + 0x08009da6: 6ae0 .j LDR r0,[r4,#0x2c] + 0x08009da8: 6809 .h LDR r1,[r1,#0] + 0x08009daa: 4288 .B CMP r0,r1 + 0x08009dac: d902 .. BLS 0x8009db4 ; xTaskIncrementTick + 188 + 0x08009dae: 491e .I LDR r1,[pc,#120] ; [0x8009e28] = 0x20000270 + 0x08009db0: 6ae0 .j LDR r0,[r4,#0x2c] + 0x08009db2: 6008 .` STR r0,[r1,#0] + 0x08009db4: 6ae1 .j LDR r1,[r4,#0x2c] + 0x08009db6: eb010181 .... ADD r1,r1,r1,LSL #2 + 0x08009dba: 4a1c .J LDR r2,[pc,#112] ; [0x8009e2c] = 0x20000a0c + 0x08009dbc: eb020081 .... ADD r0,r2,r1,LSL #2 + 0x08009dc0: 1d21 !. ADDS r1,r4,#4 + 0x08009dc2: f7fef819 .... BL vListInsertEnd ; 0x8007df8 + 0x08009dc6: 491a .I LDR r1,[pc,#104] ; [0x8009e30] = 0x20000258 + 0x08009dc8: 6ae0 .j LDR r0,[r4,#0x2c] + 0x08009dca: 6809 .h LDR r1,[r1,#0] + 0x08009dcc: 6ac9 .j LDR r1,[r1,#0x2c] + 0x08009dce: 4288 .B CMP r0,r1 + 0x08009dd0: d3c8 .. BCC 0x8009d64 ; xTaskIncrementTick + 108 + 0x08009dd2: f04f0801 O... MOV r8,#1 + 0x08009dd6: e7c5 .. B 0x8009d64 ; xTaskIncrementTick + 108 + 0x08009dd8: bf00 .. NOP + 0x08009dda: 4815 .H LDR r0,[pc,#84] ; [0x8009e30] = 0x20000258 + 0x08009ddc: 6800 .h LDR r0,[r0,#0] + 0x08009dde: 6ac0 .j LDR r0,[r0,#0x2c] + 0x08009de0: eb000080 .... ADD r0,r0,r0,LSL #2 + 0x08009de4: 4911 .I LDR r1,[pc,#68] ; [0x8009e2c] = 0x20000a0c + 0x08009de6: f8510020 Q. . LDR r0,[r1,r0,LSL #2] + 0x08009dea: 2801 .( CMP r0,#1 + 0x08009dec: d901 .. BLS 0x8009df2 ; xTaskIncrementTick + 250 + 0x08009dee: f04f0801 O... MOV r8,#1 + 0x08009df2: e005 .. B 0x8009e00 ; xTaskIncrementTick + 264 + 0x08009df4: e7ff .. B 0x8009df6 ; xTaskIncrementTick + 254 + 0x08009df6: 480f .H LDR r0,[pc,#60] ; [0x8009e34] = 0x20000278 + 0x08009df8: 6800 .h LDR r0,[r0,#0] + 0x08009dfa: 1c40 @. ADDS r0,r0,#1 + 0x08009dfc: 490d .I LDR r1,[pc,#52] ; [0x8009e34] = 0x20000278 + 0x08009dfe: 6008 .` STR r0,[r1,#0] + 0x08009e00: 480d .H LDR r0,[pc,#52] ; [0x8009e38] = 0x2000027c + 0x08009e02: 6800 .h LDR r0,[r0,#0] + 0x08009e04: b108 .. CBZ r0,0x8009e0a ; xTaskIncrementTick + 274 + 0x08009e06: f04f0801 O... MOV r8,#1 + 0x08009e0a: 4640 @F MOV r0,r8 + 0x08009e0c: e8bd81f0 .... POP {r4-r8,pc} + $d + 0x08009e10: 20000290 ... DCD 536871568 + 0x08009e14: 2000026c l.. DCD 536871532 + 0x08009e18: 2000025c \.. DCD 536871516 + 0x08009e1c: 20000260 `.. DCD 536871520 + 0x08009e20: 20000280 ... DCD 536871552 + 0x08009e24: 20000288 ... DCD 536871560 + 0x08009e28: 20000270 p.. DCD 536871536 + 0x08009e2c: 20000a0c ... DCD 536873484 + 0x08009e30: 20000258 X.. DCD 536871512 + 0x08009e34: 20000278 x.. DCD 536871544 + 0x08009e38: 2000027c |.. DCD 536871548 + $t + i.xTaskPriorityDisinherit + xTaskPriorityDisinherit + 0x08009e3c: b570 p. PUSH {r4-r6,lr} + 0x08009e3e: 4605 .F MOV r5,r0 + 0x08009e40: 462c ,F MOV r4,r5 + 0x08009e42: 2600 .& MOVS r6,#0 + 0x08009e44: 2d00 .- CMP r5,#0 + 0x08009e46: d043 C. BEQ 0x8009ed0 ; xTaskPriorityDisinherit + 148 + 0x08009e48: 4822 "H LDR r0,[pc,#136] ; [0x8009ed4] = 0x20000258 + 0x08009e4a: 6800 .h LDR r0,[r0,#0] + 0x08009e4c: 4284 .B CMP r4,r0 + 0x08009e4e: d101 .. BNE 0x8009e54 ; xTaskPriorityDisinherit + 24 + 0x08009e50: 2001 . MOVS r0,#1 + 0x08009e52: e000 .. B 0x8009e56 ; xTaskPriorityDisinherit + 26 + 0x08009e54: 2000 . MOVS r0,#0 + 0x08009e56: b950 P. CBNZ r0,0x8009e6e ; xTaskPriorityDisinherit + 50 + 0x08009e58: bf00 .. NOP + 0x08009e5a: 2050 P MOVS r0,#0x50 + 0x08009e5c: f3808811 .... MSR BASEPRI,r0 + 0x08009e60: f3bf8f4f ..O. DSB + 0x08009e64: f3bf8f6f ..o. ISB + 0x08009e68: bf00 .. NOP + 0x08009e6a: bf00 .. NOP + 0x08009e6c: e7fe .. B 0x8009e6c ; xTaskPriorityDisinherit + 48 + 0x08009e6e: 6d20 m LDR r0,[r4,#0x50] + 0x08009e70: b950 P. CBNZ r0,0x8009e88 ; xTaskPriorityDisinherit + 76 + 0x08009e72: bf00 .. NOP + 0x08009e74: 2050 P MOVS r0,#0x50 + 0x08009e76: f3808811 .... MSR BASEPRI,r0 + 0x08009e7a: f3bf8f4f ..O. DSB + 0x08009e7e: f3bf8f6f ..o. ISB + 0x08009e82: bf00 .. NOP + 0x08009e84: bf00 .. NOP + 0x08009e86: e7fe .. B 0x8009e86 ; xTaskPriorityDisinherit + 74 + 0x08009e88: 6d20 m LDR r0,[r4,#0x50] + 0x08009e8a: 1e40 @. SUBS r0,r0,#1 + 0x08009e8c: 6520 e STR r0,[r4,#0x50] + 0x08009e8e: 6ce1 .l LDR r1,[r4,#0x4c] + 0x08009e90: 6ae0 .j LDR r0,[r4,#0x2c] + 0x08009e92: 4288 .B CMP r0,r1 + 0x08009e94: d01c .. BEQ 0x8009ed0 ; xTaskPriorityDisinherit + 148 + 0x08009e96: 6d20 m LDR r0,[r4,#0x50] + 0x08009e98: b9d0 .. CBNZ r0,0x8009ed0 ; xTaskPriorityDisinherit + 148 + 0x08009e9a: 1d20 . ADDS r0,r4,#4 + 0x08009e9c: f7fdff40 ..@. BL uxListRemove ; 0x8007d20 + 0x08009ea0: 6ce0 .l LDR r0,[r4,#0x4c] + 0x08009ea2: 62e0 .b STR r0,[r4,#0x2c] + 0x08009ea4: 6ae0 .j LDR r0,[r4,#0x2c] + 0x08009ea6: f1c00038 ..8. RSB r0,r0,#0x38 + 0x08009eaa: 61a0 .a STR r0,[r4,#0x18] + 0x08009eac: 490a .I LDR r1,[pc,#40] ; [0x8009ed8] = 0x20000270 + 0x08009eae: 6ae0 .j LDR r0,[r4,#0x2c] + 0x08009eb0: 6809 .h LDR r1,[r1,#0] + 0x08009eb2: 4288 .B CMP r0,r1 + 0x08009eb4: d902 .. BLS 0x8009ebc ; xTaskPriorityDisinherit + 128 + 0x08009eb6: 4908 .I LDR r1,[pc,#32] ; [0x8009ed8] = 0x20000270 + 0x08009eb8: 6ae0 .j LDR r0,[r4,#0x2c] + 0x08009eba: 6008 .` STR r0,[r1,#0] + 0x08009ebc: 6ae1 .j LDR r1,[r4,#0x2c] + 0x08009ebe: eb010181 .... ADD r1,r1,r1,LSL #2 + 0x08009ec2: 4a06 .J LDR r2,[pc,#24] ; [0x8009edc] = 0x20000a0c + 0x08009ec4: eb020081 .... ADD r0,r2,r1,LSL #2 + 0x08009ec8: 1d21 !. ADDS r1,r4,#4 + 0x08009eca: f7fdff95 .... BL vListInsertEnd ; 0x8007df8 + 0x08009ece: 2601 .& MOVS r6,#1 + 0x08009ed0: 4630 0F MOV r0,r6 + 0x08009ed2: bd70 p. POP {r4-r6,pc} + $d + 0x08009ed4: 20000258 X.. DCD 536871512 + 0x08009ed8: 20000270 p.. DCD 536871536 + 0x08009edc: 20000a0c ... DCD 536873484 + $t + i.xTaskPriorityInherit + xTaskPriorityInherit + 0x08009ee0: b570 p. PUSH {r4-r6,lr} + 0x08009ee2: 4605 .F MOV r5,r0 + 0x08009ee4: 462c ,F MOV r4,r5 + 0x08009ee6: 2600 .& MOVS r6,#0 + 0x08009ee8: 2d00 .- CMP r5,#0 + 0x08009eea: d042 B. BEQ 0x8009f72 ; xTaskPriorityInherit + 146 + 0x08009eec: 4922 "I LDR r1,[pc,#136] ; [0x8009f78] = 0x20000258 + 0x08009eee: 6ae0 .j LDR r0,[r4,#0x2c] + 0x08009ef0: 6809 .h LDR r1,[r1,#0] + 0x08009ef2: 6ac9 .j LDR r1,[r1,#0x2c] + 0x08009ef4: 4288 .B CMP r0,r1 + 0x08009ef6: d235 5. BCS 0x8009f64 ; xTaskPriorityInherit + 132 + 0x08009ef8: 69a0 .i LDR r0,[r4,#0x18] + 0x08009efa: f0004000 ...@ AND r0,r0,#0x80000000 + 0x08009efe: b928 (. CBNZ r0,0x8009f0c ; xTaskPriorityInherit + 44 + 0x08009f00: 481d .H LDR r0,[pc,#116] ; [0x8009f78] = 0x20000258 + 0x08009f02: 6800 .h LDR r0,[r0,#0] + 0x08009f04: 6ac0 .j LDR r0,[r0,#0x2c] + 0x08009f06: f1c00038 ..8. RSB r0,r0,#0x38 + 0x08009f0a: 61a0 .a STR r0,[r4,#0x18] + 0x08009f0c: 6ae1 .j LDR r1,[r4,#0x2c] + 0x08009f0e: eb010181 .... ADD r1,r1,r1,LSL #2 + 0x08009f12: 4a1a .J LDR r2,[pc,#104] ; [0x8009f7c] = 0x20000a0c + 0x08009f14: eb020181 .... ADD r1,r2,r1,LSL #2 + 0x08009f18: 6960 `i LDR r0,[r4,#0x14] + 0x08009f1a: 4288 .B CMP r0,r1 + 0x08009f1c: d101 .. BNE 0x8009f22 ; xTaskPriorityInherit + 66 + 0x08009f1e: 2001 . MOVS r0,#1 + 0x08009f20: e000 .. B 0x8009f24 ; xTaskPriorityInherit + 68 + 0x08009f22: 2000 . MOVS r0,#0 + 0x08009f24: b1c0 .. CBZ r0,0x8009f58 ; xTaskPriorityInherit + 120 + 0x08009f26: 1d20 . ADDS r0,r4,#4 + 0x08009f28: f7fdfefa .... BL uxListRemove ; 0x8007d20 + 0x08009f2c: 4812 .H LDR r0,[pc,#72] ; [0x8009f78] = 0x20000258 + 0x08009f2e: 6800 .h LDR r0,[r0,#0] + 0x08009f30: 6ac0 .j LDR r0,[r0,#0x2c] + 0x08009f32: 62e0 .b STR r0,[r4,#0x2c] + 0x08009f34: 4912 .I LDR r1,[pc,#72] ; [0x8009f80] = 0x20000270 + 0x08009f36: 6ae0 .j LDR r0,[r4,#0x2c] + 0x08009f38: 6809 .h LDR r1,[r1,#0] + 0x08009f3a: 4288 .B CMP r0,r1 + 0x08009f3c: d902 .. BLS 0x8009f44 ; xTaskPriorityInherit + 100 + 0x08009f3e: 4910 .I LDR r1,[pc,#64] ; [0x8009f80] = 0x20000270 + 0x08009f40: 6ae0 .j LDR r0,[r4,#0x2c] + 0x08009f42: 6008 .` STR r0,[r1,#0] + 0x08009f44: 6ae1 .j LDR r1,[r4,#0x2c] + 0x08009f46: eb010181 .... ADD r1,r1,r1,LSL #2 + 0x08009f4a: 4a0c .J LDR r2,[pc,#48] ; [0x8009f7c] = 0x20000a0c + 0x08009f4c: eb020081 .... ADD r0,r2,r1,LSL #2 + 0x08009f50: 1d21 !. ADDS r1,r4,#4 + 0x08009f52: f7fdff51 ..Q. BL vListInsertEnd ; 0x8007df8 + 0x08009f56: e003 .. B 0x8009f60 ; xTaskPriorityInherit + 128 + 0x08009f58: 4807 .H LDR r0,[pc,#28] ; [0x8009f78] = 0x20000258 + 0x08009f5a: 6800 .h LDR r0,[r0,#0] + 0x08009f5c: 6ac0 .j LDR r0,[r0,#0x2c] + 0x08009f5e: 62e0 .b STR r0,[r4,#0x2c] + 0x08009f60: 2601 .& MOVS r6,#1 + 0x08009f62: e006 .. B 0x8009f72 ; xTaskPriorityInherit + 146 + 0x08009f64: 4904 .I LDR r1,[pc,#16] ; [0x8009f78] = 0x20000258 + 0x08009f66: 6ce0 .l LDR r0,[r4,#0x4c] + 0x08009f68: 6809 .h LDR r1,[r1,#0] + 0x08009f6a: 6ac9 .j LDR r1,[r1,#0x2c] + 0x08009f6c: 4288 .B CMP r0,r1 + 0x08009f6e: d200 .. BCS 0x8009f72 ; xTaskPriorityInherit + 146 + 0x08009f70: 2601 .& MOVS r6,#1 + 0x08009f72: 4630 0F MOV r0,r6 + 0x08009f74: bd70 p. POP {r4-r6,pc} + $d + 0x08009f76: 0000 .. DCW 0 + 0x08009f78: 20000258 X.. DCD 536871512 + 0x08009f7c: 20000a0c ... DCD 536873484 + 0x08009f80: 20000270 p.. DCD 536871536 + $t + i.xTaskRemoveFromEventList + xTaskRemoveFromEventList + 0x08009f84: b570 p. PUSH {r4-r6,lr} + 0x08009f86: 4606 .F MOV r6,r0 + 0x08009f88: 68f0 .h LDR r0,[r6,#0xc] + 0x08009f8a: 68c4 .h LDR r4,[r0,#0xc] + 0x08009f8c: b954 T. CBNZ r4,0x8009fa4 ; xTaskRemoveFromEventList + 32 + 0x08009f8e: bf00 .. NOP + 0x08009f90: 2050 P MOVS r0,#0x50 + 0x08009f92: f3808811 .... MSR BASEPRI,r0 + 0x08009f96: f3bf8f4f ..O. DSB + 0x08009f9a: f3bf8f6f ..o. ISB + 0x08009f9e: bf00 .. NOP + 0x08009fa0: bf00 .. NOP + 0x08009fa2: e7fe .. B 0x8009fa2 ; xTaskRemoveFromEventList + 30 + 0x08009fa4: f1040018 .... ADD r0,r4,#0x18 + 0x08009fa8: f7fdfeba .... BL uxListRemove ; 0x8007d20 + 0x08009fac: 4815 .H LDR r0,[pc,#84] ; [0x800a004] = 0x20000290 + 0x08009fae: 6800 .h LDR r0,[r0,#0] + 0x08009fb0: b9a0 .. CBNZ r0,0x8009fdc ; xTaskRemoveFromEventList + 88 + 0x08009fb2: 1d20 . ADDS r0,r4,#4 + 0x08009fb4: f7fdfeb4 .... BL uxListRemove ; 0x8007d20 + 0x08009fb8: 4913 .I LDR r1,[pc,#76] ; [0x800a008] = 0x20000270 + 0x08009fba: 6ae0 .j LDR r0,[r4,#0x2c] + 0x08009fbc: 6809 .h LDR r1,[r1,#0] + 0x08009fbe: 4288 .B CMP r0,r1 + 0x08009fc0: d902 .. BLS 0x8009fc8 ; xTaskRemoveFromEventList + 68 + 0x08009fc2: 4911 .I LDR r1,[pc,#68] ; [0x800a008] = 0x20000270 + 0x08009fc4: 6ae0 .j LDR r0,[r4,#0x2c] + 0x08009fc6: 6008 .` STR r0,[r1,#0] + 0x08009fc8: 6ae1 .j LDR r1,[r4,#0x2c] + 0x08009fca: eb010181 .... ADD r1,r1,r1,LSL #2 + 0x08009fce: 4a0f .J LDR r2,[pc,#60] ; [0x800a00c] = 0x20000a0c + 0x08009fd0: eb020081 .... ADD r0,r2,r1,LSL #2 + 0x08009fd4: 1d21 !. ADDS r1,r4,#4 + 0x08009fd6: f7fdff0f .... BL vListInsertEnd ; 0x8007df8 + 0x08009fda: e004 .. B 0x8009fe6 ; xTaskRemoveFromEventList + 98 + 0x08009fdc: f1040118 .... ADD r1,r4,#0x18 + 0x08009fe0: 480b .H LDR r0,[pc,#44] ; [0x800a010] = 0x20000e94 + 0x08009fe2: f7fdff09 .... BL vListInsertEnd ; 0x8007df8 + 0x08009fe6: 490b .I LDR r1,[pc,#44] ; [0x800a014] = 0x20000258 + 0x08009fe8: 6ae0 .j LDR r0,[r4,#0x2c] + 0x08009fea: 6809 .h LDR r1,[r1,#0] + 0x08009fec: 6ac9 .j LDR r1,[r1,#0x2c] + 0x08009fee: 4288 .B CMP r0,r1 + 0x08009ff0: d904 .. BLS 0x8009ffc ; xTaskRemoveFromEventList + 120 + 0x08009ff2: 2501 .% MOVS r5,#1 + 0x08009ff4: 2001 . MOVS r0,#1 + 0x08009ff6: 4908 .I LDR r1,[pc,#32] ; [0x800a018] = 0x2000027c + 0x08009ff8: 6008 .` STR r0,[r1,#0] + 0x08009ffa: e000 .. B 0x8009ffe ; xTaskRemoveFromEventList + 122 + 0x08009ffc: 2500 .% MOVS r5,#0 + 0x08009ffe: 4628 (F MOV r0,r5 + 0x0800a000: bd70 p. POP {r4-r6,pc} + $d + 0x0800a002: 0000 .. DCW 0 + 0x0800a004: 20000290 ... DCD 536871568 + 0x0800a008: 20000270 p.. DCD 536871536 + 0x0800a00c: 20000a0c ... DCD 536873484 + 0x0800a010: 20000e94 ... DCD 536874644 + 0x0800a014: 20000258 X.. DCD 536871512 + 0x0800a018: 2000027c |.. DCD 536871548 + $t + i.xTaskResumeAll + xTaskResumeAll + 0x0800a01c: b570 p. PUSH {r4-r6,lr} + 0x0800a01e: 2400 .$ MOVS r4,#0 + 0x0800a020: 2600 .& MOVS r6,#0 + 0x0800a022: 4836 6H LDR r0,[pc,#216] ; [0x800a0fc] = 0x20000290 + 0x0800a024: 6800 .h LDR r0,[r0,#0] + 0x0800a026: b950 P. CBNZ r0,0x800a03e ; xTaskResumeAll + 34 + 0x0800a028: bf00 .. NOP + 0x0800a02a: 2050 P MOVS r0,#0x50 + 0x0800a02c: f3808811 .... MSR BASEPRI,r0 + 0x0800a030: f3bf8f4f ..O. DSB + 0x0800a034: f3bf8f6f ..o. ISB + 0x0800a038: bf00 .. NOP + 0x0800a03a: bf00 .. NOP + 0x0800a03c: e7fe .. B 0x800a03c ; xTaskResumeAll + 32 + 0x0800a03e: f7fef857 ..W. BL vPortEnterCritical ; 0x80080f0 + 0x0800a042: 482e .H LDR r0,[pc,#184] ; [0x800a0fc] = 0x20000290 + 0x0800a044: 6800 .h LDR r0,[r0,#0] + 0x0800a046: 1e40 @. SUBS r0,r0,#1 + 0x0800a048: 492c ,I LDR r1,[pc,#176] ; [0x800a0fc] = 0x20000290 + 0x0800a04a: 6008 .` STR r0,[r1,#0] + 0x0800a04c: 4608 .F MOV r0,r1 + 0x0800a04e: 6800 .h LDR r0,[r0,#0] + 0x0800a050: 2800 .( CMP r0,#0 + 0x0800a052: d14e N. BNE 0x800a0f2 ; xTaskResumeAll + 214 + 0x0800a054: 482a *H LDR r0,[pc,#168] ; [0x800a100] = 0x20000268 + 0x0800a056: 6800 .h LDR r0,[r0,#0] + 0x0800a058: 2800 .( CMP r0,#0 + 0x0800a05a: d04a J. BEQ 0x800a0f2 ; xTaskResumeAll + 214 + 0x0800a05c: e023 #. B 0x800a0a6 ; xTaskResumeAll + 138 + 0x0800a05e: 4829 )H LDR r0,[pc,#164] ; [0x800a104] = 0x20000e94 + 0x0800a060: 68c0 .h LDR r0,[r0,#0xc] + 0x0800a062: 68c4 .h LDR r4,[r0,#0xc] + 0x0800a064: f1040018 .... ADD r0,r4,#0x18 + 0x0800a068: f7fdfe5a ..Z. BL uxListRemove ; 0x8007d20 + 0x0800a06c: 1d20 . ADDS r0,r4,#4 + 0x0800a06e: f7fdfe57 ..W. BL uxListRemove ; 0x8007d20 + 0x0800a072: 4925 %I LDR r1,[pc,#148] ; [0x800a108] = 0x20000270 + 0x0800a074: 6ae0 .j LDR r0,[r4,#0x2c] + 0x0800a076: 6809 .h LDR r1,[r1,#0] + 0x0800a078: 4288 .B CMP r0,r1 + 0x0800a07a: d902 .. BLS 0x800a082 ; xTaskResumeAll + 102 + 0x0800a07c: 4922 "I LDR r1,[pc,#136] ; [0x800a108] = 0x20000270 + 0x0800a07e: 6ae0 .j LDR r0,[r4,#0x2c] + 0x0800a080: 6008 .` STR r0,[r1,#0] + 0x0800a082: 6ae1 .j LDR r1,[r4,#0x2c] + 0x0800a084: eb010181 .... ADD r1,r1,r1,LSL #2 + 0x0800a088: 4a20 J LDR r2,[pc,#128] ; [0x800a10c] = 0x20000a0c + 0x0800a08a: eb020081 .... ADD r0,r2,r1,LSL #2 + 0x0800a08e: 1d21 !. ADDS r1,r4,#4 + 0x0800a090: f7fdfeb2 .... BL vListInsertEnd ; 0x8007df8 + 0x0800a094: 491e .I LDR r1,[pc,#120] ; [0x800a110] = 0x20000258 + 0x0800a096: 6ae0 .j LDR r0,[r4,#0x2c] + 0x0800a098: 6809 .h LDR r1,[r1,#0] + 0x0800a09a: 6ac9 .j LDR r1,[r1,#0x2c] + 0x0800a09c: 4288 .B CMP r0,r1 + 0x0800a09e: d302 .. BCC 0x800a0a6 ; xTaskResumeAll + 138 + 0x0800a0a0: 2001 . MOVS r0,#1 + 0x0800a0a2: 491c .I LDR r1,[pc,#112] ; [0x800a114] = 0x2000027c + 0x0800a0a4: 6008 .` STR r0,[r1,#0] + 0x0800a0a6: 4817 .H LDR r0,[pc,#92] ; [0x800a104] = 0x20000e94 + 0x0800a0a8: 6800 .h LDR r0,[r0,#0] + 0x0800a0aa: b908 .. CBNZ r0,0x800a0b0 ; xTaskResumeAll + 148 + 0x0800a0ac: 2001 . MOVS r0,#1 + 0x0800a0ae: e000 .. B 0x800a0b2 ; xTaskResumeAll + 150 + 0x0800a0b0: 2000 . MOVS r0,#0 + 0x0800a0b2: 2800 .( CMP r0,#0 + 0x0800a0b4: d0d3 .. BEQ 0x800a05e ; xTaskResumeAll + 66 + 0x0800a0b6: b10c .. CBZ r4,0x800a0bc ; xTaskResumeAll + 160 + 0x0800a0b8: f7fdfbea .... BL prvResetNextTaskUnblockTime ; 0x8007890 + 0x0800a0bc: 4816 .H LDR r0,[pc,#88] ; [0x800a118] = 0x20000278 + 0x0800a0be: 6805 .h LDR r5,[r0,#0] + 0x0800a0c0: b165 e. CBZ r5,0x800a0dc ; xTaskResumeAll + 192 + 0x0800a0c2: bf00 .. NOP + 0x0800a0c4: f7fffe18 .... BL xTaskIncrementTick ; 0x8009cf8 + 0x0800a0c8: b110 .. CBZ r0,0x800a0d0 ; xTaskResumeAll + 180 + 0x0800a0ca: 2001 . MOVS r0,#1 + 0x0800a0cc: 4911 .I LDR r1,[pc,#68] ; [0x800a114] = 0x2000027c + 0x0800a0ce: 6008 .` STR r0,[r1,#0] + 0x0800a0d0: 1e6d m. SUBS r5,r5,#1 + 0x0800a0d2: 2d00 .- CMP r5,#0 + 0x0800a0d4: d1f6 .. BNE 0x800a0c4 ; xTaskResumeAll + 168 + 0x0800a0d6: 2000 . MOVS r0,#0 + 0x0800a0d8: 490f .I LDR r1,[pc,#60] ; [0x800a118] = 0x20000278 + 0x0800a0da: 6008 .` STR r0,[r1,#0] + 0x0800a0dc: 480d .H LDR r0,[pc,#52] ; [0x800a114] = 0x2000027c + 0x0800a0de: 6800 .h LDR r0,[r0,#0] + 0x0800a0e0: b138 8. CBZ r0,0x800a0f2 ; xTaskResumeAll + 214 + 0x0800a0e2: 2601 .& MOVS r6,#1 + 0x0800a0e4: 0730 0. LSLS r0,r6,#28 + 0x0800a0e6: 490d .I LDR r1,[pc,#52] ; [0x800a11c] = 0xe000ed04 + 0x0800a0e8: 6008 .` STR r0,[r1,#0] + 0x0800a0ea: f3bf8f4f ..O. DSB + 0x0800a0ee: f3bf8f6f ..o. ISB + 0x0800a0f2: f7fef827 ..'. BL vPortExitCritical ; 0x8008144 + 0x0800a0f6: 4630 0F MOV r0,r6 + 0x0800a0f8: bd70 p. POP {r4-r6,pc} + $d + 0x0800a0fa: 0000 .. DCW 0 + 0x0800a0fc: 20000290 ... DCD 536871568 + 0x0800a100: 20000268 h.. DCD 536871528 + 0x0800a104: 20000e94 ... DCD 536874644 + 0x0800a108: 20000270 p.. DCD 536871536 + 0x0800a10c: 20000a0c ... DCD 536873484 + 0x0800a110: 20000258 X.. DCD 536871512 + 0x0800a114: 2000027c |.. DCD 536871548 + 0x0800a118: 20000278 x.. DCD 536871544 + 0x0800a11c: e000ed04 .... DCD 3758157060 + $t + i.xTimerCreate + xTimerCreate + 0x0800a120: e92d47fc -..G PUSH {r2-r10,lr} + 0x0800a124: 4605 .F MOV r5,r0 + 0x0800a126: 460e .F MOV r6,r1 + 0x0800a128: 4617 .F MOV r7,r2 + 0x0800a12a: 4698 .F MOV r8,r3 + 0x0800a12c: f8dd9028 ..(. LDR r9,[sp,#0x28] + 0x0800a130: 2030 0 MOVS r0,#0x30 + 0x0800a132: f7fdfcd1 .... BL pvPortMalloc ; 0x8007ad8 + 0x0800a136: 4604 .F MOV r4,r0 + 0x0800a138: b154 T. CBZ r4,0x800a150 ; xTimerCreate + 48 + 0x0800a13a: 4643 CF MOV r3,r8 + 0x0800a13c: 463a :F MOV r2,r7 + 0x0800a13e: 4631 1F MOV r1,r6 + 0x0800a140: 4628 (F MOV r0,r5 + 0x0800a142: e9cd9400 .... STRD r9,r4,[sp,#0] + 0x0800a146: f7fdf9cc .... BL prvInitialiseNewTimer ; 0x80074e2 + 0x0800a14a: 2000 . MOVS r0,#0 + 0x0800a14c: f884002c ..,. STRB r0,[r4,#0x2c] + 0x0800a150: 4620 F MOV r0,r4 + 0x0800a152: e8bd87fc .... POP {r2-r10,pc} + 0x0800a156: 0000 .. MOVS r0,r0 + i.xTimerCreateTimerTask + xTimerCreateTimerTask + 0x0800a158: b510 .. PUSH {r4,lr} + 0x0800a15a: b086 .. SUB sp,sp,#0x18 + 0x0800a15c: 2400 .$ MOVS r4,#0 + 0x0800a15e: f7fcfff9 .... BL prvCheckForValidListAndQueue ; 0x8007154 + 0x0800a162: 4816 .H LDR r0,[pc,#88] ; [0x800a1bc] = 0x2000029c + 0x0800a164: 6800 .h LDR r0,[r0,#0] + 0x0800a166: b1d0 .. CBZ r0,0x800a19e ; xTimerCreateTimerTask + 70 + 0x0800a168: 2000 . MOVS r0,#0 + 0x0800a16a: 9005 .. STR r0,[sp,#0x14] + 0x0800a16c: 9004 .. STR r0,[sp,#0x10] + 0x0800a16e: aa03 .. ADD r2,sp,#0xc + 0x0800a170: a904 .. ADD r1,sp,#0x10 + 0x0800a172: a805 .. ADD r0,sp,#0x14 + 0x0800a174: f7fdfe02 .... BL vApplicationGetTimerTaskMemory ; 0x8007d7c + 0x0800a178: 2230 0" MOVS r2,#0x30 + 0x0800a17a: e9dd1004 .... LDRD r1,r0,[sp,#0x10] + 0x0800a17e: 2300 .# MOVS r3,#0 + 0x0800a180: e9cd2100 ...! STRD r2,r1,[sp,#0] + 0x0800a184: 9002 .. STR r0,[sp,#8] + 0x0800a186: a10e .. ADR r1,{pc}+0x3a ; 0x800a1c0 + 0x0800a188: 480f .H LDR r0,[pc,#60] ; [0x800a1c8] = 0x80079ef + 0x0800a18a: 9a03 .. LDR r2,[sp,#0xc] + 0x0800a18c: f7fffd42 ..B. BL xTaskCreateStatic ; 0x8009c14 + 0x0800a190: 490e .I LDR r1,[pc,#56] ; [0x800a1cc] = 0x200002a0 + 0x0800a192: 6008 .` STR r0,[r1,#0] + 0x0800a194: 4608 .F MOV r0,r1 + 0x0800a196: 6800 .h LDR r0,[r0,#0] + 0x0800a198: b100 .. CBZ r0,0x800a19c ; xTimerCreateTimerTask + 68 + 0x0800a19a: 2401 .$ MOVS r4,#1 + 0x0800a19c: bf00 .. NOP + 0x0800a19e: b954 T. CBNZ r4,0x800a1b6 ; xTimerCreateTimerTask + 94 + 0x0800a1a0: bf00 .. NOP + 0x0800a1a2: 2050 P MOVS r0,#0x50 + 0x0800a1a4: f3808811 .... MSR BASEPRI,r0 + 0x0800a1a8: f3bf8f4f ..O. DSB + 0x0800a1ac: f3bf8f6f ..o. ISB + 0x0800a1b0: bf00 .. NOP + 0x0800a1b2: bf00 .. NOP + 0x0800a1b4: e7fe .. B 0x800a1b4 ; xTimerCreateTimerTask + 92 + 0x0800a1b6: 4620 F MOV r0,r4 + 0x0800a1b8: b006 .. ADD sp,sp,#0x18 + 0x0800a1ba: bd10 .. POP {r4,pc} + $d + 0x0800a1bc: 2000029c ... DCD 536871580 + 0x0800a1c0: 20726d54 Tmr DCD 544370004 + 0x0800a1c4: 00637653 Svc. DCD 6518355 + 0x0800a1c8: 080079ef .y.. DCD 134248943 + 0x0800a1cc: 200002a0 ... DCD 536871584 + $t + i.xTimerGenericCommand + xTimerGenericCommand + 0x0800a1d0: e92d47ff -..G PUSH {r0-r10,lr} + 0x0800a1d4: 4604 .F MOV r4,r0 + 0x0800a1d6: 460d .F MOV r5,r1 + 0x0800a1d8: 4616 .F MOV r6,r2 + 0x0800a1da: 461f .F MOV r7,r3 + 0x0800a1dc: f8dd8030 ..0. LDR r8,[sp,#0x30] + 0x0800a1e0: f04f0900 O... MOV r9,#0 + 0x0800a1e4: b954 T. CBNZ r4,0x800a1fc ; xTimerGenericCommand + 44 + 0x0800a1e6: bf00 .. NOP + 0x0800a1e8: 2050 P MOVS r0,#0x50 + 0x0800a1ea: f3808811 .... MSR BASEPRI,r0 + 0x0800a1ee: f3bf8f4f ..O. DSB + 0x0800a1f2: f3bf8f6f ..o. ISB + 0x0800a1f6: bf00 .. NOP + 0x0800a1f8: bf00 .. NOP + 0x0800a1fa: e7fe .. B 0x800a1fa ; xTimerGenericCommand + 42 + 0x0800a1fc: 4814 .H LDR r0,[pc,#80] ; [0x800a250] = 0x2000029c + 0x0800a1fe: 6800 .h LDR r0,[r0,#0] + 0x0800a200: b310 .. CBZ r0,0x800a248 ; xTimerGenericCommand + 120 + 0x0800a202: 9500 .. STR r5,[sp,#0] + 0x0800a204: 9601 .. STR r6,[sp,#4] + 0x0800a206: 9402 .. STR r4,[sp,#8] + 0x0800a208: 2d06 .- CMP r5,#6 + 0x0800a20a: da15 .. BGE 0x800a238 ; xTimerGenericCommand + 104 + 0x0800a20c: f7fffd5e ..^. BL xTaskGetSchedulerState ; 0x8009ccc + 0x0800a210: 2802 .( CMP r0,#2 + 0x0800a212: d108 .. BNE 0x800a226 ; xTimerGenericCommand + 86 + 0x0800a214: 2300 .# MOVS r3,#0 + 0x0800a216: 4642 BF MOV r2,r8 + 0x0800a218: 4669 iF MOV r1,sp + 0x0800a21a: 480d .H LDR r0,[pc,#52] ; [0x800a250] = 0x2000029c + 0x0800a21c: 6800 .h LDR r0,[r0,#0] + 0x0800a21e: f7fff931 ..1. BL xQueueGenericSend ; 0x8009484 + 0x0800a222: 4681 .F MOV r9,r0 + 0x0800a224: e010 .. B 0x800a248 ; xTimerGenericCommand + 120 + 0x0800a226: 2300 .# MOVS r3,#0 + 0x0800a228: 461a .F MOV r2,r3 + 0x0800a22a: 4669 iF MOV r1,sp + 0x0800a22c: 4808 .H LDR r0,[pc,#32] ; [0x800a250] = 0x2000029c + 0x0800a22e: 6800 .h LDR r0,[r0,#0] + 0x0800a230: f7fff928 ..(. BL xQueueGenericSend ; 0x8009484 + 0x0800a234: 4681 .F MOV r9,r0 + 0x0800a236: e007 .. B 0x800a248 ; xTimerGenericCommand + 120 + 0x0800a238: 2300 .# MOVS r3,#0 + 0x0800a23a: 463a :F MOV r2,r7 + 0x0800a23c: 4669 iF MOV r1,sp + 0x0800a23e: 4804 .H LDR r0,[pc,#16] ; [0x800a250] = 0x2000029c + 0x0800a240: 6800 .h LDR r0,[r0,#0] + 0x0800a242: f7fff9f3 .... BL xQueueGenericSendFromISR ; 0x800962c + 0x0800a246: 4681 .F MOV r9,r0 + 0x0800a248: 4648 HF MOV r0,r9 + 0x0800a24a: b004 .. ADD sp,sp,#0x10 + 0x0800a24c: e8bd87f0 .... POP {r4-r10,pc} + $d + 0x0800a250: 2000029c ... DCD 536871580 + $t + i.xTimerPendFunctionCallFromISR + xTimerPendFunctionCallFromISR + 0x0800a254: e92d41ff -..A PUSH {r0-r8,lr} + 0x0800a258: 4604 .F MOV r4,r0 + 0x0800a25a: 460d .F MOV r5,r1 + 0x0800a25c: 4616 .F MOV r6,r2 + 0x0800a25e: 461f .F MOV r7,r3 + 0x0800a260: f06f0001 o... MVN r0,#1 + 0x0800a264: 9000 .. STR r0,[sp,#0] + 0x0800a266: 9401 .. STR r4,[sp,#4] + 0x0800a268: 9502 .. STR r5,[sp,#8] + 0x0800a26a: 9603 .. STR r6,[sp,#0xc] + 0x0800a26c: 2300 .# MOVS r3,#0 + 0x0800a26e: 463a :F MOV r2,r7 + 0x0800a270: 4669 iF MOV r1,sp + 0x0800a272: 4804 .H LDR r0,[pc,#16] ; [0x800a284] = 0x2000029c + 0x0800a274: 6800 .h LDR r0,[r0,#0] + 0x0800a276: f7fff9d9 .... BL xQueueGenericSendFromISR ; 0x800962c + 0x0800a27a: 4680 .F MOV r8,r0 + 0x0800a27c: 4640 @F MOV r0,r8 + 0x0800a27e: b004 .. ADD sp,sp,#0x10 + 0x0800a280: e8bd81f0 .... POP {r4-r8,pc} + $d + 0x0800a284: 2000029c ... DCD 536871580 + $d.realdata + .constdata + MasterTask_attributes + 0x0800a288: 0800a64c L... DCD 134260300 + 0x0800a28c: 00000000 .... DCD 0 + 0x0800a290: 00000000 .... DCD 0 + 0x0800a294: 00000000 .... DCD 0 + 0x0800a298: 00000000 .... DCD 0 + 0x0800a29c: 00000400 .... DCD 1024 + 0x0800a2a0: 00000018 .... DCD 24 + 0x0800a2a4: 00000000 .... DCD 0 + 0x0800a2a8: 00000000 .... DCD 0 + SlaveTask_attributes + 0x0800a2ac: 0800a640 @... DCD 134260288 + 0x0800a2b0: 00000000 .... DCD 0 + 0x0800a2b4: 00000000 .... DCD 0 + 0x0800a2b8: 00000000 .... DCD 0 + 0x0800a2bc: 00000000 .... DCD 0 + 0x0800a2c0: 00000200 .... DCD 512 + 0x0800a2c4: 00000018 .... DCD 24 + 0x0800a2c8: 00000000 .... DCD 0 + 0x0800a2cc: 00000000 .... DCD 0 + Write_TASK + 0x0800a2d0: 0800a634 4... DCD 134260276 + 0x0800a2d4: 00000000 .... DCD 0 + 0x0800a2d8: 00000000 .... DCD 0 + 0x0800a2dc: 00000000 .... DCD 0 + 0x0800a2e0: 00000000 .... DCD 0 + 0x0800a2e4: 00000400 .... DCD 1024 + 0x0800a2e8: 0000000e .... DCD 14 + 0x0800a2ec: 00000000 .... DCD 0 + 0x0800a2f0: 00000000 .... DCD 0 + Read_Task + 0x0800a2f4: 0800a628 (... DCD 134260264 + 0x0800a2f8: 00000000 .... DCD 0 + 0x0800a2fc: 00000000 .... DCD 0 + 0x0800a300: 00000000 .... DCD 0 + 0x0800a304: 00000000 .... DCD 0 + 0x0800a308: 00000400 .... DCD 1024 + 0x0800a30c: 0000000e .... DCD 14 + 0x0800a310: 00000000 .... DCD 0 + 0x0800a314: 00000000 .... DCD 0 + defaultTask_attributes + 0x0800a318: 0800a658 X... DCD 134260312 + 0x0800a31c: 00000000 .... DCD 0 + 0x0800a320: 00000000 .... DCD 0 + 0x0800a324: 00000000 .... DCD 0 + 0x0800a328: 00000000 .... DCD 0 + 0x0800a32c: 00000080 .... DCD 128 + 0x0800a330: 0000000e .... DCD 14 + 0x0800a334: 00000000 .... DCD 0 + 0x0800a338: 00000000 .... DCD 0 + UART2_TxTask_attributes + 0x0800a33c: 0800a674 t... DCD 134260340 + 0x0800a340: 00000000 .... DCD 0 + 0x0800a344: 00000000 .... DCD 0 + 0x0800a348: 00000000 .... DCD 0 + 0x0800a34c: 00000000 .... DCD 0 + 0x0800a350: 00000200 .... DCD 512 + 0x0800a354: 00000018 .... DCD 24 + 0x0800a358: 00000000 .... DCD 0 + 0x0800a35c: 00000000 .... DCD 0 + UART2_RxTask_attributes + 0x0800a360: 0800a664 d... DCD 134260324 + 0x0800a364: 00000000 .... DCD 0 + 0x0800a368: 00000000 .... DCD 0 + 0x0800a36c: 00000000 .... DCD 0 + 0x0800a370: 00000000 .... DCD 0 + 0x0800a374: 00000200 .... DCD 512 + 0x0800a378: 00000018 .... DCD 24 + 0x0800a37c: 00000000 .... DCD 0 + 0x0800a380: 00000000 .... DCD 0 + 0x0800a384: 00020006 .... DCD 131078 + 0x0800a388: 00040003 .... DCD 262147 + 0x0800a38c: 00080005 .... DCD 524293 + 0x0800a390: 00320002 ..2. DCD 3276802 + 0x0800a394: 000b000a .... DCD 720906 + .constdata + AHBPrescTable + 0x0800a398: 00000000 .... DCD 0 + 0x0800a39c: 00000000 .... DCD 0 + 0x0800a3a0: 04030201 .... DCD 67305985 + 0x0800a3a4: 09080706 .... DCD 151521030 + APBPrescTable + 0x0800a3a8: 00000000 .... DCD 0 + 0x0800a3ac: 04030201 .... DCD 67305985 + .constdata + aucCRCHi + 0x0800a3b0: 4081c100 ...@ DCD 1082245376 + 0x0800a3b4: 4180c001 ...A DCD 1098956801 + 0x0800a3b8: 4180c001 ...A DCD 1098956801 + 0x0800a3bc: 4081c100 ...@ DCD 1082245376 + 0x0800a3c0: 4180c001 ...A DCD 1098956801 + 0x0800a3c4: 4081c100 ...@ DCD 1082245376 + 0x0800a3c8: 4081c100 ...@ DCD 1082245376 + 0x0800a3cc: 4180c001 ...A DCD 1098956801 + 0x0800a3d0: 4180c001 ...A DCD 1098956801 + 0x0800a3d4: 4081c100 ...@ DCD 1082245376 + 0x0800a3d8: 4081c100 ...@ DCD 1082245376 + 0x0800a3dc: 4180c001 ...A DCD 1098956801 + 0x0800a3e0: 4081c100 ...@ DCD 1082245376 + 0x0800a3e4: 4180c001 ...A DCD 1098956801 + 0x0800a3e8: 4180c001 ...A DCD 1098956801 + 0x0800a3ec: 4081c100 ...@ DCD 1082245376 + 0x0800a3f0: 4180c001 ...A DCD 1098956801 + 0x0800a3f4: 4081c100 ...@ DCD 1082245376 + 0x0800a3f8: 4081c100 ...@ DCD 1082245376 + 0x0800a3fc: 4180c001 ...A DCD 1098956801 + 0x0800a400: 4081c100 ...@ DCD 1082245376 + 0x0800a404: 4180c001 ...A DCD 1098956801 + 0x0800a408: 4180c001 ...A DCD 1098956801 + 0x0800a40c: 4081c100 ...@ DCD 1082245376 + 0x0800a410: 4081c100 ...@ DCD 1082245376 + 0x0800a414: 4180c001 ...A DCD 1098956801 + 0x0800a418: 4180c001 ...A DCD 1098956801 + 0x0800a41c: 4081c100 ...@ DCD 1082245376 + 0x0800a420: 4180c001 ...A DCD 1098956801 + 0x0800a424: 4081c100 ...@ DCD 1082245376 + 0x0800a428: 4081c100 ...@ DCD 1082245376 + 0x0800a42c: 4180c001 ...A DCD 1098956801 + 0x0800a430: 4180c001 ...A DCD 1098956801 + 0x0800a434: 4081c100 ...@ DCD 1082245376 + 0x0800a438: 4081c100 ...@ DCD 1082245376 + 0x0800a43c: 4180c001 ...A DCD 1098956801 + 0x0800a440: 4081c100 ...@ DCD 1082245376 + 0x0800a444: 4180c001 ...A DCD 1098956801 + 0x0800a448: 4180c001 ...A DCD 1098956801 + 0x0800a44c: 4081c100 ...@ DCD 1082245376 + 0x0800a450: 4081c100 ...@ DCD 1082245376 + 0x0800a454: 4180c001 ...A DCD 1098956801 + 0x0800a458: 4180c001 ...A DCD 1098956801 + 0x0800a45c: 4081c100 ...@ DCD 1082245376 + 0x0800a460: 4180c001 ...A DCD 1098956801 + 0x0800a464: 4081c100 ...@ DCD 1082245376 + 0x0800a468: 4081c100 ...@ DCD 1082245376 + 0x0800a46c: 4180c001 ...A DCD 1098956801 + 0x0800a470: 4081c100 ...@ DCD 1082245376 + 0x0800a474: 4180c001 ...A DCD 1098956801 + 0x0800a478: 4180c001 ...A DCD 1098956801 + 0x0800a47c: 4081c100 ...@ DCD 1082245376 + 0x0800a480: 4180c001 ...A DCD 1098956801 + 0x0800a484: 4081c100 ...@ DCD 1082245376 + 0x0800a488: 4081c100 ...@ DCD 1082245376 + 0x0800a48c: 4180c001 ...A DCD 1098956801 + 0x0800a490: 4180c001 ...A DCD 1098956801 + 0x0800a494: 4081c100 ...@ DCD 1082245376 + 0x0800a498: 4081c100 ...@ DCD 1082245376 + 0x0800a49c: 4180c001 ...A DCD 1098956801 + 0x0800a4a0: 4081c100 ...@ DCD 1082245376 + 0x0800a4a4: 4180c001 ...A DCD 1098956801 + 0x0800a4a8: 4180c001 ...A DCD 1098956801 + 0x0800a4ac: 4081c100 ...@ DCD 1082245376 + aucCRCLo + 0x0800a4b0: 01c1c000 .... DCD 29474816 + 0x0800a4b4: c20203c3 .... DCD 3254911939 + 0x0800a4b8: c70706c6 .... DCD 3339126470 + 0x0800a4bc: 04c4c505 .... DCD 80004357 + 0x0800a4c0: cd0d0ccc .... DCD 3440184524 + 0x0800a4c4: 0ececf0f .... DCD 248434447 + 0x0800a4c8: 0bcbca0a .... DCD 197904906 + 0x0800a4cc: c80809c9 .... DCD 3355969993 + 0x0800a4d0: d91918d8 .... DCD 3642300632 + 0x0800a4d4: 1adadb1b .... DCD 450550555 + 0x0800a4d8: 1fdfde1e .... DCD 534765086 + 0x0800a4dc: dc1c1ddd .... DCD 3692830173 + 0x0800a4e0: 15d5d414 .... DCD 366334996 + 0x0800a4e4: d61617d7 .... DCD 3591772119 + 0x0800a4e8: d31312d2 .... DCD 3541242578 + 0x0800a4ec: 10d0d111 .... DCD 282120465 + 0x0800a4f0: f13130f0 .01. DCD 4046532848 + 0x0800a4f4: 32f2f333 3..2 DCD 854782771 + 0x0800a4f8: 37f7f636 6..7 DCD 938997302 + 0x0800a4fc: f43435f5 .54. DCD 4097062389 + 0x0800a500: 3dfdfc3c <..= DCD 1040055356 + 0x0800a504: fe3e3fff .?>. DCD 4265492479 + 0x0800a508: fb3b3afa .:;. DCD 4214962938 + 0x0800a50c: 38f8f939 9..8 DCD 955840825 + 0x0800a510: 29e9e828 (..) DCD 703195176 + 0x0800a514: ea2a2beb .+*. DCD 3928632299 + 0x0800a518: ef2f2eee ../. DCD 4012846830 + 0x0800a51c: 2ceced2d -.., DCD 753724717 + 0x0800a520: e52524e4 .$%. DCD 3844416740 + 0x0800a524: 26e6e727 '..& DCD 652666663 + 0x0800a528: 23e3e222 "..# DCD 602137122 + 0x0800a52c: e02021e1 .! . DCD 3760202209 + 0x0800a530: a16160a0 .`a. DCD 2707513504 + 0x0800a534: 62a2a363 c..b DCD 1654825827 + 0x0800a538: 67a7a666 f..g DCD 1739040358 + 0x0800a53c: a46465a5 .ed. DCD 2758043045 + 0x0800a540: 6dadac6c l..m DCD 1840098412 + 0x0800a544: ae6e6faf .on. DCD 2926473135 + 0x0800a548: ab6b6aaa .jk. DCD 2875943594 + 0x0800a54c: 68a8a969 i..h DCD 1755883881 + 0x0800a550: 79b9b878 x..y DCD 2042214520 + 0x0800a554: ba7a7bbb .{z. DCD 3128589243 + 0x0800a558: bf7f7ebe .~.. DCD 3212803774 + 0x0800a55c: 7cbcbd7d }..| DCD 2092744061 + 0x0800a560: b57574b4 .tu. DCD 3044373684 + 0x0800a564: 76b6b777 w..v DCD 1991686007 + 0x0800a568: 73b3b272 r..s DCD 1941156466 + 0x0800a56c: b07071b1 .qp. DCD 2960159153 + 0x0800a570: 51919050 P..Q DCD 1368494160 + 0x0800a574: 92525393 .SR. DCD 2454868883 + 0x0800a578: 97575696 .VW. DCD 2539083414 + 0x0800a57c: 54949555 U..T DCD 1419023701 + 0x0800a580: 9d5d5c9c .\]. DCD 2640141468 + 0x0800a584: 5e9e9f5f _..^ DCD 1587453791 + 0x0800a588: 5b9b9a5a Z..[ DCD 1536924250 + 0x0800a58c: 98585999 .YX. DCD 2555926937 + 0x0800a590: 89494888 .HI. DCD 2303281288 + 0x0800a594: 4a8a8b4b K..J DCD 1250593611 + 0x0800a598: 4f8f8e4e N..O DCD 1334808142 + 0x0800a59c: 8c4c4d8d .ML. DCD 2353810829 + 0x0800a5a0: 45858444 D..E DCD 1166378052 + 0x0800a5a4: 86464787 .GF. DCD 2252752775 + 0x0800a5a8: 83434282 .BC. DCD 2202223234 + 0x0800a5ac: 40808141 A..@ DCD 1082163521 + .constdata + __func__ + 0x0800a5b0: 4d424d78 xMBM DCD 1296190840 + 0x0800a5b4: 65747361 aste DCD 1702130529 + 0x0800a5b8: 726f5072 rPor DCD 1919897714 + 0x0800a5bc: 65764574 tEve DCD 1702249844 + 0x0800a5c0: 6e49746e ntIn DCD 1850307694 + 0x0800a5c4: 7469 it DCW 29801 + 0x0800a5c6: 00 . DCB 0 + __func__ + 0x0800a5c7: 78 x DCB 120 + 0x0800a5c8: 614d424d MBMa DCD 1632453197 + 0x0800a5cc: 72657473 ster DCD 1919251571 + 0x0800a5d0: 74726f50 Port DCD 1953656656 + 0x0800a5d4: 6e657645 Even DCD 1852143173 + 0x0800a5d8: 736f5074 tPos DCD 1936674932 + 0x0800a5dc: 0074 t. DCW 116 + .constdata + __func__ + 0x0800a5de: 4d78 xM DCW 19832 + 0x0800a5e0: 73614d42 BMas DCD 1935756610 + 0x0800a5e4: 50726574 terP DCD 1349674356 + 0x0800a5e8: 5374726f ortS DCD 1400140399 + 0x0800a5ec: 61697265 eria DCD 1634300517 + 0x0800a5f0: 696e496c lIni DCD 1768835436 + 0x0800a5f4: 0074 t. DCW 116 + __func__ + 0x0800a5f6: 4d76 vM DCW 19830 + 0x0800a5f8: 73614d42 BMas DCD 1935756610 + 0x0800a5fc: 50726574 terP DCD 1349674356 + 0x0800a600: 5374726f ortS DCD 1400140399 + 0x0800a604: 61697265 eria DCD 1634300517 + 0x0800a608: 616e456c lEna DCD 1634616684 + 0x0800a60c: 00656c62 ble. DCD 6646882 + .constdata + __func__ + 0x0800a610: 4d424d78 xMBM DCD 1296190840 + 0x0800a614: 65747361 aste DCD 1702130529 + 0x0800a618: 726f5072 rPor DCD 1919897714 + 0x0800a61c: 6d695474 tTim DCD 1835619444 + 0x0800a620: 49737265 ersI DCD 1232302693 + 0x0800a624: 0074696e nit. DCD 7629166 + .conststring + 0x0800a628: 64616552 Read DCD 1684104530 + 0x0800a62c: 7361545f _Tas DCD 1935758431 + 0x0800a630: 0000006b k... DCD 107 + 0x0800a634: 74697257 Writ DCD 1953067607 + 0x0800a638: 61545f65 e_Ta DCD 1632919397 + 0x0800a63c: 00006b73 sk.. DCD 27507 + 0x0800a640: 76616c53 Slav DCD 1986096211 + 0x0800a644: 73615465 eTas DCD 1935758437 + 0x0800a648: 0000006b k... DCD 107 + 0x0800a64c: 7473614d Mast DCD 1953718605 + 0x0800a650: 61547265 erTa DCD 1632924261 + 0x0800a654: 00006b73 sk.. DCD 27507 + 0x0800a658: 61666564 defa DCD 1634100580 + 0x0800a65c: 54746c75 ultT DCD 1416916085 + 0x0800a660: 006b7361 ask. DCD 7041889 + 0x0800a664: 54524155 UART DCD 1414676821 + 0x0800a668: 78525f32 2_Rx DCD 2018664242 + 0x0800a66c: 6b736154 Task DCD 1802723668 + 0x0800a670: 00000000 .... DCD 0 + 0x0800a674: 54524155 UART DCD 1414676821 + 0x0800a678: 78545f32 2_Tx DCD 2018795314 + 0x0800a67c: 6b736154 Task DCD 1802723668 + 0x0800a680: 00000000 .... DCD 0 + .conststring + 0x0800a684: 74726175 uart DCD 1953653109 + 0x0800a688: 00000031 1... DCD 49 + 0x0800a68c: 74726175 uart DCD 1953653109 + 0x0800a690: 00000032 2... DCD 50 + 0x0800a694: 74726175 uart DCD 1953653109 + 0x0800a698: 00000033 3... DCD 51 + 0x0800a69c: 74726175 uart DCD 1953653109 + 0x0800a6a0: 00000035 5... DCD 53 + .conststring + 0x0800a6a4: 31736461 ads1 DCD 829645921 + 0x0800a6a8: 5f353131 115_ DCD 1597321521 + 0x0800a6ac: 0071626e nbq. DCD 7430766 + .conststring + 0x0800a6b0: 4f4d2020 MO DCD 1330454560 + 0x0800a6b4: 53554244 DBUS DCD 1398096452 + 0x0800a6b8: 4245445f _DEB DCD 1111835743 + 0x0800a6bc: 25284755 UG(% DCD 623396693 + 0x0800a6c0: 64253a73 s:%d DCD 1680161395 + 0x0800a6c4: 20203a29 ): DCD 538982953 + 0x0800a6c8: 73614d09 .Mas DCD 1935756553 + 0x0800a6cc: 20726574 ter DCD 544367988 + 0x0800a6d0: 61657263 crea DCD 1634038371 + 0x0800a6d4: 65206574 te e DCD 1696621940 + 0x0800a6d8: 746e6576 vent DCD 1953391990 + 0x0800a6dc: 7265735f _ser DCD 1919251295 + 0x0800a6e0: 206c6169 ial DCD 543973737 + 0x0800a6e4: 63637573 succ DCD 1667462515 + 0x0800a6e8: 21737365 ess! DCD 561214309 + 0x0800a6ec: 65766520 eve DCD 1702257952 + 0x0800a6f0: 735f746e nt_s DCD 1935635566 + 0x0800a6f4: 61697265 eria DCD 1634300517 + 0x0800a6f8: 64253d6c l=%d DCD 1680162156 + 0x0800a6fc: 00000a0d .... DCD 2573 + Region$$Table$$Base + 0x0800a700: 0800a720 ... DCD 134260512 + 0x0800a704: 20000000 ... DCD 536870912 + 0x0800a708: 00000428 (... DCD 1064 + 0x0800a70c: 08000894 .... DCD 134219924 + 0x0800a710: 0800a7e4 .... DCD 134260708 + 0x0800a714: 20000428 (.. DCD 536871976 + 0x0800a718: 00005d38 8].. DCD 23864 + 0x0800a71c: 080057aa .W.. DCD 134240170 + Region$$Table$$Limit + +** Section #2 'RW_IRAM1' (SHT_PROGBITS) [SHF_ALLOC + SHF_WRITE] + Size : 196 bytes (alignment 4) + Address: 0x20000000 + + +** Section #3 'RW_IRAM1' (SHT_NOBITS) [SHF_ALLOC + SHF_WRITE] + Size : 23864 bytes (alignment 8) + Address: 0x20000428 + + +** Section #4 '.debug_abbrev' (SHT_PROGBITS) + Size : 1476 bytes + + +** Section #5 '.debug_frame' (SHT_PROGBITS) + Size : 10616 bytes + + +** Section #6 '.debug_info' (SHT_PROGBITS) + Size : 186632 bytes + + +** Section #7 '.debug_line' (SHT_PROGBITS) + Size : 80108 bytes + + +** Section #8 '.debug_loc' (SHT_PROGBITS) + Size : 26836 bytes + + +** Section #9 '.debug_macinfo' (SHT_PROGBITS) + Size : 710148 bytes + + +** Section #10 '.debug_pubnames' (SHT_PROGBITS) + Size : 14244 bytes + + +** Section #11 '.symtab' (SHT_SYMTAB) + Size : 27680 bytes (alignment 4) + String table #12 '.strtab' + Last local symbol no. 1230 + + +** Section #12 '.strtab' (SHT_STRTAB) + Size : 26404 bytes + + +** Section #13 '.note' (SHT_NOTE) + Size : 28 bytes (alignment 4) + + +** Section #14 '.comment' (SHT_PROGBITS) + Size : 111260 bytes + + +** Section #15 '.shstrtab' (SHT_STRTAB) + Size : 156 bytes + + +address size variable name type +0x2000041c 0x4 pxHigherPriorityTaskWoken BaseType_t + +address size variable name type +0x20000418 0x4 timer TimerHandle_t + +address size variable name type +0x20000414 0x2 usT35TimeOut50us USHORT + +address size variable name type +0x20000400 0x8 Master_serial_rx_fifo Serial_fifo +0x20000400 0x4 Master_serial_rx_fifo.buffer pointer to volatile uint8_t +0x20000404 0x2 Master_serial_rx_fifo.put_index volatile uint16_t +0x20000406 0x2 Master_serial_rx_fifo.get_index volatile uint16_t + +address size variable name type +0x2000040c 0x4 event_serial EventGroupHandle_t + +address size variable name type +0x20005c50 0x109 rx_buff array[265] of volatile uint8_t + +address size variable name type +0x20000410 0x4 serial pointer to UART_HandleTypeDef + +address size variable name type +0x20000408 0x4 thread_serial_soft_trans_irq TaskHandle_t + +address size variable name type +0x200003fc 0x4 xMasterOsEvent EventGroupHandle_t + +address size variable name type +0x200003f8 0x4 xMasterRunRes SemaphoreHandle_t + +address size variable name type +0x200003e8 0x10 Master_station Master_data +0x200003e8 0x4 Master_station.ucMDiscInBuf pointer to array[8] of UCHAR +0x200003ec 0x4 Master_station.ucMCoilBuf pointer to array[8] of UCHAR +0x200003f0 0x4 Master_station.usMRegInBuf pointer to array[100] of USHORT +0x200003f4 0x4 Master_station.usMRegHoldBuf pointer to array[100] of ULONG + +address size variable name type +0x20003650 0x80 ucMCoilBuf array[16] of array[8] of UCHAR + +address size variable name type +0x200035d0 0x80 ucMDiscInBuf array[16] of array[8] of UCHAR + +address size variable name type +0x200003e2 0x2 usMCoilStart USHORT + +address size variable name type +0x200003e0 0x2 usMDiscInStart USHORT + +address size variable name type +0x20004350 0x1900 usMRegHoldBuf array[16] of array[100] of ULONG + +address size variable name type +0x200003e6 0x2 usMRegHoldStart USHORT + +address size variable name type +0x200036d0 0xc80 usMRegInBuf array[16] of array[100] of USHORT + +address size variable name type +0x200003e4 0x2 usMRegInStart USHORT + +address size variable name type +0x200035af 0x20 ucMBSlaveID array[32] of UCHAR + +address size variable name type +0x200003de 0x2 usMBSlaveIDLen USHORT + +address size variable name type +0x200003dd 0x1 eMasterCurTimerMode volatile eMBMasterTimerMode + +address size variable name type +0x200003d1 0x1 eRcvState volatile eMBMasterRcvState + +address size variable name type +0x200003d0 0x1 eSndState volatile eMBMasterSndState + +address size variable name type +0x200003d4 0x4 pucMasterSndBufferCur pointer to volatile UCHAR + +address size variable name type +0x200034af 0x100 ucMasterRTURcvBuf array[256] of volatile UCHAR + +address size variable name type +0x200033b2 0xfd ucMasterRTUSndBuf array[253] of volatile UCHAR + +address size variable name type +0x200003da 0x2 usMasterRcvBufferPos volatile USHORT + +address size variable name type +0x200003d2 0x2 usMasterSendPDULength volatile USHORT + +address size variable name type +0x200003d8 0x2 usMasterSndBufferCount volatile USHORT + +address size variable name type +0x200003dc 0x1 xFrameIsBroadcast volatile BOOL + +address size variable name type +0x0800a3b0 0x100 aucCRCHi array[256] of const UCHAR + +address size variable name type +0x0800a4b0 0x100 aucCRCLo array[256] of const UCHAR + +address size variable name type +0x2000031a 0x1 eMBMasterCurErrorType eMBMasterErrorEventType + +address size variable name type +0x2000031b 0x1 eMBState anonymous + +address size variable name type +0x20000328 0x4 peMBMasterFrameReceiveCur peMBFrameReceive + +address size variable name type +0x2000031c 0x4 peMBMasterFrameSendCur peMBFrameSend + +address size variable name type +0x2000032c 0x4 pvMBMasterFrameCloseCur pvMBFrameClose + +address size variable name type +0x20000320 0x4 pvMBMasterFrameStartCur pvMBFrameStart + +address size variable name type +0x20000324 0x4 pvMBMasterFrameStopCur pvMBFrameStop + +address size variable name type +0x20000330 0x4 pxMBMasterFrameCBByteReceived pointer to function + +address size variable name type +0x2000033c 0x4 pxMBMasterFrameCBReceiveFSMCur pointer to function + +address size variable name type +0x20000340 0x4 pxMBMasterFrameCBTransmitFSMCur pointer to function + +address size variable name type +0x20000334 0x4 pxMBMasterFrameCBTransmitterEmpty pointer to function + +address size variable name type +0x20000338 0x4 pxMBMasterPortCBTimerExpired pointer to function + +address size variable name type +0x20000318 0x1 ucMBMasterDestAddress UCHAR + +address size variable name type +0x20000319 0x1 xMBRunInMasterMode BOOL + +address size variable name type +0x20000344 0x80 xMasterFuncHandlers array[16] of xMBFunctionHandler + +address size variable name type +0x20000314 0x4 g_ADS1115nbq_devices array[1] of pointer to ADS1115_Device + +address size variable name type +0x20000310 0x4 I2C_Virtual_SCL_OUT_Addr pointer to uint16_t + +address size variable name type +0x2000030c 0x4 I2C_Virtual_SDA_IN_Addr pointer to uint16_t + +address size variable name type +0x20000308 0x4 I2C_Virtual_SDA_OUT_Addr pointer to uint16_t + +address size variable name type +0x20000300 0x2 I2C_Virtual_SDA_Pin uint16_t + +address size variable name type +0x20000304 0x4 I2C_Virtual_SDA_Port pointer to GPIO_TypeDef + +address size variable name type +0x200002d0 0x10 ADS1115IIC I2C_BUS_Typedef +0x200002d0 0x4 ADS1115IIC.SDA_Port pointer to GPIO_TypeDef +0x200002d4 0x2 * ADS1115IIC.SDA_Pin uint16_t +0x200002d8 0x4 ADS1115IIC.SCL_Port pointer to GPIO_TypeDef +0x200002dc 0x2 ADS1115IIC.SCL_Pin uint16_t + +address size variable name type +0x200033a0 0x12 ADS1115_InitType ADS1115_InitTypeDefine +0x200033a0 0x2 ADS1115_InitType.OS u16 +0x200033a2 0x2 ADS1115_InitType.MUX u16 +0x200033a4 0x2 ADS1115_InitType.PGA u16 +0x200033a6 0x2 ADS1115_InitType.MODE u16 +0x200033a8 0x2 ADS1115_InitType.DataRate u16 +0x200033aa 0x2 ADS1115_InitType.COMP_MODE u16 +0x200033ac 0x2 ADS1115_InitType.COMP_POL u16 +0x200033ae 0x2 ADS1115_InitType.COMP_LAT u16 +0x200033b0 0x2 ADS1115_InitType.COMP_QUE u16 + +address size variable name type +0x200002e0 0x8 ADS1115_RawData array[4] of int16_t + +address size variable name type +0x200002e8 0x14 g_ADS1115nbq ADS1115_Device +0x200002e8 0x4 g_ADS1115nbq.name pointer to char +0x200002ec 0x4 g_ADS1115nbq.Init pointer to function +0x200002f0 0x4 g_ADS1115nbq.GetOriginalVol pointer to function +0x200002f4 0x4 g_ADS1115nbq.GetVol pointer to function +0x200002f8 0x4 g_ADS1115nbq.GetAverageVol pointer to function + +address size variable name type +0x200002c8 0x1 ucMaxSysCallPriority uint8_t + +address size variable name type +0x200002cc 0x4 ulMaxPRIGROUPValue uint32_t + +address size variable name type +0x200002c4 0x4 uxCriticalNesting UBaseType_t + +address size variable name type +0x200002b4 0x4 pxEnd pointer to BlockLink_t + +address size variable name type +0x200013a0 0x2000 ucHeap array[8192] of uint8_t + +address size variable name type +0x200002c0 0x4 xBlockAllocatedBit size_t + +address size variable name type +0x200002b8 0x4 xFreeBytesRemaining size_t + +address size variable name type +0x200002bc 0x4 xMinimumEverFreeBytesRemaining size_t + +address size variable name type +0x200002ac 0x8 xStart BlockLink_t +0x200002ac 0x4 xStart.pxNextFreeBlock pointer to A_BLOCK_LINK +0x200002b0 0x4 xStart.xBlockSize size_t + +address size variable name type +0x20001044 0x100 Idle_Stack array[64] of StackType_t + +address size variable name type +0x20000fe8 0x5c Idle_TCB StaticTask_t +0x20000fe8 0x4 Idle_TCB.pxDummy1 pointer to unknown Type +0x20000fec 0x28 Idle_TCB.xDummy3 array[2] of StaticListItem_t +0x20001014 0x4 Idle_TCB.uxDummy5 UBaseType_t +0x20001018 0x4 Idle_TCB.pxDummy6 pointer to unknown Type +0x2000101c 0x10 Idle_TCB.ucDummy7 array[16] of uint8_t +0x2000102c 0x8 Idle_TCB.uxDummy10 array[2] of UBaseType_t +0x20001034 0x8 Idle_TCB.uxDummy12 array[2] of UBaseType_t +0x2000103c 0x4 Idle_TCB.ulDummy18 uint32_t +0x20001040 0x1 Idle_TCB.ucDummy19 uint8_t +0x20001041 0x1 Idle_TCB.uxDummy20 uint8_t + +address size variable name type +0x200002a8 0x4 KernelState osKernelState_t + +address size variable name type +0x200011a0 0x200 Timer_Stack array[128] of StackType_t + +address size variable name type +0x20001144 0x5c Timer_TCB StaticTask_t +0x20001144 0x4 Timer_TCB.pxDummy1 pointer to unknown Type +0x20001148 0x28 Timer_TCB.xDummy3 array[2] of StaticListItem_t +0x20001170 0x4 Timer_TCB.uxDummy5 UBaseType_t +0x20001174 0x4 Timer_TCB.pxDummy6 pointer to unknown Type +0x20001178 0x10 Timer_TCB.ucDummy7 array[16] of uint8_t +0x20001188 0x8 Timer_TCB.uxDummy10 array[2] of UBaseType_t +0x20001190 0x8 Timer_TCB.uxDummy12 array[2] of UBaseType_t +0x20001198 0x4 Timer_TCB.ulDummy18 uint32_t +0x2000119c 0x1 Timer_TCB.ucDummy19 uint8_t +0x2000119d 0x1 Timer_TCB.uxDummy20 uint8_t + +address size variable name type +0x20000294 0x4 pxCurrentTimerList pointer to List_t + +address size variable name type +0x20000298 0x4 pxOverflowTimerList pointer to List_t + +address size variable name type +0x20000ed0 0x14 xActiveTimerList1 List_t +0x20000ed0 0x4 xActiveTimerList1.uxNumberOfItems volatile UBaseType_t +0x20000ed4 0x4 xActiveTimerList1.pxIndex pointer to ListItem_t +0x20000ed8 0xc xActiveTimerList1.xListEnd MiniListItem_t +0x20000ed8 0x4 xActiveTimerList1.xListEnd.xItemValue TickType_t +0x20000edc 0x4 xActiveTimerList1.xListEnd.pxNext pointer to xLIST_ITEM +0x20000ee0 0x4 xActiveTimerList1.xListEnd.pxPrevious pointer to xLIST_ITEM + +address size variable name type +0x20000ee4 0x14 xActiveTimerList2 List_t +0x20000ee4 0x4 xActiveTimerList2.uxNumberOfItems volatile UBaseType_t +0x20000ee8 0x4 xActiveTimerList2.pxIndex pointer to ListItem_t +0x20000eec 0xc xActiveTimerList2.xListEnd MiniListItem_t +0x20000eec 0x4 xActiveTimerList2.xListEnd.xItemValue TickType_t +0x20000ef0 0x4 xActiveTimerList2.xListEnd.pxNext pointer to xLIST_ITEM +0x20000ef4 0x4 xActiveTimerList2.xListEnd.pxPrevious pointer to xLIST_ITEM + +address size variable name type +0x2000029c 0x4 xTimerQueue QueueHandle_t + +address size variable name type +0x200002a0 0x4 xTimerTaskHandle TaskHandle_t + +address size variable name type +0x20000258 0x4 pxCurrentTCB volatile pointer to TCB_t + +address size variable name type +0x2000025c 0x4 pxDelayedTaskList volatile pointer to List_t + +address size variable name type +0x20000260 0x4 pxOverflowDelayedTaskList volatile pointer to List_t + +address size variable name type +0x20000a0c 0x460 pxReadyTasksLists array[56] of List_t + +address size variable name type +0x20000268 0x4 uxCurrentNumberOfTasks volatile UBaseType_t + +address size variable name type +0x20000264 0x4 uxDeletedTasksWaitingCleanUp volatile UBaseType_t + +address size variable name type +0x20000278 0x4 uxPendedTicks volatile UBaseType_t + +address size variable name type +0x20000290 0x4 uxSchedulerSuspended volatile UBaseType_t + +address size variable name type +0x20000284 0x4 uxTaskNumber UBaseType_t + +address size variable name type +0x20000270 0x4 uxTopReadyPriority volatile UBaseType_t + +address size variable name type +0x20000e6c 0x14 xDelayedTaskList1 List_t +0x20000e6c 0x4 xDelayedTaskList1.uxNumberOfItems volatile UBaseType_t +0x20000e70 0x4 xDelayedTaskList1.pxIndex pointer to ListItem_t +0x20000e74 0xc xDelayedTaskList1.xListEnd MiniListItem_t +0x20000e74 0x4 xDelayedTaskList1.xListEnd.xItemValue TickType_t +0x20000e78 0x4 xDelayedTaskList1.xListEnd.pxNext pointer to xLIST_ITEM +0x20000e7c 0x4 xDelayedTaskList1.xListEnd.pxPrevious pointer to xLIST_ITEM + +address size variable name type +0x20000e80 0x14 xDelayedTaskList2 List_t +0x20000e80 0x4 xDelayedTaskList2.uxNumberOfItems volatile UBaseType_t +0x20000e84 0x4 xDelayedTaskList2.pxIndex pointer to ListItem_t +0x20000e88 0xc xDelayedTaskList2.xListEnd MiniListItem_t +0x20000e88 0x4 xDelayedTaskList2.xListEnd.xItemValue TickType_t +0x20000e8c 0x4 xDelayedTaskList2.xListEnd.pxNext pointer to xLIST_ITEM +0x20000e90 0x4 xDelayedTaskList2.xListEnd.pxPrevious pointer to xLIST_ITEM + +address size variable name type +0x2000028c 0x4 xIdleTaskHandle TaskHandle_t + +address size variable name type +0x20000288 0x4 xNextTaskUnblockTime volatile TickType_t + +address size variable name type +0x20000280 0x4 xNumOfOverflows volatile BaseType_t + +address size variable name type +0x20000e94 0x14 xPendingReadyList List_t +0x20000e94 0x4 xPendingReadyList.uxNumberOfItems volatile UBaseType_t +0x20000e98 0x4 xPendingReadyList.pxIndex pointer to ListItem_t +0x20000e9c 0xc xPendingReadyList.xListEnd MiniListItem_t +0x20000e9c 0x4 xPendingReadyList.xListEnd.xItemValue TickType_t +0x20000ea0 0x4 xPendingReadyList.xListEnd.pxNext pointer to xLIST_ITEM +0x20000ea4 0x4 xPendingReadyList.xListEnd.pxPrevious pointer to xLIST_ITEM + +address size variable name type +0x20000274 0x4 xSchedulerRunning volatile BaseType_t + +address size variable name type +0x20000ebc 0x14 xSuspendedTaskList List_t +0x20000ebc 0x4 xSuspendedTaskList.uxNumberOfItems volatile UBaseType_t +0x20000ec0 0x4 xSuspendedTaskList.pxIndex pointer to ListItem_t +0x20000ec4 0xc xSuspendedTaskList.xListEnd MiniListItem_t +0x20000ec4 0x4 xSuspendedTaskList.xListEnd.xItemValue TickType_t +0x20000ec8 0x4 xSuspendedTaskList.xListEnd.pxNext pointer to xLIST_ITEM +0x20000ecc 0x4 xSuspendedTaskList.xListEnd.pxPrevious pointer to xLIST_ITEM + +address size variable name type +0x20000ea8 0x14 xTasksWaitingTermination List_t +0x20000ea8 0x4 xTasksWaitingTermination.uxNumberOfItems volatile UBaseType_t +0x20000eac 0x4 xTasksWaitingTermination.pxIndex pointer to ListItem_t +0x20000eb0 0xc xTasksWaitingTermination.xListEnd MiniListItem_t +0x20000eb0 0x4 xTasksWaitingTermination.xListEnd.xItemValue TickType_t +0x20000eb4 0x4 xTasksWaitingTermination.xListEnd.pxNext pointer to xLIST_ITEM +0x20000eb8 0x4 xTasksWaitingTermination.xListEnd.pxPrevious pointer to xLIST_ITEM + +address size variable name type +0x2000026c 0x4 xTickCount volatile TickType_t + +address size variable name type +0x2000027c 0x4 xYieldPending volatile BaseType_t + +address size variable name type +0x200009cc 0x40 xQueueRegistry array[8] of QueueRegistryItem_t + +address size variable name type +0x0800a398 0x10 AHBPrescTable array[16] of const uint8_t + +address size variable name type +0x0800a3a8 0x8 APBPrescTable array[8] of const uint8_t + +address size variable name type +0x20000254 0x4 SystemCoreClock uint32_t + +address size variable name type +0x20000248 0x4 uwTick volatile uint32_t + +address size variable name type +0x20000250 0x1 uwTickFreq HAL_TickFreqTypeDef + +address size variable name type +0x2000024c 0x4 uwTickPrio uint32_t + +address size variable name type +0x20000918 0xb4 htim7 TIM_HandleTypeDef +0x20000918 0x4 htim7.Instance pointer to TIM_TypeDef +0x2000091c 0x18 htim7.Init TIM_Base_InitTypeDef +0x2000091c 0x4 htim7.Init.Prescaler uint32_t +0x20000920 0x4 htim7.Init.CounterMode uint32_t +0x20000924 0x4 htim7.Init.Period uint32_t +0x20000928 0x4 htim7.Init.ClockDivision uint32_t +0x2000092c 0x4 htim7.Init.RepetitionCounter uint32_t +0x20000930 0x4 htim7.Init.AutoReloadPreload uint32_t +0x20000934 0x1 * htim7.Channel HAL_TIM_ActiveChannel +0x20000938 0x1c htim7.hdma array[7] of pointer to DMA_HandleTypeDef +0x20000954 0x1 htim7.Lock HAL_LockTypeDef +0x20000955 0x1 htim7.State volatile HAL_TIM_StateTypeDef +0x20000956 0x4 htim7.ChannelState array[4] of volatile HAL_TIM_ChannelStateTypeDef +0x2000095a 0x4 htim7.ChannelNState array[4] of volatile HAL_TIM_ChannelStateTypeDef +0x2000095e 0x1 * htim7.DMABurstState volatile HAL_TIM_DMABurstStateTypeDef +0x20000960 0x4 htim7.Base_MspInitCallback pointer to function +0x20000964 0x4 htim7.Base_MspDeInitCallback pointer to function +0x20000968 0x4 htim7.IC_MspInitCallback pointer to function +0x2000096c 0x4 htim7.IC_MspDeInitCallback pointer to function +0x20000970 0x4 htim7.OC_MspInitCallback pointer to function +0x20000974 0x4 htim7.OC_MspDeInitCallback pointer to function +0x20000978 0x4 htim7.PWM_MspInitCallback pointer to function +0x2000097c 0x4 htim7.PWM_MspDeInitCallback pointer to function +0x20000980 0x4 htim7.OnePulse_MspInitCallback pointer to function +0x20000984 0x4 htim7.OnePulse_MspDeInitCallback pointer to function +0x20000988 0x4 htim7.Encoder_MspInitCallback pointer to function +0x2000098c 0x4 htim7.Encoder_MspDeInitCallback pointer to function +0x20000990 0x4 htim7.HallSensor_MspInitCallback pointer to function +0x20000994 0x4 htim7.HallSensor_MspDeInitCallback pointer to function +0x20000998 0x4 htim7.PeriodElapsedCallback pointer to function +0x2000099c 0x4 htim7.PeriodElapsedHalfCpltCallback pointer to function +0x200009a0 0x4 htim7.TriggerCallback pointer to function +0x200009a4 0x4 htim7.TriggerHalfCpltCallback pointer to function +0x200009a8 0x4 htim7.IC_CaptureCallback pointer to function +0x200009ac 0x4 htim7.IC_CaptureHalfCpltCallback pointer to function +0x200009b0 0x4 htim7.OC_DelayElapsedCallback pointer to function +0x200009b4 0x4 htim7.PWM_PulseFinishedCallback pointer to function +0x200009b8 0x4 htim7.PWM_PulseFinishedHalfCpltCallback pointer to function +0x200009bc 0x4 htim7.ErrorCallback pointer to function +0x200009c0 0x4 htim7.CommutationCallback pointer to function +0x200009c4 0x4 htim7.CommutationHalfCpltCallback pointer to function +0x200009c8 0x4 htim7.BreakCallback pointer to function + +address size variable name type +0x20000024 0x70 g_uart1_data UART_Data +0x20000024 0x4 g_uart1_data.huart pointer to UART_HandleTypeDef +0x20000028 0x4 g_uart1_data.rxQueue QueueHandle_t +0x2000002c 0x4 g_uart1_data.txSemaphore SemaphoreHandle_t +0x20000030 0x64 g_uart1_data.rx_buf array[100] of uint8_t + +address size variable name type +0x200001e4 0x18 g_uart1_dev UART_Device +0x200001e4 0x4 g_uart1_dev.name pointer to char +0x200001e8 0x4 g_uart1_dev.Init pointer to function +0x200001ec 0x4 g_uart1_dev.Send pointer to function +0x200001f0 0x4 g_uart1_dev.RecvByte pointer to function +0x200001f4 0x4 g_uart1_dev.Flush pointer to function +0x200001f8 0x4 g_uart1_dev.priv_data pointer to unknown Type + +address size variable name type +0x20000094 0x70 g_uart2_data UART_Data +0x20000094 0x4 g_uart2_data.huart pointer to UART_HandleTypeDef +0x20000098 0x4 g_uart2_data.rxQueue QueueHandle_t +0x2000009c 0x4 g_uart2_data.txSemaphore SemaphoreHandle_t +0x200000a0 0x64 g_uart2_data.rx_buf array[100] of uint8_t + +address size variable name type +0x200001fc 0x18 g_uart2_dev UART_Device +0x200001fc 0x4 g_uart2_dev.name pointer to char +0x20000200 0x4 g_uart2_dev.Init pointer to function +0x20000204 0x4 g_uart2_dev.Send pointer to function +0x20000208 0x4 g_uart2_dev.RecvByte pointer to function +0x2000020c 0x4 g_uart2_dev.Flush pointer to function +0x20000210 0x4 g_uart2_dev.priv_data pointer to unknown Type + +address size variable name type +0x20000104 0x70 g_uart3_data UART_Data +0x20000104 0x4 g_uart3_data.huart pointer to UART_HandleTypeDef +0x20000108 0x4 g_uart3_data.rxQueue QueueHandle_t +0x2000010c 0x4 g_uart3_data.txSemaphore SemaphoreHandle_t +0x20000110 0x64 g_uart3_data.rx_buf array[100] of uint8_t + +address size variable name type +0x20000214 0x18 g_uart3_dev UART_Device +0x20000214 0x4 g_uart3_dev.name pointer to char +0x20000218 0x4 g_uart3_dev.Init pointer to function +0x2000021c 0x4 g_uart3_dev.Send pointer to function +0x20000220 0x4 g_uart3_dev.RecvByte pointer to function +0x20000224 0x4 g_uart3_dev.Flush pointer to function +0x20000228 0x4 g_uart3_dev.priv_data pointer to unknown Type + +address size variable name type +0x20000174 0x70 g_uart5_data UART_Data +0x20000174 0x4 g_uart5_data.huart pointer to UART_HandleTypeDef +0x20000178 0x4 g_uart5_data.rxQueue QueueHandle_t +0x2000017c 0x4 g_uart5_data.txSemaphore SemaphoreHandle_t +0x20000180 0x64 g_uart5_data.rx_buf array[100] of uint8_t + +address size variable name type +0x2000022c 0x18 g_uart5_dev UART_Device +0x2000022c 0x4 g_uart5_dev.name pointer to char +0x20000230 0x4 g_uart5_dev.Init pointer to function +0x20000234 0x4 g_uart5_dev.Send pointer to function +0x20000238 0x4 g_uart5_dev.RecvByte pointer to function +0x2000023c 0x4 g_uart5_dev.Flush pointer to function +0x20000240 0x4 g_uart5_dev.priv_data pointer to unknown Type + +address size variable name type +0x20000780 0x44 hdma_usart1_rx DMA_HandleTypeDef +0x20000780 0x4 hdma_usart1_rx.Instance pointer to DMA_Channel_TypeDef +0x20000784 0x1c hdma_usart1_rx.Init DMA_InitTypeDef +0x20000784 0x4 hdma_usart1_rx.Init.Direction uint32_t +0x20000788 0x4 hdma_usart1_rx.Init.PeriphInc uint32_t +0x2000078c 0x4 hdma_usart1_rx.Init.MemInc uint32_t +0x20000790 0x4 hdma_usart1_rx.Init.PeriphDataAlignment uint32_t +0x20000794 0x4 hdma_usart1_rx.Init.MemDataAlignment uint32_t +0x20000798 0x4 hdma_usart1_rx.Init.Mode uint32_t +0x2000079c 0x4 hdma_usart1_rx.Init.Priority uint32_t +0x200007a0 0x1 hdma_usart1_rx.Lock HAL_LockTypeDef +0x200007a1 0x1 * hdma_usart1_rx.State HAL_DMA_StateTypeDef +0x200007a4 0x4 hdma_usart1_rx.Parent pointer to unknown Type +0x200007a8 0x4 hdma_usart1_rx.XferCpltCallback pointer to function +0x200007ac 0x4 hdma_usart1_rx.XferHalfCpltCallback pointer to function +0x200007b0 0x4 hdma_usart1_rx.XferErrorCallback pointer to function +0x200007b4 0x4 hdma_usart1_rx.XferAbortCallback pointer to function +0x200007b8 0x4 hdma_usart1_rx.ErrorCode volatile uint32_t +0x200007bc 0x4 hdma_usart1_rx.DmaBaseAddress pointer to DMA_TypeDef +0x200007c0 0x4 hdma_usart1_rx.ChannelIndex uint32_t + +address size variable name type +0x200007c4 0x44 hdma_usart1_tx DMA_HandleTypeDef +0x200007c4 0x4 hdma_usart1_tx.Instance pointer to DMA_Channel_TypeDef +0x200007c8 0x1c hdma_usart1_tx.Init DMA_InitTypeDef +0x200007c8 0x4 hdma_usart1_tx.Init.Direction uint32_t +0x200007cc 0x4 hdma_usart1_tx.Init.PeriphInc uint32_t +0x200007d0 0x4 hdma_usart1_tx.Init.MemInc uint32_t +0x200007d4 0x4 hdma_usart1_tx.Init.PeriphDataAlignment uint32_t +0x200007d8 0x4 hdma_usart1_tx.Init.MemDataAlignment uint32_t +0x200007dc 0x4 hdma_usart1_tx.Init.Mode uint32_t +0x200007e0 0x4 hdma_usart1_tx.Init.Priority uint32_t +0x200007e4 0x1 hdma_usart1_tx.Lock HAL_LockTypeDef +0x200007e5 0x1 * hdma_usart1_tx.State HAL_DMA_StateTypeDef +0x200007e8 0x4 hdma_usart1_tx.Parent pointer to unknown Type +0x200007ec 0x4 hdma_usart1_tx.XferCpltCallback pointer to function +0x200007f0 0x4 hdma_usart1_tx.XferHalfCpltCallback pointer to function +0x200007f4 0x4 hdma_usart1_tx.XferErrorCallback pointer to function +0x200007f8 0x4 hdma_usart1_tx.XferAbortCallback pointer to function +0x200007fc 0x4 hdma_usart1_tx.ErrorCode volatile uint32_t +0x20000800 0x4 hdma_usart1_tx.DmaBaseAddress pointer to DMA_TypeDef +0x20000804 0x4 hdma_usart1_tx.ChannelIndex uint32_t + +address size variable name type +0x20000808 0x44 hdma_usart2_rx DMA_HandleTypeDef +0x20000808 0x4 hdma_usart2_rx.Instance pointer to DMA_Channel_TypeDef +0x2000080c 0x1c hdma_usart2_rx.Init DMA_InitTypeDef +0x2000080c 0x4 hdma_usart2_rx.Init.Direction uint32_t +0x20000810 0x4 hdma_usart2_rx.Init.PeriphInc uint32_t +0x20000814 0x4 hdma_usart2_rx.Init.MemInc uint32_t +0x20000818 0x4 hdma_usart2_rx.Init.PeriphDataAlignment uint32_t +0x2000081c 0x4 hdma_usart2_rx.Init.MemDataAlignment uint32_t +0x20000820 0x4 hdma_usart2_rx.Init.Mode uint32_t +0x20000824 0x4 hdma_usart2_rx.Init.Priority uint32_t +0x20000828 0x1 hdma_usart2_rx.Lock HAL_LockTypeDef +0x20000829 0x1 * hdma_usart2_rx.State HAL_DMA_StateTypeDef +0x2000082c 0x4 hdma_usart2_rx.Parent pointer to unknown Type +0x20000830 0x4 hdma_usart2_rx.XferCpltCallback pointer to function +0x20000834 0x4 hdma_usart2_rx.XferHalfCpltCallback pointer to function +0x20000838 0x4 hdma_usart2_rx.XferErrorCallback pointer to function +0x2000083c 0x4 hdma_usart2_rx.XferAbortCallback pointer to function +0x20000840 0x4 hdma_usart2_rx.ErrorCode volatile uint32_t +0x20000844 0x4 hdma_usart2_rx.DmaBaseAddress pointer to DMA_TypeDef +0x20000848 0x4 hdma_usart2_rx.ChannelIndex uint32_t + +address size variable name type +0x2000084c 0x44 hdma_usart2_tx DMA_HandleTypeDef +0x2000084c 0x4 hdma_usart2_tx.Instance pointer to DMA_Channel_TypeDef +0x20000850 0x1c hdma_usart2_tx.Init DMA_InitTypeDef +0x20000850 0x4 hdma_usart2_tx.Init.Direction uint32_t +0x20000854 0x4 hdma_usart2_tx.Init.PeriphInc uint32_t +0x20000858 0x4 hdma_usart2_tx.Init.MemInc uint32_t +0x2000085c 0x4 hdma_usart2_tx.Init.PeriphDataAlignment uint32_t +0x20000860 0x4 hdma_usart2_tx.Init.MemDataAlignment uint32_t +0x20000864 0x4 hdma_usart2_tx.Init.Mode uint32_t +0x20000868 0x4 hdma_usart2_tx.Init.Priority uint32_t +0x2000086c 0x1 hdma_usart2_tx.Lock HAL_LockTypeDef +0x2000086d 0x1 * hdma_usart2_tx.State HAL_DMA_StateTypeDef +0x20000870 0x4 hdma_usart2_tx.Parent pointer to unknown Type +0x20000874 0x4 hdma_usart2_tx.XferCpltCallback pointer to function +0x20000878 0x4 hdma_usart2_tx.XferHalfCpltCallback pointer to function +0x2000087c 0x4 hdma_usart2_tx.XferErrorCallback pointer to function +0x20000880 0x4 hdma_usart2_tx.XferAbortCallback pointer to function +0x20000884 0x4 hdma_usart2_tx.ErrorCode volatile uint32_t +0x20000888 0x4 hdma_usart2_tx.DmaBaseAddress pointer to DMA_TypeDef +0x2000088c 0x4 hdma_usart2_tx.ChannelIndex uint32_t + +address size variable name type +0x20000890 0x44 hdma_usart3_rx DMA_HandleTypeDef +0x20000890 0x4 hdma_usart3_rx.Instance pointer to DMA_Channel_TypeDef +0x20000894 0x1c hdma_usart3_rx.Init DMA_InitTypeDef +0x20000894 0x4 hdma_usart3_rx.Init.Direction uint32_t +0x20000898 0x4 hdma_usart3_rx.Init.PeriphInc uint32_t +0x2000089c 0x4 hdma_usart3_rx.Init.MemInc uint32_t +0x200008a0 0x4 hdma_usart3_rx.Init.PeriphDataAlignment uint32_t +0x200008a4 0x4 hdma_usart3_rx.Init.MemDataAlignment uint32_t +0x200008a8 0x4 hdma_usart3_rx.Init.Mode uint32_t +0x200008ac 0x4 hdma_usart3_rx.Init.Priority uint32_t +0x200008b0 0x1 hdma_usart3_rx.Lock HAL_LockTypeDef +0x200008b1 0x1 * hdma_usart3_rx.State HAL_DMA_StateTypeDef +0x200008b4 0x4 hdma_usart3_rx.Parent pointer to unknown Type +0x200008b8 0x4 hdma_usart3_rx.XferCpltCallback pointer to function +0x200008bc 0x4 hdma_usart3_rx.XferHalfCpltCallback pointer to function +0x200008c0 0x4 hdma_usart3_rx.XferErrorCallback pointer to function +0x200008c4 0x4 hdma_usart3_rx.XferAbortCallback pointer to function +0x200008c8 0x4 hdma_usart3_rx.ErrorCode volatile uint32_t +0x200008cc 0x4 hdma_usart3_rx.DmaBaseAddress pointer to DMA_TypeDef +0x200008d0 0x4 hdma_usart3_rx.ChannelIndex uint32_t + +address size variable name type +0x200008d4 0x44 hdma_usart3_tx DMA_HandleTypeDef +0x200008d4 0x4 hdma_usart3_tx.Instance pointer to DMA_Channel_TypeDef +0x200008d8 0x1c hdma_usart3_tx.Init DMA_InitTypeDef +0x200008d8 0x4 hdma_usart3_tx.Init.Direction uint32_t +0x200008dc 0x4 hdma_usart3_tx.Init.PeriphInc uint32_t +0x200008e0 0x4 hdma_usart3_tx.Init.MemInc uint32_t +0x200008e4 0x4 hdma_usart3_tx.Init.PeriphDataAlignment uint32_t +0x200008e8 0x4 hdma_usart3_tx.Init.MemDataAlignment uint32_t +0x200008ec 0x4 hdma_usart3_tx.Init.Mode uint32_t +0x200008f0 0x4 hdma_usart3_tx.Init.Priority uint32_t +0x200008f4 0x1 hdma_usart3_tx.Lock HAL_LockTypeDef +0x200008f5 0x1 * hdma_usart3_tx.State HAL_DMA_StateTypeDef +0x200008f8 0x4 hdma_usart3_tx.Parent pointer to unknown Type +0x200008fc 0x4 hdma_usart3_tx.XferCpltCallback pointer to function +0x20000900 0x4 hdma_usart3_tx.XferHalfCpltCallback pointer to function +0x20000904 0x4 hdma_usart3_tx.XferErrorCallback pointer to function +0x20000908 0x4 hdma_usart3_tx.XferAbortCallback pointer to function +0x2000090c 0x4 hdma_usart3_tx.ErrorCode volatile uint32_t +0x20000910 0x4 hdma_usart3_tx.DmaBaseAddress pointer to DMA_TypeDef +0x20000914 0x4 hdma_usart3_tx.ChannelIndex uint32_t + +address size variable name type +0x20000624 0x74 huart1 UART_HandleTypeDef +0x20000624 0x4 huart1.Instance pointer to USART_TypeDef +0x20000628 0x1c huart1.Init UART_InitTypeDef +0x20000628 0x4 huart1.Init.BaudRate uint32_t +0x2000062c 0x4 huart1.Init.WordLength uint32_t +0x20000630 0x4 huart1.Init.StopBits uint32_t +0x20000634 0x4 huart1.Init.Parity uint32_t +0x20000638 0x4 huart1.Init.Mode uint32_t +0x2000063c 0x4 huart1.Init.HwFlowCtl uint32_t +0x20000640 0x4 huart1.Init.OverSampling uint32_t +0x20000644 0x4 huart1.pTxBuffPtr pointer to uint8_t +0x20000648 0x2 huart1.TxXferSize uint16_t +0x2000064a 0x2 huart1.TxXferCount volatile uint16_t +0x2000064c 0x4 huart1.pRxBuffPtr pointer to uint8_t +0x20000650 0x2 huart1.RxXferSize uint16_t +0x20000652 0x2 huart1.RxXferCount volatile uint16_t +0x20000654 0x4 huart1.ReceptionType volatile HAL_UART_RxTypeTypeDef +0x20000658 0x4 huart1.hdmatx pointer to DMA_HandleTypeDef +0x2000065c 0x4 huart1.hdmarx pointer to DMA_HandleTypeDef +0x20000660 0x1 huart1.Lock HAL_LockTypeDef +0x20000661 0x1 huart1.gState volatile HAL_UART_StateTypeDef +0x20000662 0x1 * huart1.RxState volatile HAL_UART_StateTypeDef +0x20000664 0x4 huart1.ErrorCode volatile uint32_t +0x20000668 0x4 huart1.TxHalfCpltCallback pointer to function +0x2000066c 0x4 huart1.TxCpltCallback pointer to function +0x20000670 0x4 huart1.RxHalfCpltCallback pointer to function +0x20000674 0x4 huart1.RxCpltCallback pointer to function +0x20000678 0x4 huart1.ErrorCallback pointer to function +0x2000067c 0x4 huart1.AbortCpltCallback pointer to function +0x20000680 0x4 huart1.AbortTransmitCpltCallback pointer to function +0x20000684 0x4 huart1.AbortReceiveCpltCallback pointer to function +0x20000688 0x4 huart1.WakeupCallback pointer to function +0x2000068c 0x4 huart1.RxEventCallback pointer to function +0x20000690 0x4 huart1.MspInitCallback pointer to function +0x20000694 0x4 huart1.MspDeInitCallback pointer to function + +address size variable name type +0x20000698 0x74 huart2 UART_HandleTypeDef +0x20000698 0x4 huart2.Instance pointer to USART_TypeDef +0x2000069c 0x1c huart2.Init UART_InitTypeDef +0x2000069c 0x4 huart2.Init.BaudRate uint32_t +0x200006a0 0x4 huart2.Init.WordLength uint32_t +0x200006a4 0x4 huart2.Init.StopBits uint32_t +0x200006a8 0x4 huart2.Init.Parity uint32_t +0x200006ac 0x4 huart2.Init.Mode uint32_t +0x200006b0 0x4 huart2.Init.HwFlowCtl uint32_t +0x200006b4 0x4 huart2.Init.OverSampling uint32_t +0x200006b8 0x4 huart2.pTxBuffPtr pointer to uint8_t +0x200006bc 0x2 huart2.TxXferSize uint16_t +0x200006be 0x2 huart2.TxXferCount volatile uint16_t +0x200006c0 0x4 huart2.pRxBuffPtr pointer to uint8_t +0x200006c4 0x2 huart2.RxXferSize uint16_t +0x200006c6 0x2 huart2.RxXferCount volatile uint16_t +0x200006c8 0x4 huart2.ReceptionType volatile HAL_UART_RxTypeTypeDef +0x200006cc 0x4 huart2.hdmatx pointer to DMA_HandleTypeDef +0x200006d0 0x4 huart2.hdmarx pointer to DMA_HandleTypeDef +0x200006d4 0x1 huart2.Lock HAL_LockTypeDef +0x200006d5 0x1 huart2.gState volatile HAL_UART_StateTypeDef +0x200006d6 0x1 * huart2.RxState volatile HAL_UART_StateTypeDef +0x200006d8 0x4 huart2.ErrorCode volatile uint32_t +0x200006dc 0x4 huart2.TxHalfCpltCallback pointer to function +0x200006e0 0x4 huart2.TxCpltCallback pointer to function +0x200006e4 0x4 huart2.RxHalfCpltCallback pointer to function +0x200006e8 0x4 huart2.RxCpltCallback pointer to function +0x200006ec 0x4 huart2.ErrorCallback pointer to function +0x200006f0 0x4 huart2.AbortCpltCallback pointer to function +0x200006f4 0x4 huart2.AbortTransmitCpltCallback pointer to function +0x200006f8 0x4 huart2.AbortReceiveCpltCallback pointer to function +0x200006fc 0x4 huart2.WakeupCallback pointer to function +0x20000700 0x4 huart2.RxEventCallback pointer to function +0x20000704 0x4 huart2.MspInitCallback pointer to function +0x20000708 0x4 huart2.MspDeInitCallback pointer to function + +address size variable name type +0x2000070c 0x74 huart3 UART_HandleTypeDef +0x2000070c 0x4 huart3.Instance pointer to USART_TypeDef +0x20000710 0x1c huart3.Init UART_InitTypeDef +0x20000710 0x4 huart3.Init.BaudRate uint32_t +0x20000714 0x4 huart3.Init.WordLength uint32_t +0x20000718 0x4 huart3.Init.StopBits uint32_t +0x2000071c 0x4 huart3.Init.Parity uint32_t +0x20000720 0x4 huart3.Init.Mode uint32_t +0x20000724 0x4 huart3.Init.HwFlowCtl uint32_t +0x20000728 0x4 huart3.Init.OverSampling uint32_t +0x2000072c 0x4 huart3.pTxBuffPtr pointer to uint8_t +0x20000730 0x2 huart3.TxXferSize uint16_t +0x20000732 0x2 huart3.TxXferCount volatile uint16_t +0x20000734 0x4 huart3.pRxBuffPtr pointer to uint8_t +0x20000738 0x2 huart3.RxXferSize uint16_t +0x2000073a 0x2 huart3.RxXferCount volatile uint16_t +0x2000073c 0x4 huart3.ReceptionType volatile HAL_UART_RxTypeTypeDef +0x20000740 0x4 huart3.hdmatx pointer to DMA_HandleTypeDef +0x20000744 0x4 huart3.hdmarx pointer to DMA_HandleTypeDef +0x20000748 0x1 huart3.Lock HAL_LockTypeDef +0x20000749 0x1 huart3.gState volatile HAL_UART_StateTypeDef +0x2000074a 0x1 * huart3.RxState volatile HAL_UART_StateTypeDef +0x2000074c 0x4 huart3.ErrorCode volatile uint32_t +0x20000750 0x4 huart3.TxHalfCpltCallback pointer to function +0x20000754 0x4 huart3.TxCpltCallback pointer to function +0x20000758 0x4 huart3.RxHalfCpltCallback pointer to function +0x2000075c 0x4 huart3.RxCpltCallback pointer to function +0x20000760 0x4 huart3.ErrorCallback pointer to function +0x20000764 0x4 huart3.AbortCpltCallback pointer to function +0x20000768 0x4 huart3.AbortTransmitCpltCallback pointer to function +0x2000076c 0x4 huart3.AbortReceiveCpltCallback pointer to function +0x20000770 0x4 huart3.WakeupCallback pointer to function +0x20000774 0x4 huart3.RxEventCallback pointer to function +0x20000778 0x4 huart3.MspInitCallback pointer to function +0x2000077c 0x4 huart3.MspDeInitCallback pointer to function + +address size variable name type +0x200005b0 0x74 huart5 UART_HandleTypeDef +0x200005b0 0x4 huart5.Instance pointer to USART_TypeDef +0x200005b4 0x1c huart5.Init UART_InitTypeDef +0x200005b4 0x4 huart5.Init.BaudRate uint32_t +0x200005b8 0x4 huart5.Init.WordLength uint32_t +0x200005bc 0x4 huart5.Init.StopBits uint32_t +0x200005c0 0x4 huart5.Init.Parity uint32_t +0x200005c4 0x4 huart5.Init.Mode uint32_t +0x200005c8 0x4 huart5.Init.HwFlowCtl uint32_t +0x200005cc 0x4 huart5.Init.OverSampling uint32_t +0x200005d0 0x4 huart5.pTxBuffPtr pointer to uint8_t +0x200005d4 0x2 huart5.TxXferSize uint16_t +0x200005d6 0x2 huart5.TxXferCount volatile uint16_t +0x200005d8 0x4 huart5.pRxBuffPtr pointer to uint8_t +0x200005dc 0x2 huart5.RxXferSize uint16_t +0x200005de 0x2 huart5.RxXferCount volatile uint16_t +0x200005e0 0x4 huart5.ReceptionType volatile HAL_UART_RxTypeTypeDef +0x200005e4 0x4 huart5.hdmatx pointer to DMA_HandleTypeDef +0x200005e8 0x4 huart5.hdmarx pointer to DMA_HandleTypeDef +0x200005ec 0x1 huart5.Lock HAL_LockTypeDef +0x200005ed 0x1 huart5.gState volatile HAL_UART_StateTypeDef +0x200005ee 0x1 * huart5.RxState volatile HAL_UART_StateTypeDef +0x200005f0 0x4 huart5.ErrorCode volatile uint32_t +0x200005f4 0x4 huart5.TxHalfCpltCallback pointer to function +0x200005f8 0x4 huart5.TxCpltCallback pointer to function +0x200005fc 0x4 huart5.RxHalfCpltCallback pointer to function +0x20000600 0x4 huart5.RxCpltCallback pointer to function +0x20000604 0x4 huart5.ErrorCallback pointer to function +0x20000608 0x4 huart5.AbortCpltCallback pointer to function +0x2000060c 0x4 huart5.AbortTransmitCpltCallback pointer to function +0x20000610 0x4 huart5.AbortReceiveCpltCallback pointer to function +0x20000614 0x4 huart5.WakeupCallback pointer to function +0x20000618 0x4 huart5.RxEventCallback pointer to function +0x2000061c 0x4 huart5.MspInitCallback pointer to function +0x20000620 0x4 huart5.MspDeInitCallback pointer to function + +address size variable name type +0x20000244 0x4 xMutex SemaphoreHandle_t + +address size variable name type +0x200004fc 0xb4 htim4 TIM_HandleTypeDef +0x200004fc 0x4 htim4.Instance pointer to TIM_TypeDef +0x20000500 0x18 htim4.Init TIM_Base_InitTypeDef +0x20000500 0x4 htim4.Init.Prescaler uint32_t +0x20000504 0x4 htim4.Init.CounterMode uint32_t +0x20000508 0x4 htim4.Init.Period uint32_t +0x2000050c 0x4 htim4.Init.ClockDivision uint32_t +0x20000510 0x4 htim4.Init.RepetitionCounter uint32_t +0x20000514 0x4 htim4.Init.AutoReloadPreload uint32_t +0x20000518 0x1 * htim4.Channel HAL_TIM_ActiveChannel +0x2000051c 0x1c htim4.hdma array[7] of pointer to DMA_HandleTypeDef +0x20000538 0x1 htim4.Lock HAL_LockTypeDef +0x20000539 0x1 htim4.State volatile HAL_TIM_StateTypeDef +0x2000053a 0x4 htim4.ChannelState array[4] of volatile HAL_TIM_ChannelStateTypeDef +0x2000053e 0x4 htim4.ChannelNState array[4] of volatile HAL_TIM_ChannelStateTypeDef +0x20000542 0x1 * htim4.DMABurstState volatile HAL_TIM_DMABurstStateTypeDef +0x20000544 0x4 htim4.Base_MspInitCallback pointer to function +0x20000548 0x4 htim4.Base_MspDeInitCallback pointer to function +0x2000054c 0x4 htim4.IC_MspInitCallback pointer to function +0x20000550 0x4 htim4.IC_MspDeInitCallback pointer to function +0x20000554 0x4 htim4.OC_MspInitCallback pointer to function +0x20000558 0x4 htim4.OC_MspDeInitCallback pointer to function +0x2000055c 0x4 htim4.PWM_MspInitCallback pointer to function +0x20000560 0x4 htim4.PWM_MspDeInitCallback pointer to function +0x20000564 0x4 htim4.OnePulse_MspInitCallback pointer to function +0x20000568 0x4 htim4.OnePulse_MspDeInitCallback pointer to function +0x2000056c 0x4 htim4.Encoder_MspInitCallback pointer to function +0x20000570 0x4 htim4.Encoder_MspDeInitCallback pointer to function +0x20000574 0x4 htim4.HallSensor_MspInitCallback pointer to function +0x20000578 0x4 htim4.HallSensor_MspDeInitCallback pointer to function +0x2000057c 0x4 htim4.PeriodElapsedCallback pointer to function +0x20000580 0x4 htim4.PeriodElapsedHalfCpltCallback pointer to function +0x20000584 0x4 htim4.TriggerCallback pointer to function +0x20000588 0x4 htim4.TriggerHalfCpltCallback pointer to function +0x2000058c 0x4 htim4.IC_CaptureCallback pointer to function +0x20000590 0x4 htim4.IC_CaptureHalfCpltCallback pointer to function +0x20000594 0x4 htim4.OC_DelayElapsedCallback pointer to function +0x20000598 0x4 htim4.PWM_PulseFinishedCallback pointer to function +0x2000059c 0x4 htim4.PWM_PulseFinishedHalfCpltCallback pointer to function +0x200005a0 0x4 htim4.ErrorCallback pointer to function +0x200005a4 0x4 htim4.CommutationCallback pointer to function +0x200005a8 0x4 htim4.CommutationHalfCpltCallback pointer to function +0x200005ac 0x4 htim4.BreakCallback pointer to function + +address size variable name type +0x200004d4 0x28 hcan1 CAN_HandleTypeDef +0x200004d4 0x4 hcan1.Instance pointer to CAN_TypeDef +0x200004d8 0x1c hcan1.Init CAN_InitTypeDef +0x200004d8 0x4 hcan1.Init.Prescaler uint32_t +0x200004dc 0x4 hcan1.Init.Mode uint32_t +0x200004e0 0x4 hcan1.Init.SyncJumpWidth uint32_t +0x200004e4 0x4 hcan1.Init.TimeSeg1 uint32_t +0x200004e8 0x4 hcan1.Init.TimeSeg2 uint32_t +0x200004ec 0x1 hcan1.Init.TimeTriggeredMode FunctionalState +0x200004ed 0x1 hcan1.Init.AutoBusOff FunctionalState +0x200004ee 0x1 hcan1.Init.AutoWakeUp FunctionalState +0x200004ef 0x1 hcan1.Init.AutoRetransmission FunctionalState +0x200004f0 0x1 hcan1.Init.ReceiveFifoLocked FunctionalState +0x200004f1 0x1 * hcan1.Init.TransmitFifoPriority FunctionalState +0x200004f4 0x1 * hcan1.State volatile HAL_CAN_StateTypeDef +0x200004f8 0x4 hcan1.ErrorCode volatile uint32_t + +address size variable name type +0x20000448 0x18 ADCDataBuffer array[6] of uint32_t + +address size variable name type +0x20000460 0x30 hadc1 ADC_HandleTypeDef +0x20000460 0x4 hadc1.Instance pointer to ADC_TypeDef +0x20000464 0x1c hadc1.Init ADC_InitTypeDef +0x20000464 0x4 hadc1.Init.DataAlign uint32_t +0x20000468 0x4 hadc1.Init.ScanConvMode uint32_t +0x2000046c 0x1 * hadc1.Init.ContinuousConvMode FunctionalState +0x20000470 0x4 hadc1.Init.NbrOfConversion uint32_t +0x20000474 0x1 * hadc1.Init.DiscontinuousConvMode FunctionalState +0x20000478 0x4 hadc1.Init.NbrOfDiscConversion uint32_t +0x2000047c 0x4 hadc1.Init.ExternalTrigConv uint32_t +0x20000480 0x4 hadc1.DMA_Handle pointer to DMA_HandleTypeDef +0x20000484 0x1 * hadc1.Lock HAL_LockTypeDef +0x20000488 0x4 hadc1.State volatile uint32_t +0x2000048c 0x4 hadc1.ErrorCode volatile uint32_t + +address size variable name type +0x20000490 0x44 hdma_adc1 DMA_HandleTypeDef +0x20000490 0x4 hdma_adc1.Instance pointer to DMA_Channel_TypeDef +0x20000494 0x1c hdma_adc1.Init DMA_InitTypeDef +0x20000494 0x4 hdma_adc1.Init.Direction uint32_t +0x20000498 0x4 hdma_adc1.Init.PeriphInc uint32_t +0x2000049c 0x4 hdma_adc1.Init.MemInc uint32_t +0x200004a0 0x4 hdma_adc1.Init.PeriphDataAlignment uint32_t +0x200004a4 0x4 hdma_adc1.Init.MemDataAlignment uint32_t +0x200004a8 0x4 hdma_adc1.Init.Mode uint32_t +0x200004ac 0x4 hdma_adc1.Init.Priority uint32_t +0x200004b0 0x1 hdma_adc1.Lock HAL_LockTypeDef +0x200004b1 0x1 * hdma_adc1.State HAL_DMA_StateTypeDef +0x200004b4 0x4 hdma_adc1.Parent pointer to unknown Type +0x200004b8 0x4 hdma_adc1.XferCpltCallback pointer to function +0x200004bc 0x4 hdma_adc1.XferHalfCpltCallback pointer to function +0x200004c0 0x4 hdma_adc1.XferErrorCallback pointer to function +0x200004c4 0x4 hdma_adc1.XferAbortCallback pointer to function +0x200004c8 0x4 hdma_adc1.ErrorCode volatile uint32_t +0x200004cc 0x4 hdma_adc1.DmaBaseAddress pointer to DMA_TypeDef +0x200004d0 0x4 hdma_adc1.ChannelIndex uint32_t + +address size variable name type +0x20000008 0x4 MasterTaskHandle osThreadId_t + +address size variable name type +0x0800a288 0x24 MasterTask_attributes const osThreadAttr_t +0x0800a288 0x4 MasterTask_attributes.name pointer to const char +0x0800a28c 0x4 MasterTask_attributes.attr_bits uint32_t +0x0800a290 0x4 MasterTask_attributes.cb_mem pointer to unknown Type +0x0800a294 0x4 MasterTask_attributes.cb_size uint32_t +0x0800a298 0x4 MasterTask_attributes.stack_mem pointer to unknown Type +0x0800a29c 0x4 MasterTask_attributes.stack_size uint32_t +0x0800a2a0 0x4 MasterTask_attributes.priority osPriority_t +0x0800a2a4 0x4 MasterTask_attributes.tz_module TZ_ModuleId_t +0x0800a2a8 0x4 MasterTask_attributes.reserved uint32_t + +address size variable name type +0x20000014 0x4 ReadTaskHandle osThreadId_t + +address size variable name type +0x0800a2f4 0x24 Read_Task const osThreadAttr_t +0x0800a2f4 0x4 Read_Task.name pointer to const char +0x0800a2f8 0x4 Read_Task.attr_bits uint32_t +0x0800a2fc 0x4 Read_Task.cb_mem pointer to unknown Type +0x0800a300 0x4 Read_Task.cb_size uint32_t +0x0800a304 0x4 Read_Task.stack_mem pointer to unknown Type +0x0800a308 0x4 Read_Task.stack_size uint32_t +0x0800a30c 0x4 Read_Task.priority osPriority_t +0x0800a310 0x4 Read_Task.tz_module TZ_ModuleId_t +0x0800a314 0x4 Read_Task.reserved uint32_t + +address size variable name type +0x20000004 0x1 RegisterSize uint8_t + +address size variable name type +0x2000000c 0x4 SlaveTaskHandle osThreadId_t + +address size variable name type +0x0800a2ac 0x24 SlaveTask_attributes const osThreadAttr_t +0x0800a2ac 0x4 SlaveTask_attributes.name pointer to const char +0x0800a2b0 0x4 SlaveTask_attributes.attr_bits uint32_t +0x0800a2b4 0x4 SlaveTask_attributes.cb_mem pointer to unknown Type +0x0800a2b8 0x4 SlaveTask_attributes.cb_size uint32_t +0x0800a2bc 0x4 SlaveTask_attributes.stack_mem pointer to unknown Type +0x0800a2c0 0x4 SlaveTask_attributes.stack_size uint32_t +0x0800a2c4 0x4 SlaveTask_attributes.priority osPriority_t +0x0800a2c8 0x4 SlaveTask_attributes.tz_module TZ_ModuleId_t +0x0800a2cc 0x4 SlaveTask_attributes.reserved uint32_t + +address size variable name type +0x20000020 0x4 UART2_RxTaskHandle osThreadId_t + +address size variable name type +0x0800a360 0x24 UART2_RxTask_attributes const osThreadAttr_t +0x0800a360 0x4 UART2_RxTask_attributes.name pointer to const char +0x0800a364 0x4 UART2_RxTask_attributes.attr_bits uint32_t +0x0800a368 0x4 UART2_RxTask_attributes.cb_mem pointer to unknown Type +0x0800a36c 0x4 UART2_RxTask_attributes.cb_size uint32_t +0x0800a370 0x4 UART2_RxTask_attributes.stack_mem pointer to unknown Type +0x0800a374 0x4 UART2_RxTask_attributes.stack_size uint32_t +0x0800a378 0x4 UART2_RxTask_attributes.priority osPriority_t +0x0800a37c 0x4 UART2_RxTask_attributes.tz_module TZ_ModuleId_t +0x0800a380 0x4 UART2_RxTask_attributes.reserved uint32_t + +address size variable name type +0x2000001c 0x4 UART2_TxTaskHandle osThreadId_t + +address size variable name type +0x0800a33c 0x24 UART2_TxTask_attributes const osThreadAttr_t +0x0800a33c 0x4 UART2_TxTask_attributes.name pointer to const char +0x0800a340 0x4 UART2_TxTask_attributes.attr_bits uint32_t +0x0800a344 0x4 UART2_TxTask_attributes.cb_mem pointer to unknown Type +0x0800a348 0x4 UART2_TxTask_attributes.cb_size uint32_t +0x0800a34c 0x4 UART2_TxTask_attributes.stack_mem pointer to unknown Type +0x0800a350 0x4 UART2_TxTask_attributes.stack_size uint32_t +0x0800a354 0x4 UART2_TxTask_attributes.priority osPriority_t +0x0800a358 0x4 UART2_TxTask_attributes.tz_module TZ_ModuleId_t +0x0800a35c 0x4 UART2_TxTask_attributes.reserved uint32_t + +address size variable name type +0x20000010 0x4 WriteTaskHandle osThreadId_t + +address size variable name type +0x0800a2d0 0x24 Write_TASK const osThreadAttr_t +0x0800a2d0 0x4 Write_TASK.name pointer to const char +0x0800a2d4 0x4 Write_TASK.attr_bits uint32_t +0x0800a2d8 0x4 Write_TASK.cb_mem pointer to unknown Type +0x0800a2dc 0x4 Write_TASK.cb_size uint32_t +0x0800a2e0 0x4 Write_TASK.stack_mem pointer to unknown Type +0x0800a2e4 0x4 Write_TASK.stack_size uint32_t +0x0800a2e8 0x4 Write_TASK.priority osPriority_t +0x0800a2ec 0x4 Write_TASK.tz_module TZ_ModuleId_t +0x0800a2f0 0x4 Write_TASK.reserved uint32_t + +address size variable name type +0x20000018 0x4 defaultTaskHandle osThreadId_t + +address size variable name type +0x0800a318 0x24 defaultTask_attributes const osThreadAttr_t +0x0800a318 0x4 defaultTask_attributes.name pointer to const char +0x0800a31c 0x4 defaultTask_attributes.attr_bits uint32_t +0x0800a320 0x4 defaultTask_attributes.cb_mem pointer to unknown Type +0x0800a324 0x4 defaultTask_attributes.cb_size uint32_t +0x0800a328 0x4 defaultTask_attributes.stack_mem pointer to unknown Type +0x0800a32c 0x4 defaultTask_attributes.stack_size uint32_t +0x0800a330 0x4 defaultTask_attributes.priority osPriority_t +0x0800a334 0x4 defaultTask_attributes.tz_module TZ_ModuleId_t +0x0800a338 0x4 defaultTask_attributes.reserved uint32_t + +address size variable name type +0x20000428 0x20 im12181b IM12181B +0x20000428 0x20 im12181b.data array[8] of uint32_t +0x20000428 0x20 im12181b.Paras anonymous +0x20000428 0x4 im12181b.Paras.Voltage uint32_t +0x2000042c 0x4 im12181b.Paras.Current uint32_t +0x20000430 0x4 im12181b.Paras.ActivePower uint32_t +0x20000434 0x4 im12181b.Paras.ActiveEnergy uint32_t +0x20000438 0x4 im12181b.Paras.PowerFactor uint32_t +0x2000043c 0x4 im12181b.Paras.CO2 uint32_t +0x20000440 0x4 im12181b.Paras.Temperature uint32_t +0x20000444 0x4 im12181b.Paras.Frequency uint32_t + +address size variable name type +0x20000005 0x1 ret eMBMasterReqErrCode + +address size variable name type +0x20000000 0x4 xMutex_debug SemaphoreHandle_t + diff --git a/MDK-ARM/NBQlaohua/NBQlaohua.hex b/MDK-ARM/NBQlaohua/NBQlaohua.hex index d66cf02..8223754 100644 --- a/MDK-ARM/NBQlaohua/NBQlaohua.hex +++ b/MDK-ARM/NBQlaohua/NBQlaohua.hex @@ -1,43 +1,43 @@ :020000040800F2 -:10000000F8370020FD0100084D4A0008D3410008E0 -:10001000494A0008D10D00083953000800000000CB +:1000000060610020FD010008D14A0008BB410008E2 +:10001000CD4A0008FD0C0008115700080000000040 :100020000000000000000000000000006501000862 -:10003000210F000800000000A9010008854A0008FF +:100030004D0E000800000000A9010008254D000831 :10004000170200081702000817020008170200082C :10005000170200081702000817020008170200081C -:10006000170200081702000817020008850E000892 -:10007000950E0008A50E0008B50E0008C50E000874 -:10008000D50E0008E50E0008170200081702000848 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+:10A7A000130163330803138562330810135F6533A5 +:10A7B00008061387643308171A732029971A55302F +:10A7C00032051A1718320F1AC90829711AED180123 +:10A7D0005413D035142050361B20D0043B5043E096 +:04A7E000012D000047 :04000005080001519D :00000001FF diff --git a/MDK-ARM/NBQlaohua/NBQlaohua.htm b/MDK-ARM/NBQlaohua/NBQlaohua.htm index c5b9c97..f5731cd 100644 --- a/MDK-ARM/NBQlaohua/NBQlaohua.htm +++ b/MDK-ARM/NBQlaohua/NBQlaohua.htm @@ -3,2196 +3,2970 @@ Static Call Graph - [NBQlaohua\NBQlaohua.axf]

Static Call Graph for image NBQlaohua\NBQlaohua.axf


-

#<CALLGRAPH># ARM Linker, 5060750: Last Updated: Thu Dec 19 16:26:19 2024 +

#<CALLGRAPH># ARM Linker, 5060750: Last Updated: Fri Jan 10 16:29:13 2025

Maximum Stack Usage = 256 bytes + Unknown(Cycles, Untraceable Function Pointers)

Call chain for Maximum Stack Depth:

-main ⇒ SystemClock_Config ⇒ HAL_RCC_ClockConfig ⇒ HAL_InitTick ⇒ HAL_TIM_Base_Init ⇒ HAL_TIM_Base_MspInit ⇒ HAL_NVIC_SetPriority ⇒ __NVIC_SetPriority +prvTimerTask ⇒ prvProcessReceivedCommands ⇒ prvSampleTimeNow ⇒ prvSwitchTimerLists ⇒ xTimerGenericCommand ⇒ xQueueGenericSend ⇒ vTaskPlaceOnEventList ⇒ prvAddCurrentTaskToDelayedList ⇒ vListInsert

Mutually Recursive functions -

  • ADC1_2_IRQHandler   ⇒   ADC1_2_IRQHandler
    +
  • ADC1_2_IRQHandler   ⇒   ADC1_2_IRQHandler

    Function Pointers

      -
    • ADC1_2_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) -
    • ADC_DMAConvCplt from stm32f1xx_hal_adc.o(i.ADC_DMAConvCplt) referenced from stm32f1xx_hal_adc.o(i.HAL_ADC_Start_DMA) -
    • ADC_DMAError from stm32f1xx_hal_adc.o(i.ADC_DMAError) referenced from stm32f1xx_hal_adc.o(i.HAL_ADC_Start_DMA) -
    • ADC_DMAHalfConvCplt from stm32f1xx_hal_adc.o(i.ADC_DMAHalfConvCplt) referenced from stm32f1xx_hal_adc.o(i.HAL_ADC_Start_DMA) +
    • ADC1_2_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET)
    • ADS1115GetAverageVol from ads1115_drive.o(i.ADS1115GetAverageVol) referenced 2 times from ads1115_drive.o(.data)
    • ADS1115GetOriginalVol from ads1115_drive.o(i.ADS1115GetOriginalVol) referenced 2 times from ads1115_drive.o(.data)
    • ADS1115GetVol from ads1115_drive.o(i.ADS1115GetVol) referenced 2 times from ads1115_drive.o(.data)
    • ADS1115Init from ads1115_drive.o(i.ADS1115Init) referenced 2 times from ads1115_drive.o(.data) -
    • BusFault_Handler from stm32f1xx_it.o(i.BusFault_Handler) referenced from startup_stm32f105xc.o(RESET) -
    • CAN1_RX0_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) -
    • CAN1_RX1_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) -
    • CAN1_SCE_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) -
    • CAN1_TX_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) -
    • CAN2_RX0_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) -
    • CAN2_RX1_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) -
    • CAN2_SCE_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) -
    • CAN2_TX_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) -
    • DMA1_Channel1_IRQHandler from stm32f1xx_it.o(i.DMA1_Channel1_IRQHandler) referenced from startup_stm32f105xc.o(RESET) -
    • DMA1_Channel2_IRQHandler from stm32f1xx_it.o(i.DMA1_Channel2_IRQHandler) referenced from startup_stm32f105xc.o(RESET) -
    • DMA1_Channel3_IRQHandler from stm32f1xx_it.o(i.DMA1_Channel3_IRQHandler) referenced from startup_stm32f105xc.o(RESET) -
    • DMA1_Channel4_IRQHandler from stm32f1xx_it.o(i.DMA1_Channel4_IRQHandler) referenced from startup_stm32f105xc.o(RESET) -
    • DMA1_Channel5_IRQHandler from stm32f1xx_it.o(i.DMA1_Channel5_IRQHandler) referenced from startup_stm32f105xc.o(RESET) -
    • DMA1_Channel6_IRQHandler from stm32f1xx_it.o(i.DMA1_Channel6_IRQHandler) referenced from startup_stm32f105xc.o(RESET) -
    • DMA1_Channel7_IRQHandler from stm32f1xx_it.o(i.DMA1_Channel7_IRQHandler) referenced from startup_stm32f105xc.o(RESET) -
    • DMA2_Channel1_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) -
    • DMA2_Channel2_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) -
    • DMA2_Channel3_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) -
    • DMA2_Channel4_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) -
    • DMA2_Channel5_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) -
    • DebugMon_Handler from stm32f1xx_it.o(i.DebugMon_Handler) referenced from startup_stm32f105xc.o(RESET) -
    • EXTI0_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) -
    • EXTI15_10_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) -
    • EXTI1_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) -
    • EXTI2_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) -
    • EXTI3_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) -
    • EXTI4_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) -
    • EXTI9_5_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) -
    • FLASH_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) -
    • HardFault_Handler from stm32f1xx_it.o(i.HardFault_Handler) referenced from startup_stm32f105xc.o(RESET) -
    • I2C1_ER_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) -
    • I2C1_EV_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) -
    • I2C2_ER_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) -
    • I2C2_EV_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) -
    • LED_RUNFunction from freertos.o(i.LED_RUNFunction) referenced from freertos.o(i.MX_FREERTOS_Init) -
    • MemManage_Handler from stm32f1xx_it.o(i.MemManage_Handler) referenced from startup_stm32f105xc.o(RESET) -
    • NMI_Handler from stm32f1xx_it.o(i.NMI_Handler) referenced from startup_stm32f105xc.o(RESET) -
    • OTG_FS_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) -
    • OTG_FS_WKUP_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) -
    • PVD_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) -
    • PendSV_Handler from port.o(.emb_text) referenced from startup_stm32f105xc.o(RESET) -
    • RCC_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) -
    • RTC_Alarm_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) -
    • RTC_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) -
    • Reset_Handler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) -
    • SPI1_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) -
    • SPI2_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) -
    • SPI3_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) -
    • SVC_Handler from port.o(.emb_text) referenced from startup_stm32f105xc.o(RESET) -
    • StartDefaultTask from freertos.o(i.StartDefaultTask) referenced from freertos.o(i.MX_FREERTOS_Init) -
    • SysTick_Handler from port.o(i.SysTick_Handler) referenced from startup_stm32f105xc.o(RESET) -
    • SystemInit from system_stm32f1xx.o(i.SystemInit) referenced from startup_stm32f105xc.o(.text) -
    • TAMPER_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) -
    • TIM1_BRK_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) -
    • TIM1_CC_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) -
    • TIM1_TRG_COM_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) -
    • TIM1_UP_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) -
    • TIM2_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) -
    • TIM3_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) -
    • TIM4_IRQHandler from stm32f1xx_it.o(i.TIM4_IRQHandler) referenced from startup_stm32f105xc.o(RESET) -
    • TIM5_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) -
    • TIM6_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) -
    • TIM7_IRQHandler from stm32f1xx_it.o(i.TIM7_IRQHandler) referenced from startup_stm32f105xc.o(RESET) -
    • UART2_RxTaskFunction from freertos.o(i.UART2_RxTaskFunction) referenced from freertos.o(i.MX_FREERTOS_Init) -
    • UART2_TxTaskFunction from freertos.o(i.UART2_TxTaskFunction) referenced from freertos.o(i.MX_FREERTOS_Init) -
    • UART4_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) -
    • UART5_IRQHandler from stm32f1xx_it.o(i.UART5_IRQHandler) referenced from startup_stm32f105xc.o(RESET) -
    • UART_DMAAbortOnError from stm32f1xx_hal_uart.o(i.UART_DMAAbortOnError) referenced from stm32f1xx_hal_uart.o(i.HAL_UART_IRQHandler) -
    • UART_DMAError from stm32f1xx_hal_uart.o(i.UART_DMAError) referenced from stm32f1xx_hal_uart.o(i.HAL_UART_Transmit_DMA) -
    • UART_DMAError from stm32f1xx_hal_uart.o(i.UART_DMAError) referenced from stm32f1xx_hal_uart.o(i.UART_Start_Receive_DMA) -
    • UART_DMAReceiveCplt from stm32f1xx_hal_uart.o(i.UART_DMAReceiveCplt) referenced from stm32f1xx_hal_uart.o(i.UART_Start_Receive_DMA) -
    • UART_DMARxHalfCplt from stm32f1xx_hal_uart.o(i.UART_DMARxHalfCplt) referenced from stm32f1xx_hal_uart.o(i.UART_Start_Receive_DMA) -
    • UART_DMATransmitCplt from stm32f1xx_hal_uart.o(i.UART_DMATransmitCplt) referenced from stm32f1xx_hal_uart.o(i.HAL_UART_Transmit_DMA) -
    • UART_DMATxHalfCplt from stm32f1xx_hal_uart.o(i.UART_DMATxHalfCplt) referenced from stm32f1xx_hal_uart.o(i.HAL_UART_Transmit_DMA) +
    • BusFault_Handler from stm32f1xx_it.o(i.BusFault_Handler) referenced from startup_stm32f105xc.o(RESET) +
    • CAN1_RX0_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) +
    • CAN1_RX1_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) +
    • CAN1_SCE_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) +
    • CAN1_TX_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) +
    • CAN2_RX0_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) +
    • CAN2_RX1_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) +
    • CAN2_SCE_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) +
    • CAN2_TX_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) +
    • DMA1_Channel1_IRQHandler from stm32f1xx_it.o(i.DMA1_Channel1_IRQHandler) referenced from startup_stm32f105xc.o(RESET) +
    • DMA1_Channel2_IRQHandler from stm32f1xx_it.o(i.DMA1_Channel2_IRQHandler) referenced from startup_stm32f105xc.o(RESET) +
    • DMA1_Channel3_IRQHandler from stm32f1xx_it.o(i.DMA1_Channel3_IRQHandler) referenced from startup_stm32f105xc.o(RESET) +
    • DMA1_Channel4_IRQHandler from stm32f1xx_it.o(i.DMA1_Channel4_IRQHandler) referenced from startup_stm32f105xc.o(RESET) +
    • DMA1_Channel5_IRQHandler from stm32f1xx_it.o(i.DMA1_Channel5_IRQHandler) referenced from startup_stm32f105xc.o(RESET) +
    • DMA1_Channel6_IRQHandler from stm32f1xx_it.o(i.DMA1_Channel6_IRQHandler) referenced from startup_stm32f105xc.o(RESET) +
    • DMA1_Channel7_IRQHandler from stm32f1xx_it.o(i.DMA1_Channel7_IRQHandler) referenced from startup_stm32f105xc.o(RESET) +
    • DMA2_Channel1_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) +
    • DMA2_Channel2_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) +
    • DMA2_Channel3_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) +
    • DMA2_Channel4_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) +
    • DMA2_Channel5_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) +
    • DebugMon_Handler from stm32f1xx_it.o(i.DebugMon_Handler) referenced from startup_stm32f105xc.o(RESET) +
    • EXTI0_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) +
    • EXTI15_10_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) +
    • EXTI1_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) +
    • EXTI2_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) +
    • EXTI3_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) +
    • EXTI4_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) +
    • EXTI9_5_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) +
    • FLASH_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) +
    • HAL_TIMEx_BreakCallback from stm32f1xx_hal_tim_ex.o(i.HAL_TIMEx_BreakCallback) referenced from stm32f1xx_hal_tim.o(i.TIM_ResetCallback) +
    • HAL_TIMEx_CommutCallback from stm32f1xx_hal_tim_ex.o(i.HAL_TIMEx_CommutCallback) referenced from stm32f1xx_hal_tim.o(i.TIM_ResetCallback) +
    • HAL_TIMEx_CommutHalfCpltCallback from stm32f1xx_hal_tim_ex.o(i.HAL_TIMEx_CommutHalfCpltCallback) referenced from stm32f1xx_hal_tim.o(i.TIM_ResetCallback) +
    • HAL_TIM_Base_MspInit from tim.o(i.HAL_TIM_Base_MspInit) referenced from stm32f1xx_hal_tim.o(i.HAL_TIM_Base_Init) +
    • HAL_TIM_ErrorCallback from stm32f1xx_hal_tim.o(i.HAL_TIM_ErrorCallback) referenced from stm32f1xx_hal_tim.o(i.TIM_ResetCallback) +
    • HAL_TIM_IC_CaptureCallback from stm32f1xx_hal_tim.o(i.HAL_TIM_IC_CaptureCallback) referenced from stm32f1xx_hal_tim.o(i.TIM_ResetCallback) +
    • HAL_TIM_IC_CaptureHalfCpltCallback from stm32f1xx_hal_tim.o(i.HAL_TIM_IC_CaptureHalfCpltCallback) referenced from stm32f1xx_hal_tim.o(i.TIM_ResetCallback) +
    • HAL_TIM_OC_DelayElapsedCallback from stm32f1xx_hal_tim.o(i.HAL_TIM_OC_DelayElapsedCallback) referenced from stm32f1xx_hal_tim.o(i.TIM_ResetCallback) +
    • HAL_TIM_PWM_PulseFinishedCallback from stm32f1xx_hal_tim.o(i.HAL_TIM_PWM_PulseFinishedCallback) referenced from stm32f1xx_hal_tim.o(i.TIM_ResetCallback) +
    • HAL_TIM_PWM_PulseFinishedHalfCpltCallback from stm32f1xx_hal_tim.o(i.HAL_TIM_PWM_PulseFinishedHalfCpltCallback) referenced from stm32f1xx_hal_tim.o(i.TIM_ResetCallback) +
    • HAL_TIM_PeriodElapsedCallback from main.o(i.HAL_TIM_PeriodElapsedCallback) referenced from stm32f1xx_hal_tim.o(i.TIM_ResetCallback) +
    • HAL_TIM_PeriodElapsedHalfCpltCallback from stm32f1xx_hal_tim.o(i.HAL_TIM_PeriodElapsedHalfCpltCallback) referenced from stm32f1xx_hal_tim.o(i.TIM_ResetCallback) +
    • HAL_TIM_TriggerCallback from stm32f1xx_hal_tim.o(i.HAL_TIM_TriggerCallback) referenced from stm32f1xx_hal_tim.o(i.TIM_ResetCallback) +
    • HAL_TIM_TriggerHalfCpltCallback from stm32f1xx_hal_tim.o(i.HAL_TIM_TriggerHalfCpltCallback) referenced from stm32f1xx_hal_tim.o(i.TIM_ResetCallback) +
    • HAL_UARTEx_RxEventCallback from usart.o(i.HAL_UARTEx_RxEventCallback) referenced from stm32f1xx_hal_uart.o(i.UART_InitCallbacksToDefault) +
    • HAL_UART_AbortCpltCallback from stm32f1xx_hal_uart.o(i.HAL_UART_AbortCpltCallback) referenced from stm32f1xx_hal_uart.o(i.UART_InitCallbacksToDefault) +
    • HAL_UART_AbortReceiveCpltCallback from stm32f1xx_hal_uart.o(i.HAL_UART_AbortReceiveCpltCallback) referenced from stm32f1xx_hal_uart.o(i.UART_InitCallbacksToDefault) +
    • HAL_UART_AbortTransmitCpltCallback from stm32f1xx_hal_uart.o(i.HAL_UART_AbortTransmitCpltCallback) referenced from stm32f1xx_hal_uart.o(i.UART_InitCallbacksToDefault) +
    • HAL_UART_ErrorCallback from usart.o(i.HAL_UART_ErrorCallback) referenced from stm32f1xx_hal_uart.o(i.UART_InitCallbacksToDefault) +
    • HAL_UART_MspDeInit from usart.o(i.HAL_UART_MspDeInit) referenced from stm32f1xx_hal_uart.o(i.HAL_UART_DeInit) +
    • HAL_UART_MspInit from usart.o(i.HAL_UART_MspInit) referenced from stm32f1xx_hal_uart.o(i.HAL_UART_Init) +
    • HAL_UART_RxCpltCallback from usart.o(i.HAL_UART_RxCpltCallback) referenced from stm32f1xx_hal_uart.o(i.UART_InitCallbacksToDefault) +
    • HAL_UART_RxHalfCpltCallback from stm32f1xx_hal_uart.o(i.HAL_UART_RxHalfCpltCallback) referenced from stm32f1xx_hal_uart.o(i.UART_InitCallbacksToDefault) +
    • HAL_UART_TxCpltCallback from usart.o(i.HAL_UART_TxCpltCallback) referenced from stm32f1xx_hal_uart.o(i.UART_InitCallbacksToDefault) +
    • HAL_UART_TxHalfCpltCallback from stm32f1xx_hal_uart.o(i.HAL_UART_TxHalfCpltCallback) referenced from stm32f1xx_hal_uart.o(i.UART_InitCallbacksToDefault) +
    • HardFault_Handler from stm32f1xx_it.o(i.HardFault_Handler) referenced from startup_stm32f105xc.o(RESET) +
    • I2C1_ER_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) +
    • I2C1_EV_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) +
    • I2C2_ER_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) +
    • I2C2_EV_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) +
    • MasterTask from freertos.o(i.MasterTask) referenced from freertos.o(i.MX_FREERTOS_Init) +
    • Master_RxCpltCallback from portserial_m.o(i.Master_RxCpltCallback) referenced from portserial_m.o(i.xMBMasterPortSerialInit) +
    • MemManage_Handler from stm32f1xx_it.o(i.MemManage_Handler) referenced from startup_stm32f105xc.o(RESET) +
    • NMI_Handler from stm32f1xx_it.o(i.NMI_Handler) referenced from startup_stm32f105xc.o(RESET) +
    • OTG_FS_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) +
    • OTG_FS_WKUP_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) +
    • PVD_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) +
    • PendSV_Handler from port.o(.emb_text) referenced from startup_stm32f105xc.o(RESET) +
    • RCC_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) +
    • RTC_Alarm_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) +
    • RTC_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) +
    • Reset_Handler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) +
    • SPI1_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) +
    • SPI2_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) +
    • SPI3_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) +
    • SVC_Handler from port.o(.emb_text) referenced from startup_stm32f105xc.o(RESET) +
    • StartDefaultTask from freertos.o(i.StartDefaultTask) referenced from freertos.o(i.MX_FREERTOS_Init) +
    • StartReadTask from freertos.o(i.StartReadTask) referenced from freertos.o(i.MX_FREERTOS_Init) +
    • SysTick_Handler from port.o(i.SysTick_Handler) referenced from startup_stm32f105xc.o(RESET) +
    • SystemInit from system_stm32f1xx.o(i.SystemInit) referenced from startup_stm32f105xc.o(.text) +
    • TAMPER_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) +
    • TIM1_BRK_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) +
    • TIM1_CC_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) +
    • TIM1_TRG_COM_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) +
    • TIM1_UP_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) +
    • TIM2_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) +
    • TIM3_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) +
    • TIM4_IRQHandler from stm32f1xx_it.o(i.TIM4_IRQHandler) referenced from startup_stm32f105xc.o(RESET) +
    • TIM5_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) +
    • TIM6_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) +
    • TIM7_IRQHandler from stm32f1xx_it.o(i.TIM7_IRQHandler) referenced from startup_stm32f105xc.o(RESET) +
    • UART2_RxTaskFunction from freertos.o(i.UART2_RxTaskFunction) referenced from freertos.o(i.MX_FREERTOS_Init) +
    • UART2_TxTaskFunction from freertos.o(i.UART2_TxTaskFunction) referenced from freertos.o(i.MX_FREERTOS_Init) +
    • UART4_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) +
    • UART5_IRQHandler from stm32f1xx_it.o(i.UART5_IRQHandler) referenced from startup_stm32f105xc.o(RESET) +
    • UART_DMAAbortOnError from stm32f1xx_hal_uart.o(i.UART_DMAAbortOnError) referenced from stm32f1xx_hal_uart.o(i.HAL_UART_IRQHandler) +
    • UART_DMAError from stm32f1xx_hal_uart.o(i.UART_DMAError) referenced from stm32f1xx_hal_uart.o(i.HAL_UART_Transmit_DMA) +
    • UART_DMAError from stm32f1xx_hal_uart.o(i.UART_DMAError) referenced from stm32f1xx_hal_uart.o(i.UART_Start_Receive_DMA) +
    • UART_DMAReceiveCplt from stm32f1xx_hal_uart.o(i.UART_DMAReceiveCplt) referenced from stm32f1xx_hal_uart.o(i.UART_Start_Receive_DMA) +
    • UART_DMARxHalfCplt from stm32f1xx_hal_uart.o(i.UART_DMARxHalfCplt) referenced from stm32f1xx_hal_uart.o(i.UART_Start_Receive_DMA) +
    • UART_DMATransmitCplt from stm32f1xx_hal_uart.o(i.UART_DMATransmitCplt) referenced from stm32f1xx_hal_uart.o(i.HAL_UART_Transmit_DMA) +
    • UART_DMATxHalfCplt from stm32f1xx_hal_uart.o(i.UART_DMATxHalfCplt) referenced from stm32f1xx_hal_uart.o(i.HAL_UART_Transmit_DMA)
    • UART_Flush from usart.o(i.UART_Flush) referenced 8 times from usart.o(.data)
    • UART_GetData from usart.o(i.UART_GetData) referenced 8 times from usart.o(.data)
    • UART_Rx_Start from usart.o(i.UART_Rx_Start) referenced 6 times from usart.o(.data)
    • UART_Rx_Start_IT from usart.o(i.UART_Rx_Start_IT) referenced 2 times from usart.o(.data)
    • UART_Send from usart.o(i.UART_Send) referenced 6 times from usart.o(.data)
    • UART_Send_IT from usart.o(i.UART_Send_IT) referenced 2 times from usart.o(.data) -
    • USART1_IRQHandler from stm32f1xx_it.o(i.USART1_IRQHandler) referenced from startup_stm32f105xc.o(RESET) -
    • USART2_IRQHandler from stm32f1xx_it.o(i.USART2_IRQHandler) referenced from startup_stm32f105xc.o(RESET) -
    • USART3_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) -
    • UsageFault_Handler from stm32f1xx_it.o(i.UsageFault_Handler) referenced from startup_stm32f105xc.o(RESET) -
    • WWDG_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) -
    • __main from entry.o(.ARM.Collect$$$$00000000) referenced from startup_stm32f105xc.o(.text) -
    • fputc from usart.o(i.fputc) referenced from printfa.o(i.__0printf) -
    • main from main.o(i.main) referenced from entry9a.o(.ARM.Collect$$$$0000000B) -
    • prvIdleTask from tasks.o(i.prvIdleTask) referenced from tasks.o(i.vTaskStartScheduler) -
    • prvTaskExitError from port.o(i.prvTaskExitError) referenced from port.o(i.pxPortInitialiseStack) -
    • prvTimerTask from timers.o(i.prvTimerTask) referenced from timers.o(i.xTimerCreateTimerTask) +
    • USART1_IRQHandler from stm32f1xx_it.o(i.USART1_IRQHandler) referenced from startup_stm32f105xc.o(RESET) +
    • USART2_IRQHandler from stm32f1xx_it.o(i.USART2_IRQHandler) referenced from startup_stm32f105xc.o(RESET) +
    • USART3_IRQHandler from stm32f1xx_it.o(i.USART3_IRQHandler) referenced from startup_stm32f105xc.o(RESET) +
    • UsageFault_Handler from stm32f1xx_it.o(i.UsageFault_Handler) referenced from startup_stm32f105xc.o(RESET) +
    • WWDG_IRQHandler from startup_stm32f105xc.o(.text) referenced from startup_stm32f105xc.o(RESET) +
    • __main from entry.o(.ARM.Collect$$$$00000000) referenced from startup_stm32f105xc.o(.text) +
    • eMBFuncReportSlaveID from mbfuncother.o(i.eMBFuncReportSlaveID) referenced 2 times from mb_m.o(.data) +
    • eMBMasterFuncReadCoils from mbfunccoils_m.o(i.eMBMasterFuncReadCoils) referenced 2 times from mb_m.o(.data) +
    • eMBMasterFuncReadDiscreteInputs from mbfuncdisc_m.o(i.eMBMasterFuncReadDiscreteInputs) referenced 2 times from mb_m.o(.data) +
    • eMBMasterFuncReadHoldingRegister from mbfuncholding_m.o(i.eMBMasterFuncReadHoldingRegister) referenced 2 times from mb_m.o(.data) +
    • eMBMasterFuncReadInputRegister from mbfuncinput_m.o(i.eMBMasterFuncReadInputRegister) referenced 2 times from mb_m.o(.data) +
    • eMBMasterFuncReadWriteMultipleHoldingRegister from mbfuncholding_m.o(i.eMBMasterFuncReadWriteMultipleHoldingRegister) referenced 2 times from mb_m.o(.data) +
    • eMBMasterFuncWriteCoil from mbfunccoils_m.o(i.eMBMasterFuncWriteCoil) referenced 2 times from mb_m.o(.data) +
    • eMBMasterFuncWriteHoldingRegister from mbfuncholding_m.o(i.eMBMasterFuncWriteHoldingRegister) referenced 2 times from mb_m.o(.data) +
    • eMBMasterFuncWriteMultipleCoils from mbfunccoils_m.o(i.eMBMasterFuncWriteMultipleCoils) referenced 2 times from mb_m.o(.data) +
    • eMBMasterFuncWriteMultipleHoldingRegister from mbfuncholding_m.o(i.eMBMasterFuncWriteMultipleHoldingRegister) referenced 2 times from mb_m.o(.data) +
    • eMBMasterRTUReceive from mbrtu_m.o(i.eMBMasterRTUReceive) referenced from mb_m.o(i.eMBMasterInit) +
    • eMBMasterRTUSend from mbrtu_m.o(i.eMBMasterRTUSend) referenced from mb_m.o(i.eMBMasterInit) +
    • eMBMasterRTUStart from mbrtu_m.o(i.eMBMasterRTUStart) referenced from mb_m.o(i.eMBMasterInit) +
    • eMBMasterRTUStop from mbrtu_m.o(i.eMBMasterRTUStop) referenced from mb_m.o(i.eMBMasterInit) +
    • fputc from usart.o(i.fputc) referenced from printfa.o(i.__0fprintf) +
    • fputc from usart.o(i.fputc) referenced from printfa.o(i.__0printf) +
    • main from main.o(i.main) referenced from entry9a.o(.ARM.Collect$$$$0000000B) +
    • prvIdleTask from tasks.o(i.prvIdleTask) referenced from tasks.o(i.vTaskStartScheduler) +
    • prvTaskExitError from port.o(i.prvTaskExitError) referenced from port.o(i.pxPortInitialiseStack) +
    • prvTimerTask from timers.o(i.prvTimerTask) referenced from timers.o(i.xTimerCreateTimerTask) +
    • serial_soft_trans_irq from portserial_m.o(i.serial_soft_trans_irq) referenced from portserial_m.o(i.xMBMasterPortSerialInit) +
    • timer_timeout_ind from porttimer_m.o(i.timer_timeout_ind) referenced from porttimer_m.o(i.xMBMasterPortTimersInit) +
    • vEventGroupSetBitsCallback from event_groups.o(i.vEventGroupSetBitsCallback) referenced from event_groups.o(i.xEventGroupSetBitsFromISR) +
    • xMBMasterRTUReceiveFSM from mbrtu_m.o(i.xMBMasterRTUReceiveFSM) referenced from mb_m.o(i.eMBMasterInit) +
    • xMBMasterRTUTimerExpired from mbrtu_m.o(i.xMBMasterRTUTimerExpired) referenced from mb_m.o(i.eMBMasterInit) +
    • xMBMasterRTUTransmitFSM from mbrtu_m.o(i.xMBMasterRTUTransmitFSM) referenced from mb_m.o(i.eMBMasterInit)

    Global Symbols

    -

    __main (Thumb, 0 bytes, Stack size unknown bytes, entry.o(.ARM.Collect$$$$00000000)) +

    __main (Thumb, 0 bytes, Stack size unknown bytes, entry.o(.ARM.Collect$$$$00000000))
    [Address Reference Count : 1]

    • startup_stm32f105xc.o(.text)
    -

    _main_stk (Thumb, 0 bytes, Stack size unknown bytes, entry2.o(.ARM.Collect$$$$00000001)) +

    _main_stk (Thumb, 0 bytes, Stack size unknown bytes, entry2.o(.ARM.Collect$$$$00000001)) -

    _main_scatterload (Thumb, 0 bytes, Stack size unknown bytes, entry5.o(.ARM.Collect$$$$00000004)) -

    [Calls]