1.更新文件架构
2.添加STM32F105RC的flashdriver
This commit is contained in:
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adaa9a9cb5
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.gitignore
vendored
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.gitignore
vendored
@ -5,7 +5,7 @@
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*.uvoptx
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# 忽略 si 目录
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/si/
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#/si/
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# 忽略 JLinkLog.txt 文件
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JLinkLog.txt
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Binary file not shown.
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97
project/DebugConfig/STM32F105FlashDrv_STM32F105RC.dbgconf
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97
project/DebugConfig/STM32F105FlashDrv_STM32F105RC.dbgconf
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// <<< Use Configuration Wizard in Context Menu >>>
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// <h> Debug MCU Configuration
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// <o0.0> DBG_SLEEP
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// <i> Debug Sleep Mode
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// <i> 0: (FCLK=On, HCLK=Off) FCLK is clocked by the system clock as previously configured by the software while HCLK is disabled
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// <i> 1: (FCLK=On, HCLK=On) HCLK is fed by the same clock that is provided to FCLK
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// <o0.1> DBG_STOP
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// <i> Debug Stop Mode
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// <i> 0: (FCLK=Off, HCLK=Off) Clock controller disables all clocks
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// <i> 1: (FCLK=On, HCLK=On) FCLK and HCLK are provided by the internal RC oscillator which remains active
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// <o0.2> DBG_STANDBY
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// <i> Debug Standby Mode
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// <i> 0: (FCLK=Off, HCLK=Off) The whole digital part is unpowered.
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// <i> 1: (FCLK=On, HCLK=On) Digital part is powered and FCLK and HCLK are provided by the internal RC oscillator which remains active
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// <o0.8> DBG_IWDG_STOP
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// <i> Debug independent watchdog stopped when core is halted
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// <i> 0: The watchdog counter clock continues even if the core is halted
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// <i> 1: The watchdog counter clock is stopped when the core is halted
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// <o0.9> DBG_WWDG_STOP
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// <i> Debug window watchdog stopped when core is halted
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// <i> 0: The window watchdog counter clock continues even if the core is halted
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// <i> 1: The window watchdog counter clock is stopped when the core is halted
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// <o0.10> DBG_TIM1_STOP
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// <i> Timer 1 counter stopped when core is halted
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// <i> 0: The clock of the involved Timer Counter is fed even if the core is halted
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// <i> 1: The clock of the involved Timer counter is stopped when the core is halted
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// <o0.11> DBG_TIM2_STOP
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// <i> Timer 2 counter stopped when core is halted
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// <i> 0: The clock of the involved Timer Counter is fed even if the core is halted
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// <i> 1: The clock of the involved Timer counter is stopped when the core is halted
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// <o0.12> DBG_TIM3_STOP
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// <i> Timer 3 counter stopped when core is halted
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// <i> 0: The clock of the involved Timer Counter is fed even if the core is halted
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// <i> 1: The clock of the involved Timer counter is stopped when the core is halted
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// <o0.13> DBG_TIM4_STOP
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// <i> Timer 4 counter stopped when core is halted
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// <i> 0: The clock of the involved Timer Counter is fed even if the core is halted
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// <i> 1: The clock of the involved Timer counter is stopped when the core is halted
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// <o0.14> DBG_CAN1_STOP
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// <i> Debug CAN1 stopped when Core is halted
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// <i> 0: Same behavior as in normal mode
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// <i> 1: CAN1 receive registers are frozen
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// <o0.15> DBG_I2C1_SMBUS_TIMEOUT
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// <i> I2C1 SMBUS timeout mode stopped when Core is halted
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// <i> 0: Same behavior as in normal mode
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// <i> 1: The SMBUS timeout is frozen
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// <o0.16> DBG_I2C2_SMBUS_TIMEOUT
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// <i> I2C2 SMBUS timeout mode stopped when Core is halted
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// <i> 0: Same behavior as in normal mode
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// <i> 1: The SMBUS timeout is frozen
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// <o0.17> DBG_TIM8_STOP
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// <i> Timer 8 counter stopped when core is halted
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// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
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// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
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// <o0.18> DBG_TIM5_STOP
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// <i> Timer 5 counter stopped when core is halted
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// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
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// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
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// <o0.19> DBG_TIM6_STOP
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// <i> Timer 6 counter stopped when core is halted
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// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
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// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
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// <o0.20> DBG_TIM7_STOP
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// <i> Timer 7 counter stopped when core is halted
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// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
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// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
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// <o0.21> DBG_CAN2_STOP
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// <i> Debug CAN2 stopped when Core is halted
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// <i> 0: Same behavior as in normal mode
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// <i> 1: CAN2 receive registers are frozen
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// <o0.25> DBG_TIM12_STOP
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// <i> Timer 12 counter stopped when core is halted
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// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
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// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
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// <o0.26> DBG_TIM13_STOP
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// <i> Timer 13 counter stopped when core is halted
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// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
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// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
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// <o0.27> DBG_TIM14_STOP
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// <i> Timer 14 counter stopped when core is halted
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// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
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// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
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// <o0.28> DBG_TIM9_STOP
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// <i> Timer 9 counter stopped when core is halted
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// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
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// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
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// <o0.29> DBG_TIM10_STOP
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// <i> Timer 10 counter stopped when core is halted
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// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
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// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
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// <o0.30> DBG_TIM11_STOP
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// <i> Timer 11 counter stopped when core is halted
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// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
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// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
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// </h>
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DbgMCU_CR = 0x00000007;
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// <<< end of configuration section >>>
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97
project/DebugConfig/Target_1_STM32F105RC.dbgconf
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97
project/DebugConfig/Target_1_STM32F105RC.dbgconf
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@ -0,0 +1,97 @@
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// <<< Use Configuration Wizard in Context Menu >>>
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// <h> Debug MCU Configuration
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// <o0.0> DBG_SLEEP
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// <i> Debug Sleep Mode
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// <i> 0: (FCLK=On, HCLK=Off) FCLK is clocked by the system clock as previously configured by the software while HCLK is disabled
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// <i> 1: (FCLK=On, HCLK=On) HCLK is fed by the same clock that is provided to FCLK
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// <o0.1> DBG_STOP
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// <i> Debug Stop Mode
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// <i> 0: (FCLK=Off, HCLK=Off) Clock controller disables all clocks
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// <i> 1: (FCLK=On, HCLK=On) FCLK and HCLK are provided by the internal RC oscillator which remains active
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// <o0.2> DBG_STANDBY
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// <i> Debug Standby Mode
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// <i> 0: (FCLK=Off, HCLK=Off) The whole digital part is unpowered.
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// <i> 1: (FCLK=On, HCLK=On) Digital part is powered and FCLK and HCLK are provided by the internal RC oscillator which remains active
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// <o0.8> DBG_IWDG_STOP
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// <i> Debug independent watchdog stopped when core is halted
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// <i> 0: The watchdog counter clock continues even if the core is halted
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// <i> 1: The watchdog counter clock is stopped when the core is halted
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// <o0.9> DBG_WWDG_STOP
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// <i> Debug window watchdog stopped when core is halted
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// <i> 0: The window watchdog counter clock continues even if the core is halted
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// <i> 1: The window watchdog counter clock is stopped when the core is halted
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// <o0.10> DBG_TIM1_STOP
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// <i> Timer 1 counter stopped when core is halted
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// <i> 0: The clock of the involved Timer Counter is fed even if the core is halted
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// <i> 1: The clock of the involved Timer counter is stopped when the core is halted
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// <o0.11> DBG_TIM2_STOP
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// <i> Timer 2 counter stopped when core is halted
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// <i> 0: The clock of the involved Timer Counter is fed even if the core is halted
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// <i> 1: The clock of the involved Timer counter is stopped when the core is halted
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// <o0.12> DBG_TIM3_STOP
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// <i> Timer 3 counter stopped when core is halted
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// <i> 0: The clock of the involved Timer Counter is fed even if the core is halted
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// <i> 1: The clock of the involved Timer counter is stopped when the core is halted
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// <o0.13> DBG_TIM4_STOP
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// <i> Timer 4 counter stopped when core is halted
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// <i> 0: The clock of the involved Timer Counter is fed even if the core is halted
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// <i> 1: The clock of the involved Timer counter is stopped when the core is halted
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// <o0.14> DBG_CAN1_STOP
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// <i> Debug CAN1 stopped when Core is halted
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// <i> 0: Same behavior as in normal mode
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// <i> 1: CAN1 receive registers are frozen
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// <o0.15> DBG_I2C1_SMBUS_TIMEOUT
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// <i> I2C1 SMBUS timeout mode stopped when Core is halted
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// <i> 0: Same behavior as in normal mode
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// <i> 1: The SMBUS timeout is frozen
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// <o0.16> DBG_I2C2_SMBUS_TIMEOUT
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// <i> I2C2 SMBUS timeout mode stopped when Core is halted
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// <i> 0: Same behavior as in normal mode
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// <i> 1: The SMBUS timeout is frozen
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// <o0.17> DBG_TIM8_STOP
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// <i> Timer 8 counter stopped when core is halted
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// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
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// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
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// <o0.18> DBG_TIM5_STOP
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// <i> Timer 5 counter stopped when core is halted
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// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
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// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
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// <o0.19> DBG_TIM6_STOP
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// <i> Timer 6 counter stopped when core is halted
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// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
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// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
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// <o0.20> DBG_TIM7_STOP
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// <i> Timer 7 counter stopped when core is halted
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// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
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// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
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// <o0.21> DBG_CAN2_STOP
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// <i> Debug CAN2 stopped when Core is halted
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// <i> 0: Same behavior as in normal mode
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// <i> 1: CAN2 receive registers are frozen
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// <o0.25> DBG_TIM12_STOP
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// <i> Timer 12 counter stopped when core is halted
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// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
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// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
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// <o0.26> DBG_TIM13_STOP
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// <i> Timer 13 counter stopped when core is halted
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// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
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// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
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// <o0.27> DBG_TIM14_STOP
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// <i> Timer 14 counter stopped when core is halted
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// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
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// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
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// <o0.28> DBG_TIM9_STOP
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// <i> Timer 9 counter stopped when core is halted
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// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
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// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
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// <o0.29> DBG_TIM10_STOP
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// <i> Timer 10 counter stopped when core is halted
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// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
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// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
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// <o0.30> DBG_TIM11_STOP
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// <i> Timer 11 counter stopped when core is halted
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// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
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// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
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// </h>
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DbgMCU_CR = 0x00000007;
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// <<< end of configuration section >>>
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BIN
project/FlashDriver.uvmpw
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project/FlashDriver.uvmpw
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project/FlashDriver.uvmpw.uvgui.Administrator
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project/FlashDriver.uvmpw.uvgui.Administrator
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BIN
project/Listings/STM32F105FlashDrv.map
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project/Listings/STM32F105FlashDrv.map
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project/Listings/startup_stm32f10x_cl.lst
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project/Listings/startup_stm32f10x_cl.lst
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2
project/Objects/ExtDll.iex
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project/Objects/ExtDll.iex
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[EXTDLL]
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Count=0
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Binary file not shown.
@ -21,12 +21,12 @@ Target DLL: Segger\JL2CM3.dll V2.99.29.0
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Dialog DLL: TCM.DLL V1.35.1.0
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<h2>Project:</h2>
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E:\liudagui\dep_zhiliao\GD32F105\GD32F105FlashDrv\project\GD32F105FlashDrv.uvprojx
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Project File Date: 10/18/2024
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E:\liudagui\dep_zhiliao\GD32F105\GD32F105RC_FlashDriver\project\GD32F105FlashDrv.uvprojx
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Project File Date: 10/19/2024
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<h2>Output:</h2>
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*** Using Compiler 'V5.06 update 6 (build 750)', folder: 'C:\Keil_v5\ARM\ARMCC\Bin'
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Rebuild target 'GD32F105FlashDrv'
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Rebuild Project 'GD32F105FlashDrv' - Target 'GD32F105FlashDrv'
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assembling startup_gd32f10x_cl.s...
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compiling main.c...
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compiling system_gd32f10x.c...
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@ -49,7 +49,7 @@ Package Vendor: GigaDevice
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C:\Keil_v5\ARM\PACK\GigaDevice\GD32F10x_DFP\2.3.0\Device\Include
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<h2>Collection of Component Files used:</h2>
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Build Time Elapsed: 00:00:02
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Build Time Elapsed: 00:00:00
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</pre>
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</body>
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</html>
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@ -50,108 +50,102 @@
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:1003000043680648984700200FB000BD010203046F
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:10031000050607080000002000800008008800088B
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:10032000500300080000002004040000C801000879
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:1003300030060008007001206C0300004002000835
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:1003400030060008040400200420000050020008C9
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:100350001200011006A5710120C50410067D700170
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:10036000201104101C2DE9F04306460D4617464F98
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:10037000EA87293EB135B12FB1C5F30A0010B9C6DD
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:1003800006101708B1BDE8F08372B600F0AFF93976
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:1003900046304600F01DF800BF02201C2413E01573
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:1003A000F814804FF6FF7000EA0828022000FB04D2
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:1003B00050407840EA080820100606EB4400412E21
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:1003C000100F1EF9641C4C45E9D362B600BFD9E793
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:1003D0006C10104105460E462C464FF0000805B142
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:1003E0000EB95E22815E2380F912203174E03E480E
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:1003F0000088B0F5007F4CD93C48844220D24FF4AD
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:10040000702000F0A8F80746002F61D13848006935
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:1004100040F0020036490861084644610E2005405C
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:1004200000086172412A12932A122F2612202612E6
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:100430002D264347E04232B042200740D1284800F1
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:100440006D4210052649086542100565C069000E19
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:100450002308B14E32211C100440001F1CC152124F
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:100460001A362152121836521E52125E6A5004C7B2
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:10047000B9149202171292124A40520A9212082696
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:10048000241104F5006408F10108B04588D300F098
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:10049000EEF81A101B7BE70000E0F7FF1FFFFF07D5
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:1004A000080020024030B50346002441B13AB10EA5
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:1004B0004416E01D5C0D54401C9042FAD300E0014C
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:1004C00024204630BDF0B5B2240B00240EB107B194
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:1004D00005B9F0BDA22404DEF80B94240C306200B0
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:1004E000521CAA5C43EA022186100C00F05CF864FE
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:1004F0001CB4EB570FF07032B6701004E6E70062E0
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:1005000017012238302BF00BF802465B1E012A013E
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:10051000D1002BF7D1012A00D10422104600BD00E2
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:10052000200A49C96801F0010109B101200CE00667
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:100530000E12100E3006032005E0030E2009040100
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:1005400001B102207047B4815202160C523200549D
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:10055000B26C54B26C54C26C54100470B504E858B8
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:100560000400262A16180435D929163A1916340C0F
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:10057000FFF79DFF0646002E43D125841404010099
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:1005800023F04325801C128F1C361F7618040100AF
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:100590001D083A30081004FFF7AC18380456BB1891
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:1005A000061404010016D06132129F323612E8148C
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:1005B00004010010E8521732126A3250048EB90C4E
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:1005C00064920A64125D32520664220464C40446D2
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:1005D00070BDC83A08B018048000061E5206C42830
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:1005E0000504D90846681405800008653A151423E7
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:1005F00002403421621D0803200C0020B10B480981
|
||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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||||
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||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
:1004F0006C54C26C54100470B504E8580400262AE9
|
||||
:1005000016180435D929163A1916340CFFF79DFF31
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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||||
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||||
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|
||||
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||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
:04000005080001519D
|
||||
:00000001FF
|
||||
|
||||
@ -3,7 +3,7 @@
|
||||
<title>Static Call Graph - [.\Objects\GD32F105FlashDrv.axf]</title></head>
|
||||
<body><HR>
|
||||
<H1>Static Call Graph for image .\Objects\GD32F105FlashDrv.axf</H1><HR>
|
||||
<BR><P>#<CALLGRAPH># ARM Linker, 5060750: Last Updated: Fri Oct 18 16:00:35 2024
|
||||
<BR><P>#<CALLGRAPH># ARM Linker, 5060750: Last Updated: Sat Oct 19 13:35:25 2024
|
||||
<BR><P>
|
||||
<H3>Maximum Stack Usage = 64 bytes + Unknown(Cycles, Untraceable Function Pointers)</H3><H3>
|
||||
Call chain for Maximum Stack Depth:</H3>
|
||||
|
||||
@ -2,8 +2,8 @@
|
||||
".\objects\startup_gd32f10x_cl.o"
|
||||
".\objects\system_gd32f10x.o"
|
||||
".\objects\gd32f10x_it.o"
|
||||
".\objects\main.o"
|
||||
".\objects\flashdriver.o"
|
||||
".\objects\main.o"
|
||||
--library_type=microlib --strict --scatter ".\link_sct\GD32F105Flashdriver.sct"
|
||||
--summary_stderr --info summarysizes --map --load_addr_map_info --xref --callgraph --symbols
|
||||
--info sizes --info totals --info unused --info veneers
|
||||
|
||||
@ -1,33 +1,33 @@
|
||||
Dependencies for Project 'GD32F105FlashDrv', Target 'GD32F105FlashDrv': (DO NOT MODIFY !)
|
||||
F (..\platform\CMSIS\GD\GD32F10x\Source\ARM\startup_gd32f10x_cl.s)(0x6710E5E4)(--cpu Cortex-M3 -g --apcs=interwork --pd "__MICROLIB SETA 1"
-I.\RTE\_GD32F105FlashDrv
-IC:\Keil_v5\ARM\PACK\GigaDevice\GD32F10x_DFP\2.3.0\Device\Include
-IC:\Keil_v5\ARM\CMSIS\Include
--pd "__UVISION_VERSION SETA 525" --pd "GD32F10X_CL SETA 1" --pd "USE_STDPERIPH_DRIVER SETA 1"
--list .\listings\startup_gd32f10x_cl.lst --xref -o .\objects\startup_gd32f10x_cl.o --depend .\objects\startup_gd32f10x_cl.d)
|
||||
F (..\platform\CMSIS\GD\GD32F10x\Source\system_gd32f10x.c)(0x6710E653)(--c99 --gnu -c --cpu Cortex-M3 -D__MICROLIB -g -O0 --apcs=interwork --split_sections -I ..\platform\CMSIS\GD\GD32F10x\Include -I ..\platform\CMSIS -I ..\platform\Chip_peripheral_dev\GD32F10x_standard_peripheral\Include -I ..\code\Inc --diag_suppress 236
-I.\RTE\_GD32F105FlashDrv
-IC:\Keil_v5\ARM\PACK\GigaDevice\GD32F10x_DFP\2.3.0\Device\Include
-IC:\Keil_v5\ARM\CMSIS\Include
-D__UVISION_VERSION="525" -DGD32F10X_CL -DUSE_STDPERIPH_DRIVER -DGD32F10X_CL -D__FPU_PRESENT
-o .\objects\system_gd32f10x.o --omf_browse .\objects\system_gd32f10x.crf --depend .\objects\system_gd32f10x.d)
|
||||
I (..\platform\CMSIS\GD\GD32F10x\Include\gd32f10x.h)(0x66DFB47F)
|
||||
I (..\platform\CMSIS\core_cm3.h)(0x66207442)
|
||||
F (..\source\platform\CMSIS\GD\GD32F10x\Source\ARM\startup_gd32f10x_cl.s)(0x67130C9F)(--cpu Cortex-M3 -g --apcs=interwork --pd "__MICROLIB SETA 1"
-I.\RTE\_GD32F105FlashDrv
-IC:\Keil_v5\ARM\PACK\GigaDevice\GD32F10x_DFP\2.3.0\Device\Include
-IC:\Keil_v5\ARM\CMSIS\Include
--pd "__UVISION_VERSION SETA 525" --pd "GD32F10X_CL SETA 1" --pd "USE_STDPERIPH_DRIVER SETA 1"
--list .\listings\startup_gd32f10x_cl.lst --xref -o .\objects\startup_gd32f10x_cl.o --depend .\objects\startup_gd32f10x_cl.d)
|
||||
F (..\source\platform\CMSIS\GD\GD32F10x\Source\system_gd32f10x.c)(0x67131DDB)(--c99 --gnu -c --cpu Cortex-M3 -D__MICROLIB -g -O0 --apcs=interwork --split_sections -I ..\source\platform\CMSIS\GD\GD32F10x\CoreSupport -I ..\source\platform\CMSIS\GD\GD32F10x\Include -I ..\source\platform\Chip_peripheral_dev\GD32F10x_standard_peripheral\Include -I ..\source\code_app\GD32F10x\Inc --diag_suppress 236
-I.\RTE\_GD32F105FlashDrv
-IC:\Keil_v5\ARM\PACK\GigaDevice\GD32F10x_DFP\2.3.0\Device\Include
-IC:\Keil_v5\ARM\CMSIS\Include
-D__UVISION_VERSION="525" -DGD32F10X_CL -DUSE_STDPERIPH_DRIVER -DGD32F10X_CL -D__FPU_PRESENT
-o .\objects\system_gd32f10x.o --omf_browse .\objects\system_gd32f10x.crf --depend .\objects\system_gd32f10x.d)
|
||||
I (..\source\platform\CMSIS\GD\GD32F10x\Include\gd32f10x.h)(0x67130C9F)
|
||||
I (..\source\platform\CMSIS\GD\GD32F10x\CoreSupport\core_cm3.h)(0x67130C9F)
|
||||
I (C:\Keil_v5\ARM\ARMCC\include\stdint.h)(0x599ECD2E)
|
||||
I (..\platform\CMSIS\core_cmInstr.h)(0x66207442)
|
||||
I (..\platform\CMSIS\core_cmFunc.h)(0x66207442)
|
||||
I (..\platform\CMSIS\GD\GD32F10x\Include\system_gd32f10x.h)(0x6710E5F7)
|
||||
I (..\platform\CMSIS\GD\GD32F10x\Include\gd32f10x_libopt.h)(0x670F6B37)
|
||||
F (..\platform\CMSIS\GD\GD32F10x\Source\gd32f10x_it.c)(0x670F6CA6)(--c99 --gnu -c --cpu Cortex-M3 -D__MICROLIB -g -O0 --apcs=interwork --split_sections -I ..\platform\CMSIS\GD\GD32F10x\Include -I ..\platform\CMSIS -I ..\platform\Chip_peripheral_dev\GD32F10x_standard_peripheral\Include -I ..\code\Inc --diag_suppress 236
-I.\RTE\_GD32F105FlashDrv
-IC:\Keil_v5\ARM\PACK\GigaDevice\GD32F10x_DFP\2.3.0\Device\Include
-IC:\Keil_v5\ARM\CMSIS\Include
-D__UVISION_VERSION="525" -DGD32F10X_CL -DUSE_STDPERIPH_DRIVER -DGD32F10X_CL -D__FPU_PRESENT
-o .\objects\gd32f10x_it.o --omf_browse .\objects\gd32f10x_it.crf --depend .\objects\gd32f10x_it.d)
|
||||
I (..\platform\CMSIS\GD\GD32F10x\Include\gd32f10x_it.h)(0x66207442)
|
||||
I (..\platform\CMSIS\GD\GD32F10x\Include\gd32f10x.h)(0x66DFB47F)
|
||||
I (..\platform\CMSIS\core_cm3.h)(0x66207442)
|
||||
I (..\source\platform\CMSIS\GD\GD32F10x\CoreSupport\core_cmInstr.h)(0x67130C9F)
|
||||
I (..\source\platform\CMSIS\GD\GD32F10x\CoreSupport\core_cmFunc.h)(0x67130C9F)
|
||||
I (..\source\platform\CMSIS\GD\GD32F10x\Include\system_gd32f10x.h)(0x67130C9F)
|
||||
I (..\source\platform\CMSIS\GD\GD32F10x\Include\gd32f10x_libopt.h)(0x67130C9F)
|
||||
F (..\source\platform\CMSIS\GD\GD32F10x\Source\gd32f10x_it.c)(0x67130C9F)(--c99 --gnu -c --cpu Cortex-M3 -D__MICROLIB -g -O0 --apcs=interwork --split_sections -I ..\source\platform\CMSIS\GD\GD32F10x\CoreSupport -I ..\source\platform\CMSIS\GD\GD32F10x\Include -I ..\source\platform\Chip_peripheral_dev\GD32F10x_standard_peripheral\Include -I ..\source\code_app\GD32F10x\Inc --diag_suppress 236
-I.\RTE\_GD32F105FlashDrv
-IC:\Keil_v5\ARM\PACK\GigaDevice\GD32F10x_DFP\2.3.0\Device\Include
-IC:\Keil_v5\ARM\CMSIS\Include
-D__UVISION_VERSION="525" -DGD32F10X_CL -DUSE_STDPERIPH_DRIVER -DGD32F10X_CL -D__FPU_PRESENT
-o .\objects\gd32f10x_it.o --omf_browse .\objects\gd32f10x_it.crf --depend .\objects\gd32f10x_it.d)
|
||||
I (..\source\platform\CMSIS\GD\GD32F10x\Include\gd32f10x_it.h)(0x67130C9F)
|
||||
I (..\source\platform\CMSIS\GD\GD32F10x\Include\gd32f10x.h)(0x67130C9F)
|
||||
I (..\source\platform\CMSIS\GD\GD32F10x\CoreSupport\core_cm3.h)(0x67130C9F)
|
||||
I (C:\Keil_v5\ARM\ARMCC\include\stdint.h)(0x599ECD2E)
|
||||
I (..\platform\CMSIS\core_cmInstr.h)(0x66207442)
|
||||
I (..\platform\CMSIS\core_cmFunc.h)(0x66207442)
|
||||
I (..\platform\CMSIS\GD\GD32F10x\Include\system_gd32f10x.h)(0x6710E5F7)
|
||||
I (..\platform\CMSIS\GD\GD32F10x\Include\gd32f10x_libopt.h)(0x670F6B37)
|
||||
F (..\code\Source\main.c)(0x67120E66)(--c99 --gnu -c --cpu Cortex-M3 -D__MICROLIB -g -O0 --apcs=interwork --split_sections -I ..\platform\CMSIS\GD\GD32F10x\Include -I ..\platform\CMSIS -I ..\platform\Chip_peripheral_dev\GD32F10x_standard_peripheral\Include -I ..\code\Inc --diag_suppress 236
-I.\RTE\_GD32F105FlashDrv
-IC:\Keil_v5\ARM\PACK\GigaDevice\GD32F10x_DFP\2.3.0\Device\Include
-IC:\Keil_v5\ARM\CMSIS\Include
-D__UVISION_VERSION="525" -DGD32F10X_CL -DUSE_STDPERIPH_DRIVER -DGD32F10X_CL -D__FPU_PRESENT
-o .\objects\main.o --omf_browse .\objects\main.crf --depend .\objects\main.d)
|
||||
I (..\code\Inc\flashApi.h)(0x67120E85)
|
||||
I (..\source\platform\CMSIS\GD\GD32F10x\CoreSupport\core_cmInstr.h)(0x67130C9F)
|
||||
I (..\source\platform\CMSIS\GD\GD32F10x\CoreSupport\core_cmFunc.h)(0x67130C9F)
|
||||
I (..\source\platform\CMSIS\GD\GD32F10x\Include\system_gd32f10x.h)(0x67130C9F)
|
||||
I (..\source\platform\CMSIS\GD\GD32F10x\Include\gd32f10x_libopt.h)(0x67130C9F)
|
||||
F (..\source\code_app\GD32F10x\Source\flashDriver.c)(0x67132163)(--c99 --gnu -c --cpu Cortex-M3 -D__MICROLIB -g -O0 --apcs=interwork --split_sections -I ..\source\platform\CMSIS\GD\GD32F10x\CoreSupport -I ..\source\platform\CMSIS\GD\GD32F10x\Include -I ..\source\platform\Chip_peripheral_dev\GD32F10x_standard_peripheral\Include -I ..\source\code_app\GD32F10x\Inc --diag_suppress 236
-I.\RTE\_GD32F105FlashDrv
-IC:\Keil_v5\ARM\PACK\GigaDevice\GD32F10x_DFP\2.3.0\Device\Include
-IC:\Keil_v5\ARM\CMSIS\Include
-D__UVISION_VERSION="525" -DGD32F10X_CL -DUSE_STDPERIPH_DRIVER -DGD32F10X_CL -D__FPU_PRESENT
-o .\objects\flashdriver.o --omf_browse .\objects\flashdriver.crf --depend .\objects\flashdriver.d)
|
||||
I (..\source\platform\Chip_peripheral_dev\GD32F10x_standard_peripheral\Include\gd32f10x_fmc.h)(0x67130C9F)
|
||||
I (..\source\platform\CMSIS\GD\GD32F10x\Include\gd32f10x.h)(0x67130C9F)
|
||||
I (..\source\platform\CMSIS\GD\GD32F10x\CoreSupport\core_cm3.h)(0x67130C9F)
|
||||
I (C:\Keil_v5\ARM\ARMCC\include\stdint.h)(0x599ECD2E)
|
||||
F (..\code\Source\flashDriver.c)(0x67120F44)(--c99 --gnu -c --cpu Cortex-M3 -D__MICROLIB -g -O0 --apcs=interwork --split_sections -I ..\platform\CMSIS\GD\GD32F10x\Include -I ..\platform\CMSIS -I ..\platform\Chip_peripheral_dev\GD32F10x_standard_peripheral\Include -I ..\code\Inc --diag_suppress 236
-I.\RTE\_GD32F105FlashDrv
-IC:\Keil_v5\ARM\PACK\GigaDevice\GD32F10x_DFP\2.3.0\Device\Include
-IC:\Keil_v5\ARM\CMSIS\Include
-D__UVISION_VERSION="525" -DGD32F10X_CL -DUSE_STDPERIPH_DRIVER -DGD32F10X_CL -D__FPU_PRESENT
-o .\objects\flashdriver.o --omf_browse .\objects\flashdriver.crf --depend .\objects\flashdriver.d)
|
||||
I (..\platform\Chip_peripheral_dev\GD32F10x_standard_peripheral\Include\gd32f10x_fmc.h)(0x66207442)
|
||||
I (..\platform\CMSIS\GD\GD32F10x\Include\gd32f10x.h)(0x66DFB47F)
|
||||
I (..\platform\CMSIS\core_cm3.h)(0x66207442)
|
||||
I (..\source\platform\CMSIS\GD\GD32F10x\CoreSupport\core_cmInstr.h)(0x67130C9F)
|
||||
I (..\source\platform\CMSIS\GD\GD32F10x\CoreSupport\core_cmFunc.h)(0x67130C9F)
|
||||
I (..\source\platform\CMSIS\GD\GD32F10x\Include\system_gd32f10x.h)(0x67130C9F)
|
||||
I (..\source\platform\CMSIS\GD\GD32F10x\Include\gd32f10x_libopt.h)(0x67130C9F)
|
||||
I (..\source\code_app\GD32F10x\Inc\flashDriver.h)(0x67130C9F)
|
||||
I (..\source\code_app\GD32F10x\Inc\flashApi.h)(0x67130C9F)
|
||||
F (..\source\code_app\GD32F10x\Source\main.c)(0x67130C9F)(--c99 --gnu -c --cpu Cortex-M3 -D__MICROLIB -g -O0 --apcs=interwork --split_sections -I ..\source\platform\CMSIS\GD\GD32F10x\CoreSupport -I ..\source\platform\CMSIS\GD\GD32F10x\Include -I ..\source\platform\Chip_peripheral_dev\GD32F10x_standard_peripheral\Include -I ..\source\code_app\GD32F10x\Inc --diag_suppress 236
-I.\RTE\_GD32F105FlashDrv
-IC:\Keil_v5\ARM\PACK\GigaDevice\GD32F10x_DFP\2.3.0\Device\Include
-IC:\Keil_v5\ARM\CMSIS\Include
-D__UVISION_VERSION="525" -DGD32F10X_CL -DUSE_STDPERIPH_DRIVER -DGD32F10X_CL -D__FPU_PRESENT
-o .\objects\main.o --omf_browse .\objects\main.crf --depend .\objects\main.d)
|
||||
I (..\source\code_app\GD32F10x\Inc\flashApi.h)(0x67130C9F)
|
||||
I (C:\Keil_v5\ARM\ARMCC\include\stdint.h)(0x599ECD2E)
|
||||
I (..\platform\CMSIS\core_cmInstr.h)(0x66207442)
|
||||
I (..\platform\CMSIS\core_cmFunc.h)(0x66207442)
|
||||
I (..\platform\CMSIS\GD\GD32F10x\Include\system_gd32f10x.h)(0x6710E5F7)
|
||||
I (..\platform\CMSIS\GD\GD32F10x\Include\gd32f10x_libopt.h)(0x670F6B37)
|
||||
I (..\code\Inc\flashDriver.h)(0x67120CED)
|
||||
I (..\code\Inc\flashApi.h)(0x67120E85)
|
||||
|
||||
BIN
project/Objects/STM32F105FlashDrv.axf
Normal file
BIN
project/Objects/STM32F105FlashDrv.axf
Normal file
Binary file not shown.
56
project/Objects/STM32F105FlashDrv.build_log.htm
Normal file
56
project/Objects/STM32F105FlashDrv.build_log.htm
Normal file
@ -0,0 +1,56 @@
|
||||
<html>
|
||||
<body>
|
||||
<pre>
|
||||
<h1>µVision Build Log</h1>
|
||||
<h2>Tool Versions:</h2>
|
||||
IDE-Version: ¦ÌVision V5.25.2.0
|
||||
Copyright (C) 2018 ARM Ltd and ARM Germany GmbH. All rights reserved.
|
||||
License Information: Zachary Administrator, Zachary, LIC=TIVNB-2IHDY-01WP1-C2K2G-5HIE0-XG8NS
|
||||
|
||||
Tool Versions:
|
||||
Toolchain: MDK-ARM Plus Version: 5.25.2.0
|
||||
Toolchain Path: C:\Keil_v5\ARM\ARMCC\Bin
|
||||
C Compiler: Armcc.exe V5.06 update 6 (build 750)
|
||||
Assembler: Armasm.exe V5.06 update 6 (build 750)
|
||||
Linker/Locator: ArmLink.exe V5.06 update 6 (build 750)
|
||||
Library Manager: ArmAr.exe V5.06 update 6 (build 750)
|
||||
Hex Converter: FromElf.exe V5.06 update 6 (build 750)
|
||||
CPU DLL: SARMCM3.DLL V5.25.2.0
|
||||
Dialog DLL: DCM.DLL V1.17.1.0
|
||||
Target DLL: Segger\JL2CM3.dll V2.99.29.0
|
||||
Dialog DLL: TCM.DLL V1.35.1.0
|
||||
|
||||
<h2>Project:</h2>
|
||||
E:\liudagui\dep_zhiliao\GD32F105\GD32F105RC_FlashDriver\project\STM32F105FlashDrv.uvprojx
|
||||
Project File Date: 10/21/2024
|
||||
|
||||
<h2>Output:</h2>
|
||||
*** Using Compiler 'V5.06 update 6 (build 750)', folder: 'C:\Keil_v5\ARM\ARMCC\Bin'
|
||||
Rebuild Project 'STM32F105FlashDrv' - Target 'STM32F105FlashDrv'
|
||||
assembling startup_stm32f10x_cl.s...
|
||||
compiling main.c...
|
||||
compiling system_stm32f10x.c...
|
||||
compiling stm32f10x_it.c...
|
||||
compiling flashDriver.c...
|
||||
compiling core_cm3.c...
|
||||
linking...
|
||||
Program Size: Code=1396 RO-data=396 RW-data=1028 ZI-data=1636
|
||||
FromELF: creating hex file...
|
||||
".\Objects\STM32F105FlashDrv.axf" - 0 Error(s), 0 Warning(s).
|
||||
|
||||
<h2>Software Packages used:</h2>
|
||||
|
||||
Package Vendor: Keil
|
||||
http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack
|
||||
Keil.STM32F1xx_DFP.2.1.0
|
||||
STMicroelectronics STM32F1 Series Device Support, Drivers and Examples
|
||||
|
||||
<h2>Collection of Component include folders:</h2>
|
||||
.\RTE\_STM32F105FlashDrv
|
||||
C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.1.0\Device\Include
|
||||
|
||||
<h2>Collection of Component Files used:</h2>
|
||||
Build Time Elapsed: 00:00:01
|
||||
</pre>
|
||||
</body>
|
||||
</html>
|
||||
138
project/Objects/STM32F105FlashDrv.hex
Normal file
138
project/Objects/STM32F105FlashDrv.hex
Normal file
@ -0,0 +1,138 @@
|
||||
:020000040800F2
|
||||
:10000000680A00204902000857030008530300084B
|
||||
:10001000550300084F0300088D040008000000008D
|
||||
:100020000000000000000000000000005B0300086A
|
||||
:100030005103000800000000590300082D040008C7
|
||||
:1000400063020008630200086302000863020008FC
|
||||
:1000500063020008630200086302000863020008EC
|
||||
:1000600063020008630200086302000863020008DC
|
||||
:1000700063020008630200086302000863020008CC
|
||||
:1000800063020008630200086302000863020008BC
|
||||
:1000900063020008630200086302000863020008AC
|
||||
:1000A000630200086302000863020008630200089C
|
||||
:1000B000630200086302000863020008630200088C
|
||||
:1000C000630200086302000863020008630200087C
|
||||
:1000D000630200086302000863020008630200086C
|
||||
:1000E00063020008630200086302000800000000C9
|
||||
:1000F0000000000000000000000000000000000000
|
||||
:100100000000000000000000630200086302000815
|
||||
:10011000630200086302000863020008630200082B
|
||||
:10012000630200086302000863020008630200081B
|
||||
:10013000630200086302000863020008630200080B
|
||||
:1001400063020008630200086302000863020008FB
|
||||
:1001500000F002F800F068F80AA090E8000C824471
|
||||
:100160008344AAF10107DA4501D100F05DF8AFF24E
|
||||
:10017000090EBAE80F0013F0010F18BFFB1A43F085
|
||||
:1001800001031847C4030000F40300000A444FF0C1
|
||||
:10019000000C10F8013B13F0070408BF10F8014BE6
|
||||
:1001A0001D1108BF10F8015B641E05D010F8016B2B
|
||||
:1001B000641E01F8016BF9D113F0080F1EBF10F88F
|
||||
:1001C000014BAD1C0C1B09D16D1E58BF01F801CBB2
|
||||
:1001D000FAD505E014F8016B01F8016B6D1EF9D535
|
||||
:1001E0009142D6D370470000103A24BF78C878C136
|
||||
:1001F000FAD8520724BF30C830C144BF04680C602D
|
||||
:10020000704700000023002400250026103A28BF74
|
||||
:1002100078C1FBD8520728BF30C148BF0B60704778
|
||||
:100220001FB51FBD10B510BD00F058F81146FFF7FF
|
||||
:10023000F7FF00F035F900F076F803B4FFF7F2FFAE
|
||||
:1002400003BC00F07DF800000948804709480047DA
|
||||
:10025000FEE7FEE7FEE7FEE7FEE7FEE7FEE7FEE776
|
||||
:10026000FEE7FEE704480549054A064B70470000D3
|
||||
:10027000310400085101000868040020680A0020C9
|
||||
:1002800068060020680600204FF0000200B5134603
|
||||
:1002900094469646203922BFA0E80C50A0E80C50A6
|
||||
:1002A000B1F12001BFF4F7AF090728BFA0E80C5057
|
||||
:1002B00048BF0CC05DF804EB890028BF40F8042B50
|
||||
:1002C00008BF704748BF20F8022B11F0804F18BFBD
|
||||
:1002D00000F8012B7047704770477047754600F073
|
||||
:1002E0002BF8AE4605006946534620F007008546C8
|
||||
:1002F00018B020B5FFF7B6FFBDE820404FF000066C
|
||||
:100300004FF000074FF000084FF0000B21F00701FD
|
||||
:10031000AC46ACE8C009ACE8C009ACE8C009ACE840
|
||||
:10032000C0098D46704710B50446AFF300802046E3
|
||||
:10033000BDE81040FFF781BF00487047040400206B
|
||||
:1003400001491820ABBEFEE7260002007047FEE719
|
||||
:100350007047FEE7FEE77047704770470CB5002115
|
||||
:100360002E4801910091026842F4803202604FF4FD
|
||||
:10037000A063026802F400320092019A521C0192BA
|
||||
:10038000009A12B9019A9A42F3D10268920342D5B7
|
||||
:100390000121009122490A6842F010020A600A68AD
|
||||
:1003A00022F007020A600A6842F002020A6041680D
|
||||
:1003B000416041684160416841F480614160C16AC7
|
||||
:1003C000184A1140C162C16A174A1143C1620168EB
|
||||
:1003D00041F08061016001680901FCD5416821F4A8
|
||||
:1003E0007C114160416841F4E8114160016841F0CD
|
||||
:1003F0008071016001688901FCD5416821F0030129
|
||||
:100400004160416841F0020141604168C1F38101EE
|
||||
:100410000229FAD10CBD00910CBD00000010024071
|
||||
:100420000020024000F0FEFF44060100704700007B
|
||||
:10043000124810B5016841F0010101604168104A9D
|
||||
:100440001140416001680F4A11400160016821F4C8
|
||||
:1004500080210160416821F4FE014160016821F0C2
|
||||
:10046000A05101604FF47F0181600021C162FFF75C
|
||||
:1004700075FF05494FF00060086010BD0010024094
|
||||
:100480000000FFF0FFFFF6FE08ED00E0FEE70000D1
|
||||
:100490000249014808607047040000200000002065
|
||||
:1004A00070B524A18EB0D1E90001CDE90C01302155
|
||||
:1004B0006846FFF7E9FEFFF7EBFF204C204D0822CE
|
||||
:1004C00020686946036828469847206802218268A8
|
||||
:1004D00028469047206808220CA943682846984778
|
||||
:1004E000206808220CA943681548083098472068FE
|
||||
:1004F00008220CA943681248103098472068114E12
|
||||
:10050000082243680CA93046984720680221826877
|
||||
:1005100028469047206808220CA943682846984737
|
||||
:10052000206808220CA94368304698470EB0002086
|
||||
:1005300070BD00000102030405060708000000204A
|
||||
:1005400000800008008800087805000800000020EE
|
||||
:10055000040400008C010008E406000800F00020FC
|
||||
:1005600088010000E8010008E406000804040020F7
|
||||
:100570006406000004020008411329F11B2049040D
|
||||
:1005800013F1F0100C2070B505464FF430263046BC
|
||||
:10059000100FF059F8042811D1094C206940F002DD
|
||||
:1005A0002D206165610A1A400A291E100F4AF821A0
|
||||
:1005B0006941F6FD721140216170BD181920024099
|
||||
:1005C00008490420CA68D20701D001207047CA68D0
|
||||
:1005D000520701D5020A1808C968C906FBD5030AE3
|
||||
:1005E000311928180B0248016941F080010161129C
|
||||
:1005F00019101CF0B50674111D570D4638581A1EF7
|
||||
:10060000763C0CD106761A016C2B3580161A136EC7
|
||||
:100610002BBA1E6C3AF06C1808034802494160037B
|
||||
:10062000042F7047230167451415AB89EFCD100ADD
|
||||
:10063000B50346FFF7BAFF03E0100CBFFFF7B6FFA4
|
||||
:100640005B1E012803D0122B14D1052012BD100B04
|
||||
:100650002BF4D1FAE770B50E46041314D010102E07
|
||||
:1006600012D072B6FFF7D9FF08493520C8601D25A2
|
||||
:1006700005E0203E157DFF04F5480E646D1CB54273
|
||||
:10068000F7D3FFF7A8FF62B6E01530B50446162091
|
||||
:1006900041B13AB120142302E0E55CCD545B1C93D8
|
||||
:1006A00042FAD330BD012030BD1008F0B515460E1A
|
||||
:1006B0004607134FF0140416D08A2D621CA8FF08B9
|
||||
:1006C000901406EB441C01880706180CFFF785FF01
|
||||
:1006D000641CB4EB550FF4621A776219D601FF015E
|
||||
:1006E000FF017B0029F1002049F10020F1F00020FA
|
||||
:1006F00070B505464FF43026304600F059F804280E
|
||||
:1007000011D1094C206940F0020020616561206927
|
||||
:1007100040F040002061304600F04AF8216941F67F
|
||||
:10072000FD721140216170BD002002400849042083
|
||||
:10073000CA68D20701D001207047CA68520701D5A4
|
||||
:1007400002207047C968C906FBD503207047000026
|
||||
:10075000002002400248016941F0800101617047B8
|
||||
:1007600000200240F0B506464FF400570D463846CB
|
||||
:1007700000F01EF804280CD1064C206940F001005E
|
||||
:1007800020613580384600F013F82169BA1E114007
|
||||
:100790002161F0BD00200240034802494160034945
|
||||
:1007A000416070472301674500200240AB89EFCDCF
|
||||
:1007B00000B50346FFF7BAFF03E000BFFFF7B6FF3F
|
||||
:1007C0005B1E012803D0002B00D1052000BD002BAB
|
||||
:1007D000F4D1FAE770B50E46040014D0002E12D002
|
||||
:1007E00072B6FFF7D9FF08493520C860002505E03B
|
||||
:1007F0002046FFF77DFF04F500646D1CB542F7D37A
|
||||
:10080000FFF7A8FF62B670BD0020024030B5044675
|
||||
:10081000002041B13AB1002302E0E55CCD545B1CFD
|
||||
:100820009342FAD330BD012030BD0000F0B515462B
|
||||
:100830000E4607004FF0000416D0002D14D0002EF5
|
||||
:1008400012D072B6FFF7A8FF08E000BF06EB440025
|
||||
:10085000018807EB4400FFF785FF641CB4EB550FDC
|
||||
:0C086000F4D3FFF777FF62B6F0BD000094
|
||||
:04000005080001519D
|
||||
:00000001FF
|
||||
634
project/Objects/STM32F105FlashDrv.htm
Normal file
634
project/Objects/STM32F105FlashDrv.htm
Normal file
@ -0,0 +1,634 @@
|
||||
<!doctype html public "-//w3c//dtd html 4.0 transitional//en">
|
||||
<html><head>
|
||||
<title>Static Call Graph - [.\Objects\STM32F105FlashDrv.axf]</title></head>
|
||||
<body><HR>
|
||||
<H1>Static Call Graph for image .\Objects\STM32F105FlashDrv.axf</H1><HR>
|
||||
<BR><P>#<CALLGRAPH># ARM Linker, 5060750: Last Updated: Mon Oct 21 14:57:24 2024
|
||||
<BR><P>
|
||||
<H3>Maximum Stack Usage = 76 bytes + Unknown(Functions without stacksize, Cycles, Untraceable Function Pointers)</H3><H3>
|
||||
Call chain for Maximum Stack Depth:</H3>
|
||||
__rt_entry_main ⇒ main ⇒ __aeabi_memclr4
|
||||
<P>
|
||||
<H3>
|
||||
Functions with no stack information
|
||||
</H3><UL>
|
||||
<LI><a href="#[60]">__user_initial_stackheap</a>
|
||||
</UL>
|
||||
</UL>
|
||||
<P>
|
||||
<H3>
|
||||
Mutually Recursive functions
|
||||
</H3> <LI><a href="#[1f]">ADC1_2_IRQHandler</a> ⇒ <a href="#[1f]">ADC1_2_IRQHandler</a><BR>
|
||||
<LI><a href="#[7]">BusFault_Handler</a> ⇒ <a href="#[7]">BusFault_Handler</a><BR>
|
||||
<LI><a href="#[5]">HardFault_Handler</a> ⇒ <a href="#[5]">HardFault_Handler</a><BR>
|
||||
<LI><a href="#[6]">MemManage_Handler</a> ⇒ <a href="#[6]">MemManage_Handler</a><BR>
|
||||
<LI><a href="#[8]">UsageFault_Handler</a> ⇒ <a href="#[8]">UsageFault_Handler</a><BR>
|
||||
</UL>
|
||||
<P>
|
||||
<H3>
|
||||
Function Pointers
|
||||
</H3><UL>
|
||||
<LI><a href="#[1f]">ADC1_2_IRQHandler</a> from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET)
|
||||
<LI><a href="#[7]">BusFault_Handler</a> from stm32f10x_it.o(i.BusFault_Handler) referenced from startup_stm32f10x_cl.o(RESET)
|
||||
<LI><a href="#[21]">CAN1_RX0_IRQHandler</a> from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET)
|
||||
<LI><a href="#[22]">CAN1_RX1_IRQHandler</a> from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET)
|
||||
<LI><a href="#[23]">CAN1_SCE_IRQHandler</a> from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET)
|
||||
<LI><a href="#[20]">CAN1_TX_IRQHandler</a> from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET)
|
||||
<LI><a href="#[46]">CAN2_RX0_IRQHandler</a> from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET)
|
||||
<LI><a href="#[47]">CAN2_RX1_IRQHandler</a> from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET)
|
||||
<LI><a href="#[48]">CAN2_SCE_IRQHandler</a> from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET)
|
||||
<LI><a href="#[45]">CAN2_TX_IRQHandler</a> from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET)
|
||||
<LI><a href="#[18]">DMA1_Channel1_IRQHandler</a> from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET)
|
||||
<LI><a href="#[19]">DMA1_Channel2_IRQHandler</a> from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET)
|
||||
<LI><a href="#[1a]">DMA1_Channel3_IRQHandler</a> from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET)
|
||||
<LI><a href="#[1b]">DMA1_Channel4_IRQHandler</a> from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET)
|
||||
<LI><a href="#[1c]">DMA1_Channel5_IRQHandler</a> from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET)
|
||||
<LI><a href="#[1d]">DMA1_Channel6_IRQHandler</a> from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET)
|
||||
<LI><a href="#[1e]">DMA1_Channel7_IRQHandler</a> from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET)
|
||||
<LI><a href="#[3e]">DMA2_Channel1_IRQHandler</a> from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET)
|
||||
<LI><a href="#[3f]">DMA2_Channel2_IRQHandler</a> from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET)
|
||||
<LI><a href="#[40]">DMA2_Channel3_IRQHandler</a> from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET)
|
||||
<LI><a href="#[41]">DMA2_Channel4_IRQHandler</a> from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET)
|
||||
<LI><a href="#[42]">DMA2_Channel5_IRQHandler</a> from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET)
|
||||
<LI><a href="#[a]">DebugMon_Handler</a> from stm32f10x_it.o(i.DebugMon_Handler) referenced from startup_stm32f10x_cl.o(RESET)
|
||||
<LI><a href="#[43]">ETH_IRQHandler</a> from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET)
|
||||
<LI><a href="#[44]">ETH_WKUP_IRQHandler</a> from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET)
|
||||
<LI><a href="#[13]">EXTI0_IRQHandler</a> from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET)
|
||||
<LI><a href="#[35]">EXTI15_10_IRQHandler</a> from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET)
|
||||
<LI><a href="#[14]">EXTI1_IRQHandler</a> from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET)
|
||||
<LI><a href="#[15]">EXTI2_IRQHandler</a> from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET)
|
||||
<LI><a href="#[16]">EXTI3_IRQHandler</a> from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET)
|
||||
<LI><a href="#[17]">EXTI4_IRQHandler</a> from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET)
|
||||
<LI><a href="#[24]">EXTI9_5_IRQHandler</a> from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET)
|
||||
<LI><a href="#[11]">FLASH_IRQHandler</a> from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET)
|
||||
<LI><a href="#[5]">HardFault_Handler</a> from stm32f10x_it.o(i.HardFault_Handler) referenced from startup_stm32f10x_cl.o(RESET)
|
||||
<LI><a href="#[2d]">I2C1_ER_IRQHandler</a> from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET)
|
||||
<LI><a href="#[2c]">I2C1_EV_IRQHandler</a> from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET)
|
||||
<LI><a href="#[2f]">I2C2_ER_IRQHandler</a> from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET)
|
||||
<LI><a href="#[2e]">I2C2_EV_IRQHandler</a> from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET)
|
||||
<LI><a href="#[6]">MemManage_Handler</a> from stm32f10x_it.o(i.MemManage_Handler) referenced from startup_stm32f10x_cl.o(RESET)
|
||||
<LI><a href="#[4]">NMI_Handler</a> from stm32f10x_it.o(i.NMI_Handler) referenced from startup_stm32f10x_cl.o(RESET)
|
||||
<LI><a href="#[49]">OTG_FS_IRQHandler</a> from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET)
|
||||
<LI><a href="#[37]">OTG_FS_WKUP_IRQHandler</a> from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET)
|
||||
<LI><a href="#[e]">PVD_IRQHandler</a> from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET)
|
||||
<LI><a href="#[b]">PendSV_Handler</a> from stm32f10x_it.o(i.PendSV_Handler) referenced from startup_stm32f10x_cl.o(RESET)
|
||||
<LI><a href="#[12]">RCC_IRQHandler</a> from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET)
|
||||
<LI><a href="#[36]">RTCAlarm_IRQHandler</a> from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET)
|
||||
<LI><a href="#[10]">RTC_IRQHandler</a> from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET)
|
||||
<LI><a href="#[3]">Reset_Handler</a> from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET)
|
||||
<LI><a href="#[30]">SPI1_IRQHandler</a> from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET)
|
||||
<LI><a href="#[31]">SPI2_IRQHandler</a> from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET)
|
||||
<LI><a href="#[39]">SPI3_IRQHandler</a> from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET)
|
||||
<LI><a href="#[9]">SVC_Handler</a> from stm32f10x_it.o(i.SVC_Handler) referenced from startup_stm32f10x_cl.o(RESET)
|
||||
<LI><a href="#[c]">SysTick_Handler</a> from stm32f10x_it.o(i.SysTick_Handler) referenced from startup_stm32f10x_cl.o(RESET)
|
||||
<LI><a href="#[4a]">SystemInit</a> from system_stm32f10x.o(i.SystemInit) referenced from startup_stm32f10x_cl.o(.text)
|
||||
<LI><a href="#[f]">TAMPER_IRQHandler</a> from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET)
|
||||
<LI><a href="#[25]">TIM1_BRK_IRQHandler</a> from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET)
|
||||
<LI><a href="#[28]">TIM1_CC_IRQHandler</a> from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET)
|
||||
<LI><a href="#[27]">TIM1_TRG_COM_IRQHandler</a> from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET)
|
||||
<LI><a href="#[26]">TIM1_UP_IRQHandler</a> from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET)
|
||||
<LI><a href="#[29]">TIM2_IRQHandler</a> from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET)
|
||||
<LI><a href="#[2a]">TIM3_IRQHandler</a> from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET)
|
||||
<LI><a href="#[2b]">TIM4_IRQHandler</a> from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET)
|
||||
<LI><a href="#[38]">TIM5_IRQHandler</a> from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET)
|
||||
<LI><a href="#[3c]">TIM6_IRQHandler</a> from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET)
|
||||
<LI><a href="#[3d]">TIM7_IRQHandler</a> from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET)
|
||||
<LI><a href="#[3a]">UART4_IRQHandler</a> from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET)
|
||||
<LI><a href="#[3b]">UART5_IRQHandler</a> from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET)
|
||||
<LI><a href="#[32]">USART1_IRQHandler</a> from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET)
|
||||
<LI><a href="#[33]">USART2_IRQHandler</a> from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET)
|
||||
<LI><a href="#[34]">USART3_IRQHandler</a> from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET)
|
||||
<LI><a href="#[8]">UsageFault_Handler</a> from stm32f10x_it.o(i.UsageFault_Handler) referenced from startup_stm32f10x_cl.o(RESET)
|
||||
<LI><a href="#[d]">WWDG_IRQHandler</a> from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET)
|
||||
<LI><a href="#[4f]">__main</a> from __main.o(!!!main) referenced from startup_stm32f10x_cl.o(.text)
|
||||
<LI><a href="#[4e]">flash_erase</a> from flashdriver.o(i.flash_erase) referenced from flashdriver.o(flbase)
|
||||
<LI><a href="#[4c]">flash_read</a> from flashdriver.o(i.flash_read) referenced from flashdriver.o(flbase)
|
||||
<LI><a href="#[4d]">flash_write</a> from flashdriver.o(i.flash_write) referenced from flashdriver.o(flbase)
|
||||
</UL>
|
||||
<P>
|
||||
<H3>
|
||||
Global Symbols
|
||||
</H3>
|
||||
<P><STRONG><a name="[4f]"></a>__main</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, __main.o(!!!main))
|
||||
<BR><BR>[Calls]<UL><LI><a href="#[50]">>></a> __scatterload
|
||||
<LI><a href="#[51]">>></a> __rt_entry
|
||||
</UL>
|
||||
|
||||
<P><STRONG><a name="[50]"></a>__scatterload</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, __scatter.o(!!!scatter))
|
||||
<BR><BR>[Called By]<UL><LI><a href="#[4f]">>></a> __main
|
||||
</UL>
|
||||
|
||||
<P><STRONG><a name="[52]"></a>__scatterload_rt2</STRONG> (Thumb, 44 bytes, Stack size unknown bytes, __scatter.o(!!!scatter), UNUSED)
|
||||
<BR><BR>[Calls]<UL><LI><a href="#[51]">>></a> __rt_entry
|
||||
</UL>
|
||||
|
||||
<P><STRONG><a name="[6b]"></a>__scatterload_rt2_thumb_only</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, __scatter.o(!!!scatter), UNUSED)
|
||||
|
||||
<P><STRONG><a name="[6c]"></a>__scatterload_null</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, __scatter.o(!!!scatter), UNUSED)
|
||||
|
||||
<P><STRONG><a name="[6d]"></a>__decompress</STRONG> (Thumb, 90 bytes, Stack size unknown bytes, __dczerorl2.o(!!dczerorl2), UNUSED)
|
||||
|
||||
<P><STRONG><a name="[6e]"></a>__decompress1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, __dczerorl2.o(!!dczerorl2), UNUSED)
|
||||
|
||||
<P><STRONG><a name="[53]"></a>__scatterload_copy</STRONG> (Thumb, 26 bytes, Stack size unknown bytes, __scatter_copy.o(!!handler_copy), UNUSED)
|
||||
<BR><BR>[Calls]<UL><LI><a href="#[53]">>></a> __scatterload_copy
|
||||
</UL>
|
||||
<BR>[Called By]<UL><LI><a href="#[53]">>></a> __scatterload_copy
|
||||
</UL>
|
||||
|
||||
<P><STRONG><a name="[6f]"></a>__scatterload_zeroinit</STRONG> (Thumb, 28 bytes, Stack size unknown bytes, __scatter_zi.o(!!handler_zi), UNUSED)
|
||||
|
||||
<P><STRONG><a name="[57]"></a>__rt_lib_init</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit.o(.ARM.Collect$$libinit$$00000000))
|
||||
<BR><BR>[Called By]<UL><LI><a href="#[56]">>></a> __rt_entry_li
|
||||
</UL>
|
||||
|
||||
<P><STRONG><a name="[70]"></a>__rt_lib_init_alloca_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000002E))
|
||||
|
||||
<P><STRONG><a name="[71]"></a>__rt_lib_init_argv_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000002C))
|
||||
|
||||
<P><STRONG><a name="[72]"></a>__rt_lib_init_atexit_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000001B))
|
||||
|
||||
<P><STRONG><a name="[73]"></a>__rt_lib_init_clock_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000021))
|
||||
|
||||
<P><STRONG><a name="[74]"></a>__rt_lib_init_cpp_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000032))
|
||||
|
||||
<P><STRONG><a name="[75]"></a>__rt_lib_init_exceptions_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000030))
|
||||
|
||||
<P><STRONG><a name="[76]"></a>__rt_lib_init_fp_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000002))
|
||||
|
||||
<P><STRONG><a name="[77]"></a>__rt_lib_init_fp_trap_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000001F))
|
||||
|
||||
<P><STRONG><a name="[78]"></a>__rt_lib_init_getenv_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000023))
|
||||
|
||||
<P><STRONG><a name="[79]"></a>__rt_lib_init_heap_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000000A))
|
||||
|
||||
<P><STRONG><a name="[7a]"></a>__rt_lib_init_lc_collate_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000011))
|
||||
|
||||
<P><STRONG><a name="[7b]"></a>__rt_lib_init_lc_ctype_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000013))
|
||||
|
||||
<P><STRONG><a name="[7c]"></a>__rt_lib_init_lc_monetary_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000015))
|
||||
|
||||
<P><STRONG><a name="[7d]"></a>__rt_lib_init_lc_numeric_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000017))
|
||||
|
||||
<P><STRONG><a name="[7e]"></a>__rt_lib_init_lc_time_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000019))
|
||||
|
||||
<P><STRONG><a name="[7f]"></a>__rt_lib_init_preinit_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000004))
|
||||
|
||||
<P><STRONG><a name="[80]"></a>__rt_lib_init_rand_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000000E))
|
||||
|
||||
<P><STRONG><a name="[81]"></a>__rt_lib_init_return</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000033))
|
||||
|
||||
<P><STRONG><a name="[82]"></a>__rt_lib_init_signal_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000001D))
|
||||
|
||||
<P><STRONG><a name="[83]"></a>__rt_lib_init_stdio_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000025))
|
||||
|
||||
<P><STRONG><a name="[84]"></a>__rt_lib_init_user_alloc_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000000C))
|
||||
|
||||
<P><STRONG><a name="[5c]"></a>__rt_lib_shutdown</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libshutdown.o(.ARM.Collect$$libshutdown$$00000000))
|
||||
<BR><BR>[Called By]<UL><LI><a href="#[5b]">>></a> __rt_exit_ls
|
||||
</UL>
|
||||
|
||||
<P><STRONG><a name="[85]"></a>__rt_lib_shutdown_cpp_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$00000002))
|
||||
|
||||
<P><STRONG><a name="[86]"></a>__rt_lib_shutdown_fp_trap_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$00000007))
|
||||
|
||||
<P><STRONG><a name="[87]"></a>__rt_lib_shutdown_heap_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$0000000F))
|
||||
|
||||
<P><STRONG><a name="[88]"></a>__rt_lib_shutdown_return</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$00000010))
|
||||
|
||||
<P><STRONG><a name="[89]"></a>__rt_lib_shutdown_signal_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$0000000A))
|
||||
|
||||
<P><STRONG><a name="[8a]"></a>__rt_lib_shutdown_stdio_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$00000004))
|
||||
|
||||
<P><STRONG><a name="[8b]"></a>__rt_lib_shutdown_user_alloc_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$0000000C))
|
||||
|
||||
<P><STRONG><a name="[51]"></a>__rt_entry</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, __rtentry.o(.ARM.Collect$$rtentry$$00000000))
|
||||
<BR><BR>[Called By]<UL><LI><a href="#[52]">>></a> __scatterload_rt2
|
||||
<LI><a href="#[4f]">>></a> __main
|
||||
</UL>
|
||||
|
||||
<P><STRONG><a name="[8c]"></a>__rt_entry_presh_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, __rtentry2.o(.ARM.Collect$$rtentry$$00000002))
|
||||
|
||||
<P><STRONG><a name="[54]"></a>__rt_entry_sh</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, __rtentry4.o(.ARM.Collect$$rtentry$$00000004))
|
||||
<BR><BR>[Stack]<UL><LI>Max Depth = 8 + Unknown Stack Size
|
||||
<LI>Call Chain = __rt_entry_sh ⇒ __user_setup_stackheap
|
||||
</UL>
|
||||
<BR>[Calls]<UL><LI><a href="#[55]">>></a> __user_setup_stackheap
|
||||
</UL>
|
||||
|
||||
<P><STRONG><a name="[56]"></a>__rt_entry_li</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, __rtentry2.o(.ARM.Collect$$rtentry$$0000000A))
|
||||
<BR><BR>[Calls]<UL><LI><a href="#[57]">>></a> __rt_lib_init
|
||||
</UL>
|
||||
|
||||
<P><STRONG><a name="[8d]"></a>__rt_entry_postsh_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, __rtentry2.o(.ARM.Collect$$rtentry$$00000009))
|
||||
|
||||
<P><STRONG><a name="[58]"></a>__rt_entry_main</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, __rtentry2.o(.ARM.Collect$$rtentry$$0000000D))
|
||||
<BR><BR>[Stack]<UL><LI>Max Depth = 76 + Unknown Stack Size
|
||||
<LI>Call Chain = __rt_entry_main ⇒ main ⇒ __aeabi_memclr4
|
||||
</UL>
|
||||
<BR>[Calls]<UL><LI><a href="#[5a]">>></a> exit
|
||||
<LI><a href="#[59]">>></a> main
|
||||
</UL>
|
||||
|
||||
<P><STRONG><a name="[8e]"></a>__rt_entry_postli_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, __rtentry2.o(.ARM.Collect$$rtentry$$0000000C))
|
||||
|
||||
<P><STRONG><a name="[61]"></a>__rt_exit</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, rtexit.o(.ARM.Collect$$rtexit$$00000000))
|
||||
<BR><BR>[Called By]<UL><LI><a href="#[5a]">>></a> exit
|
||||
</UL>
|
||||
|
||||
<P><STRONG><a name="[5b]"></a>__rt_exit_ls</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, rtexit2.o(.ARM.Collect$$rtexit$$00000003))
|
||||
<BR><BR>[Calls]<UL><LI><a href="#[5c]">>></a> __rt_lib_shutdown
|
||||
</UL>
|
||||
|
||||
<P><STRONG><a name="[8f]"></a>__rt_exit_prels_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, rtexit2.o(.ARM.Collect$$rtexit$$00000002))
|
||||
|
||||
<P><STRONG><a name="[5d]"></a>__rt_exit_exit</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, rtexit2.o(.ARM.Collect$$rtexit$$00000004))
|
||||
<BR><BR>[Calls]<UL><LI><a href="#[5e]">>></a> _sys_exit
|
||||
</UL>
|
||||
|
||||
<P><STRONG><a name="[3]"></a>Reset_Handler</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text))
|
||||
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_cl.o(RESET)
|
||||
</UL>
|
||||
<P><STRONG><a name="[1f]"></a>ADC1_2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text))
|
||||
<BR><BR>[Calls]<UL><LI><a href="#[1f]">>></a> ADC1_2_IRQHandler
|
||||
</UL>
|
||||
<BR>[Called By]<UL><LI><a href="#[1f]">>></a> ADC1_2_IRQHandler
|
||||
</UL>
|
||||
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_cl.o(RESET)
|
||||
</UL>
|
||||
<P><STRONG><a name="[21]"></a>CAN1_RX0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text))
|
||||
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_cl.o(RESET)
|
||||
</UL>
|
||||
<P><STRONG><a name="[22]"></a>CAN1_RX1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text))
|
||||
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_cl.o(RESET)
|
||||
</UL>
|
||||
<P><STRONG><a name="[23]"></a>CAN1_SCE_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text))
|
||||
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_cl.o(RESET)
|
||||
</UL>
|
||||
<P><STRONG><a name="[20]"></a>CAN1_TX_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text))
|
||||
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_cl.o(RESET)
|
||||
</UL>
|
||||
<P><STRONG><a name="[46]"></a>CAN2_RX0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text))
|
||||
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_cl.o(RESET)
|
||||
</UL>
|
||||
<P><STRONG><a name="[47]"></a>CAN2_RX1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text))
|
||||
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_cl.o(RESET)
|
||||
</UL>
|
||||
<P><STRONG><a name="[48]"></a>CAN2_SCE_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text))
|
||||
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_cl.o(RESET)
|
||||
</UL>
|
||||
<P><STRONG><a name="[45]"></a>CAN2_TX_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text))
|
||||
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_cl.o(RESET)
|
||||
</UL>
|
||||
<P><STRONG><a name="[18]"></a>DMA1_Channel1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text))
|
||||
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_cl.o(RESET)
|
||||
</UL>
|
||||
<P><STRONG><a name="[19]"></a>DMA1_Channel2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text))
|
||||
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_cl.o(RESET)
|
||||
</UL>
|
||||
<P><STRONG><a name="[1a]"></a>DMA1_Channel3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text))
|
||||
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_cl.o(RESET)
|
||||
</UL>
|
||||
<P><STRONG><a name="[1b]"></a>DMA1_Channel4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text))
|
||||
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_cl.o(RESET)
|
||||
</UL>
|
||||
<P><STRONG><a name="[1c]"></a>DMA1_Channel5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text))
|
||||
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_cl.o(RESET)
|
||||
</UL>
|
||||
<P><STRONG><a name="[1d]"></a>DMA1_Channel6_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text))
|
||||
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_cl.o(RESET)
|
||||
</UL>
|
||||
<P><STRONG><a name="[1e]"></a>DMA1_Channel7_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text))
|
||||
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_cl.o(RESET)
|
||||
</UL>
|
||||
<P><STRONG><a name="[3e]"></a>DMA2_Channel1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text))
|
||||
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_cl.o(RESET)
|
||||
</UL>
|
||||
<P><STRONG><a name="[3f]"></a>DMA2_Channel2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text))
|
||||
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_cl.o(RESET)
|
||||
</UL>
|
||||
<P><STRONG><a name="[40]"></a>DMA2_Channel3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text))
|
||||
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_cl.o(RESET)
|
||||
</UL>
|
||||
<P><STRONG><a name="[41]"></a>DMA2_Channel4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text))
|
||||
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_cl.o(RESET)
|
||||
</UL>
|
||||
<P><STRONG><a name="[42]"></a>DMA2_Channel5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text))
|
||||
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_cl.o(RESET)
|
||||
</UL>
|
||||
<P><STRONG><a name="[43]"></a>ETH_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text))
|
||||
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_cl.o(RESET)
|
||||
</UL>
|
||||
<P><STRONG><a name="[44]"></a>ETH_WKUP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text))
|
||||
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_cl.o(RESET)
|
||||
</UL>
|
||||
<P><STRONG><a name="[13]"></a>EXTI0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text))
|
||||
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_cl.o(RESET)
|
||||
</UL>
|
||||
<P><STRONG><a name="[35]"></a>EXTI15_10_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text))
|
||||
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_cl.o(RESET)
|
||||
</UL>
|
||||
<P><STRONG><a name="[14]"></a>EXTI1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text))
|
||||
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_cl.o(RESET)
|
||||
</UL>
|
||||
<P><STRONG><a name="[15]"></a>EXTI2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text))
|
||||
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_cl.o(RESET)
|
||||
</UL>
|
||||
<P><STRONG><a name="[16]"></a>EXTI3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text))
|
||||
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_cl.o(RESET)
|
||||
</UL>
|
||||
<P><STRONG><a name="[17]"></a>EXTI4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text))
|
||||
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_cl.o(RESET)
|
||||
</UL>
|
||||
<P><STRONG><a name="[24]"></a>EXTI9_5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text))
|
||||
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_cl.o(RESET)
|
||||
</UL>
|
||||
<P><STRONG><a name="[11]"></a>FLASH_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text))
|
||||
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_cl.o(RESET)
|
||||
</UL>
|
||||
<P><STRONG><a name="[2d]"></a>I2C1_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text))
|
||||
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_cl.o(RESET)
|
||||
</UL>
|
||||
<P><STRONG><a name="[2c]"></a>I2C1_EV_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text))
|
||||
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_cl.o(RESET)
|
||||
</UL>
|
||||
<P><STRONG><a name="[2f]"></a>I2C2_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text))
|
||||
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_cl.o(RESET)
|
||||
</UL>
|
||||
<P><STRONG><a name="[2e]"></a>I2C2_EV_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text))
|
||||
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_cl.o(RESET)
|
||||
</UL>
|
||||
<P><STRONG><a name="[49]"></a>OTG_FS_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text))
|
||||
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_cl.o(RESET)
|
||||
</UL>
|
||||
<P><STRONG><a name="[37]"></a>OTG_FS_WKUP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text))
|
||||
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_cl.o(RESET)
|
||||
</UL>
|
||||
<P><STRONG><a name="[e]"></a>PVD_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text))
|
||||
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_cl.o(RESET)
|
||||
</UL>
|
||||
<P><STRONG><a name="[12]"></a>RCC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text))
|
||||
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_cl.o(RESET)
|
||||
</UL>
|
||||
<P><STRONG><a name="[36]"></a>RTCAlarm_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text))
|
||||
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_cl.o(RESET)
|
||||
</UL>
|
||||
<P><STRONG><a name="[10]"></a>RTC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text))
|
||||
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_cl.o(RESET)
|
||||
</UL>
|
||||
<P><STRONG><a name="[30]"></a>SPI1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text))
|
||||
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_cl.o(RESET)
|
||||
</UL>
|
||||
<P><STRONG><a name="[31]"></a>SPI2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text))
|
||||
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_cl.o(RESET)
|
||||
</UL>
|
||||
<P><STRONG><a name="[39]"></a>SPI3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text))
|
||||
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_cl.o(RESET)
|
||||
</UL>
|
||||
<P><STRONG><a name="[f]"></a>TAMPER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text))
|
||||
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_cl.o(RESET)
|
||||
</UL>
|
||||
<P><STRONG><a name="[25]"></a>TIM1_BRK_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text))
|
||||
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_cl.o(RESET)
|
||||
</UL>
|
||||
<P><STRONG><a name="[28]"></a>TIM1_CC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text))
|
||||
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_cl.o(RESET)
|
||||
</UL>
|
||||
<P><STRONG><a name="[27]"></a>TIM1_TRG_COM_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text))
|
||||
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_cl.o(RESET)
|
||||
</UL>
|
||||
<P><STRONG><a name="[26]"></a>TIM1_UP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text))
|
||||
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_cl.o(RESET)
|
||||
</UL>
|
||||
<P><STRONG><a name="[29]"></a>TIM2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text))
|
||||
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_cl.o(RESET)
|
||||
</UL>
|
||||
<P><STRONG><a name="[2a]"></a>TIM3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text))
|
||||
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_cl.o(RESET)
|
||||
</UL>
|
||||
<P><STRONG><a name="[2b]"></a>TIM4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text))
|
||||
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_cl.o(RESET)
|
||||
</UL>
|
||||
<P><STRONG><a name="[38]"></a>TIM5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text))
|
||||
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_cl.o(RESET)
|
||||
</UL>
|
||||
<P><STRONG><a name="[3c]"></a>TIM6_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text))
|
||||
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_cl.o(RESET)
|
||||
</UL>
|
||||
<P><STRONG><a name="[3d]"></a>TIM7_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text))
|
||||
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_cl.o(RESET)
|
||||
</UL>
|
||||
<P><STRONG><a name="[3a]"></a>UART4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text))
|
||||
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_cl.o(RESET)
|
||||
</UL>
|
||||
<P><STRONG><a name="[3b]"></a>UART5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text))
|
||||
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_cl.o(RESET)
|
||||
</UL>
|
||||
<P><STRONG><a name="[32]"></a>USART1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text))
|
||||
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_cl.o(RESET)
|
||||
</UL>
|
||||
<P><STRONG><a name="[33]"></a>USART2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text))
|
||||
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_cl.o(RESET)
|
||||
</UL>
|
||||
<P><STRONG><a name="[34]"></a>USART3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text))
|
||||
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_cl.o(RESET)
|
||||
</UL>
|
||||
<P><STRONG><a name="[d]"></a>WWDG_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text))
|
||||
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_cl.o(RESET)
|
||||
</UL>
|
||||
<P><STRONG><a name="[60]"></a>__user_initial_stackheap</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, startup_stm32f10x_cl.o(.text))
|
||||
<BR><BR>[Called By]<UL><LI><a href="#[55]">>></a> __user_setup_stackheap
|
||||
</UL>
|
||||
|
||||
<P><STRONG><a name="[63]"></a>__aeabi_memclr4</STRONG> (Thumb, 0 bytes, Stack size 4 bytes, rt_memclr_w.o(.text))
|
||||
<BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = __aeabi_memclr4
|
||||
</UL>
|
||||
<BR>[Called By]<UL><LI><a href="#[59]">>></a> main
|
||||
</UL>
|
||||
|
||||
<P><STRONG><a name="[90]"></a>__aeabi_memclr8</STRONG> (Thumb, 0 bytes, Stack size 4 bytes, rt_memclr_w.o(.text), UNUSED)
|
||||
|
||||
<P><STRONG><a name="[91]"></a>__rt_memclr_w</STRONG> (Thumb, 78 bytes, Stack size 4 bytes, rt_memclr_w.o(.text), UNUSED)
|
||||
|
||||
<P><STRONG><a name="[92]"></a>_memset_w</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, rt_memclr_w.o(.text), UNUSED)
|
||||
|
||||
<P><STRONG><a name="[93]"></a>__use_two_region_memory</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, heapauxi.o(.text), UNUSED)
|
||||
|
||||
<P><STRONG><a name="[94]"></a>__rt_heap_escrow$2region</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, heapauxi.o(.text), UNUSED)
|
||||
|
||||
<P><STRONG><a name="[95]"></a>__rt_heap_expand$2region</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, heapauxi.o(.text), UNUSED)
|
||||
|
||||
<P><STRONG><a name="[55]"></a>__user_setup_stackheap</STRONG> (Thumb, 74 bytes, Stack size 8 bytes, sys_stackheap_outer.o(.text))
|
||||
<BR><BR>[Stack]<UL><LI>Max Depth = 8 + Unknown Stack Size
|
||||
<LI>Call Chain = __user_setup_stackheap
|
||||
</UL>
|
||||
<BR>[Calls]<UL><LI><a href="#[5f]">>></a> __user_perproc_libspace
|
||||
<LI><a href="#[60]">>></a> __user_initial_stackheap
|
||||
</UL>
|
||||
<BR>[Called By]<UL><LI><a href="#[54]">>></a> __rt_entry_sh
|
||||
</UL>
|
||||
|
||||
<P><STRONG><a name="[5a]"></a>exit</STRONG> (Thumb, 18 bytes, Stack size 8 bytes, exit.o(.text))
|
||||
<BR><BR>[Stack]<UL><LI>Max Depth = 8 + Unknown Stack Size
|
||||
<LI>Call Chain = exit
|
||||
</UL>
|
||||
<BR>[Calls]<UL><LI><a href="#[61]">>></a> __rt_exit
|
||||
</UL>
|
||||
<BR>[Called By]<UL><LI><a href="#[58]">>></a> __rt_entry_main
|
||||
</UL>
|
||||
|
||||
<P><STRONG><a name="[96]"></a>__user_libspace</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, libspace.o(.text), UNUSED)
|
||||
|
||||
<P><STRONG><a name="[5f]"></a>__user_perproc_libspace</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, libspace.o(.text))
|
||||
<BR><BR>[Called By]<UL><LI><a href="#[55]">>></a> __user_setup_stackheap
|
||||
</UL>
|
||||
|
||||
<P><STRONG><a name="[97]"></a>__user_perthread_libspace</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, libspace.o(.text), UNUSED)
|
||||
|
||||
<P><STRONG><a name="[5e]"></a>_sys_exit</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, sys_exit.o(.text))
|
||||
<BR><BR>[Called By]<UL><LI><a href="#[5d]">>></a> __rt_exit_exit
|
||||
</UL>
|
||||
|
||||
<P><STRONG><a name="[98]"></a>__I$use$semihosting</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, use_no_semi.o(.text), UNUSED)
|
||||
|
||||
<P><STRONG><a name="[99]"></a>__use_no_semihosting_swi</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, use_no_semi.o(.text), UNUSED)
|
||||
|
||||
<P><STRONG><a name="[7]"></a>BusFault_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f10x_it.o(i.BusFault_Handler))
|
||||
<BR><BR>[Calls]<UL><LI><a href="#[7]">>></a> BusFault_Handler
|
||||
</UL>
|
||||
<BR>[Called By]<UL><LI><a href="#[7]">>></a> BusFault_Handler
|
||||
</UL>
|
||||
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_cl.o(RESET)
|
||||
</UL>
|
||||
<P><STRONG><a name="[9a]"></a>__semihosting_library_function</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, indicate_semi.o(.text), UNUSED)
|
||||
|
||||
<P><STRONG><a name="[a]"></a>DebugMon_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f10x_it.o(i.DebugMon_Handler))
|
||||
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_cl.o(RESET)
|
||||
</UL>
|
||||
<P><STRONG><a name="[5]"></a>HardFault_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f10x_it.o(i.HardFault_Handler))
|
||||
<BR><BR>[Calls]<UL><LI><a href="#[5]">>></a> HardFault_Handler
|
||||
</UL>
|
||||
<BR>[Called By]<UL><LI><a href="#[5]">>></a> HardFault_Handler
|
||||
</UL>
|
||||
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_cl.o(RESET)
|
||||
</UL>
|
||||
<P><STRONG><a name="[6]"></a>MemManage_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f10x_it.o(i.MemManage_Handler))
|
||||
<BR><BR>[Calls]<UL><LI><a href="#[6]">>></a> MemManage_Handler
|
||||
</UL>
|
||||
<BR>[Called By]<UL><LI><a href="#[6]">>></a> MemManage_Handler
|
||||
</UL>
|
||||
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_cl.o(RESET)
|
||||
</UL>
|
||||
<P><STRONG><a name="[4]"></a>NMI_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f10x_it.o(i.NMI_Handler))
|
||||
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_cl.o(RESET)
|
||||
</UL>
|
||||
<P><STRONG><a name="[b]"></a>PendSV_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f10x_it.o(i.PendSV_Handler))
|
||||
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_cl.o(RESET)
|
||||
</UL>
|
||||
<P><STRONG><a name="[9]"></a>SVC_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f10x_it.o(i.SVC_Handler))
|
||||
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_cl.o(RESET)
|
||||
</UL>
|
||||
<P><STRONG><a name="[c]"></a>SysTick_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f10x_it.o(i.SysTick_Handler))
|
||||
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_cl.o(RESET)
|
||||
</UL>
|
||||
<P><STRONG><a name="[4a]"></a>SystemInit</STRONG> (Thumb, 76 bytes, Stack size 8 bytes, system_stm32f10x.o(i.SystemInit))
|
||||
<BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = SystemInit ⇒ SetSysClockTo72
|
||||
</UL>
|
||||
<BR>[Calls]<UL><LI><a href="#[62]">>></a> SetSysClockTo72
|
||||
</UL>
|
||||
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_cl.o(.text)
|
||||
</UL>
|
||||
<P><STRONG><a name="[8]"></a>UsageFault_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f10x_it.o(i.UsageFault_Handler))
|
||||
<BR><BR>[Calls]<UL><LI><a href="#[8]">>></a> UsageFault_Handler
|
||||
</UL>
|
||||
<BR>[Called By]<UL><LI><a href="#[8]">>></a> UsageFault_Handler
|
||||
</UL>
|
||||
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_cl.o(RESET)
|
||||
</UL>
|
||||
<P><STRONG><a name="[64]"></a>flashInit</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, main.o(i.flashInit))
|
||||
<BR><BR>[Called By]<UL><LI><a href="#[59]">>></a> main
|
||||
</UL>
|
||||
|
||||
<P><STRONG><a name="[59]"></a>main</STRONG> (Thumb, 146 bytes, Stack size 72 bytes, main.o(i.main))
|
||||
<BR><BR>[Stack]<UL><LI>Max Depth = 76<LI>Call Chain = main ⇒ __aeabi_memclr4
|
||||
</UL>
|
||||
<BR>[Calls]<UL><LI><a href="#[63]">>></a> __aeabi_memclr4
|
||||
<LI><a href="#[64]">>></a> flashInit
|
||||
</UL>
|
||||
<BR>[Called By]<UL><LI><a href="#[58]">>></a> __rt_entry_main
|
||||
</UL>
|
||||
|
||||
<P><STRONG><a name="[65]"></a>FlashDriver_Flash_ErasePage</STRONG> (Thumb, 56 bytes, Stack size 16 bytes, flashdriver.o(i.FlashDriver_Flash_ErasePage))
|
||||
<BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = FlashDriver_Flash_ErasePage ⇒ FlashDriver_Flash_WaitForLastOperation
|
||||
</UL>
|
||||
<BR>[Calls]<UL><LI><a href="#[66]">>></a> FlashDriver_Flash_WaitForLastOperation
|
||||
</UL>
|
||||
<BR>[Called By]<UL><LI><a href="#[4e]">>></a> flash_erase
|
||||
</UL>
|
||||
|
||||
<P><STRONG><a name="[68]"></a>FlashDriver_Flash_GetBank1Status</STRONG> (Thumb, 34 bytes, Stack size 0 bytes, flashdriver.o(i.FlashDriver_Flash_GetBank1Status))
|
||||
<BR><BR>[Called By]<UL><LI><a href="#[66]">>></a> FlashDriver_Flash_WaitForLastOperation
|
||||
</UL>
|
||||
|
||||
<P><STRONG><a name="[6a]"></a>FlashDriver_Flash_Lock</STRONG> (Thumb, 12 bytes, Stack size 0 bytes, flashdriver.o(i.FlashDriver_Flash_Lock))
|
||||
<BR><BR>[Called By]<UL><LI><a href="#[4d]">>></a> flash_write
|
||||
<LI><a href="#[4e]">>></a> flash_erase
|
||||
</UL>
|
||||
|
||||
<P><STRONG><a name="[67]"></a>FlashDriver_Flash_ProgramHalfWord</STRONG> (Thumb, 48 bytes, Stack size 20 bytes, flashdriver.o(i.FlashDriver_Flash_ProgramHalfWord))
|
||||
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = FlashDriver_Flash_ProgramHalfWord ⇒ FlashDriver_Flash_WaitForLastOperation
|
||||
</UL>
|
||||
<BR>[Calls]<UL><LI><a href="#[66]">>></a> FlashDriver_Flash_WaitForLastOperation
|
||||
</UL>
|
||||
<BR>[Called By]<UL><LI><a href="#[4d]">>></a> flash_write
|
||||
</UL>
|
||||
|
||||
<P><STRONG><a name="[69]"></a>FlashDriver_Flash_Unlock</STRONG> (Thumb, 12 bytes, Stack size 0 bytes, flashdriver.o(i.FlashDriver_Flash_Unlock))
|
||||
<BR><BR>[Called By]<UL><LI><a href="#[4d]">>></a> flash_write
|
||||
<LI><a href="#[4e]">>></a> flash_erase
|
||||
</UL>
|
||||
|
||||
<P><STRONG><a name="[66]"></a>FlashDriver_Flash_WaitForLastOperation</STRONG> (Thumb, 36 bytes, Stack size 4 bytes, flashdriver.o(i.FlashDriver_Flash_WaitForLastOperation))
|
||||
<BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = FlashDriver_Flash_WaitForLastOperation
|
||||
</UL>
|
||||
<BR>[Calls]<UL><LI><a href="#[68]">>></a> FlashDriver_Flash_GetBank1Status
|
||||
</UL>
|
||||
<BR>[Called By]<UL><LI><a href="#[67]">>></a> FlashDriver_Flash_ProgramHalfWord
|
||||
<LI><a href="#[65]">>></a> FlashDriver_Flash_ErasePage
|
||||
</UL>
|
||||
|
||||
<P><STRONG><a name="[4e]"></a>flash_erase</STRONG> (Thumb, 52 bytes, Stack size 16 bytes, flashdriver.o(i.flash_erase))
|
||||
<BR><BR>[Stack]<UL><LI>Max Depth = 36<LI>Call Chain = flash_erase ⇒ FlashDriver_Flash_ErasePage ⇒ FlashDriver_Flash_WaitForLastOperation
|
||||
</UL>
|
||||
<BR>[Calls]<UL><LI><a href="#[69]">>></a> FlashDriver_Flash_Unlock
|
||||
<LI><a href="#[6a]">>></a> FlashDriver_Flash_Lock
|
||||
<LI><a href="#[65]">>></a> FlashDriver_Flash_ErasePage
|
||||
</UL>
|
||||
<BR>[Address Reference Count : 1]<UL><LI> flashdriver.o(flbase)
|
||||
</UL>
|
||||
<P><STRONG><a name="[4c]"></a>flash_read</STRONG> (Thumb, 30 bytes, Stack size 12 bytes, flashdriver.o(i.flash_read))
|
||||
<BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = flash_read
|
||||
</UL>
|
||||
<BR>[Address Reference Count : 1]<UL><LI> flashdriver.o(flbase)
|
||||
</UL>
|
||||
<P><STRONG><a name="[4d]"></a>flash_write</STRONG> (Thumb, 62 bytes, Stack size 20 bytes, flashdriver.o(i.flash_write))
|
||||
<BR><BR>[Stack]<UL><LI>Max Depth = 44<LI>Call Chain = flash_write ⇒ FlashDriver_Flash_ProgramHalfWord ⇒ FlashDriver_Flash_WaitForLastOperation
|
||||
</UL>
|
||||
<BR>[Calls]<UL><LI><a href="#[69]">>></a> FlashDriver_Flash_Unlock
|
||||
<LI><a href="#[67]">>></a> FlashDriver_Flash_ProgramHalfWord
|
||||
<LI><a href="#[6a]">>></a> FlashDriver_Flash_Lock
|
||||
</UL>
|
||||
<BR>[Address Reference Count : 1]<UL><LI> flashdriver.o(flbase)
|
||||
</UL><P>
|
||||
<H3>
|
||||
Local Symbols
|
||||
</H3>
|
||||
<P><STRONG><a name="[62]"></a>SetSysClockTo72</STRONG> (Thumb, 190 bytes, Stack size 12 bytes, system_stm32f10x.o(i.SetSysClockTo72))
|
||||
<BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = SetSysClockTo72
|
||||
</UL>
|
||||
<BR>[Called By]<UL><LI><a href="#[4a]">>></a> SystemInit
|
||||
</UL>
|
||||
<P>
|
||||
<H3>
|
||||
Undefined Global Symbols
|
||||
</H3><HR></body></html>
|
||||
11
project/Objects/STM32F105FlashDrv.lnp
Normal file
11
project/Objects/STM32F105FlashDrv.lnp
Normal file
@ -0,0 +1,11 @@
|
||||
--cpu Cortex-M3
|
||||
".\objects\startup_stm32f10x_cl.o"
|
||||
".\objects\system_stm32f10x.o"
|
||||
".\objects\core_cm3.o"
|
||||
".\objects\stm32f10x_it.o"
|
||||
".\objects\flashdriver.o"
|
||||
".\objects\main.o"
|
||||
--strict --scatter ".\link_sct\STM32F105FlashDrv.sct"
|
||||
--summary_stderr --info summarysizes --map --load_addr_map_info --xref --callgraph --symbols
|
||||
--info sizes --info totals --info unused --info veneers
|
||||
--list ".\Listings\STM32F105FlashDrv.map" -o .\Objects\STM32F105FlashDrv.axf
|
||||
29
project/Objects/STM32F105FlashDrv_STM32F105FlashDrv.dep
Normal file
29
project/Objects/STM32F105FlashDrv_STM32F105FlashDrv.dep
Normal file
@ -0,0 +1,29 @@
|
||||
Dependencies for Project 'STM32F105FlashDrv', Target 'STM32F105FlashDrv': (DO NOT MODIFY !)
|
||||
F (..\source\platform\CMSIS\ST\STM32F10x\Source\arm\startup_stm32f10x_cl.s)(0x61605445)(--cpu Cortex-M3 -g --apcs=interwork
-I.\RTE\_STM32F105FlashDrv
-IC:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.1.0\Device\Include
-IC:\Keil_v5\ARM\CMSIS\Include
--pd "__UVISION_VERSION SETA 525" --pd "STM32F10X_CL SETA 1"
--list .\listings\startup_stm32f10x_cl.lst --xref -o .\objects\startup_stm32f10x_cl.o --depend .\objects\startup_stm32f10x_cl.d)
|
||||
F (..\source\platform\CMSIS\ST\STM32F10x\Source\system_stm32f10x.c)(0x61605444)(--c99 --gnu -c --cpu Cortex-M3 -g -O3 --apcs=interwork --split_sections -I ..\source\platform\CMSIS\ST\STM32F10x\CoreSupport -I ..\source\platform\CMSIS\ST\STM32F10x\Include -I ..\source\code_app\STM32F10x\Inc -I ..\source\platform\Chip_peripheral_dev\STM32F10x_FWLib\inc
-I.\RTE\_STM32F105FlashDrv
-IC:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.1.0\Device\Include
-IC:\Keil_v5\ARM\CMSIS\Include
-D__UVISION_VERSION="525" -DSTM32F10X_CL -DUSE_STDPERIPH_DRIVER -DSTM32F10X_CL
-o .\objects\system_stm32f10x.o --omf_browse .\objects\system_stm32f10x.crf --depend .\objects\system_stm32f10x.d)
|
||||
I (..\source\platform\CMSIS\ST\STM32F10x\Include\stm32f10x.h)(0x6713454C)
|
||||
I (..\source\platform\CMSIS\ST\STM32F10x\CoreSupport\core_cm3.h)(0x61605444)
|
||||
I (C:\Keil_v5\ARM\ARMCC\include\stdint.h)(0x599ECD2E)
|
||||
I (..\source\platform\CMSIS\ST\STM32F10x\Include\system_stm32f10x.h)(0x61605444)
|
||||
I (..\source\platform\CMSIS\ST\STM32F10x\Include\stm32f10x_libopt.h)(0x67136DDD)
|
||||
F (..\source\platform\CMSIS\ST\STM32F10x\CoreSupport\core_cm3.c)(0x61605444)(--c99 --gnu -c --cpu Cortex-M3 -g -O3 --apcs=interwork --split_sections -I ..\source\platform\CMSIS\ST\STM32F10x\CoreSupport -I ..\source\platform\CMSIS\ST\STM32F10x\Include -I ..\source\code_app\STM32F10x\Inc -I ..\source\platform\Chip_peripheral_dev\STM32F10x_FWLib\inc
-I.\RTE\_STM32F105FlashDrv
-IC:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.1.0\Device\Include
-IC:\Keil_v5\ARM\CMSIS\Include
-D__UVISION_VERSION="525" -DSTM32F10X_CL -DUSE_STDPERIPH_DRIVER -DSTM32F10X_CL
-o .\objects\core_cm3.o --omf_browse .\objects\core_cm3.crf --depend .\objects\core_cm3.d)
|
||||
I (C:\Keil_v5\ARM\ARMCC\include\stdint.h)(0x599ECD2E)
|
||||
F (..\source\platform\CMSIS\ST\STM32F10x\Source\stm32f10x_it.c)(0x61605442)(--c99 --gnu -c --cpu Cortex-M3 -g -O3 --apcs=interwork --split_sections -I ..\source\platform\CMSIS\ST\STM32F10x\CoreSupport -I ..\source\platform\CMSIS\ST\STM32F10x\Include -I ..\source\code_app\STM32F10x\Inc -I ..\source\platform\Chip_peripheral_dev\STM32F10x_FWLib\inc
-I.\RTE\_STM32F105FlashDrv
-IC:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.1.0\Device\Include
-IC:\Keil_v5\ARM\CMSIS\Include
-D__UVISION_VERSION="525" -DSTM32F10X_CL -DUSE_STDPERIPH_DRIVER -DSTM32F10X_CL
-o .\objects\stm32f10x_it.o --omf_browse .\objects\stm32f10x_it.crf --depend .\objects\stm32f10x_it.d)
|
||||
I (..\source\platform\CMSIS\ST\STM32F10x\Include\stm32f10x_it.h)(0x61605442)
|
||||
I (..\source\platform\CMSIS\ST\STM32F10x\Include\stm32f10x.h)(0x6713454C)
|
||||
I (..\source\platform\CMSIS\ST\STM32F10x\CoreSupport\core_cm3.h)(0x61605444)
|
||||
I (C:\Keil_v5\ARM\ARMCC\include\stdint.h)(0x599ECD2E)
|
||||
I (..\source\platform\CMSIS\ST\STM32F10x\Include\system_stm32f10x.h)(0x61605444)
|
||||
I (..\source\platform\CMSIS\ST\STM32F10x\Include\stm32f10x_libopt.h)(0x67136DDD)
|
||||
F (..\source\code_app\STM32F10x\Source\flashDriver.c)(0x6715FB4B)(--c99 --gnu -c --cpu Cortex-M3 -g -O3 --apcs=interwork --split_sections -I ..\source\platform\CMSIS\ST\STM32F10x\CoreSupport -I ..\source\platform\CMSIS\ST\STM32F10x\Include -I ..\source\code_app\STM32F10x\Inc -I ..\source\platform\Chip_peripheral_dev\STM32F10x_FWLib\inc
-I.\RTE\_STM32F105FlashDrv
-IC:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.1.0\Device\Include
-IC:\Keil_v5\ARM\CMSIS\Include
-D__UVISION_VERSION="525" -DSTM32F10X_CL -DUSE_STDPERIPH_DRIVER -DSTM32F10X_CL
-o .\objects\flashdriver.o --omf_browse .\objects\flashdriver.crf --depend .\objects\flashdriver.d)
|
||||
I (..\source\platform\Chip_peripheral_dev\STM32F10x_FWLib\inc\stm32f10x_flash.h)(0x61605445)
|
||||
I (..\source\platform\CMSIS\ST\STM32F10x\Include\stm32f10x.h)(0x6713454C)
|
||||
I (..\source\platform\CMSIS\ST\STM32F10x\CoreSupport\core_cm3.h)(0x61605444)
|
||||
I (C:\Keil_v5\ARM\ARMCC\include\stdint.h)(0x599ECD2E)
|
||||
I (..\source\platform\CMSIS\ST\STM32F10x\Include\system_stm32f10x.h)(0x61605444)
|
||||
I (..\source\platform\CMSIS\ST\STM32F10x\Include\stm32f10x_libopt.h)(0x67136DDD)
|
||||
I (..\source\code_app\STM32F10x\Inc\flashDriver.h)(0x67130C9F)
|
||||
I (..\source\code_app\STM32F10x\Inc\flashApi.h)(0x67134BCD)
|
||||
F (..\source\code_app\STM32F10x\Source\main.c)(0x6715FA14)(--c99 --gnu -c --cpu Cortex-M3 -g -O3 --apcs=interwork --split_sections -I ..\source\platform\CMSIS\ST\STM32F10x\CoreSupport -I ..\source\platform\CMSIS\ST\STM32F10x\Include -I ..\source\code_app\STM32F10x\Inc -I ..\source\platform\Chip_peripheral_dev\STM32F10x_FWLib\inc
-I.\RTE\_STM32F105FlashDrv
-IC:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.1.0\Device\Include
-IC:\Keil_v5\ARM\CMSIS\Include
-D__UVISION_VERSION="525" -DSTM32F10X_CL -DUSE_STDPERIPH_DRIVER -DSTM32F10X_CL
-o .\objects\main.o --omf_browse .\objects\main.crf --depend .\objects\main.d)
|
||||
I (..\source\code_app\STM32F10x\Inc\flashApi.h)(0x67134BCD)
|
||||
I (C:\Keil_v5\ARM\ARMCC\include\stdint.h)(0x599ECD2E)
|
||||
BIN
project/STM32F105FlashDrv.uvguix.Administrator
Normal file
BIN
project/STM32F105FlashDrv.uvguix.Administrator
Normal file
Binary file not shown.
BIN
project/STM32F105FlashDrv.uvprojx
Normal file
BIN
project/STM32F105FlashDrv.uvprojx
Normal file
Binary file not shown.
BIN
project/link_sct/STM32F105FlashDrv.sct
Normal file
BIN
project/link_sct/STM32F105FlashDrv.sct
Normal file
Binary file not shown.
15
project/output/STM32F105FlashDrv-sram.hex
Normal file
15
project/output/STM32F105FlashDrv-sram.hex
Normal file
@ -0,0 +1,15 @@
|
||||
:020000042000DA
|
||||
:20F0000029F1002049F10020F1F0002070B505464FF43026304600F059F8042811D1094C38
|
||||
:20F02000206940F0020020616561206940F040002061304600F04AF8216941F6FD7211402B
|
||||
:20F04000216170BD0020024008490420CA68D20701D001207047CA68520701D5022070473C
|
||||
:20F06000C968C906FBD5032070470000002002400248016941F080010161704700200240A3
|
||||
:20F08000F0B506464FF400570D46384600F01EF804280CD1064C206940F0010020613580C3
|
||||
:20F0A000384600F013F82169BA1E11402161F0BD00200240034802494160034941607047B8
|
||||
:20F0C0002301674500200240AB89EFCD00B50346FFF7BAFF03E000BFFFF7B6FF5B1E012872
|
||||
:20F0E00003D0002B00D1052000BD002BF4D1FAE770B50E46040014D0002E12D072B6FFF7FF
|
||||
:20F10000D9FF08493520C860002505E02046FFF77DFF04F500646D1CB542F7D3FFF7A8FF23
|
||||
:20F1200062B670BD0020024030B50446002041B13AB1002302E0E55CCD545B1C9342FAD37C
|
||||
:20F1400030BD012030BD0000F0B515460E4607004FF0000416D0002D14D0002E12D072B6E7
|
||||
:20F16000FFF7A8FF08E000BF06EB4400018807EB4400FFF785FF641CB4EB550FF4D3FFF79D
|
||||
:08F1800077FF62B6F0BD00004C
|
||||
:00000001FF
|
||||
BIN
si/GD32F105RCFlashDrv.si4project/Backup/gd32f10x_libopt(158).h
Normal file
BIN
si/GD32F105RCFlashDrv.si4project/Backup/gd32f10x_libopt(158).h
Normal file
Binary file not shown.
@ -0,0 +1,7 @@
|
||||
<?xml version="1.0" encoding="utf-8"?>
|
||||
<SourceInsightBookmarks
|
||||
AppVer="4.00.0085"
|
||||
AppVerMinReader="4.00.0009"
|
||||
>
|
||||
<Bookmarks/>
|
||||
</SourceInsightBookmarks>
|
||||
BIN
si/GD32F105RCFlashDrv.si4project/GD32F105RCFlashDrv.sip_sym
Normal file
BIN
si/GD32F105RCFlashDrv.si4project/GD32F105RCFlashDrv.sip_sym
Normal file
Binary file not shown.
BIN
si/GD32F105RCFlashDrv.si4project/GD32F105RCFlashDrv.sip_xab
Normal file
BIN
si/GD32F105RCFlashDrv.si4project/GD32F105RCFlashDrv.sip_xab
Normal file
Binary file not shown.
BIN
si/GD32F105RCFlashDrv.si4project/GD32F105RCFlashDrv.sip_xad
Normal file
BIN
si/GD32F105RCFlashDrv.si4project/GD32F105RCFlashDrv.sip_xad
Normal file
Binary file not shown.
BIN
si/GD32F105RCFlashDrv.si4project/GD32F105RCFlashDrv.sip_xc
Normal file
BIN
si/GD32F105RCFlashDrv.si4project/GD32F105RCFlashDrv.sip_xc
Normal file
Binary file not shown.
BIN
si/GD32F105RCFlashDrv.si4project/GD32F105RCFlashDrv.sip_xf
Normal file
BIN
si/GD32F105RCFlashDrv.si4project/GD32F105RCFlashDrv.sip_xf
Normal file
Binary file not shown.
BIN
si/GD32F105RCFlashDrv.si4project/GD32F105RCFlashDrv.sip_xm
Normal file
BIN
si/GD32F105RCFlashDrv.si4project/GD32F105RCFlashDrv.sip_xm
Normal file
Binary file not shown.
BIN
si/GD32F105RCFlashDrv.si4project/GD32F105RCFlashDrv.sip_xr
Normal file
BIN
si/GD32F105RCFlashDrv.si4project/GD32F105RCFlashDrv.sip_xr
Normal file
Binary file not shown.
BIN
si/GD32F105RCFlashDrv.si4project/GD32F105RCFlashDrv.sip_xsb
Normal file
BIN
si/GD32F105RCFlashDrv.si4project/GD32F105RCFlashDrv.sip_xsb
Normal file
Binary file not shown.
BIN
si/GD32F105RCFlashDrv.si4project/GD32F105RCFlashDrv.sip_xsd
Normal file
BIN
si/GD32F105RCFlashDrv.si4project/GD32F105RCFlashDrv.sip_xsd
Normal file
Binary file not shown.
BIN
si/GD32F105RCFlashDrv.si4project/GD32F105RCFlashDrv.siproj
Normal file
BIN
si/GD32F105RCFlashDrv.si4project/GD32F105RCFlashDrv.siproj
Normal file
Binary file not shown.
@ -0,0 +1,22 @@
|
||||
<?xml version="1.0" encoding="utf-8"?>
|
||||
<ProjectSettings
|
||||
AppVer="4.00.0085"
|
||||
AppVerMinReader="4.00.0034"
|
||||
GlobalConfiguration="1"
|
||||
GlobalWorkspace="0"
|
||||
LocalsInDb="0"
|
||||
IndexMembers="1"
|
||||
IndexFragments="1"
|
||||
UseMasterFileList="0"
|
||||
SourceDir="..\..\..\source"
|
||||
BackupDir="%PROJECT_DATA_DIR%\Backup"
|
||||
MasterFileList="%PROJECT_SOURCE_DIR%\%PROJECT_NAME%_filelist.txt"
|
||||
IsImportProject="0"
|
||||
>
|
||||
<Imports>
|
||||
<ImportedLibs/>
|
||||
</Imports>
|
||||
<ParseConditions>
|
||||
<Defines/>
|
||||
</ParseConditions>
|
||||
</ProjectSettings>
|
||||
BIN
si/GD32F105RCFlashDrv.si4project/GD32F105RCFlashDrv.siwork
Normal file
BIN
si/GD32F105RCFlashDrv.si4project/GD32F105RCFlashDrv.siwork
Normal file
Binary file not shown.
@ -0,0 +1,7 @@
|
||||
<?xml version="1.0" encoding="utf-8"?>
|
||||
<SourceInsightCodeSnippets
|
||||
AppVer="4.00.0085"
|
||||
AppVerMinReader="4.00.0019"
|
||||
>
|
||||
<SnippetList/>
|
||||
</SourceInsightCodeSnippets>
|
||||
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Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user